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Lab 8 (Flip Flops)

This document describes an experiment on flip flops from a digital electronics course. It includes instructions to build and simulate D, SR, JK, and T flip flop circuits using a logic simulator. It asks questions about the behavior of each flip flop, such as how the circuits react to different input conditions, the purpose of various control inputs, and how to derive one type of flip flop from another. The student is asked to observe and verify the expected behavior in each part of the experiment.

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3K views

Lab 8 (Flip Flops)

This document describes an experiment on flip flops from a digital electronics course. It includes instructions to build and simulate D, SR, JK, and T flip flop circuits using a logic simulator. It asks questions about the behavior of each flip flop, such as how the circuits react to different input conditions, the purpose of various control inputs, and how to derive one type of flip flop from another. The student is asked to observe and verify the expected behavior in each part of the experiment.

Uploaded by

hanan
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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Course : Digital Electronics

Course Code : ECE 345


Experiment : 8
Title : Flip Flops
Lab 8: Flip Flops

Lab 9: Latches and Sequential logic circuit


Instructions

Part 1: D Flip Flop


• Launch Logic Simulator (Logic.ly or Multisim or CircuitVerse).

• Build the following D Flip Flop circuit using logic gates.

• Start the Simulation.

Q: what does the toggle C stand for? What does it do to the circuit?
Enable input allows D input to be selectively captured
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Q: Make C=0 and toggle D On & Off. What happens to the output?
when C=0, the two outputs will be on and off in both conditions.
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• Attach a screenshot of your circuit


Lab 8: Flip Flops

Part 2: Verifying the SR Flip Flop Characteristic Table


• Launch Logic.ly
• Connect the following circuit:

• Start the simulation.


• Using the Characteristic table provided, vary the inputs and observe the output

Q: With the Clock input equal to 0, does it matter what you do to the S and R inputs?
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No, in an SR flip-flop with the clock input equal to 0, changes to the S and R inputs are ignored until
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the clock transitions to 1.
Q: Were you able to observe the indeterminate states on the characteristic table? When S and R are both
equal to 1, what happens to the output?
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When _____________________________________________________________________
both S and R inputs are 1 in an SR flip-flop, it leads to an indeterminate state, causing unpredictable behavior.

Q: What flip flop can we use to solve the undefined state? Create the circuit with the new flip flop and observe
the output.
We can use a D flip-flop. Because the D flip-flop circuit has a single data input (D) and a clock input
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(CLK), eliminating the possibility of the undefined state


Lab 8: Flip Flops

Part 3: Verifying the JK Flip Flop Behavior


• Launch Logic.ly
• Connect the following circuit and compare its behavior to a JK flip flop

• Verify the results and attach a screenshot of the two circuits


Lab 8: Flip Flops

Part 4: Verifying the T Flip Flop Behavior


• Launch Logic.ly
• Create a T flip flop circuit and attach a screenshot below

Q: How can you create a T flip flop using a JK flip flop?


We can you create a T flip flop using a JK flip flop by connect the J and K inputs together and use
___________________________________________________________
the T input to control toggling.
• Create a T flip flop circuit using a JK flip flop and verify the output.
• Attach a screenshot of the circuit

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