Onsemi FSCQ0765RTYDTU Datasheet
Onsemi FSCQ0765RTYDTU Datasheet
Onsemi FSCQ0765RTYDTU Datasheet
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MARKING DIAGRAM
Description
A Quasi−Resonant Converter (QRC) typically shows lower EMI
and higher power conversion efficiency compared to a conventional
hard−switched converter with a fixed switching frequency. Therefore,
a QRC is well suited for noise−sensitive applications, such as color TV
$Y&Z&3&K
and audio. Each product in the FSCQ series contains an integrated CQxx65RT
Pulse Width Modulation (PWM) controller and a SENSEFET®. This
series is specifically designed for quasi−resonant off−line Switch
Mode Power Supplies (SMPS) with minimal external components.
The PWM controller includes an integrated fixed frequency oscillator,
under−voltage lockout, leading−edge blanking (LEB), optimized gate
driver, internal soft−start, temperature−compensated precise current
sources for loop compensation, and self−protection circuitry. $Y = onsemi Logo
Compared with a discrete MOSFET and PWM controller solution, &Z = Assembly Plant Code
&3 = Date Code (Year & Week)
the FSCQ series can reduce total cost, component count, size, &K = Lot Code
and weight; while increasing efficiency, productivity, and system CQXX65RT = Specific Device Code
reliability. These devices provide a basic platform for cost−effective XX = 07, 09, 12, 15
designs of quasi−resonant switching flyback converters.
Applications
• CTV
• Audio Amplifier
Related Resources
• https://www.onsemi.com/pub/Collateral/AN−4146.pdf
• https://www.onsemi.com/pub/Collateral/AN−4140.pdf
VO
AC
IN
Drain
FSCQ−Series
PWM
Sync GND
VFB VCC
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FSCQ Series
Idelay PWM
VFB
S Q
4
2.5 R Gate
R Q
R Driver
LEB
600 ns
VSD
Sync
S Q
AOCP
Vovp Vcc good Q S
R Q 2 GND
(Vcc = 9 V)
Q R TSD
Vocp
Power Off Reset (Vcc = 6 V)
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FSCQ Series
Pin Configuration
5 SYNC
4 VFB
3 VCC
2 GND
1 DRAIN
PIN DESCRIPTION
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
Pin No. Symbol Description
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
1 DRAIN This pin is the high−voltage power SENSEFET drain connection.
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
2 GND This pin is the control ground and the SENSEFET source.
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
3 VCC This pin is the positive supply input. This pin provides internal operating current for both startup
and steady−state operation.
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
4 VFB This pin is internally connected to the inverting input of the PWM comparator. The collector
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ of an opto−coupler is typically tied to this pin. For stable operation, a capacitor should be placed
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
between this pin and GND. If the voltage of this pin reaches 7.5 V, the overload protection
triggers, which results in the FPS] shutting down.
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
5 SYNC This pin is internally connected to the sync detect comparator for quasi−resonant switching. In
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
normal quasi−resonant operation, the threshold of the sync comparator is 4.6 V / 2.6 V. Whereas,
the sync threshold is changed to 3.0 V / 1.8 V in an extended quasi−resonant operation.
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ABSOLUTE MAXIMUM RATINGS (TA = 25°C unless otherwise specified)
Parameter Symbol Value Unit
Drain Pin Voltage VDS 650 V
Supply Voltage VCC 20 V
Analog Input Voltage Range Vsync −0.3 to 13 V
VFB −0.3 to VCC
Drain Current Pulsed (Note 4) FSCQ0765RT IDM 15.2 A
FSCQ0965RT 16.4
FSCQ1265RT 21.2
FSCQ1565RT 26.4
Continuous Drain Current (TC = 25°C) FSCQ0765RT ID 3.8 A(rms)
(TC: Case Back Surface Temperature)
FSCQ0965RT 4.1
FSCQ1265RT 5.3
FSCQ1565RT 6.6
Continuous Drain Current* (TDL = 25°C) FSCQ0765RT ID* 7.0 A(rms)
(TDL: Case Back Surface Temperature)
FSCQ0965RT 7.6
FSCQ1265RT 11.0
FSCQ1565RT 13.3
Continuous Drain Current (TC = 100°C) FSCQ0765RT ID 2.4 A(rms)
FSCQ0965RT 2.6
FSCQ1265RT 3.4
FSCQ1565RT 4.4
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FSCQ Series
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FSCQ Series
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FSCQ Series
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FSCQ Series
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FSCQ Series
Figure 12. Shutdown Delay Current Figure 13. Shutdown Feedback Voltage
Figure 14. Feedback Source Current Figure 15. Burst Mode Feedback Source Current
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FSCQ Series
Figure 16. Feedback Offset Voltage Figure 17. Burst Mode Enable Feedback Voltage
Figure 18. Sync. Threshold in Normal QR(H) Figure 19. Sync. Threshold in Normal QR(L)
Figure 20. Sync. Threshold in Extended QR(H) Figure 21. Sync. Threshold in Extended QR(L)
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FSCQ Series
Figure 22. Extended QR Enable Frequency Figure 23. Extended QR Disable Frequency
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FSCQ Series
Functional Description The minimum average of the current supplied from the
AC is given by:
Startup
Figure 25 shows the typical startup circuit and the
transformer auxiliary winding for the FSCQ series. Before I SUP AVG
+ ǒ Ǹ2 @ VAC MIN
p
−
V START
2
Ǔ @
1
R STR
(eq. 1)
the FSCQ series begins switching, it consumes only startup
current (typically 25 mA). The current supplied from the AC where Vacmin is the minimum input voltage, VSTART is
line charges the external capacitor (Ca1) that is connected to the FSCQ series’ start voltage (15 V), and Rstr is
the VCC pin. When VCC reaches the start voltage of 15 V the startup resistor. The startup resistor should be
(VSTART), the FSCQ series begins switching and its current chosen so that Isupavg is larger than the maximum
consumption increases to IOP. Then, the FSCQ series startup current (50 mA).
continues normal switching operation and the power Once the resistor value is determined, the maximum loss in
required is supplied from the transformer auxiliary winding, the startup resistor is obtained as:
unless VCC drops below the stop voltage of 9 V (VSTOP). To
guarantee stable operation of the control IC, VCC has ȡǒV
@ȧ
MAX 2 Ǔ ) V START
2
2 Ǹ2 @ V START @ V AC ȣ
MAX
ȧ
1 AC
under−voltage lockout (UVLO) with 6 V hysteresis. Loss + *
Figure 26 shows the relationship between the operating
R STR
Ȣ 2 p
Ȥ
supply current of the FSCQ series and the supply voltage (eq. 2)
(VCC).
where Vacmax is the maximum input voltage.
The startup resistor should have properly rated dissipation
wattage.
CDC
Synchronization
The FSCQ series employs a quasi−resonant switching
1N4007 technique to minimize the switching noise and loss. In this
AC line technique, a capacitor (Cr) is added between the MOSFET
(Vacmin − Vacmax) Isup drain and the source, as shown in Figure 27. The basic
Rstr waveforms of the quasi−resonant converter are shown in
Figure 28. The external capacitor lowers the rising slope of
VCC Da the drain voltage to reduce the EMI caused when the
MOSFET turns off. To minimize the MOSFET’s switching
FSCQ−Series loss, the MOSFET should be turned on when the drain
Ca1 Ca2 voltage reaches its minimum value, as shown in Figure 28.
+ Np
CDC VDC
− Ns
Figure 25. Startup Circuit Lm Vo
Drain
ICC IOP Value Cr +
FSCQ0565RT: 4 mA (Typ.) Ids Vds
FSCQ0765RT: 4 mA (Typ.) Sync −
FSCQ0965RT: 6 mA (Typ.)
FSCQ1265RT: 6 mA (Typ.) GND
FSCQ1565RT: 7 mA (Typ.)
Vco Da
Vcc
Rcc Na
IOP
Ca1 Ca2 DSY
Power Up
Power Down RSY1
ISTART
VCC
CSY RSY2
VSTOP = 9 V VSTART = 15 V VZ
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FSCQ Series
Vgs
2VRO
VRO tQ
Vds VRO
Vsync
V
VDC
Vrh (4.6 V)
Vrf (2.6 V)
Ids
tR
Ipk
MOSFET Gate
t R + R SY2 @ C SY @ In ǒV CO
2.6
@
R SY2
R SY1 ) R SY2
Ǔ (eq. 3)
t Q + p @ ǸL m @ C eo (eq. 4)
N a @ ǒV O ) V FOǓ
V CO + * V Fa (eq. 5)
Ns Output Power
where: Figure 30. Extended Quasi−Resonant Operation
Lm is the primary side inductance of the
transformer, In general, the QRC has a limitation in a wide load range
Ns is the number of turns for the output application, since the switching frequency increases as the
winding, output load decreases, resulting in a severe switching loss in
Na is the number of turns for the VCC the light load condition. To overcome this limitation, the
winding, FSCQ series employs an extended quasi−resonant switching
VFo is the diode forward−voltage drop of operation. Figure 30 shows the mode change between
the output winding, normal and extended quasi−resonant operations. In the
VFa is the diode forward−voltage drop of normal quasi−resonant operation, the FSCQ series enters
the VCC winding; and into the extended quasi−resonant operation when the
Ceo is the sum of the output capacitance switching frequency exceeds 90 kHz as the load reduces. To
of the MOSFET and the external reduce the switching frequency, the MOSFET is turned on
capacitor, Cr. when the drain voltage reaches the second minimum level,
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FSCQ Series
as shown in Figure 31. Once the FSCQ series enters into the Leading Edge Blanking (LEB)
extended quasi−resonant operation, the first sync signal is At the instant the internal SENSEFET is turned on, there
ignored. After the first sync signal is applied, the sync is usually a high current spike through the SENSEFET,
threshold levels are changed from 4.6 V and 2.6 V to 3 V and caused by the external resonant capacitor across the
1.8 V, respectively, and the MOSFET turn−on time is MOSFET and secondary−side rectifier reverse recovery.
synchronized to the second sync signal. The FSCQ series Excessive voltage across the Rsense resistor can lead to
returns to its normal quasi−resonant operation when the incorrect feedback operation in the current mode PWM
switching frequency reaches 45 kHz as the load increases. control. To counter this effect, the FSCQ series employs a
leading edge blanking (LEB) circuit. This circuit inhibits the
Vds PWM comparator for a short time (tLEB) after the Sense FET
is turned on.
2VRO
VCC Vref
Idelay IFB
VO Vfb
Vsyn H11A817A
4
D1 D2
OSC
c CB 2.5R
+ Gate
Vfb * R Driver
4.6 V
3V KA431 −
2.6 V
1.8 V
OLP Rsense
VSD
MOSFET Gate
Protection Circuits
Figure 31. Extended QR Operation Waveforms The FSCQ series has several self−protective functions
such as overload protection (OLP), abnormal over−current
protection (AOCP), overvoltage protection (OVP), and
Feedback Control
thermal shutdown (TSD). OLP and OVP are auto−restart
The FSCQ series employs current mode control, as shown mode protections, while TSD and AOCP are latch mode
in Figure 32. An optocoupler (such as onsemi’s H11A817A) protections. Because these protection circuits are fully
and shunt regulator (such as onsemi’s KA431) are typically integrated into the IC without external components, the
used to implement the feedback network. Comparing the reliability can be improved without increasing cost.
feedback voltage with the voltage across the Rsense resistor, − Auto− Restart Mode Protection: Once the fault condition
plus an offset voltage, makes it possible to control the is detected, switching is terminated and the SENSEFET
switching duty cycle. When the reference pin voltage of the remains off. This causes VCC to fall. When VCC falls to
shunt regulator exceeds the internal reference voltage of 2.5 the under voltage lockout (UVLO) stop voltage of 9 V, the
V, the opto−coupler LED current increases, pulling down the protection is reset and the FSCQ series consumes only
feedback voltage and reducing the duty cycle. This typically startup current (25 mA). Then, the VCC capacitor is
occurs when input voltage is increased or output load is charged up, since the current supplied through the startup
decreased. resistor is larger than the current that the FPS consumes.
Pulse−by−Pulse Current Limit When VCC reaches the start voltage of 15 V, the FSCQ
Because current mode control is employed, the peak series resumes its normal operation. If the fault condition
current through the SENSEFET is limited by the inverting is not removed, the SENSEFET remains off and VCC
input of the PWM comparator (Vfb*) as shown in Figure 32. drops to stop voltage again. In this manner, the
The feedback current (IFB) and internal resistors are auto−restart can alternately enable and disable the
designed so that the maximum cathode voltage of diode D2 switching of the power SENSEFET until the fault
is about 2.8 V, which occurs when all IFB flows through the condition is eliminated (see Figure 33).
internal resistors. Since D1 is blocked when the feedback − Latch Mode Protection: Once this protection is triggered,
voltage (Vfb) exceeds 2.8 V, the maximum voltage of the switching is terminated and the SENSEFET remains off
cathode of D2 is clamped at this voltage, thus clamping Vfb*. until the AC power line is unplugged. Then, VCC
Therefore, the peak value of the current through the continues charging and discharging between 9 V and
SENSEFET is limited. 15 V. The latch is reset only when VCC is discharged to
6 V by unplugging the AC power line.
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FSCQ Series
AOCP GND
specified time to determine whether it is a transient situation −
VAOCP
or an overload situation. Because of the pulse−by−pulse
current limit capability, the maximum peak current through Figure 35. AOCP Block
the SENSEFET is limited, and therefore the maximum input
power is restricted with a given input voltage. If the output
Over−Voltage Protection (OVP)
consumes more than this maximum power, the output
If the secondary side feedback circuit malfunctions or a
voltage (Vo) decreases below the set voltage. This reduces
solder defect causes an open in the feedback path, the current
the current through the opto−coupler LED, which also
through the opto−coupler transistor becomes almost zero.
reduces the opto−coupler transistor current, thus increasing
Then, Vfb climbs up in a similar manner to the over load
the feedback voltage (Vfb). If Vfb exceeds 2.8 V, D1 is
situation, forcing the preset maximum current to be supplied
blocked, and the 5 mA current source starts to charge CB
to the SMPS until the over load protection triggers. Because
slowly up to VCC. In this condition, Vfb continues
more energy than required is provided to the output, the
increasing until it reaches 7.5 V, then the switching operation
output voltage may exceed the rated voltage before the
is terminated as shown in Figure 34. The delay for shutdown
overload protection triggers, resulting in the breakdown of
is the time required to charge CB from 2.8 V to 7.5 V with
the devices in the secondary side. In order to prevent this
5 mA. In general, a 20~50 ms delay is typical for most
situation, an over voltage protection (OVP) circuit is
applications. OLP is implemented in auto restart mode.
employed. In general, the peak voltage of the sync signal is
VFB Overload Protection
proportional to the output voltage and the FSCQ series uses
7.5 V
a sync signal instead of directly monitoring the output
voltage. If the sync signal exceeds 12 V, an OVP is triggered
resulting in a shutdown of SMPS. In order to avoid
undesired triggering of OVP during normal operation, the
peak voltage of the sync signal should be designed to be
2.8 V
below 12 V. This protection is implemented in the auto
t12 = CB*(7.5 − 2.8)/Idelay restart mode.
t1 t t
Figure 34. Overload Protection
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FSCQ Series
Thermal Shutdown (TSD) Figure 38 shows the burst mode operation waveforms.
The SENSEFET and the control IC are built in one When the picture ON signal is disabled, Q1 is turned off and
package. This makes it easy for the control IC to detect R3 and Dz are connected to the reference pin of KA431
abnormal over temperature of the SENSEFET. When the through D1. Before Vo2 drops to Vo2stby, the voltage on the
temperature exceeds approximately 150°C, the thermal reference pin of KA431 is higher than 2.5 V, which increases
shutdown triggers. This protection is implemented in the the current through the opto LED. This pulls down the
latch mode. feedback voltage (VFB) of FSCQ series and forces FSCQ
Soft Start series to stop switching. If the switching is disabled longer
The FSCQ series has an internal soft−start circuit that than 1.4 ms, FSCQ series enters into burst operation and the
increases PWM comparator’s inverting input voltage operating current is reduced from IOP to 0.25 mA (IOB).
together with the SENSEFET current slowly after it starts Since there is no switching, Vo2 decreases until it reaches
up. The typical soft start time is 20 ms. The pulse width to Vo2stby. As Vo2 reaches Vo2stby, the current through the opto
the power switching device is progressively increased to LED decreases allowing the feedback voltage to rise. When
establish the correct working conditions for transformers, the feedback voltage reaches 0.4 V, FSCQ series resumes
inductors, and capacitors. Increasing the pulse width to the switching with a predetermined peak drain current of 0.9 A.
power switching device also helps prevent transformer After burst switching for 1.4 ms, FSCQ series stops
saturation and reduces the stress on the secondary diode switching and checks the feedback voltage. If the feedback
during startup. For a fast build up of the output voltage, an voltage is below 0.4 V, FSCQ series stops switching until the
offset is introduced in the soft−start reference current. feedback voltage increases to 0.4 V. If the feedback voltage
is above 0.4 V, FSCQ series goes back to the normal
Burst Operation operation. The output voltage drop circuit can be
To minimize the power consumption in the standby mode, implemented alternatively, as shown in Figure 37. In the
the FSCQ series employs burst operation. Once FSCQ series circuit, the FSCQ series goes into burst mode, when picture
enters burst mode, FSCQ series allows all output voltages off signal is applied to Q1. Then, Vo2 is determined by the
and effective switching frequency to be reduced. Figure 36 Zener diode breakdown voltage. Assuming that the forward
shows the typical feedback circuit for C−TV applications. In voltage drop of opto LED is 1 V, the approximate value of
normal operation, the picture on signal is applied and the Vo2 in standby mode is given by:
transistor Q1 is turned on, which decouples R3, DZ and D1 STBY
V O2 + VZ ) 1 (eq. 8)
from the feedback network. Therefore, only VO1 is
regulated by the feedback circuit in normal operation and
determined by R1 and R2 as: VO2
V O1
NORM
+ 2.5 @ ǒ R1 ) R2
R2
Ǔ (eq. 6) Linear
Regulator
Micom
VO2 Dz
Linear Micom
VO1 (B+) Regulator Q1 Picture OFF
RD Dz
Rbias
R3
R1
Figure 37. Feedback Circuit to Drop Output
CF RF D1 Voltage in Standby Mode
Q1
C Picture ON
R
KA431
A R2
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FSCQ Series
norm
Vo2
Vo2 stby
VFB
0.4 V
Iop
IOP
IOB
Vds
Picture Picture
On Picture Off On
Burst Mode
Vds
1.4 ms 1.4 ms
0.9 A 0.9 A
Ids
(a) Mode Change to Burst Operation (b) Burst Operation (c) Mode Change to Normal Operation
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FSCQ Series
T1 D205
EER3540 EGP20D
12 V, 1.0 A
RT101 10
1
C204
5D−9
C210 1000uF
C102 470pF 35V
220uF 3 11 1kV
400V
D204
R 102 BEAD101 EGP20D
R 101
100kΩ 150kΩ 4 18 V, 0.5 A
0..25W 0. 25W 13
BD101 C107 C205
R106 C104 1nF C209 1000uF
D102 470pF 35V
D104 1 1.5kΩ 10uF 1kV
1N4937 12 1k V
UF4007 1W 50V
Dra in
SYNC D202
ZD101 3 Vcc IC101 5 EGP20J
18V FSCQ0965RT 125 V,, 0.4 A
1W D103 R 104 D101 R 103 6 14 L201
GND FB 1N4148 1.5kΩ 1N4937 5.1Ω C201 BEAD C202
2 4 0.25W 0.25W 15 C207 100uF 47uF
470pF 160V 160V
16 1k V
C 105
C103 C106 R105 3.9nF D203
10uF 47nF 470Ω 50V EGP20D
50V 50V 0.25W 24 V, 0.5 A
17
7 C203
C208 1000uF
LF101 470pF 35V
18 1k V
R205 VR2201
R201
220kΩ 30kΩ
1kΩ
0. 25W
OPTO101 0. 25W
FOD817A ZD202 Normal
R202 5.1V
C101 1kΩ 0. 5W
330nF 0. 25W R208 SW201
275VAC Standby
1kΩ R 207
FUSE ZD201 0. 25W 5.1kΩ
250V C206 R203 D201 0.25W
2.0A 22nF 39kΩ Q 202
50V 0. 25W KSC945 R 206
C301 5.1kΩ
2. 2nF 0. 25W
R 204
Q201 4.7kΩ
K A 431 0. 25W
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FSCQ Series
EER3540
Np1 1 18
N24V Na
2 17
N18V
3 16
Np2
N125V/2 N125V/2
4 15
Np2
N125V/2
5 14
N12V
6 13 N24V
N12V
Na 7 12 N125V/2
8 11 Np1
N18V
9 10
WINDING SPECIFICATION
No Pin (s " f) Wire Turns Winding Method
Np1 1−3 0.5φ x 1 32 Center Winding
N125V/2 16−15 0.5φ x 1 32
N24V 18−17 0.4φ x 2 13
N12V 12−13 0.5φ x 2 7
Np2 3−4 0.5φ x 1 32
N125V/2 15−14 0.5φ x 1 32
N18V 11−10 0.4φ x 2 10
Na 7−6 0.3φ x 1 20
ELECTRICAL CHARACTERISTICS
Pin Specification Remarks
Inductance 1−3 515 mH ±5% 1 kHz, 1 V
Leakage Inductance 1−3 10 mH Max. 2nd all short
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FSCQ Series
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FSCQ Series
T1 D205
EER3540 EGP20D
12 V, 0.5 A
RT101 10
1
C204
5D−9
C210 1000uF
C102 470pF 35V
220uF 3 11 1kV
400V
D204
R102 BEAD101 EGP20D
R101
100kΩ 150kΩ 4 18 V, 0.5 A
0. 25W 13
0. 25W C205
BD101 C107
R106 C104 1nF C209 1000uF
D102 470pF 35V
D104 1 1.5kΩ 10uF 1kV
1N4937 12 1kV
UF4007 1W 50V
Dra in
SYNC D202
ZD101 3 Vcc IC101 5 EGP30J
18V FSCQ0965RT 125 V, 0.5 A
1W D103 R104 D101 R103 6 14 L201
GND FB 1N4148 1.5kΩ 1N 4937 5.1Ω C201 BEAD C202
2 4 0. 25W 0. 25W 15 C207 100uF 47uF
470pF 160V 160V
16 1kV
C105
C103 C106 R105 3. 9nF D203
10uF 47nF 470Ω 50V EGP30D
50V 50V 0.25W 24 V, 1.0 A
17
7 C203
C208 1000uF
LF101 470pF 35V
18 1kV
R205 VR201
R201
220kΩ 30kΩ
1kΩ
0. 25W
OPTO101 0. 25W
FOD817A ZD202 Normal
R202 5.1V
C101 1kΩ 0. 5W
330nF 0. 25W R208 SW201
275VAC Standby
1kΩ R207
FUSE ZD201 0. 25W 5.1kΩ
250V C206 R203 D201 0. 25W
3.0A 22nF 39kΩ Q202
50V 0. 25W KSC945 R 206
C301 5.1kΩ
2. 2nF 0. 25W
R204
Q201 4.7kΩ
KA431 0. 25W
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FSCQ Series
EER3540
Np1 1 18
N24V Na
2 17
N18V
Np2 3 16
N 125V/2 N125V/2
4 15
Np2
N125V/2
5 14
N12V
6 13 N24V
N12V
Na 7 12 N125V /2
8 11 Np1
N18V
9 10
WINDING SPECIFICATION
No Pin (s " f) Wire Turns Winding Method
Np1 1−3 0.5φ x 1 32 Center Winding
N125V/2 16−15 0.5φ x 1 32
N24V 18−17 0.4φ x 2 13
N12V 12−13 0.5φ x 2 7
Np2 3−4 0.5φ x 1 32
N125V/2 15−14 0.5φ x 1 32
N18V 11−10 0.4φ x 2 10
Na 7−6 0.3φ x 1 20
ELECTRICAL CHARACTERISTICS
Pin Specification Remarks
Inductance 1−3 410 mH ±5% 1 kHz, 1 V
Leakage Inductance 1−3 10 mH Max. 2nd all short
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22
FSCQ Series
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23
FSCQ Series
T1 D205
EER4042 EGP20D
15 V, 0.5 A
RT101 10
1
C204
5D−11
C 210 1000uF
470pF 35V
C102 3 11 1k V
330uF D204
400V R102 BEAD101 EGP20D
150kΩ 4 8. 5 V, 0.5 A
R101 0. 25W 13
BD101 100kΩ C107 C 205
R106 C 104 1nF C 209 1000uF
0. 25W D105
1kΩ 10uF 1kV 470pF 35V
1 1N4937 12 1k V
1W 50V
Dra in
SYNC D202
3 V c c IC 101 5 EGP30J
ZD102 F S C Q 1265R T 140 V, 0.6 A
D106 R104 D103 R103 6 14 L 202
18V GND FB 1.5kΩ 1N 4937 5.1Ω C 201 BEAD C202
1N 4148
1W 0. 25W 0. 25W 15 C 207 150uF 68uF
2 4
470pF 160V 160V
16 1k V
C105
C103 C106 R105 3. 3nF D203
10μF 47nF 470Ω 50V EGP30D
50V 50V 0. 25W 24 V, 1.5 A
17
7 C 203
C 208 1000uF
LF101 470pF 35V
18 1k V
VR201
R201
30kΩ
1kΩ
OPTO101 0. 25W
FOD817A ZD201
R202 5. 1V
C101 C206 R203 R205 0. 5W
1kΩ
330nF 150nF 39kΩ 240kΩ D201 R 208
0. 25W SW201
275VAC 50V 0. 25W 0. 25W 1N4148 1kΩ
R207
FUSE 0. 25W 5.1kΩ
250V
C301 Q202 0. 25W
5.0A
3. 3nF Q201 R204 KSC945 R206
KA431 4.7kΩ 10kΩ
LZ 0. 25W 0. 25W
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FSCQ Series
EER4042
Np1 1 18
N24V Na
2 17
N15V
Np2 3 16
N 140V/2 N8.5V
4 15
N140V/2
N140V/2
5 14
NP2
6 13 N140V/2
N8.5V
Na 7 12 NP1
8 11 N24V
N15V
9 10
WINDING SPECIFICATION
No Pin (s " f) Wire Turns Winding Method
N24 18−17 0.65φ x 2 8 Space Winding
NP1 1−3 0.1φ x 10 x 2 20 Center Winding
N140V/2 16−15 0.1φ x 10 x 2 23 Center Winding
Np2 3−4 0.1φ x 10 x 2 20 Center Winding
N140V/2 15−14 0.1φ x 10 x 2 22 Center Winding
N8.5V 12−13 0.6φ x 1 3 Space Winding
N15V 11−10 0.6φ x 1 6 Space Winding
Na 7−6 0.3φ x 1 13 Space Winding
ELECTRICAL CHARACTERISTICS
Pin Specification Remarks
Inductance 1−4 315 mH ±5% 1 kHz, 1 V
Leakage Inductance 1−4 10 mH Max. 2nd all short
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FSCQ Series
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26
FSCQ Series
T1 D205
EER4245 EGP20D
15 V, 0.5 A
RT101 10
1
C204
6D−22
C210 1000μF
470pF 35V
C102 3 11 1kV
470μF D204
400V R102 BEAD101 EGP20D
150kΩ 4 8. 5 V, 0.5 A
R101 0. 25W 13
BD101 100kΩ C107 C205
R106 C104 1nF C209 1000μF
0. 25W D105
1kΩ 10uF 1V 470pF 35V
1 1N4937 12 1kV
1W 50V
Dra in
SYNC D202
3 V c c IC 101 5 EGP30J
ZD102 F S C Q 1565R T 140 V, 0.8 A
D106 R104 D103 R103 6 14 L202
18V GND FB 1.5kΩ 1N4937 5.1Ω C201 BEAD C202
1N 4148
1W 0. 25W 0. 25W 15 C207 220μF 68μF
2 4
470pF 160V 160V
16 1kV
C105
C103 C106 R105 2. 7nF D203
10uF 47nF 470Ω 50V EGP30D
50V 50V 0. 25W 24 V, 1.5 A
17
7 C203
C208 1000uF
LF101 470pF 35V
18 1kV
VR201
R201
30kΩ
1kΩ
OPTO101 0. 25W
FOD817A ZD201
R202 5. 1V
C101 C206 R203 R205 0. 5W
1kΩ
330nF 150nF 39kΩ 240kΩ D201 R208
0. 25W SW201
275VAC 50V 0. 25W 0. 25W 1N4148 1kΩ
R207
FUSE 0. 25W 5.1kΩ
250V
C301 0. 25W
5.0A Q202
3. 3nF Q201 R204 R206
KSC945
KA431 4.7kΩ 10kΩ
LZ 0. 25W 0. 25W
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27
FSCQ Series
EER4245
Np1 1 18
N24V Na
2 17
N15V
Np2 3 16
N 140V/2 N8.5V
4 15
N140V/2
N140V/2
5 14
NP2
6 13 N140V/2
N8.5V
Na 7 12 NP1
8 11 N24V
N15V
9 10
WINDING SPECIFICATION
No Pin (s " f) Wire Turns Winding Method
N24V 18−17 0.65φ x 2 5 Space Winding
NP1 1−3 0.08φ x 20 x 2 13 Center Winding
N140V/2 16−15 0.08φ x 20 x 2 15 Center Winding
Np2 3−4 0.08φ x 20 x 2 13 Center Winding
N140V/2 15−14 0.08φ x 20 x 2 14 Center Winding
N8.5V 12−13 0.6φ x 1 2 Space Winding
N15V 11−10 0.6φ x 1 3 Space Winding
Na 7−6 0.3φ x 1 8 Space Winding
ELECTRICAL CHARACTERISTICS
Pin Specification Remarks
Inductance 1−4 220 mH ±5% 1 kHz, 1 V
Leakage Inductance 1−4 10 mH Max. 2nd all short
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FSCQ Series
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FSCQ Series
PCB Layout
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30
FSCQ Series
FPS is a trademark of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates and/or subsidiaries in the United States and/or other
countries.
SENSEFET is a registered trademark of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates and/or subsidiaries in the United States
and/or other countries.
All brand names and product names appearing in this document are registered trademarks or trademarks of their respective holders.
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31
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
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