ECE3003 – MICROCONTROLLERS AND APPLICATIONS

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  Computers transfer data in two ways:

 Serial
 To transfer to a device located many meters away,
the serial method is used
 The data is sent one bit at a time

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  Parallel
 Often 8 or more lines (wire conductors) are used to
transfer data to a device that is only a few feet
away

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  Serial data communication uses two methods

 Synchronous method transfers a block of data at a time

 Asynchronous method transfers a single byte at a time

 There are special IC chips made by many manufacturers for

serial communications
 UART (universal asynchronous Receiver-transmitter)

 USART (universal synchronous-asynchronous Receiver-transmitter)

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  Data transmission types:

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  Protocol is a set of rules agreed by both the sender and
receiver on
 How the data is packed
 How many bits constitute a character
 When the data begins and end

 Asynchronous serial data communication is widely used for

character-oriented transmissions
 Each character is placed in b/w start and stop bits, is called
framing
 Block-oriented data transfers use the synchronous method
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  The start bit is always one bit, but the stop bit can be one
or two bits

 The start bit is always a 0 (low) & the stop bit(s) is 1 (high)

 Due to the extended ASCII characters, 8-bit ASCII data is

common
 In older systems, ASCII characters were 7-bit

 In modern PCs the use of one stop bit is standard

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  The rate of data transfer in serial data communication is
stated in bps(bits per second)

 Another widely used terminology for bps is baud rate

 It is modem terminology and is defined as the number
of signal changes per second

 The baud rate and bps are the same, and we use the terms
inter changeably

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  The data transfer rate of given computer system depends
on communication ports incorporated into that system

 An interfacing standard RS232 was set by the Electronics

Industries Association (EIA) in 1960

 In RS232, a 1 is represented by -3 ~ -25 V, while a 0 bit

is +3 ~ +25 V, making -3 to +3 undefined

 The standard was set long before the advent of the TTL
logic family, its input and output voltage levels are not TTL
compatible

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  Current terminology classifies data communication equipment
as

 DTE (data terminal equipment) refers to terminal and

computers that send and receive data

 DCE (data communication equipment) refers to

communication equipment, such as modems

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  DTR (data terminal ready)
 When terminal is turned on, it sends out signal DTR to
indicate that it is ready for communication

 DSR (data set ready)

 When DCE is turned on and has gone through the self-
test, it assert DSR to indicate that it is ready to
communicate

 RTS (request to send)

 When the DTE device has byte to transmit, it assert RTS
to signal the modem that it has a byte of data to
transmit
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  CTS (clear to send)
 When the modem has room for storing the data it is to receive, it
sends out signal CTS to DTE to indicate that it can receive the
data now

 DCD (data carrier detect)

 The modem asserts signal DCD to inform the DTE that a valid
carrier has been detected and that contact between it and the
other modem is established

 RI (ring indicator)
 An output from the modem and an input to a PC indicates that the
telephone is ringing
 It goes on and off in synchronous with the ringing sound

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  The simplest connection between a PC and microcontroller
requires a minimum of three pins, TxD, RxD, and ground

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  8051 has two pins that are used specifically for transferring
and receiving data serially
 These two pins are called TxD and RxD and are part of
the port 3 group (P3.0 and P3.1)
 These pins are TTL compatible; therefore, they require
a line driver to make them RS232 compatible

 We need a line driver (voltage converter) to convert the

R232’s signals to TTL voltage levels that will be acceptable
to 8051’s TxD and RxD pins
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  A line driver such as the MAX232 chip is required to convert
RS232 voltage levels to TTL levels, and vice versa

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  To allow data transfer between the PC and an 8051 system
without any error, we must make sure that the baud rate of
8051 system matches the baud rate of the PC’s COM port

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  SBUF is an 8-bit register used solely for serial
communication

 For a byte data to be transferred via the TxD line, it

must be placed in the SBUF register

 SBUF holds the byte of data when it is received by

8051 RxD line

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  SCON is an 8-bit register used to program the start bit,
stop bit, and data bits of data framing, among other things

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  In mode 0, serial data are transmitted and received through
the RXD pin, while the TXD pin output clocks. The baud rate
is fixed at 1/12 the oscillator frequency. On transmit, the
least significant bit (LSB bit) is sent/received first.

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  In mode 1, 10 bits are transmitted through the TXD pin
or received through the RXD pin in the following manner: a
START bit (always 0), 8 data bits (LSB first) and a STOP
bit (always 1). The START bit is only used to initiate data
receive, while the STOP bit is automatically written to the
RB8 bit of the SCON register.

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  In mode 2, 11 bits are transmitted through the TXD pin or
received through the RXD pin: a START bit (always 0), 8 data bits
(LSB first), a programmable 9th data bit and a STOP bit (1).

 On transmit, the 9th data bit is actually the TB8 bit of the SCON
register. This bit usually has a function of parity bit. On receive,
the 9th data bit goes into the RB8 bit of the same register
(SCON).

 The baud rate is either 1/32 or 1/64 the oscillator frequency.

 Mode 3 is the same as Mode 2 in all respects except the baud rate.
The baud rate in Mode 3 is variable.
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 REN (receive enable):
When it is high, it allows 8051 to receive data on RxD pin, If
low, the receiver is disable

TI (transmit interrupt):
When 8051 finishes the transfer of 8-bit character It raises
TI flag to indicate that it is ready to transfer another byte

RI (receive interrupt):
When 8051 receives data serially via RxD, it raises the RI flag
bit to indicate that a byte has been received and should be
picked up before it is lost
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  Computers transfer data in two ways:

 Parallel
 Often 8 or more lines (wire conductors) are used to
transfer data to a device that is only a few feet
away

 Serial
 To transfer to a device located many meters away,
the serial method is used

 The data is sent one bit at a time

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  A single microcontroller can serve several devices by two
ways:

 Interrupts: Whenever any device needs its service, the

device notifies the microcontroller by sending it an interrupt
signal
 Upon receiving an interrupt signal, the microcontroller interrupts
whatever it is doing and serves the device
 The program which is associated with the interrupt is called the
interrupt service routine (ISR) or interrupt handler

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  Polling can monitor the status of several devices and serve
each of them as certain conditions are met

 The polling method is not efficient, since it wastes much of the

microcontroller’s time by polling devices that do not need service
 ex. JNB TF,target

The advantage of interrupts is that the microcontroller can

serve many devices (not all at the same time)

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  For every interrupt, there must be an interrupt service
routine (ISR), or interrupt handler

 When an interrupt is invoked, the micro-controller runs the interrupt

service routine
 For every interrupt, there is a fixed location in memory that holds
the address of its ISR
 The group of memory locations set aside to hold the addresses of

ISRs is called interrupt vector table

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  Upon activation of an interrupt, the microcontroller goes
through the following steps:
1. It finishes the instruction it is executing and saves the address of the
next instruction (PC) on the stack

2. It also saves the current status of all the interrupts internally (i.e: not
on the stack)

3. It jumps to a fixed location in memory, called the interrupt vector

table, that holds the address of the ISR

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 4. The microcontroller gets the address of the ISR from the interrupt
vector table and jumps to it
 It starts to execute the interrupt service subroutine until it reaches
the last instruction of the subroutine which is RETI (return from
interrupt)

5. Upon executing the RETI instruction, the microcontroller returns to the

place where it was interrupted
 First, it gets the program counter (PC) address from the stack by
popping the top two bytes of the stack into the PC
 Then it starts to execute from that address

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  The interrupts must be enabled by software in order for the
microcontroller to respond to them,
 There is a register called IE (interrupt enable) that is responsible
for enabling (unmasking) and disabling (masking) the interrupts

 To enable an interrupt, we take the following steps:

1. Bit D7 of the IE register (EA) must be set to high to allow the
rest of register to take effect

2. If EA = 1, interrupts are enabled and will be responded to if

their corresponding bits in IE are high

3. If EA = 0, no interrupt will be responded to, even if the

associated bit in the IE register is high
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  The timer flag (TF) is raised when the timer rolls over
 In polling TF, we have to wait until the TF is raised
 The problem with this method is that the microcontroller is tied
down while waiting for TF to be raised, it can’t do anything else
 Using interrupts solves this problem and, avoids tying down the
controller
 If the timer interrupt in the IE register

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  The 8051 has two external hardware interrupts
 Pin 12 (P3.2) and pin 13 (P3.3) of the 8051, designated as INT0
and INT1, are used as external hardware interrupts
 The interrupt vector table locations 0003H and 0013H are set
aside for INT0 and INT1
 There are two activation levels for the external hardware
interrupts
 Level trigged
 Edge trigged

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  In the level-triggered mode, INT0 and INT1 pins are
normally high
 If a low-level signal is applied to them, it triggers the interrupt
 Then the microcontroller stops whatever it is doing and jumps to
the interrupt vector table to service that interrupt
 The low-level signal at the INT pin must be removed before the
execution of the last instruction of the ISR, RETI; otherwise,
another interrupt will be generated

 This is called a level-triggered or level-activated interrupt

and is the default mode upon reset of the 8051
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  Pins P3.2 and P3.3 are used for normal I/O unless the
INT0 and INT1 bits in the IE register are enabled
 After the hardware interrupts in the IE register are
enabled, the controller keeps sampling the INTn pin
for a low-level signal once each machine cycle

 To make INT0 and INT1 edge-triggered interrupts, we must

program the bits of the TCON register
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  In edge-triggered interrupts
 The external source must be held high for at least one
machine cycle, and then held low for at least one
machine cycle
 The falling edge of pins INT0 and INT1 are latched by
the 8051 and are held by the TCON.1 and TCON.3
bits of TCON register

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  When the 8051 is powered up, the priorities are assigned
according to the following
 In reality, the priority scheme is nothing but an internal polling
sequence in which the 8051 polls the interrupts in the sequence
listed and responds accordingly

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  Discuss what happens if interrupts INT0, TF0, and INT1
are activated at the same time. Assume priority levels were
set by the power-up reset and the external hardware
interrupts are edge-triggered.

Solution:
 If these three interrupts are activated at the same time, they
are latched and kept internally.
 Then the 8051 checks all five interrupts according to the
sequence listed above Table.
 If any is activated, it services it in sequence.
 Therefore, when the above three interrupts are activated, IE0
(external interrupt 0) is serviced first, then timer 0 (TF0), and
finally IE1 (external interrupt 1)
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  We can alter the sequence of interrupt priority by assigning
a higher priority to any one of the interrupts by
programming a register called IP (interrupt priority)

 To give a higher priority to any of the interrupts, we make

the corresponding bit in the IP register high

 When two or more interrupt bits in the IP register are set

to high they are serviced according to the sequence of Table

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  a) Program the IP register to assign the highest priority to
INT1(external interrupt 1), then

 (b) discuss what happens if INT0, INT1, and TF0 are

activated at the same time. Assume the interrupts are both
edge-triggered

 MOV IP,#00000100B ;IP.2=1 assign INT1 higher priority.

(OR)
SETB IP.2 ;IP.2=1 assign INT1 higher priority.

 When INT0, INT1, and TF0 interrupts are activated at

the same time, the 8051 services INT1 first, then it
services INT0, then TF0.
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