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COE301 Lab Syllabus T-232

This document outlines the course information for the COE 301 Computer Engineering Lab course at King Fahd University of Petroleum & Minerals. The course covers computer organization topics including MIPS assembly language programming, integer and floating-point arithmetic, CPU design, and pipelining. It consists of 15 weekly labs covering these topics. Student assessment includes assignments, quizzes, a project, midterm, and final exam. Attendance is mandatory and more than 3 unexcused absences will result in a failing grade.

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42 views3 pages

COE301 Lab Syllabus T-232

This document outlines the course information for the COE 301 Computer Engineering Lab course at King Fahd University of Petroleum & Minerals. The course covers computer organization topics including MIPS assembly language programming, integer and floating-point arithmetic, CPU design, and pipelining. It consists of 15 weekly labs covering these topics. Student assessment includes assignments, quizzes, a project, midterm, and final exam. Attendance is mandatory and more than 3 unexcused absences will result in a failing grade.

Uploaded by

modyzombie82
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© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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King Fahd University of Petroleum & Minerals

Computer Engineering Department


COE 301 Lab
Fall Semester 2023 (T232)

A. Instructor Information
Name Email Office Phone
Instructor
Dr. Kamal Chenaoua [email protected] 23-082 2082
Office Hours Monday 11:00 AM – 11:50 AM or by appointment

B. Course Information

Course Title  Computer Organization


 Introduction to computer organization
 Machine instructions, addressing modes,
 Assembly language programming, integer and floating-point arithmetic
Course Description  CPU performance and metrics,
 Non-pipelined and pipelined processor design, datapath and control unit,
pipeline hazards,
 Memory system and cache memory
Prerequisites COE 202 and ICS 102
David A. Patterson and John L. Hennessy, Computer Organization and Design: The
Textbook
Hardware/Software Interface, Fifth Edition, Morgan Kauffmann Publishers, 2013.
Material/Tools  MARS, Logisim
 Describe the instruction set architecture of a MIPS processor
 Analyze, write, and test MIPS assembly programs
 Describe the organization and operation of integer and floating-point arithmetic units
Course Objectives/
 Design the datapath and control of a single-cycle (non-pipelined) CPU
Learning Outcomes
 Design the datapath and control of a pipelined CPU and handle hazards
 Describe the organization and operation of memory and caches
 Analyze the performance of processors and caches
MIPS Programming 10%
Quizzes 10%
Lab Work 15%
Course Assessment
Project 15%
Midterm Exam 20%
Final 30%

C. Assessment

Item Weight
Attendance 2%
Lab Assessment Lab Work/Assignments 6%
Quizzes 7%
Design/Demo 10 % + Quiz 2%
Project Evaluation
Report 5%
D. Tentative Lab Schedule

Week Lab
Part I: Assembly Language Programming

1 No Lab
Lab 1/2: Introduction to MIPS Assembly Language Programming (MARS)
 Information about the lab
2  MARS tutorial: Editor, Assembler, Debugger
 Register and Memory
 Introduction to system calls. Hello world program
Lab 3: Integer Arithmetic
 Integer addition & subtraction
 Shift and rotate
3  Bitwise logic instructions
 Convert character to integer
 Simple loop: e.g. count the number of 1’s in a register.
 Tracing program execution and breakpoints
Lab 4: Flow Control and 1D arrays (Quiz 1)
 Defining data, strings, and arrays
 Viewing variables in memory
4  1D-Array traversal
 Searching an array
 Finding min and max
 Generate a sequence of random numbers and save in an array.
Lab 5: 2D Arrays and Files
 Indexing 2D arrays
5  Pointers versus indexing
 Reading a text file
 Application: reading an image from a file and dealing with images

Lab 6: Procedure and Stack (Quiz 2)


 Stack pointer and frame pointer
6  Writing procedures
 Application: Sorting procedure
 Application: recursive function

Lab 8: Floating-Point Part 1


 Coprocessor 1
7  Floating-point registers
 Floating-point instructions
 Example: matrix multiplication

Lab 8: Floating-Point Part 2 (Quiz 3)


8  Special functions: exp(x), sin(x) using Taylor Series
 Dichotomy, Integrals …
 A brief introduction to Exceptions and I/O with an example (Lab 7)
Part II: CPU Design
Lab 10: Introducing the Logisim Tool
 Review logic design
9  Design Adder/Subtractor
 Design Shifter
 Completing the ALU
 Testing the ALU
Lab 11: Building the Main Datapath Components (Quiz 4)
 Multiported Register File
10  Instruction and data memories
 Building the datapath
 Connecting Register File to ALU
 Testing components
Lab 12: Single Cycle Datapath
 Complete single-cycle datapath
11  Next PC logic
 Control logic
 Clocking
 Testing the complete datapath
Lab 13: Pipelined CPU Design with Data Forwarding (Quiz 5)
 Pipelined datapath
12
 Pipelined control: Hazards, …etc.
 Testing components
Lab 14: Pipelined CPU Design with Stall Capability
 Pipelined Next PC logic
13
 Clocking
 Testing the pipelined datapath

Lab 15: Project Submission


 Completing project
14  Submitting report + presentation
 Presenting work + Demo
 Questions & answers

Lab 15: Project Submission


15
 Final Quiz (Quiz 6)

E. Notes:
 As per KFUPM rules and regulations, attendance is mandatory. More than 3 unexcused lab absences
will be reported to the registrar’s office, resulting in a DN grade.
 You will be given homework assignments.
 Announcements and solutions will be posted on Blackboard and/or Gradescope. It is the student’s
responsibility to check announcements regularly.
 Deadlines must be respected for all assignments; failure to do so, a 10% penalty is deducted for each
day for three days ONLY, and a ZERO is granted afterward.

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