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QUALCOMM

1. The document provides guidance on preparing for a written test and interview for Qualcomm. It outlines 5 sections for the written test covering analog and digital electronics, aptitude, basic programming, and operating systems and data structures. 2. For the interview, it recommends thoroughly preparing digital ICs, static timing analysis, and Verilog. It provides specific online course resources for each topic. 3. The document shares sample questions asked in the interview rounds, which focused on analog and digital electronics concepts like MOSFET device physics, static timing analysis, Boolean logic minimization, and CMOS fabrication processes.

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Sai Uday
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551 views8 pages

QUALCOMM

1. The document provides guidance on preparing for a written test and interview for Qualcomm. It outlines 5 sections for the written test covering analog and digital electronics, aptitude, basic programming, and operating systems and data structures. 2. For the interview, it recommends thoroughly preparing digital ICs, static timing analysis, and Verilog. It provides specific online course resources for each topic. 3. The document shares sample questions asked in the interview rounds, which focused on analog and digital electronics concepts like MOSFET device physics, static timing analysis, Boolean logic minimization, and CMOS fabrication processes.

Uploaded by

Sai Uday
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
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QUALCOMM

Name : Abhinav Kumar Singh


Spec : VSLI
Dept : EE
CGPA : 8.24

WRITTEN TEST

Sections will have question from:


1. Analog Electronics : For this section solving previous
year GATE ECE questions will
be sufficient.
2. Digital Electronics : For this section solving previous
year GATE ECE questions will
be sufficient.
Some questions related Static
Timing Analysis and Verilog
were
asked , sources for which i have
shared in later sections.
Along with them solve network
theory previous year ECE
gate questions.
3. Aptitude : You can refer any source of your
choice. Topics to be covered:
Ap gp hp
Profit loss
Simple interest
Compund interest
Lcm hcf
Numbers
Mensuration 2D
Mensuration 3D
Work and wages
Probability
Mixture and alligation
Ratio proportion and partnership
Percentages
Time speed and distance
Trains boats and streams
Pipes and cisterns
Clocks
Calender
Permutation and combination
4. Basic Programming questions:
For c++ and c many resources are there,
prepare c++ and c well as it can be helpful for
your programming tests too. I had enrolled a
course from Udemy , you can check
course content here.

Questions in this section were good so practice


as much as you can .
https://www.udemy.com/course/c-programming-for-
beginners-/

https://www.udemy.com/course/beginning-c-plus-
plus-programming/

5. Operating system and data structures :


Courses and resource i referred for these section
is as follows :
for operating system : (study scheduling concepts
well )
https://www.youtube.com/playlist?
list=PLmXKhU9FNesSFvj6gASuWmQd23Ul5omtD

for data structure:


https://www.udemy.com/course/
datastructurescncpp/

for practice of all software related topics i referred :


https://www.geeksforgeeks.org/quiz-corner-gq/
Prepare section 4 and 5 very well as questions were
good in this section.

INTERVIEW

For digital profile :

Prepare Digital IC , Static Timing Analysis and Verilog


thoroughly . Don’t skip any topic . The necessary and
sufficient source i will attach . But keep your basics
sound . Questions of interview will be easy for you if
you have sound basic.

Digital IC :

Start with video lectures by Rabaey. Prepare good


notes , this is very important as you will definitely
forget the contents of the lecture later on.

Link of lecture series:


https://www.youtube.com/playlist?
list=PLpelQYOtPS_GffAjTNVRyy-QW5ydtkYvg
Additional to this i also referred an IIT MADRAS
lecture series on DIGITAL IC .Most of the things will
be repeated and easy for you after going through
Rabaey lectures but some of the topics are very well
covered here lake mos capacitor .

Link of the lecture series:


https://nptel.ac.in/courses/108/106/108106158/

2. Static timing Analysis (STA) :


http://www.vlsi-expert.com/2011/03/static-
timing-analysis-sta-basic-timing.html

I referred this blog for preparing STA , prepare


chapter 2 ONLY from this blog. I found the contents
are precise and crisp. Prepare STA well as it is very
important for both written and interview.

3. Verilog:
Resource i followed are:
1. https://www.youtube.com/watch?v=FWE0-
FOoE4s&list=PLUtfVcb-iqn-
EkuBs3arreilxa2UKIChl&ab_channel=KNOWLEDGETRE
E

2. Verilog HDL by Samir Palnitkar .


Refer both of them , lecture of Indraneel sir will give
you knowledge for coding in Verilog . But many
important concepts are given in Samir Palnitkar which
were directly asked in interview.

INTERVIEW QUESTIONS (MEMORY BASED)

Round 1( 45 minutes)

I was asked to write current equation of inverter and


then interviewer asked about variation in current
with process , voltage and temperature.(this question
many linked question too , it took most part of round
1)

Short channel affects


latch up and how to get rid of it , Antenna affect
Some basic question from Verilog like blocking non
blocking statement , Implicit and Explicit timing in
Verilog.

Round 2(70 minutes):

I was directly asked that what i have prepared for


interview , i told sta and first 3 questions were from
sta only, so judge well before saying any topic.
3 questions were given to be solved back to back .
Then he told to implement a given Boolean
expression using cmos and do the gate sizing. Then he
told that one of the input is critical , size the gates
considering that .
From here he switched to dynamic logic and i had to
size gates for that too, he asked what is domino
effect.

One Boolean expression was given and i had to


reduce using kmap and De-morgans .

And last question was from cmos fabrication flow .

For Analog profile :


This time Qualcomm hired for digital profile only so i
am not having any interview experience for the same
but as far as preparation is concerned i prepared from
my gate notes and i also followed analog ic by razavi .
One thing to mention that razavi lectures ( electronics
1 and electronics 2) are for building up your basics
but for interview perspective you MUST study analog
ic book by razavi.

Bottom line don’t get freaked out in interview


questions were very basic , nothing was there from
out of the box . Just be clear with your basics .
You can reach me out at:
[email protected]
All the best!!!

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