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OperatingSystemConcepts 2 ComputerSystemStructure

The document discusses the structure and operation of computer systems. It describes how the CPU, memory, and I/O devices are connected and interact. The CPU controls data flow between memory and I/O controllers using interrupts. Memory provides fast access for the CPU while storage devices offer larger capacities but slower access. Early systems lacked protection from faulty programs, but modern hardware provides mechanisms like dual mode operation and memory segmentation to isolate processes and ensure stable system operation.

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Amira Bahaa
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11 views

OperatingSystemConcepts 2 ComputerSystemStructure

The document discusses the structure and operation of computer systems. It describes how the CPU, memory, and I/O devices are connected and interact. The CPU controls data flow between memory and I/O controllers using interrupts. Memory provides fast access for the CPU while storage devices offer larger capacities but slower access. Early systems lacked protection from faulty programs, but modern hardware provides mechanisms like dual mode operation and memory segmentation to isolate processes and ensure stable system operation.

Uploaded by

Amira Bahaa
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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Information Technology Institute

Operating System Fundamentals

© Copyright Information Technology Institute - 2018


Chapter Two
COMPUTER SYSTEM
STRUCTURE
© Copyright Information Technology Institute - 2018 2
Table of Content

• Computer System Operation


• I/O Structure
• Storage Structure
• Hardware Protection

© Copyright Information Technology Institute - 2018 3


COMPUTER SYSTEM
OPERATION

© Copyright Information Technology Institute - 2018 4


Computer System Operation

• CPU and device controllers are connected


through common busses (data, address, and
control).
• CPU and device controllers execute
concurrently.
• Memory controller synchronizes access to
memory.

© Copyright Information Technology Institute - 2018 5


Computer System Operation Cont’d

Hard Disk Printer Tape Drive


CPU Controller Controller Controller

Memory
Controller

Memory

© Copyright Information Technology Institute - 2018 6


Computer System Operation Cont’d

• Each device controller is in charge of a


particular device type.
• Each device controller has a local buffer
• CPU moves data from/to main memory
to/from local buffers
• Device controller informs CPU that it has
finished its operation by causing an interrupt.

© Copyright Information Technology Institute - 2018 7


Computer System Startup

1. Power up
2. Initial program: bootstrap
• Stored in ROM
• Initialize:
1. CPU registers
2. Device controllers
3. Memory contents
4. Load the operating system (kernel)
3. Kernel starts the first process, init
4. Init waits for an event (interrupt) to occur
© Copyright Information Technology Institute - 2018 8
Interrupts

• A signal sent to the CPU


• Interrupt transfers control to the interrupt
service routine generally, through the interrupt
vector, which contains the addresses of all the
service routines. service routine , from its name it means the routine of intructions that will be
executed for this service when it's call of interrupt

In I/O devices one of the bus control lines is dedicated for this purpose and is called

• Interrupts: the Interrupt Service Routine (ISR).

• Hardware Interrupts
• Software Interrupts: system calls
© Copyright Information Technology Institute - 2018 9
Interrupts Cont’d

• A trap is a software generated interrupt caused


by:
• Error: division by zero or invalid memory access
• Request: from a user program to O/S
• An operating system is interrupt driven.

© Copyright Information Technology Institute - 2018 10


Interrupt Handling

1. CPU is interrupted
2. CPU stops current process
3. CPU transfers execution to a fixed location
4. CPU executes interrupt service routine
5. CPU resumes process

• Notes:
• Interrupts must be handled quickly
• Interrupted process information must be stored
© Copyright Information Technology Institute - 2018 11
I/O STRUCTURE

© Copyright Information Technology Institute - 2018 13


I/O Structure

• Controllers:
• Is in charge of a specific type of device
• Moves data between device and local buffer
• A controller may have more than one device
• Buffer size varies

© Copyright Information Technology Institute - 2018 14


Two I/O Methods
• Synchronous I/O:
• Process request I/O operation
process is paused untill the i/o operation is finished
• I/O operation is started
• I/O Operation is complete
• Control is returned to the user process
• Asynchronous I/O:
• Process Request I/O operation
• I/O operation is started process is asynchronously working with itself doesn't depend on
the ending of the i/o operation it only stops immediatly at the
middle to make the i/o operation starts then continued again.
• Control is returned immediately to the user process
• I/O continues while system operations occur
© Copyright Information Technology Institute - 2018 15
Two I/O Methods Cont’d

Synchronous Asynchronous

© Copyright Information Technology Institute - 2018 16


Direct Memory Access Structure

• Used for high-speed I/O devices able to


transmit information at close to memory
speeds.
• Device controller transfers blocks of data
from buffer storage directly to main memory
without CPU intervention.
• Only one interrupt is generated per block,
rather than the one interrupt per byte.
© Copyright Information Technology Institute - 2018 17
Direct Memory Access Structure
Cont’d

© Copyright Information Technology Institute - 2018 18


STORAGE STRUCTURE

© Copyright Information Technology Institute - 2018 19


Storage Structure

• Main memory
• Only large storage media that the CPU can access
directly.

• Secondary storage
• Extension of main memory that provides large
nonvolatile storage capacity.

© Copyright Information Technology Institute - 2018 20


Storage-Device Hierarchy

© Copyright Information Technology Institute - 2018 21


Difference of Storage Devices

• Speed
• Cost
• Capacity
• Volatility
• Reliability
• Portability

© Copyright Information Technology Institute - 2018 22


RAM
• Array of memory words

• Each byte has an address

• Memory Address:
• Physical
• Logical

• CPU Instructions:
• Load: moves a word from main memory to CPU register
• Store: move a word from CPU register to main memory
© Copyright Information Technology Institute - 2018 23
Magnetic Disk

• Rigid metal or glass platters covered with


magnetic recording material
• Disk surface is logically divided into tracks,
which are subdivided into sectors.
• The disk controller determines the logical
interaction between the device and the computer.

© Copyright Information Technology Institute - 2018 24


Magnetic Disk Cont’d

© Copyright Information Technology Institute - 2018 25


Magnetic Tapes

• Early secondary storage

• Slow access time

• Usage
• Backup
• Storage of infrequently used information

© Copyright Information Technology Institute - 2018 26


HARDWARE PROTECTION

© Copyright Information Technology Institute - 2018 27


Hardware Protection
• Early OS:
• Single user
• Programmer had full control of hardware
• Programmer was responsible of I/O
• Error in a program
• Single task
• Only one program affected
• Multi task
• Could cause problems to other programs
• Desktop OS allow a program to access any part of
memory or affect other programs instructions or data 28
© Copyright Information Technology Institute - 2018
Error Handling

• Errors
• Illegal instruction
• Infinite loop
• Access of other memory addresses

• Handling Errors
1. Errors are detected by hardware
2. Hardware trap the error to the O/S
3. Errors are handled by the O/S
4. O/S terminates process
5. O/S dumps the process to disk (if needed)
© Copyright Information Technology Institute - 2018 29
Ensuring OS Proper Operation

1. I/O Protection: illegal instructions


• Dual Mode (System Mode & User Mode)

2. Memory protection: illegal memory access


• Base & limit registers

3. CPU Protection: infinite loops


• Timers
© Copyright Information Technology Institute - 2018 30
© Copyright Information Technology Institute - 2018 31

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