OpenVPX PDF Edition 0910
OpenVPX PDF Edition 0910
Guide to OpenVPX
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Foreward
Ray Alderman
Executive Director
VITA
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Contents
September 2010
FORWARD
1 Let the Show Begin
FEATURES 4
4 OpenVPX – From Concept to Specification
10 Transitioning to OpenVPX for Next-Generation 10
C4ISR Systems
15 Putting OpenVPX to Work
15
PRODUCT BRIEFS
On the Cover
21 6U OpenVPX Radar System Upgrade Initially targeted at the military and
OpenVPX/VITA-65 Serial RapidIO Gen-2 Switch aerospace markets, OpenVPX will find
new applications in a wide variety of
6U OpenVPX Rugged Single Board Computer critical embedded systems.
6U VPX Load Board Photo courtesy of Pentek
Forced Air-Cooled Enclosure (Upper Saddle River, NJ).
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Open VPX for your System
Architecture Advantage.
When interoperability and open standards are musts,
trust Tyco Electronics to deliver robust products and
services for your OpenVPX system architecture.
www.te.com/ADM
TE (logo) and Tyco Electronics are trademarks.
OpenVPX logo is a trademark of VITA.
Free Info at http://info.hotims.com/28057-840
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OpenVPX —
From Concept to
Specification
The OpenVPX Industry Working Group, Countless hours were spent with embed-
a 28-company team founded by Mercury ded community technical and business
Computer Systems, collaborated with a leaders (suppliers and integrators) to
common goal and accelerated the com- come up with a system-level architecture • 1 GiGE, 10 GiGE, sRIO, PCIe gen 2.0
pletion of a system architecture specifica- specification, dedicated to creating well- fabrics;
tion for open system COTS suppliers and defined interoperability points for multi- • Optimized SWaP smart processing via
integrators to specify, design, and build vendor, 3U and 6U VPX integrated solu- open architectures.
multi-vendor interoperable solutions. tions. The inter-company marathon was a
testament to what can be done when VPX vs. OpenVPX
Timeline: experts are dedicated to solving a signifi- A board-level specification approach
• January 2009 — OpenVPX Speci- cant industry issue for the good of the ulti- for VME bus technology was suitable due
fication effort by Mercury Computer mate primary customer — the warfighters. to its architectural simplicities, and it was
Systems begins, based on VPX embed- logically brought forward as an approach
ded community’s need to accelerate So What? for VPX specifications. While significant
multi-vendor interoperable solutions. If the following is important to your VITA standards work was in process, many
• March 2009 — First open member- company or your customer, then technology users felt that the focus on the
ship face-to-face meeting and call for OpenVPX should be important to you. board-level specification(s) was not suit-
membership. • Reduce TCO in integrated systems life able for creating interoperable solutions
• Spring/Summer 2009 — Ongoing cycle; for the complex application space that
meetings, conference calls and discus- • Use of common language for simpli- VPX technology is designed to serve. This
sions. fied RFP generation; includes a next generation of complex,
• October 2009 — OpenVPX specifica- • Choice of ecosystems to lower costs, rugged, integrated assets that consist of
tion V1.0 completed and transition to get best-of-breed capabilities; high-speed backplane fabrics and new
VITA 65 working group. • Technology refresh possibilities with processor technologies like multi-core
• January 2010 — VITA 65 Working reduced obsolescence hurdles; x86 and GPGPUs.
group completed comment resolu- • Highly interoperable, multi-vendor In late 2008, VITA’s Executive Director,
tion, balloting and ratification of the integrated solutions development; Ray Alderman, and Mercury Computer’s
specification. • Open standards, performance migra- industry research determined a need for a
• June 2010 — ANSI VITA 65-2010 rat- tion, and proliferation; new systems approach to specifying VPX.
ification of the OpenVPX System • Reduced risk to deployment for QRC In January 2009 the Open VPX Industry
Architecture Specification. programs; Working Group was formed as the first
step on the path forward to add system-
level clarity to the specifications to accel-
erate the commercial benefits of VPX
technology for integrated, multi-vendor
systems. Available today, the ANSI-
approved, OpenVPX systems architecture
specification builds upon VPX technology
(VITA 46 and dot specs) but does so from
a top down, system engineering approach
to specify interoperability points at the
slot, module and backplane level.
OpenVPX Taxonomy
The group created a common build-
ing block language to convey the key
attributes of the OpenVPX specification.
The definition of Planes, Pipes and
Profiles were key taxonomy definitions
allowing the user to specify a wide range
of “building blocks” with a common set
Figure 1. Cascading Challenges of intersections.
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Figure 2. Determine the backplane profile and chassis topology required for the development chassis, and then select a standard OpenVPX reference chas-
sis or create a custom configuration development chassis for design and integration.
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Making Sense of
PMC/XMC Carrier
Fabric Switch AT
T Platform
ATR ATRs & Chassis Platforms
Pre-Integrated Subsystems
SystemPaks
Storage High Performance FPGA
Open VPX™
Elma’s solid foundation of core capabilities is based on
decades of hardware design expertise, extensive thermal
management techniques, and in-depth knowledge of all
the building blocks required for an application ready
platform. We leverage that experience along with the
long term relationships built with best in class partners to
deliver truly interoperable COTS based platforms.
OpenVPX
penVPX Development Platform
Embedded Computing Solutions by Elma
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OpenVPX — From Concept to Specification
Task (VITA 46) or Custom COTS Approach Typical OpenVPX Savings Comments
RFP generation for • Custom effort 25-50% time • OpenVPX assures common
System elements • Interoperability holes language and definitions
• No clear way to specify system • Communications improved on
requirements requirements creation team
Development system • Significant iterations with vendors 33% time or • OpenVPX assures common
readiness for integration before lock down 50-60% time savings, if language and definitions
• Room for interpretation standard development • Established ecosystem of
chassis chosen standard backplane and
chassis
Risk to demonstrate • High 50%+ risk reduction for • OpenVPX reduces errors
readiness for initial • Reduced quality integrated system goals early in process
fight-test • Technical, management, customer, with a clean architecture • Overall quality improves
team frustration maintained • Overall QRC improves
topologies. OpenVPX supports Central- 1. Establish application requirements to be considered for a QRC VPX technolo-
ized Switching, Distributed Switching, determine technology choice. gy development program, noting esti-
and Master/Slave Topologies. 2. Decide on VPX technology — 3U or mated benefits anticipated from using
• Centralized Switching: Uses dedicated 6U form factor for SWaP requirements. the OpenVPX systems specification as a
switch modules in multiple types of 3. Is integrated multi-module, perhaps clear decision making guide to develop-
switched configurations (e.g. Dual Star). multi-vendor and /or system manage- ment. As an early thought leader and
• Distributed Switching: Full or partial ment enabled chassis solution required? major contributor to the OpenVPX spec-
mesh switching. May require switch a. No — (standalone module only) ification content, Mercury Computer was
logic on each card for larger slot count Use VITA 46 specification(s) if able to use these concepts to create and
chassis (e.g. 5 slot sRIO mesh). desired. deploy a major prime QRC program
• Master-Slave: Generally Master host b. Yes — Use OpenVPX specification. using OpenVPX-compliant architec-
SBC with Slave I/O cards connected If yes, select slot and module payload tures in just 10 months. When systems
by PCIe fabric. (e.g. SBC root com- profiles and, if switched architecture, developers with domain expertise and
plex connected to I/O cards via PCIe switch module profiles that will allow proposal writers become proficient with
fabric.) assets to achieve (processing, through- using the specification, similar types of
Using the OpenVPX specification tax- put, management) application require- risk reduction and development effi-
onomy and the architectural building ments. ciencies may be expected.
block language of connectivity, a system Once this step in the solution devel-
engineer or architect can now leverage opment process has been reached, you The Journey Continues
the specification’s content and rules for have essentially constructed the archi- A path to OpenVPX V1.1 is being
their unique application. tecture and topology of your develop- developed to create an efficient meth-
ment solution for application integra- od to augment the specification with
OpenVPX Specification Decision Tree tion. You now have a clear template new profiles in support of technology
The OpenVPX Specification (available for design or for approaching suppli- and market changes. Also, recommen-
now via ANSI and www.vita.com) can be ers for module, backplane and or chas- dations for user-defined pins are in dis-
used in developing open architecture, sis outsourcing from an ever-growing cussion, which hopefully will result in
high-performance, embedded hardware ecosystem and cadre of OpenVPX sup- further VITA 65 specification defini-
solutions. OpenVPX-compliant solutions pliers. tion, but still allow for innovation. As a
provide a compatible hardware platform result, the team is already looking for-
for open embedded OS and middleware Achieving Significant Results and ward to ensuring that OpenVPX will
layering. As a result, as the target applica- Benefits stay current and relevant as the world
tion is developed, the OpenVPX specifica- The OpenVPX Open Systems archi- of fast-moving technology continues to
tion can provide a performance migra- tecture specification gives developers evolve.
tion path to using open middleware capa- the tools to create complex OpenVPX This article was written by Bob Grochmal,
bilities at the module, chassis and intra- technology applications for mitigating Director, OpenVPX Program, Mercury Computer
chassis levels. risk to Quick Response Capabilities Systems, Inc. (Chelmsford, MA). For more informa-
Here is a simple, high level “recipe” (QRC) development programs and, tion, contact Mr. Grochmal at [email protected],
for using the OpenVPX specification for ultimately, deployment. The above table or visit http://info.hotims.com/28057-450.
application development: identifies a typical set of tasks that may
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Free Info at http://info.hotims.com/28057-843
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Transitioning to OpenVPX for
Next-Generation C4ISR Systems
VPX systems offer tremendous per- based applications. another vendor, along with a backplane
formance for the Mil/Aero market, • Stable architecture, less risk — from yet another party. Therefore, the
including naval, airborne, and ground- Platforms need to last many years, even OpenVPX initiative commenced in early
based computing systems. The architec- decades. Vendor support is also critical. 2009 with a goal of providing interoper-
ture provides an unprecedented combi- • Performance density — As space ability definitions for the VPX specifica-
nation of bandwidth, user IO, and restrictions get tighter, the system tion. The initiative was rolled into VITA
rugged design, in both a 3U and 6U needs options for small form factors as the VITA 65 specification, which was
Eurocard format. The new OpenVPX while retaining high performance. approved by ANSI in June 2010.
initiative has opened up new definitions VPX, and later OpenVPX, were collab- In short, OpenVPX provides defini-
for VPX system interoperability, includ- oratively created within VITA (VME tions for backplane configurations,
ing defined module profiles, slot pro- International Trade Association) by which are comprised of slot profiles into
files, backplane & chassis configura- dozens of experts in the military/aero- which various module profiles can be
tions, secondary expansion fabrics and space community. Based on the rugged plugged. The module and slot profiles
control planes, and higher speed fabric Eurocard format like VME and ensure that a vendor’s VPX boards
options. CompactPCI, VPX comes in both 3U (modules) have pinouts that are inter-
and 6U standard board sizes with typical- operable within the VPX backplane
Command, Control, Communications, ly 1.0" pitch (0.80" and 1.2" pitch are slots. The backplane configuration tells
Computers, Intelligence, Surveillance also possible). VPX uses a high-speed the user which slot profiles are utilized,
and Reconnaissance (C4ISR) Multi-Gig connector and offers plenty of including information on the data rate,
C4ISR embedded computing systems IO in a rugged, open standard architec- routing topology, and fabric used.
have certain general needs, both today ture. With dozens of vendors and some When it comes to backplane function-
and continuing into the future. These backwards compatibility options to ality, there is very little change. The new
include: VME, the architecture is stable and will standard simply redefined two reserved
• Mission-critical reliability — For be supported for years to come. P0/J0 signals Aux_Clk (+/-) and added
Mil/Aero applications, system failures one P1/J1 single ended Utility signal of
can cost lives. OpenVPX for System Interoperability Maskable Reset and redefined the
• Higher bandwidth — Weapon and If there is any fault with VPX, it was Res_Bus signal to GDiscrete. The
intelligence gathering platforms are made to be very flexible. This flexibility Aux_Clk and GDiscrete pins were
using more intensive digital signal pro- was beneficial for customized solutions, already bussed anyway, so the change is
cessing for gathering, relaying, and particularly for how high-speed IO is minimal. Also, the SysCon signal is now
processing data. transported throughout the system. configurable.
• Rugged design — Platforms need to However, it was difficult, if not impossi- Let’s take a look at a standard 6U VPX 5-
survive the shock, vibration, and ble, to be assured that a board from one slot Mesh backplane and compare it to an
effects in aircraft, ground, and sea vendor would work with one from OpenVPX version. Figure 1a shows a 6U 5-
slot VPX backplane and 1b shows a side-
view of how the J0-J6 connectors are used.
The standard VPX version has pinout
charts for P0 and P1 sections with the P2-
P6 as “undefined”. Although the P0 and
P1 sections have defined pinouts, there
are no details in VPX as to the kind of sig-
nals such as thin pipes, fat pipes, or ultra
thin pipes. Also, the details of the utility
plane are not as clear.
In the OpenVPX version of the same
backplane, Figure 2 shows the payload
slot profile. It provides more information
for the data plane section (in yellow),
which in this case defines 4 fat pipe lanes.
Also, the utility plane sections are clearer.
Although this backplane does not have a
control plane, if it had one we’d also see
this in the payload slot profile, along with
the type of signal (thin pipes are com-
monly used for the control plane).
The Slot Profile that is referenced in
Figure 2 gives us some details on the card
Figure 1. Figure 1a shows a standard 6U 5-slot VPX backplane and 1b shows a simple side-view dia- plugging into the slot. For example, the
gram of how the J0-J6 connectors are used. slot profile number SLT6 says it’s a 6U slot
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GE
Intelligent Platforms
It’s an open
specification.
So it’s only fitting that our 136-page
reference guide is free.
Think of this reference book as Cliffs Notes for VPX and OpenVPX.
It’s that comprehensive and easy to read. It covers all the key
topics, including the VITA 46 (VPX) specification, VITA 48 (VPX REDI),
and VITA 65 (OpenVPX). It covers the history and rationale for VPX,
its underlying principles and features, describes in detail important
technical information, and illustrates the content with over 50
diagrams, charts and photos. Ordering one is a no-brainer.
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Transitioning to OpenVPX
profile (a 6U board), the PER says it’s a BKP6-DIS05-11.2.16-1. The BKP6 tells us
peripheral slot, 4F means it has 4 fat pipes it’s a 6U backplane profile. DIS05 means
and the 10.3.1 is where you can find it’s a distributed (like a mesh or ring)
details on this slot profile in the VITA 65 architecture and has 5 slots. The 11.2.16
specification. For OpenVPX, fat pipes is the section of the specification where
have 4 links (4 Tx pairs + 4 Rx pairs), thin you can find details on this backplane
pipes have 2 links, and ultra thin pipes profile. The “-1” tells us the data rate is
have one link. The wider bands, like fat 3.125 Gbps (-2 means 5 Gbps and -3
pipes, are typically used in the data plane, means 6.250 Gbps).
while the control plane will often have the The backplane profile chart in Figure 3
thin pipe or ultra thin-pipe signals. Slot shows the profile name, the pitch, the cor-
types are comprised of peripheral slots, responding slot profile for the backplane,
payload slots, switch slots, or bridge slots. the control plane data rate (if applicable)
The backplane profile of the back- and the data rate of the backplane.
plane also provides more information. The slot type (like DIS05) section of
For example, this 6U 5-slot’s profile is the profile name is an important part of
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Transitioning to OpenVPX
the description. The main fabric just refers to the fact that this VPX slot
topologies are CEN for centralized, DIS also has pinouts defined for the parallel
for distributed, and HYB for hybrid. bus (like VME).
“Centralized” means it has a centralized
switch slot and the routing could be Future Designs for VPX/OpenVPX
similar to a Star topology. The DIS and There are some interesting configu-
CEN configurations typically have pay- rations coming up in OpenVPX. They
load and switch slot types. The HYB will include special connections for optical
typically also define peripheral, bridge, connectors and another version for a
and bus slot types like “VME” to RF connector interface. VITA 67 is
account for connections to the legacy underway to add RF connectors to the
bus slots. The bridge slot does not OpenVPX backplanes. Figure 4 shows
mean an active bridge board (like a the new gold connectors on a back-
cPCI Bridge) is being used. Rather, it plane.
Figure 4. This photo shows two upcoming solu-
tions in one. The gold connectors are for RF sig-
Essential Building Blocks... nals per the VITA 67 specification underway. Also
shown is a VPX cabling solution with a shroud to
secure the cables that clip into the backplane.
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Putting OpenVPX To Work
Before the advent of OpenVPX, these standardized profiles to find one the adjusted sensor signals are com-
designers of embedded systems took that satisfies the objectives of each new bined, they add constructively. For
advantage of the extreme connectivity system. By narrowing the field of config- receivers, the combination is performed
offered by VPX (VITA 46), but were urations, these profiles boost reusability by summing the adjusted signals from
faced with a virtually unlimited number and interoperability between vendors. each sensor. For transmitters, each sen-
of possible implementations. Specific sor delivers a signal that adds construc-
choices for the control and data channel Beamforming Principles tively at the destination.
assignments for each slot, the backplane A multichannel software radio beam-
connectivity, and serial fabrics were forming receiver system is presented as Defining System Requirements
often made somewhat arbitrarily to suit an example that illustrates how the The sensors in a software radio receiv-
the particular needs of the current sys- OpenVPX system design process works. er system for beam forming are antennas
tem. Although following the general Principles from this example can be eas- arranged in a linear or two-dimensional
framework of VITA 46, each system tend- ily applied to other systems. array. The term “software” in software
ed to be so unique that the boards and Beamforming is extensively used in radio refers to the programmability of the
backplanes designed for one system communications, radar, direction find- digital signal processing functions includ-
were seldom usable in other systems, ing, countermeasures, weapons systems, ing the digital down conversion, phase
even from the same vendor. oil and mineral exploration, and med- shifting, gain adjustments, summation of
Now, OpenVPX (VITA 65) provides an ical imaging and treatment. In essence, the received channels, and then the ulti-
effective taxonomy for describing VPX beamforming utilizes multiple sensors to mate demodulation, decoding, and/or
components, and also defines numerous achieve directionality of the sensor array, decryption of the acquired signal.
“profiles” for boards, slots and back- and also to improve the signal quality The example system requires sixteen
planes that detail specific configurations and reception range. antennas, each followed by an RF stage to
of channels, interconnections, and fab- Beamforming achieves these benefits amplify and down convert the radio fre-
rics. Instead of starting from scratch each by judiciously adjusting the phase shift quency signal to an intermediate frequen-
time, designers can browse through and gain of each sensor so that, when cy (IF) analog signal so it can be digitized
by an A/D converter. These sixteen IF sig-
t1 Gain Phase nals are supplied as inputs to the system.
Adjust Adjust
G1 P1
Each IF signal has a bandwidth of 20
Beamformed
t2 MHz and is centered at 70 MHz. After
Sum Out
Gain Phase A/D conversion, all sixteen channels are
t3 Adjust Adjust down converted to baseband and beam-
G2 P2
formed using gain and phase shift param-
t4 eters to comply with operational objec-
Gain Phase
Adjust Adjust tives. The final beamformed sum is deliv-
G3 P3 ered as a baseband signal to a remote sys-
tem control processor PC for additional
Gain Phase
Adjust Adjust
processing, forwarding, or storage.
G4 P4 The system must operate in a limited
space avionics equipment bay and must
Figure 1. Beamforming adjusts phase and gain of signals from each antenna in an array to compen-
sate for different delays (tn), so that signals arriving from a particular angle relative to the array add comply with typical shock, vibration,
constructively when combined in the summer. temperature, altitude, humidity, flight
safety, power consumption, power sup-
ply, and EMC/EMI standards.
VPX P1
X4 Sum Out PCIe X4
AURORA X4 DP01 (Data Plane & Choosing the OpenVPX Payload
BEAMFORM Control Plane)
SUMMATION X4 Sum In Module for Beamforming
X4 EP01 Aurora X4 Sum OUT T
(Expansion Plane)
Since industry standard chassis are
200 MHz DDC 1 X4 EP02
FP 3 Aurora X4 Sum IN available in both 3U and 6U sizes, and
16-bit A/D & shift (Expansion Plane) both are well defined for OpenVPX, the
200 MHz DDC 2
16-bit A/D & shift PCIe small avionics bay requirement favors the
X4
200 MHz DDC 3 I/F
3U style. The next tasks are to select the
16-bit A/D & shift
CROSS appropriate 3U software radio and
200 MHz DDC 4
16-bit A/D & shift
BAR
SWITCH
processor modules (boards) to perform
the beamforming, define the required
Figure 2. Model 5353 3U VPX Beamformer Module with four A/Ds, four DDCs, X4 PCIe interface, phase connections between the modules, select
shifters and summation engine for beamforming. a 3U backplane to support those inter-
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Putting OpenVPX To Work
connections, a chassis to meet the physi- system control processor is best classi- cent payload slots 1 through 5 to support
cal and environmental requirements, fied as the data plane under OpenVPX. the sum in and sum out chaining ports
and a link between the chassis and the between 5353 modules. One data plane
remote system control processor PC. Choosing the OpenVPX Backplane fat pipe from each payload slot to the
For example, Pentek’s Model 5353 OpenVPX backplanes use many dif- switch slot 6 supports the four X4 PCIe
Software Radio Beamformer is a 3U ferent topologies named after the geom- links we need to the control processor.
OpenVPX module featuring four 200 MHz etry of their interconnections, including This backplane defines specific slot pro-
16-bit A/D converters and two Virtex-5 mesh, star, leaf, and ring. Most include files for the two types of slots. Slots 1
FPGAs, one for signal processing and a sec- slots for switch modules to support through 5 use the payload slot profile
ond one for the PCI interface. Inside the reconfigurable inter-board connections, SLT3-PAY-1F2F2U-14.2.2 shown in the
first FPGA are interfaces to the four A/D while some simply rely on dedicated upper right section of Figure 3. To see if
converters, four digital downconverters wiring between the slots. we can use the Model 5353 in the payload
(DDCs) with programmable phase shift After reviewing the 3U OpenVPX slots, we must verify that the Model 5353
and gain, and four power meters at each backplane choices in the standard, the has a module profile compatible with this
DDC output. A simplified block diagram of most appropriate for our system is the 6- slot profile.
the 5353 is shown in Figure 2. Slot backplane profile BKP3-CEN06- It is important to note that the backplane
The Model 5353 also includes a sum- 15.2.2-1, which has five payload slots and profiles and slot profiles do not specify any
mation block that adds the DDC outputs one switch slot as shown in Figure 3. fabric or protocol for the connections.
for a four-channel beamforming sum. The expansion plane fat pipes join adja- However, the backplane profile does speci-
This block also accepts a propagated
5 Payload Slots Switch Slot Payload Slots 1-5
sum in signal from another module and SLT3-PAY-1F2F2U-14.2.2
generates a propagated sum signal out Data Plane
DP01
to the next module. The sum in/sum 1 Fat Pipe
control plane under OpenVPX. Final Figure 5. Model 5308 3U VPX PCIe X8 Serial Cable Adapter with ReDriver, PCIe switch and crossbar
delivery of the beamformed result to the switch. Also shown are the X8 PCIe cable, PC host adapter board, and host PC.
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Putting OpenVPX To Work
fy the maximum baud rate for each gigabit 14.4.1, whose VPX P1 connections are The final beamforming system is
serial pipe. This scheme allows a wide vari- shown in the bottom right section of shown in Figure 7, with simplified block
ety of modules to be used in a given back- Figure 3. The four data plane fat pipes diagrams of the four Model 5353
plane slot, each with its own particular fab- shown (DP01 — DP04) connect to pay- Beamformers and the 5308 PCIe Cable
ric and baud rate. Of course, the baud rate load slot fat pipes DP01 on slots 1 Adapter. All of the required gigabit seri-
of each pipe of the module must be equal through 4. al links for Aurora expansion plane and
to or less than the maximum baud rate Now we need to find a compatible PCIe data and control planes are con-
specified in the backplane profile. switch module that can plug into slot 6 nected by the backplane wiring.
Because of its programmable crossbar and connect these four PCIe links to the The chart in the diagram shows the
switch, the Model 5353 can be configured remote system control processor. Pentek’s OpenVPX profiles for the backplane,
to meet the module profile MOD3-PAY- Model 5308 PCIe Cable Adapter is a 3U the slots, and the modules that plug into
1F2F2U-16.2.2-4, which is compatible with VPX switch module with a front panel X8 those slots. Each profile is described in
the slot profile SLT3-PAY-1F2F2U-14.2.2. PCIe cable connector defined by the PCI- full detail in the specification and the
This module profile defines data, expan- SIG PCI Express® External Cabling 1.0 system designer must ensure that the
sion and control plane fabric connections Specification. Compatible PCIe host profiles are compatible.
and baud rates. The backplane profile adapters are available for many different This process of matching module pro-
BKP3-CEN06-15.2.2-1 defines a single fat systems including PCIe cards for desktop files, slot profiles, and backplane pro-
pipe (X4) on the DP01 data plane for PCs as well as avionics cockpit computers. files for a particular application is the
PCIe Gen 2 that corresponds directly to The 5308 features a PCIe switch that sup- key to successful system configuration
the PCIe interface as shown in Figure 4. ports flexible lane bonding so that a single under OpenVPX. Not all of the
The eight expansion plane ultra thin X4 or X8 PCIe port from the control resources of each profile need to be fully
pipes, EP01 through EP08, are also processor PC can be split into four X4 PCIe implemented or utilized if the needs of
defined as PCIe Gen 2, capable of oper- ports to four individual PCIe endpoints. the application are satisfied.
ating at baud rates of 5 GHz. We will The fabric-transparent crossbar switch Finally, the chassis profile needs to be
organize these eight pipes as two fat joins these four X4 ports to the VPX1 P1 defined based on the environmental
pipes for the two X4 Aurora ports for backplane connector, fully compatible with and physical constraints of the system.
sum in and sum out, which need to oper- OpenVPX module profile MOD3-SWH-4F- OpenVPX does not yet have specific
ate at only 3.125 GHz. The two control 16.4.5-2 shown in Figure 6. chassis profiles defined, but it offers a
plane ports, CPutp01 and CPutp02, are Inspection reveals that this module complete system for specifying the size,
not implemented on the 5353. profile is fully compatible with the four type (rack mount, tower, etc), slot count,
VPX P1 fat pipes on the slot profile SLT3- primary power, cooling, backplane
Choosing the OpenVPX Switch/ SWH-6F6U-14.4.1. Further, the baud rate power, and the profile name.
Interface Module specified for the backplane profile BPK3-
The selected backplane also has a CEN06-15.2.2-1 supports the PCIe Gen 2 Summary
switch slot with profile SLT3-SWH-6F6U- with baud rates up to 5 GHz. OpenVPX presents a formal, well-
organized system for defining all compo-
VPX P1
nents in VPX systems, and the efforts of
Data Plane
DP01 the working group should be applaud-
1 Fat Pipe
Data Plane Data Plane
2 Fat Pipes 2 Fat Pipes DP02
Data Plane ed. Many of the figures and all of the
1 Fat Pipe
profiles in this article were derived from
DP01 - DP02 DP03 - DP04 Data Plane
DP03
1 Fat Pipe
the full OpenVPX VITA 65 specification,
PCIe Gen 2 per Section 5.3 PCIe Gen 2 per Section 5.3 which is available from the VITA website
Data Plane
DP04
1 Fat Pipe (www.vita.com), and is definitely a
Figure 6. Fabric definitions listed for the module Profile MOD3-SWH-4F-16.4.5-2 (for the model 5308)
worthwhile and important reference
are data rate compatible with the VPX P1 connections for payload slot profile SLT3-SWH-6F6U-14.4.1, document.
defined for backpane profile BKP3-CEN06-15.2.2-1. A good metric for the significance of a
new standard is how actively new exten-
sions are proposed to embrace new
Slot 1 Slot 2 Slot 3 Slot 4 Slot 6
options and new technology. As promising
PCIe X4
5353 5353 5353 5353
PCIe X4
5308
evidence, even before final ratification,
PCIe DP01 PCIe DP01 PCIe DP01 PCIe DP01 DP01 new initiatives like VITA 66 and VITA 67
X4 X4 X4 X4 PCIe X4
EP01 EP01 EP01 EP01 DP02
were proposed, adding both optical and
Out Out Out Out
PCIe RF I/O capabilities. As OpenVPX is
EP02
FP 3 EP02
FP 3 EP02
FP 3 EP02
FP 3 DP03
FP 3 Switch
In In In In applied to an increasing number of appli-
S S S S DP04 cation systems, the need for future evolu-
tionary capabilities will emerge. All signs
Aurora X4 Aurora X4 Aurora X4
point to growing adoption of OpenVPX
3U VPX Backplane Profile: BKP3-CEN06-15.2.2-1 for new programs by both the embedded
Slot 1 – 4 Slot Profile: SLT3-PAY-1F2F2U-14.2.2 systems industry and its customers.
Slot 6 Slot Profile: SLT3-SWH-6F6U-14.4.1 PCIe X8 This article was written by Rodger
cable
Model 5353 Module Profile: MOD3-PAY-1F2F2U-16.2.2-4
Hosking, Vice President, Pentek, Inc. (Saddle
Model 5308 Module Profile: MOD3-SWH-4F-16.4.5-2
River, NJ). For more information, contact Mr.
Figure 7. Complete OpenVPX beamforming system showing four 5353’s with Aurora X4 sum in/out Hosking at [email protected], or visit
links (red), and PCIe X4 links (blue) connected to one 5308 with PCIe X8 cable link to the PC. http://info.hotims.com/28057-452.
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Product Briefs
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White Paper Spotlight
Enabling Interoperability OpenVPX Backplane OpenVPX Enables New
in High-Performance Profiles: Making Sense Levels of High-
Embedded Applications - of System Interoperability Performance Video
An OpenVPX System For VPX Technology
Specification Primer OpenVPX has opened up new defi- Applications
With the advent of high-speed nitions for VPX backplanes and With powerful and mature
serial fabrics, the VME Parallel systems. This includes defined video technology applications
Bus proved insufficient for the Module Profiles, Slot Profiles, backplane & chassis available nowadays, two typical
needs of higher performance embedded systems. configurations, secondary expansion fabrics and bottlenecks still exist in actual
VPX, also known as VITA 46, is the follow-on to the control planes, and higher speed fabric options. Elma systems: data throughput in the gigabit/s range to
VME Specification for the next generation of high- Bustronic will provide some clarity for the new defi- support high-definition video standards, and sys-
speed interconnects for harsh environments. While nitions and what they entail. We’ll provide an tem component interoperability due to the inner
advancing the state of the technology, VPX pro- overview of the various elements involved, and complexity of high-performance video applications.
vides backwards compatibility to traditional include a couple of potential backplane configura- OpenVPX can reliably address both issues.
VMEbus through the use of specialized bridges. tions. The paper will include diagrams on module and
slot profile examples, illustrate signal changes for
Curtiss-Wright Controls existing VPX products, and configuration examples. Creative Electronic Systems (CES)
Embedded Computing Elma Bustronic
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