TQP7M9105 Data Sheet
TQP7M9105 Data Sheet
TQP7M9105 Data Sheet
®
1W High Linearity Amplifier
Product Overview
The TQP7M9105 is a high linearity, high gain 1 W driver
amplifier in industry standard, RoHS compliant, SOT-89
surface mount package. This InGaP GaAs HBT delivers
high performance across 0.05 to 1.5 GHz while achieving
+47 dBm OIP3 and +30 dBm P1dB at 940 MHz while only 3-pin SOT−89 Package
consuming 220 mA quiescent current. All devices are
100% RF and DC tested.
Key Features
The TQP7M9105 incorporates on-chip features that
• 50 – 1500 MHz
differentiate it from other products in the market. The
amplifier has a dynamic active bias circuit that enable • +30 dBm P1dB at 940 MHz
stable operation over bias and temperature variations and • +47 dBm Output IP3 at 940 MHz
can provide a high linearity at back-off operation • 19.5 dB Gain at 940 MHz
• +5 V Single Supply, 220 mA Current
The TQP7M9105 is targeted for use as a driver amplifier in • Internal RF Overdrive Protection
wireless infrastructure where high linearity, medium power, • Internal DC Overvoltage Protection
and high efficiency are required. The device an excellent
• On Chip ESD Protection
candidate for transceiver line cards and high-power
• SOT-89 Package
amplifiers in current and next generation multi-carrier
3G / 4G base stations.
1 2 3
RF IN GND RF OUT
Top View
Ordering Information
Part No. Description
TQP7M9105 1 W High Linearity Amplifier
TQP7M9105-PCB900 920 – 960 MHz Evaluation Board
Standard T/R size = 1000 pieces on a 7” reel
Electrical Specifications
Test conditions unless otherwise noted: VCC = +5.0 V, Temp= +25 °C
Parameter Conditions Min Typ Max Units
Operational Frequency Range 50 1500 MHz
Test Frequency 940 MHz
Gain 17.5 19.4 20.5 dB
Input Return Loss 14 dB
Output Return Loss 15 dB
Output P1dB +28.7 +30 dBm
Output IP3 Pout = +15 dBm/tone, ∆f = 1 MHz +43.5 +47 dBm
WCDMA Output Power −50 dBc ACLR (1) +20.5 dBm
Noise Figure 6.3 dB
Quiescent Current, ICQ 195 220 245 mA
Thermal Resistance, θjc Module (junction to backside ground paddle) 27.3 °C/W
Notes:
1. ACLR Test set-up: 3GPP WCDMA, TM1+64 DPCH, +5 MHz offset, PAR = 10.2 dB at 0.01% Prob.
Gmax
0.4 0.4
20
Gain (dB)
0.2 0.2
15 0 0
-1 -0.75 -0.5 -0.25 0 0.25 0.5 0.75 1 -1 -0.75 -0.5 -0.25 0 0.25 0.5 0.75 1
-0.2 -0.2
10
-0.4 -0.4
5 -0.6 -0.6
-0.8 -0.8
0
0 0.5 1 1.5 2 2.5 3 3.5 4 -1 -1
Frequency (GHz)
Note: The gain for the unmatched device in 50 Ω system is shown as the trace in black color, [gain (S(21)]. For a tuned circuit for a particular
frequency, it is expected that actual gain will be higher, up to the maximum stable gain. The maximum stable gain is shown as the blue trace [Gmax].
The impedance plots are shown from 0.01– 4 GHz.
S-Parameters
Test Conditions: VCC=+5 V, ICQ=220 mA, T=+25°C, unmatched 50 Ω system, calibrated to device leads
Freq (GHz) S11 (dB) S11 (ang) S21 (dB) S21 (ang) S12 (dB) S12 (ang) S22 (dB) S22 (ang)
0.05 −1.06 −178.68 17.88 154.59 −36.95 1.89 −3.39 −171.92
0.1 −1.08 −179.98 16.04 154.96 −37.20 3.77 −3.00 −176.29
0.2 −1.01 179.18 15.20 150.91 −37.52 7.85 −2.91 −179.66
0.4 −0.75 176.01 14.04 134.55 −36.48 11.27 −2.73 176.91
0.6 −0.57 171.34 12.73 120.33 −35.65 11.92 −2.52 173.48
0.8 −0.51 166.55 11.29 108.35 −35.14 9.35 −2.51 169.15
1.0 −0.51 163.55 10.11 98.59 −34.89 11.74 −2.50 165.78
1.2 −0.54 161.26 8.87 90.63 −34.56 11.00 −2.52 163.07
1.4 −0.57 157.96 7.85 82.50 −34.07 10.99 −2.61 160.70
1.6 −0.62 154.88 7.10 75.78 −33.47 10.29 −2.57 158.17
1.8 −0.66 150.04 6.35 67.47 −33.19 11.13 −2.66 155.39
2.0 −0.60 144.26 5.75 59.82 −32.84 4.95 −2.64 151.03
2.2 −0.56 139.27 4.95 51.93 −32.47 3.98 −2.59 146.61
2.4 −0.75 135.92 3.91 45.80 −32.62 1.55 −2.57 141.55
2.6 −0.58 132.79 3.16 40.57 −32.36 2.07 −2.28 139.39
2.8 −0.55 132.30 2.52 36.55 −32.25 2.62 −2.33 138.20
3.0 −0.64 129.89 2.01 31.75 −31.94 0.51 −2.37 136.78
3.2 −0.69 126.19 1.69 26.65 −31.44 1.40 −2.40 135.83
3.4 −0.84 121.41 1.48 20.86 −30.84 −2.57 −2.54 133.06
3.6 −0.93 115.44 1.06 12.97 −30.84 −4.71 −2.68 126.60
3.8 −0.85 110.18 0.51 5.81 −30.20 −10.30 −2.63 119.65
4.0 −0.80 106.76 −0.04 −0.51 −30.40 −11.85 −2.51 114.02
J4 J3 C7
J3 +5V
0.1 uF
J4 GND C6
C7
C6
1000 pF
L3
U1 L3
C1 L1 L2 C2
12 nH
C5
C3
C1 L1 L2 C2
J1 1 U1 J2
3
TQP7M9103
RF 2.2 nH 3.3 nH RF
2,4
Input 100 pF C3 C5 100 pF Output
15 pF 10 pF
Notes:
1. Components shown on the silkscreen but not on the schematic are not used.
2. 0 Ω resistor can be replaced with copper trace in the target application layout.
3. All components are of 0603 size unless stated on the schematic.
4. The recommended component values are dependent upon the frequency of operation.
5. Critical component placement locations:
• Distance between U1 Pin 1 Pad left edge to L1 (right edge): 100 mil
• Distance between U1 Pin 1 Pad left edge to C3 (right edge): 200 mil
• Distance between U1 Pin 3 Pad right edge to C5 (left edge): 210 mil
• Distance between U1 Pin 3 Pad right edge to L2 (left edge): 120 mil
22
-5
|S11| & |S22| (dB)
21
Gain (dB)
-10
20
Input Return Loss
-15 Output Return Loss
19
18 -20
600 610 620 630 640 650 660 670 600 610 620 630 640 650 660 670
Frequency (MHz) Frequency (MHz)
51 -40
ACPR (dBc)
OIP3 (dBm)
47 -45
43 -50
39 -55
617 MHz
617 MHz
635 MHz 635 MHz
652 MHz 652 MHz
35 -60
12 13 14 15 16 17 12 13 14 15 16 17 18 19 20 21 22
Pout/Tone (dBm) Pout (dBm)
J4 J3 1.0uF
C5 C4
C4
J3 Vcc
0.1uF
C3
J4 GND C3
L1
U1
C1 R1 L2 C2 1000pF
C6
C7
C8
L1
10nH
0805
C1 L2
J1 R1 U1 C2 J2
1 3
TQP7M9105
RF 1 2.2nH 100pF RF
Input 3.3pF 2,4
C6 C7 C8 Output
Notes:
• See Evaluation Board PCB Information section for PCB material and stack-up.
• Components shown on the silkscreen but not on the schematic are not used.
• The recommended component values are dependent upon the frequency of operation.
• All components are of 0603 size unless stated on the schematic.
• Critical component placement locations:
Distance from U1 Pin 1 Pad (left edge) to R1 (right edge): 100 Mils (4.85° at 940 MHz)
Distance from U1 Pin 1 Pad (left edge) to C6 (right edge): 270 Mils (13.1° at 940 MHz)
Distance from U1 Pin 3 Pad (right edge) to C7 (left edge): 40 Mils (1.94° at 940 MHz)
Distance from U1 Pin 3 Pad (right edge) to L2 (left edge): 120 Mils (5.82° at 940 MHz)
• Distance from U1 Pin 3 Pad (right edge) to C8 (left edge): 260 Mils (12.6° at 940 MHz)
21
-5
Return Loss (dB)
- 40°C
Gain (dB)
20
+25°C
-10
+85°C
19
- 40°C
-15
18 +25°C
+85°C
17 -20
0.86 0.88 0.90 0.92 0.94 0.96 0.86 0.88 0.90 0.92 0.94 0.96
Frequency (GHz) Frequency (GHz)
- 40°C
-5
+25°C
Return Loss (dB)
+85°C
-10
-15
-20
0.86 0.88 0.90 0.92 0.94 0.96
Frequency (GHz)
ACLR vs. Output Power vs. Frequency OIP3 vs. Output Power vs. Frequency
-45 55
W-CDMA 3GPP Test Model 1+64 DPCH Temp.=+25oC Temp.=+25oC 1MHz Tone Spacing
PAR = 9.7dB @ 0.01% Probability
3.84 MHz BW
50
-50
ACLR (dBm)
OIP3 (dBm)
45
-55
860 MHz
860 MHz 40 880 MHz
880 MHz 900 MHz
-60 900 MHz 920 MHz
920 MHz 35 940 MHz
940 MHz 960 MHz
960 MHz
-65 30
16 17 18 19 20 21 12 13 14 15 16 17 18
Output Power (dBm) Output Power / Tone(dBm)
ACLR vs. Output Power at 940MHz OIP3 vs. Output Power at 940MHz
-45 55
W-CDMA 3GPP Test Model 1+64 DPCH 1MHz Tone Spacing
PAR = 9.7dB @ 0.01% Probability - 40 °C
3.84 MHz BW
+25°C 50
-50 Frequency : 940 MHz
+85 °C
OIP3 (dBm)
ACLR (dBm)
45
-55
40 - 40 °C
+25°C
-60
35 +85 °C
-65 30
16 17 18 19 20 21 12 13 14 15 16 17 18
Output Power (dBm) Output Power / Tone(dBm)
500
31
400
P1dB (dBm)
29
Icc (mA)
300
27 +85°C
200
+25°C
25 −40°C
100
23 0
860 880 900 920 940 960 21 23 25 27 29 31
Frequency (MHz) Output Power (dBm)
J4 J3
1.0uF
C8
C9
J3 Vcc
C8 0.1uF
C7
J4 GND C7
L1
U1
J1 C5 R1 C6 J2 22pF
C1
C2
C4
L1
18nH
C5
J1 R1 U1 C6 J2
1 3
TQP7M9105
RF 100pF RF
Input 100pF 2.4 2,4
C1 C2 C4 Output
Notes:
Components shown on the silkscreen but not on the schematic are not used.
All components are of 0603 size unless stated on the schematic.
The recommended component values are dependent upon the frequency of operation.
Critical component placement locations:
• Distance between U1 Pin 1 Pad to R1 (right edge): 45 mil
• Distance between U1 Pin 1 Pad to C1 (right edge): 370 mil
• Distance between U1 Pin 1 Pad to C2 (right edge): 195 mil
• Distance between U1 Pin 3 Pad to C4 (left edge): 395 mil
19
-5
Return Loss (dB)
18
Gain (dB)
-10
17
-15
16
Input Return Loss
Output return Loss
15 -20
700 800 900 1000 700 800 900 1000
Frequency (MHz) Frequency (MHz)
OIP3 vs Pout/tone
55
50
OIP3 (dBm)
45
40 700 MHz
800 MHz
900 MHz
1000 MHz
35
9 10 11 12 13 14 15 16 17 18 19
Pout/tone (dBm)
GND
1 2 3
RF IN GND RF OUT
Notes:
1. The terminal #1 identifier and terminal numbering conform to JESD 95-1 SPP-012.
2. Trace code up to 4 characters assigned by subcontractor.
3. Contact plating: NiPdAu
0.76 [0.030]
4.50 [0.177]
Ø.254 (.010) PLATED THRU VIA HOLES
PACKAGE OUTLINE
0.86 [0.034]
3.86 [0.152]
Notes:
1. All dimensions are in millimeters [inches]. Angles are in degrees.
2. Use 1 oz. copper minimum for top and bottom layer metal.
3. Via holes are required under the backside paddle of this device for proper RF/DC grounding and thermal dissipation. We recommend a
0.35mm (#80/.0135") diameter bit for drilling via holes and a final plated thru diameter of 0.25mm (0.010”).
4. Ensure good package backside paddle solder attach for reliable operation and best electrical performance.
Notes:
1. Empty part cavities at the trailing and leading ends are sealed with cover tape. See EIA 481-1-A.
2. Labels are placed on the flange opposite the sprockets in the carrier tape.
Handling Precautions
Parameter Rating Standard
ESD – Human Body Model (HBM) Class 2 ESDA / JEDEC JS-001-2012 Caution!
ESD – Charged Device Model (CDM) Class C3 JEDEC JESD22-C101F ESD-Sensitive Device
MSL – Moisture Sensitivity Level MSL5a IPC/JEDEC J-STD-020
Solderability
Compatible with both lead-free (260°C max. reflow temp.) and tin/lead (245°C max. reflow temp.) soldering processes.
Solder profiles available upon request.
Contact plating: NiPdAu
RoHS Compliance
This part is compliant with 2011/65/EU RoHS directive (Restrictions on the Use of Certain Hazardous Substances in Electrical and
Electronic Equipment) as amended by Directive 2015/863/EU.
Contact Information
For the latest specifications, additional product information, worldwide sales and distribution locations:
Web: www.qorvo.com
Tel: 1-844-890-8163
Email: [email protected]
Important Notice
The information contained herein is believed to be reliable; however, Qorvo makes no warranties regarding the information contained
herein and assumes no responsibility or liability whatsoever for the use of the information contained herein. All information contained
herein is subject to change without notice. Customers should obtain and verify the latest relevant information before placing orders for
Qorvo products. The information contained herein or any use of such information does not grant, explicitly or implicitly, to any party any
patent rights, licenses, or any other intellectual property rights, whether with regard to such information itself or anything described by
such information. THIS INFORMATION DOES NOT CONSTITUTE A WARRANTY WITH RESPECT TO THE PRODUCTS DESCRIBED
HEREIN, AND QORVO HEREBY DISCLAIMS ANY AND ALL WARRANTIES WITH RESPECT TO SUCH PRODUCTS WHETHER
EXPRESS OR IMPLIED BY LAW, COURSE OF DEALING, COURSE OF PERFORMANCE, USAGE OF TRADE OR OTHERWISE,
INCLUDING THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.
Without limiting the generality of the foregoing, Qorvo products are not warranted or authorized for use as critical components in medical,
life-saving, or life-sustaining applications, or other applications where a failure would reasonably be expected to cause severe personal
injury or death.
Copyright 2023 © Qorvo, Inc. | Qorvo is a registered trademark of Qorvo, Inc.