Handout
Handout
II Semester 2023-2024
Course Handout – II
In addition to Part-I (General Handout for all courses appended to the timetable), this portion gives specific details
regarding the course.
Basic microelectronic circuit analysis and design, biasing in discrete and integrated circuit amplifiers, an overview
of modeling of microelectronic devices single and two transistor amplifier configurations with passive and active
loads; current mirrors & current sources; single-ended and differential linear amplifiers, differential and multistage
amplifiers; 2 stages CMOS OPAMP, the frequency response of amplifiers; negative feedback in amplifiers, R-C
frequency compensation. This course will also introduce students to design in Cadence Design studio in an
unstructured lab component
2. Textbook
i. A.S. Sedra and K.C. Smith, “Microelectronic Circuits – Theory and Applications”, Oxford University Press,
7th ed., 2017
3. Reference Book
i. B. Razavi, “Design of Analog Integrated Circuits”, Tata McGraw Hill, 2001
4. Course Plan
5-7 MOS Transistor Physics Review MOSFET models, generalized biasing, Ch. 5
small signal analysis, low frequency and high
frequency models
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8-14 IC Amplifier Design Design and analysis of basic MOS amplifier stages, Ch. 6, 7.1-7.5,
Cascading stages. (DC biasing, small signal
analysis)
15-18 IC biasing, Basic current mirrors Overview of passive and active current mirrors, 7.5-7.7
current biasing techniques
5. Evaluation Scheme
6. Labs
The labs in this course are unstructured. Students will need to select from available slots in the first two weeks of
the semester. A 2 hr commitment per week is expected from the student for the lab. Since this course is a design
course, labs will provide a hands-on experience to supplement what is taught in class.
7. Make-up Policy
Application for Make-up will be considered only for Mid-Sem and Comprehensive Examination. An application in
writing with relevant certificates attached (medical from Campus Medical center or SWD) needs to be submitted to
the IC of the course at least a day before the scheduled exam. No make-up will be given for surprise tests, tutorials,
labs and quizzes. (no exceptions)
8. Attendance Policy
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Since BITS, Pilani is a residential campus; students are expected to engage in all regular and special lectures/tutorials
as announced by the instructors. Attendance and class participation of the student will be considered during final
grading and will be based on sole discretion of the instructors.
9. Grading notice
All students registered in the course are expected to appear for all evaluation components. Per section 4.19 of the
BITS, Pilani Academic regulations, NC may be given to students if they fail to provide a chance for the instructor to
evaluate their progress in the class. Absence in any evaluation components without the prior consent of the
instructor or submitting blank or incomplete/incoherent answer books may present grounds for awarding NC in the
course.
All submissions by students in this class towards quizzes, tests, and tutorials will be considered their original and
individual work. It will be assumed that the students have not resorted to unfair means during the evaluation. If
malpractice is discovered, the strictest action will be initiated against the student.
11. FAQs
(i) Is attendance compulsory? – Attendance will be taken at the instructor’s discretion. 100% attendance for
lectures and tutorials is expected.
(ii) Can I get a makeup for tutorials/quizzes/labs? – No makeup will be provided for these.
(iii) If I make >10% in the course, will I be safe from an NC? – All grading decisions will be taken by the team of
instructors after the comprehensive examinations are over. There is no stipulated cut-off for NC. Students
are expected to perform to the best of their abilities.
(iv) Why should I take this class? – This class is a pre-requisite for Analog and Digital VLSI Design and other
VLSI electives. It is an introductory class for anyone planning a career in VLSI, Analog design, technology,
optoelectronics, etc.
(v) I find the course mathematical and difficult. How do I improve my performance? – Students are encouraged
to meet with instructors during office hours for additional help. A team of TAs will be available also to
help students with classwork and tutorials.
(vi) I thought I understood all the tutorials but did not do well in the examination. Why? - Tutorial sessions help
students understand concepts taught in lectures and provide an opportunity for students to revisit topics
with the instructor. They should not be viewed as templates for the mid-sem or comprehensive
examination.
12. Announcements
Course management and announcements will be handled through the BITS moodle webpage. However, since 100%
class attendance is expected, there might be a delay between class announcements to the information appearing on
the moodle webpage.
Instructor-in-Charge
ECE/EEE/INSTR F244
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