0% found this document useful (0 votes)
37 views3 pages

Handout

This document provides details for the Microelectronic Circuits course, including the instructor, textbook, course plan, evaluation scheme, labs, policies, and FAQs. The course introduces basic microelectronic circuit analysis and design, modeling of devices, amplifier configurations, frequency response, and feedback. Students will complete quizzes, exams, and unstructured labs in Cadence to supplement concepts from lectures. Attendance is expected for all lectures and evaluations, and students are responsible for honor code and disciplinary actions.

Uploaded by

Mihir Jaipuria
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
0% found this document useful (0 votes)
37 views3 pages

Handout

This document provides details for the Microelectronic Circuits course, including the instructor, textbook, course plan, evaluation scheme, labs, policies, and FAQs. The course introduces basic microelectronic circuit analysis and design, modeling of devices, amplifier configurations, frequency response, and feedback. Students will complete quizzes, exams, and unstructured labs in Cadence to supplement concepts from lectures. Attendance is expected for all lectures and evaluations, and students are responsible for honor code and disciplinary actions.

Uploaded by

Mihir Jaipuria
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 3

BIRLA INSTITUTE OF TECHNOLOGY AND SCIENCE, PILANI –

K. K. BIRLA GOA CAMPUS

II Semester 2023-2024

Course Handout – II

In addition to Part-I (General Handout for all courses appended to the timetable), this portion gives specific details
regarding the course.

Course Number: ECE/EEE/INSTR F244

Course Name: Microelectronic Circuits

Instructor-in-charge: Abhijit Pethe ([email protected])

Team of Instructors: Pravin Mane, Abhijit Pethe

1. Scope and Objective:

Basic microelectronic circuit analysis and design, biasing in discrete and integrated circuit amplifiers, an overview
of modeling of microelectronic devices single and two transistor amplifier configurations with passive and active
loads; current mirrors & current sources; single-ended and differential linear amplifiers, differential and multistage
amplifiers; 2 stages CMOS OPAMP, the frequency response of amplifiers; negative feedback in amplifiers, R-C
frequency compensation. This course will also introduce students to design in Cadence Design studio in an
unstructured lab component

2. Textbook
i. A.S. Sedra and K.C. Smith, “Microelectronic Circuits – Theory and Applications”, Oxford University Press,
7th ed., 2017
3. Reference Book
i. B. Razavi, “Design of Analog Integrated Circuits”, Tata McGraw Hill, 2001
4. Course Plan

Lect. Topic Learning objectives Book


No. reference

1 Introduction Course contents, circuit design uses, amplification


etc.

2-4 Circuits Review Amplifiers, Figures of merit, models of amplifiers, 1.1-1.6


frequency response of amplifiers, single time
constant networks.

5-7 MOS Transistor Physics Review MOSFET models, generalized biasing, Ch. 5
small signal analysis, low frequency and high
frequency models

1
8-14 IC Amplifier Design Design and analysis of basic MOS amplifier stages, Ch. 6, 7.1-7.5,
Cascading stages. (DC biasing, small signal
analysis)

15-18 IC biasing, Basic current mirrors Overview of passive and active current mirrors, 7.5-7.7
current biasing techniques

19-24 IC Amplifiers – Frequency Analysis of CS,CG, CD amplifiers for their 9.1-9.6


Response frequency response, open time constant technique

25-32 Differential Amplifiers Design and analysis of MOS-based differential Ch 8, 9.7


amplifiers and their frequency response, 2 -stage
OPAMP

33-40 Feedback and stability Types of feedback, Stability Ch. 10

5. Evaluation Scheme

No. Component Duration CB/OB Marks (%) Date

1 Continuous evaluation – ---- OB 24% Tentative dates: 24/02, 23/03,


announced quizzes 13/04 (subject to change) 5:00pm
(Best 2 out of 3 will be considered)
2 Labs – continuous evaluation ---- OB 12% Weekly labs with evaluation (or)
(or) Quiz Quiz
3 Mid-semester Exam 1.5 hours CB 24% 14/03/24 9:00am-10:30pm

4 Comprehensive Exam 3 hours CB 40% 6/05/24 FN

6. Labs

The labs in this course are unstructured. Students will need to select from available slots in the first two weeks of
the semester. A 2 hr commitment per week is expected from the student for the lab. Since this course is a design
course, labs will provide a hands-on experience to supplement what is taught in class.

7. Make-up Policy

Application for Make-up will be considered only for Mid-Sem and Comprehensive Examination. An application in
writing with relevant certificates attached (medical from Campus Medical center or SWD) needs to be submitted to
the IC of the course at least a day before the scheduled exam. No make-up will be given for surprise tests, tutorials,
labs and quizzes. (no exceptions)

8. Attendance Policy

2
Since BITS, Pilani is a residential campus; students are expected to engage in all regular and special lectures/tutorials
as announced by the instructors. Attendance and class participation of the student will be considered during final
grading and will be based on sole discretion of the instructors.

9. Grading notice

All students registered in the course are expected to appear for all evaluation components. Per section 4.19 of the
BITS, Pilani Academic regulations, NC may be given to students if they fail to provide a chance for the instructor to
evaluate their progress in the class. Absence in any evaluation components without the prior consent of the
instructor or submitting blank or incomplete/incoherent answer books may present grounds for awarding NC in the
course.

10. Honor code and disciplinary action

All submissions by students in this class towards quizzes, tests, and tutorials will be considered their original and
individual work. It will be assumed that the students have not resorted to unfair means during the evaluation. If
malpractice is discovered, the strictest action will be initiated against the student.

11. FAQs
(i) Is attendance compulsory? – Attendance will be taken at the instructor’s discretion. 100% attendance for
lectures and tutorials is expected.
(ii) Can I get a makeup for tutorials/quizzes/labs? – No makeup will be provided for these.
(iii) If I make >10% in the course, will I be safe from an NC? – All grading decisions will be taken by the team of
instructors after the comprehensive examinations are over. There is no stipulated cut-off for NC. Students
are expected to perform to the best of their abilities.
(iv) Why should I take this class? – This class is a pre-requisite for Analog and Digital VLSI Design and other
VLSI electives. It is an introductory class for anyone planning a career in VLSI, Analog design, technology,
optoelectronics, etc.
(v) I find the course mathematical and difficult. How do I improve my performance? – Students are encouraged
to meet with instructors during office hours for additional help. A team of TAs will be available also to
help students with classwork and tutorials.
(vi) I thought I understood all the tutorials but did not do well in the examination. Why? - Tutorial sessions help
students understand concepts taught in lectures and provide an opportunity for students to revisit topics
with the instructor. They should not be viewed as templates for the mid-sem or comprehensive
examination.
12. Announcements

Course management and announcements will be handled through the BITS moodle webpage. However, since 100%
class attendance is expected, there might be a delay between class announcements to the information appearing on
the moodle webpage.

13. Chamber consultation hours

To be announced in class by individual instructors.

Instructor-in-Charge

ECE/EEE/INSTR F244
3

You might also like