EN199907

THE ELECTRONICS & COMPUTER MAGAZINE JULY/AUGUST 1999
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Funky Drummer
Drummer
CW Generat
Generator
or
Batter
Batteryy Charg
Charger
GENERAL INTEREST
funky drummer
a programmable drum machine
This article presents a

novel use for a voice
recording chip —
a programmable
drum machine.
Design by MadLab, Edinburgh
Th e voice record in g IC u sed is th e sampled during recording. Signals are comp an ies su ch as In tel wh ich store 2
1416P Ch ip Cord er from In formation not digitised so no analogue-to-digital bits per cell, thus doubling the storage
Storage Devices (ISD). This is one of the and no d igital-to-analogue circuitry is capacity of a chip with little increase in
best of its kin d on th e market. It is a needed. It’s a clever approach that the the physical die size.
comp lete solu tion in a sin gle ch ip . It man u factu rer claims is equ ivalen t to
d oesn ’t n eed extern al memory or digitising at 8-bit resolution. THE CHIPCORD ER
amplification and can be used with just Digital memories that use E2PROM The ChipCorder is designed for record-
a microphone, a speaker and a few pas- tech n ology satu rate cells w ith large ing the human voice so it doesn’t need
sive comp on en ts to make a comp lete amounts of charge to avoid the possi- to be responsive to a wide range of fre-
w orkin g voice memo record er. Th e bility of read in g a cell back as a zero qu en cies. Th e cu t-off filter is at ju st
memory in th e ch ip is n on -volatile w h en it sh ou ld be a on e. Bu t u sin g above 3 kH z w h ich gives abou t th e
w h ich mean s th at record in gs are E2PROM cells to store analogue sound same band wid th as a telephone. Nev-
retained when power is removed. The sign als 100% accu racy d oesn ’t matter. erth eless it w orks su rp risin gly w ell at
technology is E2PRO M memory tech- If the voltage read back is slightly d if- record in g both low frequ en cy sou n d s
nology (electrically-erasable program- feren t to th e voltage th at w as stored su ch as a bass d ru m an d h igh fre-
mable read-only memory) but with an on e w ou ld n ’t be able to h ear th e d if- quency sounds like a crash cymbal. The
interesting twist. Normally an E2PROM ference. It would matter greatly if dig- ch ip con tain s an ti-aliasin g an d con d i-
cell stores a sin gle d igital bit of in for- ital information was being stored. Hav- tion in g circu its to im p rove th e sou n d
mation bu t in th is ch ip th e cells are ing said this in fact ordinary computer quality.
used as analogue storage. The charge in m em ory is m ovin g in th e m u lti-level Th e total time available for record -
a cell rep resen ts th e an alogu e voltage d irection w ith d evices available from ing is 16 seconds which doesn’t sound
Elektor Electronics 7-8/99

14
like very m u ch bu t, becau se th e tim e ish ed softw are to a d ifferen t ch ip is rhythms at a time.
can be partitioned into small segments, sim p ly a m atter of ch an gin g a few A sin gle u ser rh yth m can also be
a large n u m ber of sam p les can be lin es su ch as th e restart vector. In fact record ed . Th is is volatile an d w ill be
stored. The chip is ‘randomly address- a sin gle sou rce cod e file can be u sed lost when the battery is disconnected.
able’ (in segm en ts of 100 m s) w h ich with conditional assembly of different A metronome clicks on the beat and an
m ean s th at an in d ivid u al sam p le can lin es for d ifferen t p rocessors. If you LED flashes while the rhythm is being
be picked out and played in isolation. look at the source code for this project record ed . Up to 11 d ru m h its can be
Th e ISD Ch ip Cord er is con trolled you w ill see th at it w as d evelop ed on programmed in the user rhythm.
by a m icrocon troller, on e from th e a PIC16C84 w h ich h as electrically-
very p op u lar PIC stable. Th is fam ily erasable p rogram m em ory. THE D ES IGN
of m icrocon trollers h as com e to To work effectively as a drum machine
assu m e a d om in an t p osition in th e TH E F E AT U R E S th e sw itch es th at trigger th e d ru m s
h obbyist con stru ction al w orld . Fu n ky Dru mmer h as 40 p re-record ed must be very responsive to touch. One
Deserved ly so becau se th ey are d ru m sou n d s, 12 p re-p rogram m ed n eed s to be able to rap id ly tap ou t a
ch eap , robu st an d easy to p rogram . rhythms and the facility to program a rh yth m w ith on e’s fin gers. Electro-
Su p p ort in th e form of m agazin e arti- rh yth m of on e’s ow n . Th e tem p o of mechanical switches were ruled out as
cles and affordable development tools both th e p re-p rogram m ed an d th e being too slow and awkward. An opti-
5V
R9 R10 R5 R4 R13 R14 R15 R16
REG
5V 9V
47k
47k
47k
47k
150k
150k
150k
150k
1 78L05
B0 B4
B1 B5
B2 B6 C12 C2 C1
B3 B7 BATTERY
100n 100n 47µ
R3 R6 R7 R8
16V
4k7
4k7
4k7
4k7
LINK 1 LINK 2 LINK 3 LINK 4
L1 L2 L3 L4
S1 S2 S3 S4
9V
R2
5V 5V 0Ω
R18
0Ω
16 28
VccA VccD C5 C4
14 6 B0 B7 1
RB0 A0 C11 R19 IC3
7 B1 B6 2 14 47µ 100n
RB1 A1 SP+ 470k 1
6 16V
8 B2 B5 3 2
RB2 A2 100n 8
3 VR1
RTCC
IC1 RB3
9 B3 B4 4
A3
IC2 LM386
5
47k
10 B4 B0 5 3 C3 C6
RB4 A4 C10 R17
4 11 B5 B1 6 15 4
MCLR RB5 A5 SP– 470k 100n 47µ
12 B6 B2 9 7
RB6 A6 ISD1416P 100n R11 16V
13 B7 B3 10 17 C9
C8 RB7 A7 MIC
10Ω
16 18
OSC1 MIC REF
X1 100n
19
22p PIC16C54A-04P AGC
17 23 20
C7 RA0 PLAYL ANA IN R1
15 18 R12 27 21 SPEAKER
OSC2/CLKOUT RA1 330Ω REC ANA OUT
0Ω
4MHz 1 25
22p RA2 RECLED
5 2 24 26
RA3 PLAYE XCLK
LED VssA VssD
12 13
990051-11
Figure 1. Circuit dia-

from in d ep en d en t gram of the Funky user rhythm can be var- cal solu tion w as settled u p on u sin g
com p an ies is w id ely Drummer. The main ied . Table 1 lists th e m in iatu re ligh t d ep en d en t resistors
available. Th is d esign components are a pro- d ru m sou n d s an d (LDRs). These are devices whose resis-
u ses on e of th e earlier grammed PIC and a Table 2 lists the pre-pro- tan ce ch an ges d ep en d in g on h ow
PICs, for th e sim p le ‘Chipcorder’ IC. gram m ed rh yth m s. much light they are exposed to. In light
reason th at it d oesn ’t Th ere are a few ‘fu n ’ th eir resistan ce is arou n d 50 kiloh m s
need a more advanced sam p les in clu d ed su ch and in d arkness the resistance rises to
ch ip . For d evelop m en t p u rp oses a as a ch icken , as w ell as exotic Sou th several megohms.
PIC w ith in situ p rogram m in g is to be Am erican p ercu ssive sou n d s like th e There are 40 drum sounds but only
p referred becau se it is so m u ch easier quijada. 4 tou ch sw itch es to p lay th em . Som e
to re-p rogram in p lace on th e p roto- Th e d ru m s are triggered u sin g 4 means of accessing the drums in banks
typ e board th an to p u ll th e ch ip an d touch switches. The drums are divided was needed and this was achieved by
p u t it in a UV eraser, bu t on ce th e in to ban ks of 4, an d a p u sh bu tton using a pushbutton to step through the
d evelop m en t is com p lete a ch eap er selects between banks. available drums in banks of 4 at a time.
ch ip can be u sed in th e fin al d esign . Th e p re-p rogrammed rh yth ms are O n p ow er-u p ban k 1 is selected . Th e
All th e PICs u se th e sam e in stru ction also triggered by th e tou ch sw itch es. first tim e th e p u sh bu tton is p ressed
set (m ore or less) so to m igrate fin - Th e ban k p u sh bu tton selects 4 ban k 2 is selected , an d so on u p to
Elektor Electronics 7-8/99 15

ban k 10, w h en p ressin g th e p u sh bu t- can rep eat itself. Th is tech n iqu e of sharp edges on its control pins but nev-
ton selects bank 1 again. p ackin g bits in to bytes is very com - ertheless is still in effect and cannot be
Another pushbutton was needed to m on w h en w ritin g m icrocon troller disabled. A delay loop in the software
select betw een d ru m , rh yth m an d code and allows the maximum perfor- takes account of the debounce period.
record m od es. In rh yth m m od e th e mance to be squeezed from the limited The rhythm tempo is controlled by
bank button selects banks of rhythms. m em ory resou rces. O f cou rse it takes th e real-tim e clock cou n ter bu ilt in to
An d fin ally tw o p u sh bu tton s w ere extra softw are to extract th e p acked the PIC. A software subroutine extends
ad d ed to in crease an d d ecrease th e d ata from the table but on balance the this from the 8-bit hardware counter to
tempo. technique achieves a saving. a 16-bit softw are cou n ter to give th e
Th e Ch ip Cord er h as an in tern al Here is a sample rhythm along with required timing resolution.
am p lifier an d can d rive an extern al a m acro th at m akes th e sou rce cod e Th is sh ort d escrip tion of th e soft-
sp eaker d irectly bu t it w as d ecid ed to m ore read able. N ote th at th e d ru m s ware can only cover the major points.
ad d an extra stage of am p lification . have been given symbolic names. The If you are in terested th en stu d y th e
Th is u sefu lly p rovid es a volu m e con - form at d ’n ’ is ju st th e syn tax th e sou rce cod e (see Com p on en t sou rces
trol. An d after all th is is a d ru m assembler uses for a decimal constant, below for h ow to obtain a listin g) to
machine and should be loud! and ent r y is another macro that hides fu lly u n d erstan d th e w orkin gs of th e
the confusing instruction the PIC uses drum machine. This software is a good
T H E S O F T WA R E to implement a lookup table. exam p le of h ow m u ch fu n ction ality
Th e sam p le m em ory of th e Ch ip - can be achieved with even the smallest
Corder can be partitioned into chunks event macr o dr um, sust ai n of m icrocon trollers — th e PIC16C54
w h ich are m u ltip les of 100 m s in ent r y ( dr um<<3) +( sust ai n- 1) has only 512 word s of program mem-
length. The different drum samples are endm ory. The art of writing microcontroller
stored at d ifferen t offsets, at 100 m s cod e is th e art of th e m in im al, of
bou n d aries, in th e sam p le m em ory. event BASS2, d’ 4’ ; r eggae repeatedly writing and re-writing, and
Th e PIC n eed s to kn ow w h ere each event BASS3, d’ 3’ th en starin g at th e cod e to see h ow a
drum sample begins so that it can play event BASS2, d’ 1’ byte h ere an d a byte th ere can be
it when called upon to do so. These off- event CL_HI HAT, d’ 4’ saved . It is th e an tith esis of p rogram -
sets, or ad d resses, are stored in a event BASS3, d’ 4’ ming for big machines like a PC where
looku p table in th e PIC ’s p rogram ent r y 0 one doesn’t think twice about grabbing
m em ory. Th is is sim p ly a list of a m em ory bu ffer of a few h u n d red
ad d resses for all th e d ru m sam p les. A p articu lar rh yth m is fou n d by step - kilobytes in an ap p lication . It is th e
Som e re-ord erin g of th e bits is n eces- p in g th rou gh th e looku p table cou n t- au th or ’s op in ion th at cod in g for a
sary to match the PIC port pins to the ing the number of zero bytes reached. microcontroller is more satisfying.
ChipCord er ad d ress lines. This is per- For example, to find the third rhythm
formed by an assembler macro. the first two rhythms must be stepped THE CIRCUIT
The software doesn’t need to know over. Th is m ean s cou n tin g tw o zero The regulator provides a reliable 5V for
h ow lon g each sam p le is becau se th is bytes then the next byte is the start of th e d igital ICs. Cap acitors C1 an d C2
is handled directly by the ChipCorder. the rhythm. togeth er sm ooth th e su p p ly for th e
It h as a sep arate array of sin gle-bit A sligh tly d ifferen t form at is u sed PIC. C2 has a smaller capacitance than
memory w h ich it u ses to flag th e en d for th e rh yth m th at th e u ser can p ro- C1 bu t reacts faster. Sim ilarly C5 an d
of each sam p le. A p u lse ap p ears on gram . Th is is stored in RAM rath er C4 smooth th e voltage rail for th e op -
one of its pins when the end-of-sample th an RO M an d th e form er is in even am p . Cap acitor C12 d ecou p les th e
bit is en cou n tered an d th e PIC looks sh orter su p p ly th an th e latter. In fact Ch ip Cord er. An y voltage between 5V
for th is sign al. Th e PIC can restart a there are only 25 bytes of usable RAM an d 12V d c can be u sed to su p p ly th e
sam p le or can cel th e p layback of on e for everyth in g so bit p ackin g is board . N orm ally a 9V PP3 battery
sam p le an d p lay an oth er d ep en d in g absolu tely essen tial. Th e situ ation is would be used. The board draws about
on the actions of the user. com p licated by th e ad d ition of a 40mA at maximum volume. The Chip-
Th e p re-p rogram m ed d ru m m etron om e w h ich clicks w h ile th e Corder is power efficient and enters a
rh yth m s are also stored in a looku p rh yth m is bein g p rogram m ed bu t is low-power standby state immediately
table in the microcontroller ’s program silent afterwards, and a special ‘pad’ bit after completing a sample.
m em ory. An en try in th e table p attern w h ich in itially fills th e bu ffer The ChipCorder has its own ampli-
d escribes a sin gle ‘even t’ in a rh yth m an d is overw ritten by rh yth m even ts. fier bu ilt in an d can d rive a sp eaker
an d h as th e form ddddds s s , w h ere A con sequ en ce of th is is th at on ly th e directly. But for increased loudness an
th e top 5 bits (ddddd) are th e d ru m first 16 d ru ms can be u sed in th e u ser extra stage of am p lification h as been
ind ex and the low 3 bits (sss) are the rhythm. The memory buffer for storing u sed . Th e am p lifier is th e circu it su g-
sustain. The d rum ind ex is simply the th e u ser rh yth m is 15 bytes, an d gested by ISD, using a LM386 op-amp.
d ru m n u m ber from 1 to 31 (00001 to becau se th e metron ome clicks alw ays A differential design is used since a sin-
11111 in binary), and the sustain is the u se u p 4 bytes th is leaves th e m axi- gle-ended amplifier would give rise to
len gth of tim e th e d ru m sou n d is mum number of rhythm events at 11. an n oyin g ‘p op s’ at th e en d of each
p layed for (in oth er w ord s th e tim e Th e tou ch sw itch es n eed sp ecial sam p le. Th e sign al from th e Ch ip -
betw een su ccessive rh yth m even ts). h an d lin g to stop th em ‘bou n cin g’, Cord er is cou p led to th e d ifferen tial
Bin ary 000 rep resen ts a su stain of 1 w h ich m igh t cau se a d ru m to rep eat- amp lifier by C10 an d C11, alon g w ith
unit, 001 a sustain of 2 units, and so on. ed ly re-trigger w h en activated . Th e R17 and R19. VR1 sets the d ifferential
O n ly th e first 31 d ru m sou n d s can be tou ch sw itch es are p olled abou t 60 gain and acts as a volume control. R11
used in the pre-programmed rhythms times a second. an d C3 are a p rotection n etw ork for
an d you m ay w on d er w h y d ru m A design feature of the ChipCorder the op-amp, and C9 is a bypass capac-
ind ex 0 is not used . The reason is that which had to be circumvented was the itor necessary for amplifier stability. C6
th e sp ecial valu e of all zeroes inbuilt debounce period which is use- ac couples the output of the amplifier
(00000000) rep resen ts th e en d of th e ful when the chip is operated by noisy to a stereo jack socket with the left and
rh yth m . Wh en th is bit p attern is pushbuttons. This debounce period is right channels wired together.
en cou n tered th e softw are loop s back not needed when the chip is driven by Th e 4 MH z crystal alon g w ith C7
to th e start so th at th e d ru m rh yth m a m icrocon troller w h ich gen erates and C8 provide the clock for the micro-
16 Elektor Electronics 7-8/99

Us e r g u i d e
Funky Drummer operates in 3 modes – drum, rhythm and record mode. To change mode first press and hold the MODE but-
ton (S1) then press one of the other three buttons (S2 to S4). The box on the printed circuit board reminds you of this.
DRUM mode
Funky Drummer is in drum mode when the battery is first connected.
The touch switches (L1 to L4) play drums in banks of 4 according to Table 1.
The BANK button (S2) steps through the banks of drums. There are 10 drum banks in total.
RHYTHM mode
Pressing the MODE button (S1) then the RHYTHM button (S3) puts Funky Drummer into rhythm mode.
The touch switches (L1 to L4) play rhythms in banks of 4 according to Table 2.
The BANK button (S2) steps through the banks of rhythms. There are 3 rhythm banks in total.
The TEMPO+ button (S3) increases the tempo and the TEMPO– button (S4) decreases the tempo.
The LED flashes briefly at the start of each rhythm.
RECORD mode
Pressing the MODE button (S1) then the RECORD button (S4) puts Funky Drummer into record mode. A metronome starts
which clicks and flashes the LED on every beat (4 beats in the bar).
The touch switches (L1 to L4) record drums. The rhythm is layered with each new drum being added to the loop. Up to 11
drum hits can be recorded.
The BANK button (S2) steps through the banks of drums. Note that only the first 15 drums can be recorded.
The TEMPO+ button (S3) increases the tempo and the TEMPO– button (S4) decreases the tempo.
Pressing the MODE and RECORD buttons again stops the metronome click but the recorded rhythm continues until another
button is pressed.
Record your rhythm at a slow tempo then speed it up when finished.
Table 1. Drums
Bank L1 L2 L3 L4
1 bass # 1 snare # 1 low tom # 1 closed hihat
2 bass # 2 snare # 2 low tom # 2 open hihat
3 bass # 3 snare # 3 taiko crash cymbal
4 snare # 4 high tom # 1 high tom # 2 high tom # 3
5 low bongo high bongo low conga high conga
6 low agogo high agogo timbale timpani
7 brush # 1 brush # 2 cabasa china cymbal
8 triangle cowbell clap snap
9 kalimba whistle scratch gunshot
10 quijada bubble chicken rimshot
Table 2. Rhythms
Bank L1 L2 L3 L4
1 8beat # 1 8beat # 2 8beat # 3 8beat # 4
2 jazz shuffle reggae samba
3 disco # 1 disco # 2 elec pop pattern # 1
controller. Accurate timing is not essen- resistan ce of th e LDRs ch an ge, internally, so as soon as an address has
tial for th e softw are so a sim p le RC- d ep en d in g on th eir exp osu re to ligh t, been strobed into the chip the pins are
typ e oscillator cou ld h ave been u sed the voltage at the PIC’s pins changes. available for p ollin g th e p u sh bu tton s.
instead. Th e p u sh bu tton s an d th e Ch ip - This doubling-up of pins is a very com-
Ligh t d ep en d en t resistors L1 to L4 Cord er ad d ress lin es sh are th e sam e mon technique for increasing the effec-
work in conjunction with resistors R13 pins on the PIC. This can work because tive n u m ber of I/O p orts on a m icro-
to R16 as p oten tial d ivid ers. As th e th e Ch ip Cord er latch es th e ad d ress controller. Resistors R4, R5, R10 and R9

COMPONENT LIST
2 Resistors:
(all 1/4W 5% carbon film)
R1,R2,R18 = 0Ω
R3,R6,R7,R8 = 4kΩ7
R4,R5,R9,R10 = 47kΩ
R11 = 10Ω
R12 = 330Ω
R13,R14,R15,R16 = 150kΩ
R17,R19 = 470kΩ
VR1 = 47kΩ enclosed carbon
variable resistor (vertical
adjustment) + spindle
L1-L4 = miniature light dependent
resistor (see text)
Capacitors:
(electrolytics 2.5mm spacing, others
5mm)
C1,C5,C6 = 47µF, electrolytic 16V
C2,C3,C4,C9,C12 = 100nF ceramic
C7,C8 = 22pF ceramic
C10,C11 = 100nF miniature
polyester
Semiconductors:
REG = 78L05 5V regulator
LED = red 5mm LED
IC1 = PIC16C54A-04P
(microcontroller, programmed)
IC2 = ISD1416P (ChipCorder)
IC3 = LM386
Miscellaneous:
X1 = 4MHz crystal, HC49/U case
S1-S4 = miniature tactile pushbutton
(PCB mounting)
SPEAKER = 3.5mm stereo jack
socket (PCB mounting)
LINK1-LINK4 = 3cm wire link
BATTERY = PP3 battery snap
18-pin DIL socket
28-pin DIL socket
8-pin DIL socket
4 x PCB pillars or rubber feet (to fit
4mm hole)
PCB, available from MadLab (see
text)
Disk, PIC object code, available from
MadLab (see text)
Figure 2. PCB artwork.

Ready-made circuit
boards for this project
(47k) p u ll u p th e p u sh - are available from tou ch th en a sh ort th e board corresp on d s to th e sh orter
buttons to 5V, and resis- MadLab, Edinburgh. across th e p ow er rails leg or leg near the stripe on the side of
tors R8, R7, R6 an d R3 occu rs w h ich w ill th e bod y. Th e ceram ic an d p olyester
(4.7k) p rovid e load s crash th e p ow er su p - capacitors (C2 to C4, C7 to C12) can be
when the PIC is d riving the pins. The p ly an d th e ch ip w ill n o lon ger be soldered either way around.
ratio of th ese tw o resistan ces (10:1) is p ow ered u p , an d so is p rotected . The light dependent resistors (L1 to
chosen such that the PIC senses a low Th is seem s to be a robu st solu tion to L4) sh ou ld th en be sold ered to th e
when a pushbutton is pressed. th e p roblem . board . Th e LDRs are liable to m elt if
A d esign w eakn ess of th e Ch ip - overh eated so be very carefu l w h en
Cord er (at least as far as th is ap p li- CONSTRUCTION soldering them. Ensure they are flat on
cation is con cern ed w h ich relies on Con stru ction is straigh tforw ard . Th e the board.
its storage bein g n on -volatile) is th at resistors (R1 to R19) should be soldered Sold er th e variable resistor (VR1)
th e record p in , w h ich is active low, first followed by the wire links (LINK1 and push the spindle into the hexago-
is n ext to a p in w h ich is grou n d ed . If to LINK4). Identify the resistors by the n al h ole in th e top . Sold er th e regu la-
th ese tw o p in s sh ou ld m om en tarily colou red strip es on th e bod y. Th e IC tor (REG) m atch in g its sh ap e to th e
sh ort th en th e ch ip goes in to an sockets (IC1 to IC3) should then be sol- symbol on the board, and the LED fit-
erase cycle an d overw rites its m em - dered with their notches matching the tin g th e sh orter leg in to th e h ole with
ory, so be w arn ed . Th is of cou rse can notches in the symbols on the board. It th e lin e. N ext sold er th e crystal (X1),
on ly h ap p en w h en th e ch ip is p ow - is not recommended that the chips are th e p u sh bu tton s (S1 to S4), an d th e
ered u p . To m in im ise th e risk of th is soldered directly to the PCB. jack socket (SPEAKER).
occu r rin g th e record p in is tied to N ext fit an d sold er th e cap acitors. The wires for the battery snap have
th e p ositive su p p ly rail by a zero The electrolytic capacitors (C1, C5 and su p p ort h oles on th e board . Feed th e
oh m s resistor. If th e tw o p in s sh ou ld C6) are p olarised , th e m in u s sign on wires through the support holes from

th e track sid e of th e board before sol- Depending on the characteristics of the is KR89W, an d for th e m in iatu re ligh t
dering them. Red is positive and black actu al LDRs u sed th ese resistors m ay d ep en d en t resistors is AZ83E. It is
is negative. n eed ad ju stin g. In d eed th e ch aracter- im p ortan t to u se m in iatu re LDRs
Don ’t fit th e ICs in to th eir sockets istics of LDRs seem to be quite variable which can be completely covered by a
u n til th e p roced u res in Testin g below even w ith in th e same batch . Examin e fingertip. If panel mounted rather than
h ave been follow ed . Wh en fittin g th e th e sign al at th e LDR en d of resistors p cb p u sh bu tton s are u sed th en an y
ICs you will find the legs need bending R13 to R16. You should see a voltage of sm all p u sh -to-m ake bu tton w ou ld be
a little first. Do this carefully with your about 0.5V when the associated LDR is su itable. Th e jack socket can also be
fingers. Match the notches in the ICs to uncovered and this should rapidly rise obtain ed from Map lin (ord er cod e
the notches in their sockets. to arou n d 4V w h en covered . 1.4V is JM20W), as can th e variable resistor
Finally attach the rubber feet to the the threshold voltage at which the PIC (DT39N) and spindle (DT47B).
four corners of the board. senses the difference between a 0 and Map lin also sells th e ISD1416P
a 1. If th e voltage d oes n ot rise above ChipCord er. If you purchase this chip
TES TING th is valu e th en d ecrease th e valu e of from them you will need to record the
Thoroughly examine the circuit board th ese resistors (to 120k or 100k say). sou n d sam p les in to it you rself. Th is
for m istakes before con n ectin g a bat- Note that it is normal to see a 50Hz rip- sh ou ld on ly be attem p ted by th ose
tery. Ch eck th at all th e com p on en ts ple on this signal due to room lighting. people who have the technical skill to
h ave been fitted correctly an d th at Exp erim en t w ith th e ligh tin g con - build a programmer for themselves (as
th ere are n o d ry join ts an d n o sold er d ition s to get th e best resp on se from yet th ere is n o Ch ip Cord er p rogram -
bridges between tracks. the touch switches. You might find that mer on the hobbyist market but such a
Power up the board without the ICs sm all p ieces of op aqu e tap e w rap p ed d evice m ay form th e basis of a fu tu re
in th eir sockets. Ch eck th e voltage at arou n d th e en d s of you r fin gers article). If you go down this path then
p in 14 of th e PIC socket an d p in s 16 improve performance. you cou ld , of cou rse, record a com -
an d 28 of th e Ch ip Cord er socket. You pletely different set of drum sounds.
sh ou ld see a regu lated 5 volts. Th e CAS I N G A su itable sp eaker is a sm all cased
voltage at p in 6 of th e op -am p socket This project is designed to be uncased. sp eaker for u se w ith a Walkm an cas-
should be the unregulated supply volt- If however you wish to case it then any sette p layer, or a m u ltim ed ia sp eaker
age (9V). The top or bottom of link R1 small box of ap p roximate d imen sion s for a PC. Th ese typ es of sp eakers are
is a good ground point for taking mea- 15cm by 10cm by 5cm w ill d o. Mou n t qu ite w id ely available at reason able
surements. th e p cb in th e bottom p art of th e case prices. You can use powered speakers
As m en tion ed above th e Ch ip - using spacing pillars at the four corners for even more volume.
Cord er is liable to w ip e its con ten ts if of th e board (fittin g 4mm h oles). Cer- Both complete kits and the individ-
incorrectly connected so double check tain com p on en ts w ill n eed m ou n tin g u al sp ecialised com p on en ts are avail-
this part of the board . Check the volt- on the exterior of the case so the com- able from Mad Lab. A p rofession ally-
ages on p in s 27 an d 26. Pin 27 sh ou ld ponents used should be panel-mount- m an u factu red p rin ted circu it board
be at 5V and pin 26 should be at 0V. ing rather than pcb-mounting varieties. w ith tin n ed tracks an d silk-screen ed
Exam in e p in s 6, 7, 8 an d 9 of th e Th ese com p on en ts are th e LED, th e legend is available at £4.00, a pre-pro-
PIC socket. You sh ou ld see a level p u sh bu tton s, th e tou ch sw itch es, th e gram m ed PIC at £6.00, an d a p re-
ch an ge w h en th e p u sh bu tton s are jack socket an d th e volu m e con trol. record ed ISD Ch ip Cord er at £8.00. A
pressed. Wires can be run from the front panel complete kit of parts including the pcb,
Pow er d ow n th e board an d in sert components to the solder pads on the ICs and all other components is avail-
the LM386 op-amp. Check the output PCB. Th e tou ch sw itch es can be able at the price of £25.00. All prices are
p in 5. Th e voltage sh ou ld be h alf th e m ou n ted d irectly on th e top of th e inclusive of P&P. Please make cheques
supply voltage (4.5V). case. You cou ld if you w ish u se p u sh - an d p ostal ord ers p ayable to Mad Lab
Pow er d ow n th e board an d in sert buttons (of the push-to-break variety) Ltd , an d sen d you r ord er to Mad Lab,
the PIC. Check that the microcontroller in place of the LDRs but they wouldn’t 149 Rose Street, Ed in bu rgh EH 2 4LS.
is oscillating by looking at pin 15 with be as resp on sive. A sm all sp eaker of O rd ers w ill be d esp atch ed w ith in 28
a h igh -im p ed an ce oscilloscop e. You im p ed an ce 8 oh m s cou ld also be days.
should see a 4MHz oscillation. mounted inside the case, in which case The PIC source code is available for
Finally insert the ChipCorder chip. th e jack socket w ou ld n ’t be requ ired . p eru sal on ou r w ebsite at
Con n ect a sp eaker to th e jack socket Fin ally an on -off sw itch sh ou ld be http://www.madlab.org/pic.html or, for
via a lead w ith a 3.5mm jack p lu g, set included when mounting in a case, in those people who don’t have access to
th e volu m e con trol to m id p oin t, an d the positive line from the battery. th e In tern et, on a 3.5” PC-form at
con n ect a battery. Th e softw are flop p y d isk. Th e d isk con tain s both
includes a power-on self test. The LED COMPONENT SOURCES d ocu m en ted sou rce an d object cod e
is flash ed briefly an d a ‘beep ’ is Most of th e comp on en ts are stan d ard for the software, as well as all the drum
sounded. If this happens then you can an d are easily obtain able. Th e m ore sam p les in .w av form at. Th is d isk is
be su re th e microcon troller, th e Ch ip - u n u su al p arts can be obtain ed from available from th e above ad d ress for
Corder and op-amp are all working. (am on g oth ers) Map lin Electron ics. £2.50 inclusive.
Resistors R1-R16 (150k) are optimal Th e Map lin ord er cod e for th e PIC is (990051-1)
values for average lighting conditions. NR92A, for the miniature pushbuttons

MICROPROCESSORS
LCD drive
via 8032 BASIC
The 80C32 BASIC

control computer pub-
lished in the Febru-
ary/March 1998
issues of this maga-
zine lends itself to a
number of interesting
experiments. One of
these, described in
this article, is its use
as direct driver for a
liquid crystal display
via a 4-bit or 8-bit
interface.
INTRODUCTION Th e d isp lay is d riven via th e 4-bit
Programmed with the MCS-51 BASIC in terface of th e exten sion board or a
in terp reter, th e 80C32 BASIC con trol discrete 8-bit interface. The latter is no
comp u ter p u blish ed in th is magazin e doubt the better solution since only the
early last year en ables in terestin g microcontroller configuration is needed
experiments even for those who do not to d rive th e LCD. N everth eless, th e
h ave sp ecial kn ow led ge of m icrocon - article gives sh ort BASIC listin gs for
troller programming. both variants.
Th e sin gle-board com p u ter (SBC)
con sists of a sm all m ain com p u ter 4- B I T I N TE RFACE
board on w h ich th e microcon troller is Most alp h an u m eric liqu id -crystal d is-
configured, and a larger multifunction p lays are based on a m em ber of th e
exten sion board to w h ich th e m ain HD64780 family of controllers. In most
board is fitted . What was not foreseen literature on these controllers, the pos-
is a simp le, d irect con n ection for a liq- sibility of d rivin g th e circu its via fou r
uid-crystal display (LCD). The present d ata lin es is often n ot in clu d ed . Ap art
article d escribes a setu p th at allow s a from these lines, the control of an LCD
stan d ard 2 × 1 6 ch aracter LCD to be also requires three status lines. If a back
Design by A. Köhler con n ected to th e con trol comp u ter. sign al from th e d isp lay is n ot n eed ed ,

22
it is p ossible to make d o w ith six con -
trol lines.
This small number of lines makes it
1 DP1 2x 16
5V
possible for the LCD unit to be driven

14 14
via an 8-bit ou tp u t p ort. For th is p u r- C5 C6
IC1 IC2
pose, port connections D 01–D 08 (K13 to 7 7
VSS
VDD
R/W
K16 on th e exten sion board ) are u sed ; 100n 100n
VO
RS
D0
D1
D2
D3
D4
D5
D6
D7
E
note that D 07 is not used. 1 2 3 4 5 6 7 8 9 10 11 12 13 14
Output power driver IC8 would not IC1 = 74HCT00
5V IC2 = 74HCT00
be required were it not for the fact that P1
K2
it must support the software for invert-
in g th e sign als. Th is is tru e of th e list-
in gs for both version s. Listin g 1 is for 10k
A15
u se w ith th e origin al circu it, w h ereas
A1
A0
D0
D1
D2
D3
D4
D5
D6
D7
D2
D1
D0
A0
A0
with Listing 2 the port lines of IC8 are 5V
rep laced by w ire brid ges. In th is case,
A14
A15
A14
D3
D4
D5
D6
D7
th e LEDs in th e p ort lin es are, of
A0
D4
D5
D6
D7
A1
5 4
course, superfluous. IC1b
DO6
DO5
DO8
DO1
DO2
DO3
DO4
Th e p rograms are an n otated liber- &
ally, so that a d etailed d iscussion here 6 5V K3

is not needed. 12 13 IC3
D1
Th e con trol bits (typ e of d isp lay, IC1d 9 10 12 13 1N4001 7805 5V
&
matrix format, reset, cu rsor to th e left & &
K4
or righ t, an d so on ) are set u p to lin e 11
9
IC1c
1
IC2a
8 11
170 an d sen t to th e d isp lay con troller 10 &
8
2 &
3
IC2c IC2d
C4 C1 C2 C3
6
via rou tin es 700–780. Th e bits on th e 3 100µ 100n 100n 10µ
IC2b
output interface are allocated as shown IC1a
& 63V 16V
in the table below. &

4 5
Even th ou gh th e d isp lay is limited 1 2
RD RW K1
to 2×16 characters, the controller dri-
ves 2×40 characters at all times. Since 980100 - 11
a retu rn lin e from th e d isp lay to th e
SBC is not provided, the software must
Figure 1. Circuit diagram of the LCD

interface. In the 4-bit version, the com-
Bit Significance LCD pin ponents associated with regulator IC3
may be omitted.
7 (D08) LCD latch enable(active high) 6
6 (D07) not used
5 (D06) RS (L= command; H= data) 4
4 (D05) R/W (L= write) 5
3 (D04) LCD data bit 7 14
en su re th at after th e 2 × 1 6 visible 8- B I T I N TE RFACE ad d ress lin es A14 an d A15. Th is

ch aracters (p rogram lin es 250–300) It is, of course, much neater to link the arrangement makes the LCD interface
h ave been in p u t, th e in visible ch arac- liqu id -crystal d isp lay d irectly to th e m u lti-ad d ressable, w h ich is p articu -
ter p osition s in th e m em ory are filled SBC, for which purpose the computer larly u sefu l w h en oth er p erip h eral
w ith sp ace ch aracters. Th is is effected an d d isp lay in terface h ave th e sam e bu ild in g blocks are lin ked to th e SBC.
in program lines 310–350. typ es of con n ectors. Th e con troller Listin g 3 sh ow s th at th e 8-bit ver-
Finally, the data bits are sent to the th en receives, ap art from th e earlier sion h as clear ad van tages over th e
controller in routines 400–600: the four mentioned control signals RS (address 4-bit version . For in stan ce, th ere are
m ost sign ifican t first, th e least sign ifi- A1) an d R/W (ad d ress A0), all eigh t n o w ait loop s to obstru ct th e execu -
cant last. d ata bits in p arallel. Takin g a basic tion of th e sh ort, p lain p rogram.
It sh ou ld be en su red th at th e bu sy ad d ress of 0C000H, th e ad d ress allo- Pow er can n ot be taken from th e
flag is enabled only after the third out- cation is SBC: on th e con trary, th e con troller
put of 03H (line 60). sh ou ld n ow be p ow ered via th e LCD
N ote th e row of ‘w ait’ loop s th at 0C000H w rite in stru ction interface board. Power is derived from
make any kind of handshaking unnec- 0C001H read in stru ction a discrete mains adaptor, whose output
essary. These loops are generously pro- 0C002H w rite d ata is stabilized by IC 3 an d sm ooth ed by
p ortion ed an d m ay be sh orten ed if 0C003H read d ata cap acitors C 1–C 4. Diod e D 1 p rotects
required. the circuit against inadvertent incorrect
Pow er for th e in terface is d erived Ad d ress 0C00H (en able lin e at p in 6) polarity of the supply voltage.
from the SBC. is d ecod ed by an AN D op eration of [980100]
th e WR an d RD sign als in th e SBC an d

C6 C2 D1 Parts list
2 Resistors:
H1
H2
IC2 IC1 C1 C4 + P1 = 10 kΩ preset potentiometer

C5 IC3
K4 0
C3
Capacitors:
K1 H5
980100-1 H6
C1* , C2, C5* , C6* = 0.1 µF

1-001089 C3 = 10 µF, 16 V, upright
ROTKELE )C( C4* = 100 µF, 63 V. upright
Semiconductors:
D1 = 4001
Integrated circuits:
IC1* , IC2* = 74HCT00
IC3* = 7805
DP1
Miscellaneous:
H8 H7
K1* = 20-way SIL socket

K2* , K3* = 14-way SIL socket
K4 = 2-way terminal strip for board
DO4
DO3
DO2
D01
DO8
DO5
DO6
mounting
H3
H4
P1 K2 K3 K5 = 2¥16 character liquid-crystal

display (for instance, Sharp Type
LM16A211)
* Not used in 4-bit version
(C) ELEKTOR
980100-1
Figure 2. The single-sided printed-circuit board for the LCD interface

which is not available ready made. The 8-version is linked directly to
the SBC board, for which purpose the same connectors are used as
on that controller.
Li s t i ng 1 160 K = O : GOSUB 700 : REM Di s pl ay on,

c ur s or on, f l as h
5 REM ULN 2803 r epl ac ed by wi r e l i nk s 170 K = 15 : GOSUB 700
10 STRI NG 100, 20 : REM Memor y f or s t r i ng 180 REM ——————————————————-
20 K = 3 : GOSUB 700 : REM I ni t I 250 PRI NT “ Max . 36 c har ac t er s may be ent er ed
30 FOR Z = 1 TO 4000 up t o ar r ow <”
40 NEXT Z 260 I NPUT “ Pl eas e ent er t ex t s t r i ng t o be
50 K = 3 : GOSUB 700 : REM I ni t 2 di s pl ay ed : ” , $( 1)
60 K = 3 : GOSUB 700 : REM I ni t 3 270 FOR Z = 1 TO 16
70 K = 2 : GOSUB 700 : REM I ni t . 4 280 D=ASC( $( 1) , Z) : REM I ndi v i dual c har ’ s ,
80 K = 2 : GOSUB 700 : REM 4- bi t i nt er f ac e s uppl i ed by us er
90 K = 8 : GOSUB 700 : REM 2 l i nes , 290 GOSUB 400
5* 7 mat r i x 300 NEXT Z
100 K = 0 : GOSUB 700 : REM Cl ear di s pl ay 310 FOR Y = 16 TO 39 : REM Fi l l LCD c ont r ol l er
110 K = 1 : GOSUB 700 memor y
120 K = 0 : GOSUB 700 : REM Cur s or home 320 D = 32 : REM not hav i ng a di s pl ay f unc t i on
130 K = 2 : GOSUB 700 330 GOSUB 400
140 K = 0 : GOSUB 700 : REM I nc r ement c ount er , 340 NEXT Y : REM wi t h dummy c har ac t er s
do not s hi f t 350 GOTO 250
150 K = 6 : GOSUB 700 360 REM ——————————————————-

400 REM Subr out i ne f or dat a out put 560 L = L. AND. 127 : Di s abl e l at c h
410 L = D. AND. 15 : REM Dat a of l ow par t 570 XBY( 0C000H) = L
420 H = D. AND. 240 : REM Dat a of hi gh par t 580 FOR U = 1 TO 100
430 H = H/ 16 : REM Shi f t hi gh dat a 590 NEXT U
440 H = H. OR. 32 : REM Enabl e dat a 600 RETURN
450 XBY( 0C000H) = H 610 REM ——————————————————-
460 H = H. OR. 160 : REM Enabl e l at c h 700 REM Subr out i ne f or c ommand out put t i ng
470 XBY( 0C000H) = H 710 XBY( 0C000H) = K
480 H = H. AND. 127 : REM Di s abl e l at c h 720 K = K. OR. 128 : REM Enabl e l at c h
490 XBY( 0C000H) = H 730 XBY( 0C000H) = K
500 FOR U = 1 TO 100 740 K = K. AND. 127 : REM Di s abl e l at c h
510 NEXT U 750 XBY( 0C000H) = K
520 L = L. OR. 32 : REM Enabl e dat a 760 FOR U = 1 TO 100
530 XBY( 0C000H) = L 770 NEXT U
540 L = L. OR. 160 : REM Enabl e l at c h 780 RETURN
550 XBY( 0C000H) = L
Li s t i ng 2 330 D = 223 : REM not hav i ng a di s pl ay f unc t i on

340 GOSUB 400
5 REM Unmodi f i ed c i r c ui t wi t h ULN2803 350 NEXT Y : REM wi t h i nv er t ed- s pac es
7 XBY( 0C000H) = 255 : REM I ni t i al s t at e 360 GOTO 250
bec aus e ULN2803 i nv er t s 370 REM———————————————————
10 STRI NG 100, 20 : REM Memor y f or s t r i ng 400 REM Subr out i ne f or dat a out put
20 K = 12 : GOSUB 700 : REM I ni t 1 410 L = D. AND. 15 : REM Dat a of l ow par t
30 FOR Z = 1 TO 4000 420 H = D. AND. 240 : REM Dat a of hi gh par t
40 NEXT Z 430 H = H/ 16 : REM s hi f t hi gh dat a
50 K = 12 : GOSUB 700 : REM I ni t 2 440 H = H. OR. 16 : REM Enabl e wr i t i ng
60 K = 12 : GOSUB 700 : REM I ni t 3 450 XBY( 0C000H) = H
70 K = 13 : GOSUR 700 : REM I ni t 4 460 H = H. AND. 127 : REM Enabl e l at c h
80 K = 13 : GOSUB 700 : REM 4- bi t i nt er f ac e 470 XBY( 0C000H) = H
90 K = 7 : GOSUB 700 : REM 2 l i nes , 480 H = H. OR. 128 : REM Di s abl e l at c h
5* 7 mat r i x 490 XBY( 0C000H) = H
100 K = 15 : GOSUB 700 : REM Cl ear di s pl ay 500 FOR U = 1 TO 100
110 K = 14 : GOSUB 700 510 NEXT U
120 K = 15 : GOSUB 700 : REM Cur s or home 520 L = L. OR. 16 : REM Enabl e wr i t i ng
130 K = 13 : GOSUB 700 530 XBY( 0C000H) = L
14O K = 15 : GOSUB 700 : REM I nc r ement c ount er , 540 L = L. AND. 127 : REM Enabl e l at c h
do not s hi f t 550 XBY( 0C000H) = L
150 K = 9 : GOSUB 7O0 560 L = L. OR. 128 : REM Di s abl e l at c h
160 K = 15 : GOSUB 700 : REM di s pl ay on, 570 XBY( 0C000H) = L
c ur s or on, f l as h 580 FOR U = 1 TO 100
170 K = 0 : GOSUB 700 590 NEXT U
180 REM——————————————————— 600 RETURN
250 PRI NT. ” Max . 32 c har ac t er s may be ent er ed 610 REM———————————————————
up t o ar r ow <” 700 REM Subr out i ne f or c ommand out put t i ng
260 I NPUT “ Pl eas e ent er t ex t s t r i ng t o be 710 K = K. OR. 48 : REM Enabl e c ommand and
di s pl ay ed : ” , $( 1) wr i t i ng
270 FOR Z = 1 TO 16 720 XBY( 0C000H) = K
280 D=ASC( $( 1) , Z) : REM I ndi v i dual c har ’ s , 730 K = K. AND. 127 : REM Enabl e l at c h
s uppl i ed by us er 740 XBY( 0C000H) = K
290 D = D. XOR. 255 : REM ULN 2803 i nv er t s 750 K = K. OR. 128 : REM Di s abl e l at c h
300 GOSUB 400 760 XBY( 0C000H) = K
310 NEXT Z 770 FOR U = 1 TO 100
320 FOR Y = 16 TO 39 : REM Fi l l LCD c ont r ol l er 780 NEXT U
memor y 790 RETURN
Li s t i ng 3 ( 8- bi t i nt er f ac e) 70 FOR Z = 1 TO 16
80 A=ASC( $( 1) , Z) : REM i ndi v i dual c har ’ s ,
10 STRI NG 100, 20 : REM Memor y f or s t r i ng s uppl i ed by us er
20 XBY( 0C000H) =56 : REM 8- bi t i nt er f ac e, 90 XBY( 0C002H) =A : REM Tr ans mi t t hem!
2 l i nes , 5* 7 mat r i x 100 NEXT Z
30 XBY( 0C000H) =15 : REM Di s pl ay on, 110 FOR H = 16 TO 39 : REM Fi l l LCD c ont r ol l er
c ur s or on, f l as hi ng on memor y
40 XBY( 0C000H) =1 : REM Cl ear di s pl ay 120 XBY( 0C002H) =32 : not hav i ng a di s pl ay
50 PRI NT “ Max . 16 c har ac t er s may be ent er ed f unc t i on
up t o ar r ow <” 130 NEXT H : REM wi t h dummy c har ac t er s
60 I NPUT “ Pl eas e ent er t ex t s t r i ng t o be 140 GOTO 50
di s pl ay ed : ” , $( 1)

GENERAL INTEREST
PC-controlled model
railway: EEDTS Pro
Part 2: the control software
Although the model railway may be controlled manually, it is more

convenient to drive it via a personal computer (PC). For this purpose,
a special EEDTS Pro program has been developed for use under
Windows. It provides the necessary communication between the con-
troller and the railway track via the PC. This article gives a detailed
description of the software. Moreover, elsewhere in this issue there is
a project for a booster amplifier suitable for use with the EEDTS Pro
model railway.
Design by S van de Vries

28
INTRODUCTION • starting a track Th e blu e an d red kn obs fu n ction
N ot on ly is th e softw are, available • terminating a track like switches, whereas the yellow and
th rou gh ou r Read ers’ Services u n d er • p lacin g th e startin g p oin t of a su b- green ones function like push buttons.
O rd er N o. 986027, u ser-frien d ly, bu t sidiary track The latter two are active only when the
th e d esign er h as also tried to m ake it • signalling that a track is busy. left-h an d bu tton on th e m ou se is
give as realistic a p ictu re of a m od el pressed.
railw ay on th e mon itor screen as p os- The detect button – the white squares All u sers are con trolled via a su it-
sible. in the penultimate column which con- able d ecod er, w h ich m ay be EEDTS
The operator can thus sit facing the tain a number (81) – show the number Pro signals or turnout decoders, or rel-
screen like a real station m aster an d of the train that has passed the relevant evant Märklin or Viessmann types. The
con trol th e en tire track an d all th at is p oin t last, p rovid ed th at th e locom o- address of all these decoders is set with
on it. All functions are available at the tive is fitted w ith a su p er en gin e a dual in-line package (DIP) IC switch.
click of a mouse. decoder (see Part 1 – June 1999). Each decoder enables up to eight elec-
Th e p rogram , w ritten in Visu al Since detection can take place only tromagnets to be controlled.
BASIC, is su itable for u se w ith Win - in combination with a contact rail, loco- To in d icate to th e p rogram w h ich
dows 3.1 or higher, and requires a min- m otives w ith ou t a su p er en gin e u ser is associated w ith w h ich sym bol
im u m m em ory of 8 Mbyte. It is avail- decoder are also detected, but these are on th e screen , actu ate ‘Decod er
able on d iskette in fou r lan gu ages indicated by the address (). addresses’ via ‘O ptions’ and click with
(Dutch, English, French, and German). the mouse on the relevant symbol.
USERS The dark red box shows all states of
GO! Users are item s su ch as tu rn ou ts a symbol and in it may be stated which
After starting with setup.exe, the instal- (points; US: switches) and signals, that d ecod er ad d ress an d d ata ou tp u t are
lation instructions on the screen guide are driven by a suitable decoder. There are associated w ith a p articu lar fu n c-
the operator. are three types of user: tion.
Start the program via the Windows If only two positions of a three-way
start men u , wh ere th e setu p p rogram 1 u sers w ith on e stable con d ition , signals set are used, the non-used posi-
has created its own menu. First, there su ch as a u n cou p lin g ram p , an d tion should be indicated by a 0 decoder
is a cop yrigh t n otice on th e screen , those that are controlled with a yel- address and data output. This converts
which disappears automatically after a low or green knob. the three-way signals set into one with
short time. tw o stable con d ition s. Wh en th e
After the user has acquainted him/ 2 u sers th at h ave tw o stable con d i- ‘Update’ is actuated, the information is
h erself w ith th e con ten ts of th e text, tions, such as turnouts or two-way saved.
th e text on th e screen m ay be sh ort- sign als, an d th ose th at are con - Wh en all ad d ress an d d ata field s
en ed by clickin g on th e text w ith th e trolled with a red or blue knob. are 0, the program assumes that there
left-h an d m ou se bu tton . N ote, h ow - is no turnout or signal decoder for the
ever, th at th e softw are can be u sed 3 u sers th at h ave th ree stable con d i- symbols.
on ly w h en an EEDTS Pro u n it is con - tions, such as three-way signals and
nected to the system. three-way turnouts. S I GN ALLI N G
The program assumes that the con- Th e p rim ary fu n ction of th e retu rn
troller is lin ked to th e CO M1 p ort. If The coloured knobs in the last column kn obs – grey rectan gu lar symbols – is
this is not so, another communication (blu e, red , yellow, an d green ) are n ot to signal track occupation. For this pur-
port may be chosen via the menu ‘Set- included in the track layout. They may p ose, th ere m u st be a con n ection
tings→Communication’. be placed in random positions for spe- betw een th e relevan t sym bol an d th e
cial fu n ction s, su ch as sw itch in g th e retu rn sign aller. EEDTS Pro an d
L AYI N G T H E T R AC K station lights on and off via a relevant Märklin units may be used together on
O n ce th e p rogram is op eration al, th e decoder. a track, but do not forget to connect the
menu item ‘File’ may be opened in the
u su al m an n er w ith th e m ou se. Th ere
th en ap p ears a su b-m en u con tain in g
‘N ew ’. ‘Load ’, ‘Save’, ‘Delete’, an d
‘Close’. There is complete control over
the saving of screen data.
When ‘New ’ is selected , fresh d ata
m ay be d efin ed . At th e bottom of th e
screen there is an overview of the rail-
way components familiar to any model
railw ay en th u siast. An y of th ese m ay
be selected rapidly and efficiently with
a click of the mouse. Should a compo-
n en t be p laced in th e wron g p osition ,
this is quickly rectified with the right-
h an d mou se bu tton . An elemen t may
also be m oved by clickin g on it w ith
the mouse (left-hand button) and drag-
ging it to the wanted position.
In gen eral, th e com p on en ts are
d ivid ed in to fou r grou p s: p assive,
active, retu rn , an d d etect fu n ction s.
The return and detect functions, which
are found on the screen in the penulti-
mate column, have a fourfold function:

sixth wire of the Märklin units (see Part may be altered by rep eated ly clickin g ‘d o n ot p roceed ’ sign al. to p reven t a
1 – June 1999). with the left-hand button of the mouse train from en terin g an in com p letely
Wh en th e left-h an d m ou se bu tton on th e relevan t sym bol. If a w ron g arranged section of track or a busy sec-
is clicked on a retu rn kn ob, ad d ress sym bol is selected , th is can be cor- tion . Th e relevan t sign al set m u st be
an d d ata in form ation is n eed ed . Th e rected w ith th e righ t-h an d bu tton of placed behind the stretch of detect sec-
ad d ress follow s from th e sequ en ce in the mouse. tion associated w ith th e retu rn or
w h ich th e d ecod ers are lin ked to th e A secu re section of track form s a d etect kn ob. At rest, it is in th e ‘stop ’
controller. That nearest to the controller ch ain of in terlin ked sym bols, bu t it p osition . An ap p roach in g train h as to
is n u m ber on e, th e n ext on e, n u m ber rem ain s p ossible, for in stan ce, for w ait u n til a section of track becom es
tw o, an d so on . Th e con troller can safety reasons, to select a signal outside accessible to w h ich op eration of th e
accom m od ate u p to 32 d ecod ers. If th e section . Th is sign al, w h ich is signal is coupled. It is useful to position
Märklin S88 decoders are used, it must allowed to show only the ‘stop’ signal, th is sign al at a reason able d istan ce
be born e in m in d th at th ese u se tw o au tom atically assu m es th is con d ition from th e con tact rail u sed to p reven t
sequ en tial ad d resses. In p u ts 9–16 are w h en th e relevan t secu re section is th e train h avin g to w ait for th e p ro-
really 1–8 of the next higher address. selected. gram to be executed.
If a secure section is to be removed, In th e p rogrammin g mod e, retu rn
TRAI N D E TE CTI O N it is selected by clickin g w ith th e left- or detect knobs are selected first, after
The train detector module – white rec- h an d m ou se bu tton at th e start an d which the associated program lines are
tan gu lar icon –is a d etector in serted en d of it, an d th en d isablin g th e in d i- com p osed w ith th e left-h an d m ou se
in to a ch ain of retu rn sign allers. After vid u al segm en ts w ith th e aid of th e bu tton . Wh en th at bu tton is clicked ,
the mouse has been clicked on it, only righ t-h an d bu tton . Th en , actu ate th e d etect kn ob becom es red an d th e
the address has to be input. More data ‘Update’, whereupon the entire section program screen opens automatically.
O n ce th is is d on e, a start m ay be
made with defining the action, that is,
th e selectin g of a secu re section of
track, or settin g a u ser to on e of its
p osition s. In case of a secu re section ,
click with the left-hand mouse button
on the start of the section – usually the
detect knob – and then on the desired
en d of th e section . Th e red icon th en
gets a green core an d th e en d stop
becomes yellow. Th e section betw een
th ese p oin ts, w h ich m u st be saved
u n d er op tion ‘tracks’, th en becom es
visible.
If a u ser is to be actu ated , click on
the relevant symbol with the left-hand
m ou se bu tton . By clickin g on it a few
times, it is set to the wanted condition.
An y w an ted in terval p reced in g th e
action may also be input.
The next action, for instance, a sub-
sidiary section, may be defined on the
next line once ‘Add line’ has been actu-
ated.
There is also a level function: at the
first program line, ‘level’ has a value of
on e. Th is valu e is retain ed u n til th e
is n ot n eed ed , sin ce all eigh t d ata bits is removed. op erator selects a h igh er on e. Wh en
are u sed to give th e ad d ress of th e Wh en a secu re section of track h as th e relevan t kn ob is actu ated , level is
engine decoder. been saved , it is n o lon ger p ossible to raised by one, whereupon the program
return to option ‘Build control section’. lin es for th is level m ay be d efin ed .
S E CU RE TRACKS Th e on ly w ay to alter th e track is by They form a first alternative route.
Secu re tracks are d efin ed as th ose erasing all secure sections first. In ‘O p eration al’ m od e – w h en th e
between two return knobs or between p rogram is execu ted – th e softw are
two train detectors. Point the mouse at AU X I L I ARY P R O G R AM selects th is altern ative if th e p rogram
th e retu rn or train d etector kn ob th at Automatic processing of a train service lines defined at level 1 temporarily can-
marks the start of a section of track and is p ossible by an ad d ition al m od u le not be carried out.
press the left-hand button, whereupon that may be programmed with the aid The relevant lines are marked non-
the icon should turn green. Then point of m ou se m ovem en ts. Th e p rogram execu table w h en in on e of th e lin es a
th e m ou se at th e icon th at m arks th e may institute virtual stations, train ser- section is defined that crosses another
end of the relevant section of track and vice sch ed u les an d au tom atic con trol one. It may also be that the end of the
press the left-hand button, whereupon of track section s. It also p rovid es p ro- section is occupied.
the icon should turn yellow. By repeat- tection against lateral or head-on colli- Th e level fu n ction th u s m akes it
in g th is p rocess at all in term ed iate sions. p ossible to d efin e a set of altern ative
p oin ts alon g a track, a secu re section The setup of the program is that the routes. This arrangement allows varied
w ill be d efin ed . Th is is im p ortan t train determines its execution. The pro- traffic at n ormal station s, an d en ables
becau se, as w ill be seen later, th e p ro- gramming rules are, therefore, coupled virtual stations to be programmed in a
gram n eed s th ese secu re section s of to th e retu rn or d etection kn obs th at simple manner.
track. are to be actu ated by th e train . Th is If n on e of th e altern atives is p ossi-
The position of turnouts and signals often also requ ires p rotection w ith a ble, n o action s are carried ou t, th at is,

th e train is (tem p orarily) at stan d still. p resen t on each con trol, a con figu ra- Controlling trains
As soon as the situation changes to the tion screen is opened. The soft controls Clickin g on a con trol – arrow u p ,
exten t th at on e of th e altern atives are u sed in th e op eration al m od e to arrow down, reverse, or direction func-
becomes possible, the relevant lines are vary the speed of trains. tion – actu ates it. From th en on , th e
executed at once. Tw o typ es of en gin e d ecod er m ay icons of the control – as they are input
If n o p rogram lin es are associated be con trolled : n orm al or exten d ed . during the programming of the control
w ith th e selected kn ob, th e lin es are Normal refers to standard loc decoders – can be seen betw een th e 10th an d
shown empty on the screen. Each line w ith ju st on e ad d ition al fu n ction s or 11th lin e. Th e w ritten d escrip tion of
carries the ‘nx’ index number of the rel- d ecod ers w ith ou t an ad d ition al fu n c- the relevant engine or train can be seen
evant button – this nx index number is tion, such as delta decoders. Extended under the buttons.
uniquely allocated by the programmer refers to engine decoders with more – If all th at is n eed ed is settin g or
to a return or detect knob. The number u p to fou r – fu n ction s, su ch as th e resettin g of a fu n ction , p oin t th e
m ay be called u p in m en u item su p er en gin e d ecod er w h ich is m ou se at th e relevan t sh ift con trol
‘Decoder addresses’. planned for publication in a forthcom- an d click on it w ith th e left-h an d bu t-
A d elay in com bin ation w ith th e ing issue of this magazine. ton . Th e sp eed of th e train may be set
action ‘Secure section’ is sensible only The address of the decoder is input w ith th e vertical arrow s on th e con -
if the section is coupled to a signal set into the address field. A short text must trol.
con tain ed w ith in th e section . Wh en be p u t in to th e field ‘d escrip tion ’ to If th e d irection of travel is to be
the section is set up with delay, the sig- identify the relevant locomotive. altered , th e reverse bu tton m u st be
n al goes to ‘stop ’ to p reven t th e train N ext, icon s m ay be p laced beh in d actuated with the left-hand mouse but-
continuing on its journey. th e fu n ction keys. Poin t th e m ou se at ton . Th is is, h ow ever, p ossible on ly
Section s th at are actu ated by p ro- th e relevan t icon an d d rag th is to th e when the speed of the engine has been
gram lin es become accessible to oth er
traffic when the train has reached the
end of the relevant section: a return or
detect knob.
To ensure automatic progression of
train s, it is ad visable to in clu d e a p ro-
gram line in each level that sets the sig-
n al im m ed iately p reced in g th e p ro-
gram knob to condition ‘safe’.
If program lines are associated with
a d etect kn ob, it becom es p ossible to
define secure sections that are coupled
to a specific engine (loc address). In the
case of detect knobs, loc address 0 indi-
cates a locom otive w ith ou t su p er
engine decoder. The program lines and
levels for this locomotive must be pro-
grammed first.
Wh en all lin es h ave been in p u t,
actu atin g ‘Up d ate’ is su fficien t to lin k
these lines permanently to the selected
kn ob. If th ere is an error in th e p ro-
gram, the relevant knob must be actu-
ated with the left-hand mouse button.
All p rogram lin es u p to th at to be
altered are then removed with ‘Delete
lin e’. Wh en th is is d on e, rein p u t th e
deleted lines and actuate ‘Update’. w an ted box. Wh en th e mou se bu tton set to 0 with the shift control.
is released , th e icon is saved in th at When a super engine d ecod er or a
P RO GRAM M I N G TH E position. Unused functions must be left Märklin decoder with four functions is
CONTROLS empty. used, the direction of travel is known.
A w in d ow m ay be op en ed via th e An arrow p oin tin g to th e righ t in d i-
option ‘Soft controls’. Its lower section O P E R AT I O N cates forward, an arrow to the left indi-
shows 20 shift controls. There are also When ‘O perational’ is actuated, trains cates reversing.
fou r bu tton s w ith w h ich a ban k of 20 m ay be con trolled , sign als an d tu rn - The functions of an active shift con-
controls may be selected. In total there outs set, secure sections of track set up trol m ay be actu ated an d d eactu ated
are, therefore, 80 controls to be defined. m an u ally or th e p rogram m ay be w ith th e left-h an d m ou se bu tton .
Wh en th e left-h an d m ou se bu tton is enabled. Wh en th e left-h an d m ou se bu tton is
clicked on the icon with the red arrow clicked on the relevant icon, the picture

changes to indicate that the status has yellow. menu allows an alternative, if available,
changed. Subsidiary secure sections are set by to be selected.
clickin g again w ith th e left-h an d ‘Actuation time’ is a second choice in
Shunting mouse button on the end return knob. this menu. This option makes it possi-
An option that is very useful for shunt- This then becomes the start of the sub- ble to set the time an electromagnet is
in g train s is th e con vertin g from soft sid iary section , w h ile th e en d of th is energized between 0.2 s and 2 s.
control to manual control. This is done section is set by clickin g w ith th e left- Th e m an u al con trols h ave fixed
by clicking with the right-hand mouse h an d m ou se bu tton on th e w an ted addresses: 2, 6, 8, 19, 24, 26, 60, and 72.
button on the reversing knob of the rel- return knob. If desired, each control may be given a
evan t soft con trol. Th e con trol of th e Th is arran gemen t allow s a train to n ew ad d ress. Su ch a n ew ad d ress is,
train is th en assu m ed by th e m an u al traverse a railway yard starting from a however, superseded by a hard reset of
con trol an d th e relevan t sh ift con trol green knob. The route is via a number th e microcon troller, u n less th e op tion
on the screen becomes invisible. of yellow knobs to the yellow end stop. ‘permanent’ is selected.
The control may be reverted to the If hand controls are to be d isabled ,
soft control by again clicking on the rel- E N AB LI N G A P RO GRAM they are allocated address 0.
evan t reversin g kn ob w ith th e righ t- When a program or part of it has been The addresses allocated to the man-
h an d mou se bu tton . Th e sh ift con trol set u p , a start m ay be m ad e w ith its u al con trols are saved , togeth er w ith
th en becom es visible again on th e execution. There is a program knob at certain oth er p rop erties of th e screen
screen. the bottom right of the window on the data. When the relevant file is opened
It is worthwhile noting that all set- screen . Wh en th e mou se is clicked on an ew, th e con trols are p rogram m ed
tings of the soft control are transferred th is kn ob, th e p rogram starts. Th is accordingly.
to th e m an u al con trol an d th at an y means that, as soon as the train passes In ‘Loc decoder ’ the properties of a
ch an ges in th e settin g – reversin g, a retu rn kn ob or mon itor kn ob th at is locom otive w ith a su p er en gin e
fu n ction s, old /n ew form at – are also linked to a program, program lines will decoder may be laid down. This func-
transferred from the manual to the soft be executed. Clicking on a knob always tion is available on ly w h en th e p ro-
control. makes it go d ark red . If program lines gram is in th e ‘O p eration al’ m od e.
are actuated , the colour changes from Du rin g p rogram m in g, ad d ress 79 is
Control of turnouts, signals and ligh t red to d ark red an d vice versa u sed . If su p er en gin e d ecod ers are
uncoupling ramps twice a second.
Wh en th e left-h an d bu tton of th e Wh en th e p rogram is bein g exe-
mouse is clicked on a turnout or signals cu ted , m an u al con trol rem ain s p ossi-
sym bol, th e statu s of th e associated ble. It is, h ow ever, im p ortan t th at th e
turnout or signal set changes, provided operator realizes that the software can
th at it is n ot p art of an active secu re claim an unused section of track. If the
section of track. Th e statu s of th ree- program is to be interrupted for some
way turnouts or signal sets is changed time, click on ce more on th e p rogram
by repeatedly clicking on the relevant kn ob. As soon as all train s are at a
symbol with the left-hand mouse but- stan d still, th e situ ation is stable. Th e
ton. screen d ata can th en be saved an d be
To prevent that data of intermediate reenabled later when the process con-
con d ition s (in case of a Typ e 3 th ree- tinues from the ‘frozen’ status.
w ay u ser) is tran sferred by th e p ro- When the program is started after a
gram to the d ecod er, some time d elay kn ob h as been actu ated – th e train is
has been built in. O wing to this delay, on a con tact rail –th e trigger m ay be
the operator is able to select the correct carried ou t by clickin g w ith th e righ t-
p osition on th e screen . Du rin g th e hand mouse button on the knob.
delay time, the symbol may be repeat- When a secure track section is built u sed , it is im p erative to keep th is
edly clicked on. man u ally or by th e p rogram, traffic is ad d ress free. Also, d u rin g p rogram -
Since many three-way turnouts are cond ucted accord ing to a fixed proce- m in g, it is essen tial to p lace on ly th e
briefly in p osition straigh t on w h en dure. First, all signals on the secure sec- locomotive to b e programmed on the
th ey are m oved from th e left-h an d tion are set to ‘stop ’, follow ed by th e track to p reven t several locom otives
road to th e righ t-h an d road , th is con - turnouts being set to the wanted posi- being program-med simultaneously.
d ition is in d icated to th e d ecod er tion, and finally, the signals being set to Th e ad d ress, th e maximu m sp eed ,
beforehand. ‘proceed’. This procedure ensures max- th e rate of acceleration an d d ecelera-
A sim ilar arran gem en t ap p lies to imum safety on the section. When the tion , th e brigh tn ess of th e h ead ligh ts,
th ree-w ay sign al sets. If th ese are train h as p assed th e en d stop of th e F0, and the flash frequency of F4 of the
m oved from ‘safe’ to ‘p roceed at section , th e section is op en to oth er decoder are to be set.
red u ced sp eed ’, con d ition ‘stop ’ is traffic again. Fin ally, th e d esired lan gu age mu st
briefly selected. A secu re section can be op en ed be chosen from Dutch, English, French
It is n ot n ecessary to u se tu rn ou ts manually to other traffic by clicking at or German.
with switch-off since the time they are th e en d stop w ith th e righ t-h an d [980085-2]
energized is variable – see options. This mouse button.
is not the case with uncoupling ramps: Manual control of turnouts and sig-
these are energized as long as the left- nal sets is possible only if these are not
hand mouse button is pressed. part of a secure section of track. When
the left-hand mouse button is clicked ,
Secure track sections all positions are traversed sequentially.
Secure track sections are set by clicking
w ith th e left-h an d m ou se bu tton first SETTINGS
on the (start) return knob and then on Th e first ch oice from th e m en u ‘Set-
the (end) return knob. Again, the start tin gs’ refers to th e com m u n ication s
kn ob goes green an d th e en d kn ob, port. The default setting is COM1. The

RADIO, TELEVISION & VIDEO
CW generator
aid for radio amateurs
The generator
described can accept
texts of up to 64
characters long and
make this audible in
the form of morse
signals. This action
can be repeated
automatically with
variable intervals – an
aspect that is bound
to be of interest to
many radio amateurs.
INTRODUCTION erator d escribed in th is article is on e

Tran sm ittin g rad io am ateu rs are such automatic device. With the aid of
obliged u n d er In tern ation al Law to a n u m ber of DIP sw itch es, it p erm its
give their call sign at least once every a line of text not exceeding 64 charac-
ten minutes. This is to ensure that call- ters to be load ed in to its m em ory,
in g station s can be id en tified at all w h ich is th en tran sm itted in m orse
times and also to prevent abuse of fre- cod e at in tervals th at can be set
qu en cies allocated to rad io amateu rs. betw een 0 s an d 15 s or betw een 0 m
This requirement is monitored consci- an d 15 m . Th e keyin g sp eed can also
en tiou sly by th e relevan t in sp ection be varied.
service, which has the authority to rep- The unit is provided with an audio
rimand and, if the offence is repeated, ou tp u t, a key ou tp u t, an d a p u sh -to-
to apply sanctions. talk output, PTT. It is sufficiently com-
Th is legal requ irem en t soon gave pact to allow its integration into exist-
rise to tim ers an d oth er au tom atic ing equipment.
warning appliances to alert the opera- This short description makes it clear
Design by G. Baars tor to transmit the call sign. The gen- th at th e u n it m ay be u sed as a stan -

36
Table 1. 5V
IC2
1 D2
BAT85
LP2950
Programming
K7 5V
R2
Run mode
D1
switch
mode
15k
DIP
K5 C10 C9
9V
RESET 1N4148 4mA5
S0
100µ 10µ
C3 25V 63V
sw1 data0 rep0 (CQ) 100n 5V
sw2 data1 rep1 5V

5V
"1" "8"
K1 C1
sw3 data2 rep2
R1
PTT S1
100n
sw4 data3 rep3
3k3
14
sw5 data4 sec/min
C2 4 6
MCLR RB0
sw6 char/digit wpm0 K2 16 7
OSC1 RB1
27p 15 IC1 8
sw7 store wpm1 KEY
18
OSC2 RB2
9
RA0 RB3
17 10
sw8 run/prog run/prog RA1 PIC16 RB4
1 F84 11
RA2 RB5
(sw1 = S1(1); sw2 = S1(2); … sw8 = S1(8) 2
RA3
-10/P RB6
12
K3 3 13
RA4 RB7
KEY 9 8 7 6 5 4 3 2
dard call generator, a CQ generator, a R8 1 8x 10k

K4 5V
beacon , or as a m orse test gen erator.
PTT
With a bit of a p u sh , it m ay also be R3 R4 R5 R6 C8 R7
used to learn the morse code. 10k 10k 33k 100k 22k
K6
22n 0,2V p p
P1
F U N CTI O N AL C4 C5 C6 C7
DESCRIPTION 100n 22n 4n7 3n3

100k
log Audio
The circuit in the diagram in Figure 1
sh ow s th at th e d esign is straigh tfor- 980087-11
ward. It consists of a programmed PIC
p rocessor, IC1, octal
DIP sw itch , S1, ou tp u t Figure 1. The circuit of
filter R4–R6-C5–C7, and the CW generator is IC 1. Th is is load ed numerals 0–9. This is shown in Table 3
a power supply regula- based on a programmed w ith a sim p le p ro- and will be reverted to shortly.
tor, IC2. PIC processor. gram w h ose execu - Switch S1(7) serves to store the rel-
The unit is linked to tion is carried ou t evan t ch aracters in to an EEPRO M.
th e ou tsid e w orld via accord in g to th e set- This is done by setting it from on to off
five terminals, K1–K5, made from PCB ting of the DIP switches. The function or vice versa.
pins. A sixth, K6 also made from PCB of these switches is shown in Table 1.
pins, delivers the audible morse signal In th e table, ‘rep ’ m ean s rep etition Run mode
at a frequency of 1000 Hz. in terval an d ‘wp m’ mean s word s p er When S1(8) is on, the run mode of the
Key terminals K2 output the morse minute. oth er sw itch es is selected . Sw itch es
ch aracters in th e sh ap e of h igh logic S1(1–4) enable the repetition interval of
levels when push-to-talk terminals K1 Programming mode th e in p u t text to be set. Sw itch S1(5)
are high during transmissions. Switch S1(8) enables selecting the pro- determines whether this time is in sec-
Th e in verse sign als of th ose at K2 gramming mode or th e run mode. Th is onds (switch on) or in minutes (switch
and K1 are also available: at K3 and K4 selection must always be made before off). The interval may be set between
respectively. the generator is switched on, or before 0 s and 15 s or between 0 m and 15 m.
If d esired , a sim p le p u sh -bu tton a reset as the case may be. Switch S1(5) also has another func-
switch may be linked to terminals K5 In th e p rogrammin g mod e, S1(1–5) tions. When switches S1(1–4) are all off,
to serve as a reset sw itch . Th is is n ot are used to input d ata. The setting of an d S1(5) is also off, th e in p u t text is
really n ecessary, sin ce th e gen erator S1(6) d eterm in es w h eth er th ese d ata tran sm itted on ce after th e su p p ly is
may be reset by switching the supply are letters or n u m erals. Wh en th is sw itch ed on or after a reset. Wh en
voltage off and on again. switch is on, switches S1(1–5) input the S1(5) is on, the input text is transmitted
The actual operation of the unit is alp h abet p lu s sp ace an d slash . Wh en con tin u ou sly. Table 2 sh ow s th e
performed almost wholly by processor S1(6) is off, sw itch es S1(1–5) in p u t p rocess for th e variou s settin gs of

Parts list
H4
C9
IC2
2 C1 H1
Resistors:
ROTKELE )C(
1-780089
980087-1
S1 R8 R1 = 3.3 kΩ
C10 R2 = 15 kΩ
R2
D1
RESET
9V R3, R4 = 10 kΩ
0 R5 = 33 kΩ
IC1
K7
+ K5 R6 = 100 kΩ
C2
D2
K4 R7 = 22 kΩ
C3
R8 = resistor array, 8×10 kΩ
K6 K3
OUT
R1
R7 K2 Capacitors:
C4 R3
C1, C3, C4 = 0.1 µF
C8 R6 R4 K1
P1 C2 = 27 pF
C6
C5 C5, C8 = 0.022 µF
R5 C6 = 0.0047 µF
H2
H3
C7
C7 = 0.0033 µF
C9 = 10 µF, 63 V, radial
C10 = 100 µF, 25 V, radial
Semiconductors:
D1 = 1N4148
D2 = BAT85
IC1 = PIC16F84 *
IC2 = LP2950CZ5.0 (National Semi-
conductor
* Available programmed under Order
No. 986512 – see Readers’ Services
toward the end of this issue.
Miscellaneous:
K1–K7 = PCB pins
(C) ELEKTOR
980087-1
Figure 2. Printed-cir- S0 = push-button switch

cuit board for the S1 = octal DIP switch
CW generator. Enclosure as and if required
PCB Order No. 980087 – see Read-
ers’ Services toward the end of this
issue.
switches S1(1–5). sw1 sw2 sw3 sw4 sw5 sw6 sw7

Th e keyin g sp eed is set w ith
sw itch es S1(6) an d S1(7). Wh en both off off off off on on →
th ese sw itch es are off, th e sp eed is on off off off off on ←
10 w.p.m.; when S1(6) is on and S1(7) is
off, the speed is 15 w.p.m., when S1(6) off off off off off off →
is off an d S1(7) is on , th e sp eed is off off off on on on ←
20 w.p.m. and when both switches are
on, the speed is 25 w.p.m. on off off on on on →
off on off on on on ←
P RO GRAM M I N G
Th e w an ted text is in p u t by first set- NOTE. ←→ = change from “on” to “off” or vice versa
ting switch S1(8) to off before the sup-
(sw1 = S1(1); sw2 = S1(2); … sw7 = S1(7)
p ly is sw itch ed on or th e circu it is
reset. Each subsequent programming
step consists of setting S1(6) as relevant
an d sw itch es S1(1–5) accord in g to The programming is terminated by After th is h as been d on e, th e gen -
Table 3. After each character has been settin g S1(8) to on an d sw itch in g S1(7) erator must be reset or the supply volt-
in p u t, sw itch S1(7) from off to on or from on to off or vice versa as the case age sw itch ed on . An y ch an ges in th e
vice versa to store th e ch aracter in may be. settings of the switches during the run
m em ory. Wh en th e en tire text h as Sin ce th e call is to be rep eated m od e becom e effective on ly after a
been input in this manner, set switch every 10 m in u tes, th e op erator m u st reset.
S1(8) to on , follow ed by settin g S1(7) set th e tim er for th is in terval. Also, a
from off to on or vice versa as the case keyin g sp eed of 25 w.p .m . is d esired . CONSTRUCTION
may. Note that in Table 3 the character The whole process is programmed by Th e gen erator is best bu ilt on th e
0 in d icates a sp ace w h ich h as a stan - setting the various switches as follows: p rin ted -circu it board sh ow n in Fig-
dard duration of seven dots.
E XAM P LE
Assu m e th at rad io am ateu r PA0XYZ sw1 sw2 sw3 sw4 sw5 sw6 sw7
wants to use the unit as an automatic off on off on off on on
call generator. He/she sets S1(8) to off,
switches the supply on, or presses the 10 min. 25 wpm
reset bu tton . Th is is follow ed by th e
(sw1 = S1(1); sw2 = S1(2); … sw7 = S1(7)
following programming steps:

Table 2. Table 3. Programming table
sw1 sw2 sw3 sw4 sw5 Interval character numeral
sw1 sw2 sw3 sw4 sw5 decimal
0 0 0 0 0 Send once (sw6= 1) (sw6= 0)
1 0 0 0 0 1 minute(s) 0 0 0 0 0 ““ “0” 0
0 1 0 0 0 2 1 0 0 0 0 “A” “1” 1
1 1 0 0 0 3
0 1 0 0 0 “B” “2” 2
0 0 1 0 0 4
1 1 0 0 0 “C” “3” 3
1 0 1 0 0 5
0 0 1 0 0 “D” “4” 4
0 1 1 0 0 6
1 0 1 0 0 “E” “5” 5
1 1 1 0 0 7
0 0 0 1 0 8 0 1 1 0 0 “F” “6” 6
1 0 0 1 0 9 1 1 1 0 0 “G” “7” 7
0 1 0 1 0 10 0 0 0 1 0 “H” “8” 8
1 1 0 1 0 11 1 0 0 1 0 “I” “9” 9
0 0 1 1 0 12 0 1 0 1 0 “J” 10
1 0 1 1 0 13 1 1 0 1 0 “K” 11
0 1 1 1 0 14
0 0 1 1 0 “L” 12
1 1 1 1 0 15
1 0 1 1 0 “M” 13
0 0 0 0 1 Send continuously
0 1 1 1 0 “N” 14
1 0 0 0 1 1 seconde(s)
1 1 1 1 0 “O” 15
0 1 0 0 1 2
1 1 0 0 1 3 0 0 0 0 1 “P” 16
0 0 1 0 1 4 1 0 0 0 1 “Q” 17
1 0 1 0 1 5 0 1 0 0 1 “R” 18
0 1 1 0 1 6 1 1 0 0 1 “S” 19
1 1 1 0 1 7 0 0 1 0 1 “T” 20
0 0 0 1 1 8 1 0 1 0 1 “U” 21
1 0 0 1 1 9
0 1 1 0 1 “V” 22
0 1 0 1 1 10
1 1 1 0 1 “W” 23
1 1 0 1 1 11
0 0 0 1 1 “X” 24
0 0 1 1 1 12
1 0 0 1 1 “Y” 25
1 0 1 1 1 13
0 1 1 1 1 14 0 1 0 1 1 “Z” 26
1 1 1 1 1 15 1 1 0 1 1 “/” 27
(sw1 = S1(1); sw2 = S1(2); … sw5 = S1(5) (sw1 = S1(1); sw2 = S1(2); … sw5 = S1(5))
ure 2. If this is obtained, together with U S AGE resu ltin g in th e con tin u ou s tran sm it-
th e p rogram m ed p rocessor, via th e Wh en th e u n it is to be u sed as a CQ ting of the signal. The correct position
Readers’ Services (see toward the end tran sm itter, th e key ou tp u t m ay be of P 1 is readily arrived at with the use
of th is issu e), th e con stru ction of th e u sed to d rive a relay that brid ges the of a su itable receiver or th e h elp of a
generator with reference to the circuit morse key. Using the earlier example, fellow amateur.
d iagram an d th e p arts list becom es the text “CQCQDEPA0XYZ” may then To obtain a peak output voltage of
very easy: most constructors should be programmed. The DIP switches are to 50 mV, it may be necessary to alter the
able to finish it in well under an hour. be set so th at after each an d every valu e of resistor R7 to abou t ×10 th e
Th e board is sm all so th at is can reset th is text is tran sm itted on ce. In load across terminals K6.
easily be in tegrated in to an existin g this way a call may be made simply by Finally, if the unit is used solely as
tran sm itter or tran sceiver. Altern a- pressing the reset button. call generator, the key and push-to-talk
tively, it may be built into a small dis- Th e u n it m ay also be u sed for terminals are not needed and may be
crete case to becom e a stan d -alon e direction finding exercises. In this case, left open.
unit—see photograph. th e p u sh -to-talk term in als sh ou ld be [980087]
Since the generator draws a current used to energize a relay via a transis-
of n ot greater th an 4.5 mA, it may be tor to sw itch on th e tran sm itter. Th e
p ow ered by a 9 V (PP3) battery con - audio output is linked to the input of
n ected to K7. Th ere is sp ace for th is a m icrop h on e p ream p lifier. Th e text
battery on the board. Voltage regulator m ay con sist of n u m erals 0 an d 5 for
IC2 ensures a stable 5 V supply line. programming long and short signals.
Th ere are n o calibration s n eed ed ; A real text may, of course, also be used.
the only potentiometer, P 1, varies the A good rep etition in terval w ou ld be
loudness of the 1000 Hz output tone. one minute.
The repetition intervals and keying When the unit is used as automatic
speeds mentioned in the text are based call generator, the audio output signal
on a clock frequ en cy of 4 MH z Th is should be mixed with the speech mod-
frequ en cy is d eterm in ed ap p roxi- u lation . Th is sh ou ld be d on e so th at
m ately by R1 an d C 1. If it is to be th e m orse sign als are clearly au d ible
4 MHz accurately, replace R1 by a 5 kΩ without drowning out the speech. Set-
preset potentiometer to enable the fre- ting the loudness with P 1 is facilitated
quency to be set. by temporarily setting the timing to 0,

BATTERY CHARGERS
battery charger
reliable, yet inexpensive
Charging NiCd batter-

ies does not neces-
sarily require a com-
plex design. The
charger described in
this article shows that
a reliable unit with
built-in timer can be
constructed for a rela-
tively small outlay.
INTRODUCTION an d ap p lied to regu lator IC 5. Wh en

Over the years many techniques have this voltage is present, diode D 4 lights.
been developed for fast, accurate and Th e altern atin g voltage is also
reliable ch argin g of N iCd batteries. ap p lied to th e clock in p u t of IC 1 via
O n e of th e best of th ese is still th e resistor R1. This means that IC1 is con-
14-h ou r m eth od at on e ten th of th e trolled at a frequency of 50 Hz. A sig-
battery cap acity. Th e p resen t d esign nal at a frequency of 50/27 is output at
con tain s a ad ju stable cu rren t sou rce pin 4 (Q 6) and applied to pin 14 (CLK)
and a timer which, after normal charg- of IC2, where it is d ivid ed by 10. This
in g h as taken p lace for 14 h ou rs, sign al is ou tp u t at p in 7 ((Q 3) an d
sw itch es th e ch arger to trickle ch arg- ap p lied to th e clock in p u t, p in 10, of
in g. Sin ce th e cu rren t sou rce is IC4.
ad ju stable, th e ch arger m ay be u sed The signal is divided by 212 in IC4,
with a wide variety of NiCd batteries. resu ltin g in ou tp u t Q 11 (p in 1) of th is
IC being actuated after 14 hours and 33
DESIGN m in u tes (52,428 secon d s). Diod e D 1
The circuit of the charger is shown in places the output at pin 1 at the clock
Figure 1. The peak value of the input input, which means that the clock sig-
altern atin g voltage m u st be equ al to nal cannot alter the counter state.
th e requ isite ch argin g voltage. Th is Th e battery is ch arged d u rin g th is
altern atin g voltage is rectified by 14 hour plus period by charging circuit
Design by R. Lucassen brid ge B1, sm ooth ed by cap acitor C 9 which is a discrete design.

80
F1
K1
1 500mA T
5V R9
C5 C7 10k
IC3
78L05 R3
BD244 D2
B1 4Ω7
1N4002
R4 P1
T4
1k
C6 C8 C9 C10
500Ω C4
T1
470µ 1µ
B80C1500 25V 10V 100p R10
2k2
R1 C5...C8 = 4x 100n
BC557B BC547B R11
1M
T2 T5
9 5V R5
0
2k2
CTR12 10k
7
1
6
2 BC557B IC3c T3
10 5 R6 8 R8
+ 3 10 D3 D4
3 16 16 1M 9 & 10k
C1 4
IC1 2 IC1 IC2 R7
5 C3 red green
CT 8 8 BC547B
10k
4 rood groen
4n7 6
11 13 rot grün
CT=0 7 1µ rouge vert
4040 * 8
12 10V
14
9
15
10 R12
1 9 5V
11 0
10k
CTR12
7
1
6
2
11
CT=0 3
5 Figure 1. Circuit dia-
14 16
CTRDIV10/
0
3
4
3 C11 gram of the battery
DEC 2 IC4 2 IC3 IC4
1 5
100n
charger. The clock
4 CT 4 7 8
IC2 2 R2 6 pulses controlling the
14 7 10 13
& + 3 10k + 7 timer are taken direct
4
10
4040 * 8
12
from the mains voltage.
13 1 C2 14
5 9
5 15 IC3 = 4093
4017 6
10n
10
6 1
7 11 5V
15 9
CT=0 8
11
9 D1 IC3b IC3a
12 6 1
CT≥5 4 3
5 & 2 &
IC3d BAT85
12
11
13 &
980094 - 11
Th e ad ju stable cu rren t At the termination of the charging adapted as relevant. With the wiper of
sou rce is fed w ith an u n regu lated process, output Q 11 of IC4 goes high, P 1 at the centre of its travel, and with
voltage. Transistor T1 is arranged as a whereupon trickle charging begins. A R3= 4.7 Ω, th e ch argin g cu rren t is
variable zen er d iod e. Th e p osition of good level of the trickle-charging cur- 180 m A. AA batteries, w h ich h ave a
P 1 d eterm in es th e level of voltage rent is one tenth of the normal charg- cap acity of 600–700 MaH, n eed a
dropped across T1. This voltage is also ing current. It is clear that the current ch argin g cu rren t of 60–70 m A. If th e
ap p lied across resistor R3. Th e d rop sou rce sh ou ld be m od u lated to value of R3 is trebled to 15 Ω, the cur-
across this resistor, and its value, deter- approximate this level. In the present ren t is red u ced to 60 mA. Th e settin g
mine the current flowing from the cur- design this is effected by pulse-width range is then 50–75 mA.
rent source via T4. modulation.
Transistor T2 functions as a detector. Du rin g n orm al ch argin g, ou tp u t CONSTRUCTION
When there is no battery across termi- Q 11 of IC 4 is low. Irresp ective of th e Th e ch arger is best bu ilt on th e
nals PC1 and PC2, this transistor will be sign al at p in 5 of IC 3b , th e ou tp u t of p rin ted -circu it board sh ow n in Fig-
switched off since the potentials at its IC3b is h igh . O n ly w h en th e m axi- ure 2. Construction should not present
base and emitter are identical. When a mu m cou n ter state h as been reach ed u n d u e d ifficu lties: all com p on en ts,
battery is connected across the output d oes th e level at p in 5 d eterm in e th e in clu d in g P 1, are to be p laced on th e
termin als, T2 comes on , w h ereu p on level at the output. board. If the charger is to be used for
capacitor C3 is charged via R6. Circuit IC2 is a decade scaler, whose one type of battery only, P 1 may be a
After ch argin g h as taken p lace for output Q 8 is high for only one tenth of preset type.
on e secon d , th e ou tp u t of IC 3c goes th e n orm al ch argin g p eriod . Circu it Transistor T4 is located at the edge
low. Counter IC4 is then enabled and IC 3d in verts th e ou tp u t so th at IC 3b of th e board so th at if a h eat sin k is
tran sistor T3 is off. Th e on e secon d ensures that T5 is on for only one tenth d eem ed n ecessary, th is is easily p u n
delay time ensures that contact bounce of the normal charging period. into place.
an d oth er in terferen ce d o n ot affect The level of current used for charg- Start by placing the wire links and
the charging process. ing is set with P1. With component val- th ree PCB p in s for m ou n tin g P 1, fol-
Sin ce th e ou tp u t of IC 3b is h igh u es as in d icated , th e ou tp u t cu rren t lowed by the passive components and
(output Q 11 of IC4 is low after a reset), may be set between 150 mA (wiper at th e IC sockets. Wh en con stru ction is
T5 com es on . Th e cu rren t sou rce is C4) and 225 mA (wiper at R4). com p lete an d th e w ork h as been
en abled an d ch argin g com m en ces, If the unit is used for charging AA checked thoroughly, insert the ICs into
indicated by the lighting of D 3. batteries, th e valu e of R3 m u st be the relevant sockets.

H1
F1 500mA/T C5 C8 - I
+ Parts list
2 B1
C9
H2
Resistors:
R1, R6 = 1 MΩ
K1 R2, R5,R7–R9, R12 = 10 kΩ
C7 T4 R3 = 4.7 Ω (but see text)
C2 C10
C6 R4 = 1 kΩ
R3
D2
IC5 C4 R10, R11 = 2.2 kΩ
R10
R9
R1 R2 D1
T3 P1 = 500 Ω
C1 C11
C3 T5 Capacitors:
T1
D4 C1 = 0.0047 µF
IC1 C2 = 0.01 µF
IC2
IC4
R11
IC3
R5
R12
R8
R7
R6
R4
T2 D3 C3, C10 = 1 µF, 10 V, radial
C4 = 100 pF
H3 C5–C8, C11 = 0.1 µF
H4
1-490089 P1 C9 = 470 µF, 25 V, radial

980094-1 ROTKELE )C(
Semiconductors:
D1 = BAT85
D2 = 1N4002
D3 = LED, 3 mm, red, high efficiency
(C) ELEKTOR
D4 = LED, 3 mm, green, high effi-
980094-1 ciency
T1, T2 = BC557B
T3, T5 = BC547B
T4 = BD244
IC1, IC4 = 4040
IC2 = 4017
IC3 = 4093
IC5 = 78L05
Miscellaneous:
K1 = mains adaptor plug for board
mounting
B1 = B80C1500
F1 = fuse holder with 500 mAT fuse,
for board mounting
PCB pins as required
PCB Order No. 980094
Figure 2. Printed-cir-
cuit board for the
battery charger.
clock input. Normal logic inputs often direct voltage for the particular battery.
can n ot h an d le th e lead in g ed ge of If, for in stan ce, th e battery voltage is
F I N AL N O TE S su ch a sign al correctly an d gen erate 7.2 V (as fou n d in electric tools), th e
Sin ce IC 1 is clocked d irectly by th e additional clock pulses. alternating voltage output of the adap-
altern atin g voltage, it is im p erative Th e m ain s ad ap tor m u st be an tor should be 8.7 V, rounded up to 9 V.
th at th is circu it h as a Sch m itt trigger alternating voltage type. Is this difficult If a d irect voltage ad aptor is used ,
or impossible to find, use a direct volt- the timer function cannot be used.
age type and remove the rectifier and Wh en con stru ction is com p lete,
smoothing capacitor from it. in sert a m u ltim eter set to th e
The output voltage of the ad aptor 200–500 m A d .c. ran ge, betw een th e
depends on the type of batteries to be charger and the battery to be charged.
ch arged . A good ch oice is an ou tp u t Du rin g ch argin g, ad ju st P 1 u n til th e
voltage equ al to 1.2–1.45 tim es th e correct charging current flows. Leave
the multimeter in place until charging
is complete. If at the end of the normal
charging period the current drops a lit-
tle, a sligh tly h igh er su p p ly voltage
must be used.
Wh en th e ad ap tor is in serted in to
the mains outlet, D 4 lights. When the
battery is connected to the output ter-
minals of the charger, both LEDs light
an d th e ch argin g cycle com m en ces.
After a good 14 h ou rs, th e red LED
goes out, whereupon trickle charging
begins. The yellow LED remains on for
as long as the charger is connected to
the mains. Trickle-charging can
Figure 3. Photograph of go on indefinitely and does not
the completed prototype harm the battery.
charger. [980094]

82
GENERAL INTEREST
PC-controlled model railway:

EEDTS Pro
the booster amplifier
The controller of a
model railway is the
generic term for the
device used to vary
the supply to the
track, and thus to the
locomotives, so that
control of their move-
ment is possible. It
may take many
forms, and may or
may not contain a
booster amplifier. The
booster amplifier
described in this arti-
cle is an updated ver-
sion of the one origi-
nally published in the
September 1989
issue of this maga-
zine INTRODUCTION the switching speed. The use of emitter
The booster amplifier described in this follow er ou tp u t stages en able h igh er
article is an u p d ated version of th e switching speed s since the transistors,
‘booster u n it’ d escribed in an article T1–T4 (see Figure 9), operate on the lin-
published ten years ago. However, the ear p art of th eir ch aracteristic. Th is
u p d ate is m in im al an d con sists of m ean s th at th e sw itch in g sp eed s are
replacing the original Type BDV64 and not affected by saturation effects.
BDV65 p ow er tran sistors by th e cu r- Th e bases of th e em itter follow ers
ren tly m ore read ily available Typ es are sw itch ed by d rivers T5 an d T6
BDW83 and BDW84. between + 20 V an d –20 V. Th ese volt-
ages are p rovid ed by IC 1-D 3 an d
DESCRIPTION IC 2-D 4 resp ectively. Th e fin al ou tp u t
Since the switching pattern of the track voltage is th e d ifferen ce betw een th e
voltage con tain s con trol d ata, it is base voltage an d th e su m of th e base-
im p ortan t th at th e booster am p lifier em itter p oten tial (abou t 1.5 V) of th e
p rovid es a clean ou tp u t sign al. Mu ch output transistors and the drop across
Design by L. Lemmens atten tion h as, th erefore, been p aid to the emitter resistors (maximum 0.6 V).

92
9
Figure 9. Circuit diagram of the

In p ractice, th e ou tp u t booster amplifier. Power transistors All tran sistors, excep t T5 an d T6,
voltage is a reason ably T1–T4 have been replaced by current operate on the linear part of their char-
constant ± 18 V. types BDW83 and BDW84. acteristics. Tran sistors T5 an d T6 are
Th e em itter follow ers sw itch ed in th e satu ration region
en su re better ban d w id th
an d regu lation w ith com p lex load s tran sistors T1, T2, T5, an d T7, are on
than would be obtained with feedback. an d th e ou tp u t is sw itch ed to + 18 V. Figure 10. Circuit dia-
Emitter resistors R12–R15 ensure an With th e in p u t voltage betw een –5 V gram of a suitable
equ al d ivision of th e cu rren t to T1-T2 and –20 V, transistors T3, T4, T6, and T8, power supply for the
on th e on e h an d an d T3-T4 on th e are on an d th e ou tp u t is sw itch ed to booster amplifier;
other. –18 V. other designs are, of
Resistors R12 and R14 serve to mea- course, possible.
sure the current in aid of short-circuit
protection transistors T9 and T10. When
the emitter current of T1 or T3 tends to 10
become excessive, the d rop across R12
or R14 rises sufficiently to switch on T9
or T10. This results in a reduction in the
base cu rren t of th e ou tp u t tran sistors
an d , con sequ en tly, in th eir collector
and emitter currents.
The input stage is formed by T7 and
T8, and is configured in a manner that
m akes a balan ced in p u t sign al essen -
tial. When the input (pin 5 of K1) is 0 V
or not connected, all transistors are off
and the output presents a high imped-
an ce, th at is, th ere is n o voltage su p -
p lied to th e track. Wh en th e in p u t
voltage is betw een + 5 V an d + 20 V,

Figure 11. Alternative power supply for use
11 where a suitable mains transformer is
already available. See reservations about
this in the text.
because switching transistors for volt- O VE R LO AD

ages of 50 V or more are not available. Th e circu it arou n d T11 serves to in d i-
Nevertheless, capacitor C8 ensures that cate an overload con d ition . Note th at
these transistors switch at a sufficiently on ly th e n egative ou tp u t voltage is
high speed. monitored, which is sufficient since the
Figure 12. The printed-circuit

board for the booster amplifier
is available ready made – see
12 Readers’ Services towards the
end of this issue.
Parts list
Resistors:
R1, R2 = 18 kΩ
R3, R4 = 2.2 kΩ
R5, R6 = 4.7 kΩ
R7, R8 = 100 Ω, 1 W
R9 = 10 kΩ
R10, R11 = 1.0 kΩ
R12–R15 = 150 mΩ, 4 W
Capacitors:
C1, C2 = 10 µF, 25 V
C3, C4 = 0.022 µF
C5, C6 = 100 µF, 40 V
C7 = 68 µF, 16 V
C8 = 0.01 µF
Semiconductors:
D1, D2, D10, D11 = 1N4148
D3, D4, D9 = zener 15 V, 400 mW
D5–D8 = 1N4001
T1, T2 = BDW83 (Philips)
T3, T4 = BDW84 (Philips)
T5 = BC640
T6 = BC639
T7 = BC547B
T8, T11 = BC557B
T9 = BC337
T10 = BC327
IC1 = 7805
IC2 = 7905
Miscellaneous:
K1 = 5-way DIN socket (180°) for
PCB mounting – but see text
5 off car-type space terminals for
PCB mounting
Insulation material for T1–T4 and
their heat sink
Heat sink 0.8 K W–1
PCB Order No. 87291 (see Readers
Services towards the end of this
issue)
Parts for recommended power

supply
(not on booster board!)
Mains transformer, 2×18 V, 300 VA
4 off smoothing capacitors of
10,000–15,000 µF, 40 V
Heavy-duty bridge rectifier
Fuse holder with 2 A slow fuse for
board mounting

load on th e n egative su p p ly lin e is ure 12 is u sed , con stru ction of th e Class I. Th is m ean s th at th e m ain s
sligh tly h igh er th an th at on th e p osi- booster am p lifier sh ou ld n ot p resen t cable m u st h ave th ree cores, on e of
tive lin e. For in stan ce, th e tu rn ou t any undue problems. Fit the wire links which is to be connected to the protec-
(p oin ts or sw itch es) d ecod ers w ork first: those close to the output transis- tive earth of th e m ain s su p p ly. All
with half-wave rectifiers and, therefore, tors should be of 1 mm dia. wire. m etal p arts th at can be tou ch ed (in cl.
load only the negative line. Moreover, Mount resistors R12–R15 well away th e h eat sin k) m u st be con n ected to
w h en th ere are n o d ata bein g tran s- from th e board , becau se th ey become this earth.
mitted, the output voltage is negative. pretty hot during operation. Th e rectifier mu st be a h eavy-d u ty
When the booster amplifier is over- Th e board h as p rovision for a typ e an d n eed s a h eat sin k: it m ay be
loaded, T9 and T10 limit the current in 5-p in DIN con n ector, bu t if th e con - m ou n ted on th at u sed in th e booster
th e first in stan ce. Th e ou tp u t voltage troller is to be used in a stationary posi- amplifier (T1–T4).
then drops significantly and this causes tion , w h ich is n orm ally th e case, th e Con n ect th e tw o secon d ary w in d -
a rise in the potential across the output resp ective w ires m ay be sold ered ings of the transformer in series and fit
tran sistors an d , con sequ en tly, in th e directly to the board. and sold er the rectifier and the buffer
d issipation. If this situation is allowed Circu its IC 1 an d IC 2 d o n ot n eed a capacitors.
to p ersist, th ere is a d an ger of th e heat sink, but transistors T1–T4 do: this If a su itable tran sform er is alread y
booster amplifier being thermally over- sh ou ld be rated at 0.8 K W –1.an d be available, th is m ay be u sed to bu ild a
load ed , w h ich p resen ts a real risk of u sed w ith good -qu ality in su latin g p ow er su p p ly as sh ow n in Figure 11.
fire. washers and spacers, and liberal use of N ote, h ow ever, th at su ch a setu p w ill
Th erefore, if th e ou tp u t voltage heat conducting paste. n ormally n ot be able to p rovid e more
d rop s below 15 V, ow in g to th e zen er th an abou t a qu arter of th e p ow er of
voltage of D 9, T11 switches off. The sig- I M P O RTAN T the design in Figure 11.
n al at p in 5 of K1 goes low, w h ich If th e booster am p lifier is to be u sed Finally, do not connect transistors in
resu lts in th e rem oval of th e d rive to w ith th e con troller d escribed in last p arallel to in crease th e total available
the controller.. month’s issue, it must be linked to this cu rren t: su ch a setu p can be a risky
Cap acitor C 7 en ables th e overload via the interface described in that issue. undertaking.
action to be delayed so that the system (994060)
is n ot d isabled at every m om en tary P O WE R S U P P LY
short circuit. Th e circu it d iagram of a su itable
p ow er su p p ly is sh ow n in Figure 10.
CONSTRUCTION The mains transformer should prefer-
If th e p rin ted -circu it board in Fig- ably be a toroid al typ e ap p roved to

MICROPROCESSORS
software debugging
tools for 80C166
Hitex Telemon 166 debugger
specially adapted for Elektor
Figure 1. Watching and examin-

ing variables.
A strategic partner of chip manufacturer ap p lication s (en gin e m an agem en t,

p ow er steerin g, etc.), bu t also in h ard
Siemens and a leading supplier of develop- disk control systems. The architectural
ment tools for the 16-bit 80C166 microcon- similarities with the ageing and widely
used 8-bit 8051/C500 controller family
troller family, Germany-based Hitex System often cau se d evelop ers to u p grad e to
th e C166 on ce th e lim its of 8-bit p ro-
Development have adapted their target code gramming are acutely felt.
debugger telemon 166 to the requirements of
HOW DOES
the Elektor Electronics 80C166 evaluation sys- T E L E M O N 1 6 6 WO R K ?
tem published in the March and April 1999 A target-cod e (or ‘rem ote’) d ebu gger
like telemon 166 con sists of a m on itor
magazines. This modified version of tele- core and a debugger shell. It requires a
fu lly fu n ction al p iece of h ard w are
mon 166 is now available on diskette. u sin g th e C166 con troller w ith RAM,
Flash or EPRO M m em ory. Th is h ard -
w are sh ou ld offer PC con n ectivity
Com p risin g p ow erfu l CPUs for using a communication channel.
em bed d ed system s, th e 16-bit m icro- Ru n n in g on th e target system , th e
con troller fam ily id en tified as ‘C166’ m on itor core is often con sid ered th e
h as ach ieved a stron g footh old in th e operating system of the debugger. The
By U. Beier, m icrocon troller m arket. Th e C166 is H iTO P d ebu gger ru n s as a Win d ow s
Hitex System Development, Germany often fou n d in au tom otive con trol

ap p lication on you r PC an d em p loys
an RS232 in terface to com m u n icate
with the COMx port on the PC.
In th e case of th e Elektor Electronics
hardware, the monitor core is stored in
an EPROM pair (H and L) and up and
ru n n in g th e momen t th e h ard w are is
switch ed on . By con n ectin g th e h ard -
w are to th e PC (via an RS232 cable),
and then launching the HiTOP Debug-
ger on th e PC you are get a ‘w in d ow ’
w ith a view on all th at’s h ap p en in g
inside the controller and its memory.
Once that has been done you are in
a position to develop a program for the
m icrocon troller, d ow n load it in to th e
target system and then either launch it
or execute it in single-step mode.
To make sure you, the user, remains
in fu ll con trol, th e p rogram h as to be
stored in th e RAM m em ory on th e Figure 2. Watching what hap-
controller board. So, a couple of impor- pens to the Special Function
tan t p in ts sh ou ld be observed w h en Registers.
working with such a debugger.
WI N D O WS O N WI N D O WS
O bviou sly, em bed d ed system s based view you r assem bly-cod e p rogram sou rce cod e w h en th e con troller is
on p ow erfu l 16-bit con trollers w ith a after it has been downloaded. You can bein g p rogram m ed in a h igh er p ro-
full complement of complex peripherals choose to execute the program step by gram m in g lan gu age. In th is w in d ow,
tied to an extensive interrupt structure step, set breakpoints or view and mod- too, the program may be executed step
are easily m ad e to en ter a state w h en ify variables. by step an d variables m ay be
nothing seems to work anymore. Up to If you are using a ‘Keil’ or ‘Tasking’ inspected.
a certain level, su ch erron eou s states assem bler, you can u se fu ll sym bolic
may be analysed using a tool like tele- debugging under HiTOP. Memory window
mon 166. H iTO P allow s you to op en as m an y
Using a couple of practical examples Register window Mem ory w in d ow s as you like. Th ese
d escribed below you will get to know Th e cu rren t con ten ts of th e stan d ard windows may display different mem-
the functions of HiTO P. registers inside the microcontroller are ory ranges. The memory contents may
alw ays d isp layed in th is w in d ow. O n be shown in d ifferent notations (byte,
Instruction window each p rogram start, th e mod ified reg- word, dword, integer, long, float, dou-
Once HiTOP is up and running, three isters are h igh ligh ted by a colou r. In ble). Th ese m em ories m ay also be
windows are opened for you (Instruc- this way, you can immediately see the ed ited u sin g th e local fu n ction s Fill,
tion, List and Register). effects certain instructions have had on Move, Test and Compare.
The Instruction window shows the dis- a register.
assem bled con ten ts of th e m em ory Watch window
ran ge p oin ted to by th e p rogram List window In th e Watch w in d ow, a n u m ber of
cou n ter. Th is w in d ow allow s you to Th e List w in d ow sh ow s lin es of ‘C ’ in d ivid u al objects (simp le or comp lex
The sof t ware: 80C166 board should be populated as follows:
t e l e m o n 16 6 f o r Segment 0
Segment 1
64 kByte RAM
64 kByte EPROM containing the tele-
t h e El e k t o r mon 166 monitor, v1.0, KHD 80C166 (low
and high)
8 0 C16 6 b o a r d Segment 2
Segmant 3
64 kByte RAM
optional 16 or 32 kByte EEPROM
The availability of the HiTOP ‘telemon 166’ debugger from SIO-1 (UART) as the serial port
Hitex, adapted for the Elektor 80C166 development sys-
tem means that you, the user, have an alternative to the A short description of adaptations on the Elektor C166
software described in the April 1999 magazine. Recap- board, plus a memory allocation overview may be found
ping, this software also consist of a PC program and a in the file x:\hitopwin\telemon\monitor\README.TXT.
monitor program stored in pair of EPROMs. Arguably the
larger number of possibilities offered by the Hitex software The adapted debugger software HiTOP (Windows version)
means that the program is a bit more difficult to control. and the code for the HiTOP-compatible monitor EPROMs
Even if this may seem obvious, the software mentioned in may be found on two diskettes, order code 996015A+ B,
the April 1999 magazine can not be used with the HiTOP PC available through our Readers Services. The EPROMs are
program. If the HiTOP debugger shell is employed on the also available ready-programmed under order code
PC, the two EPROMs on the 80C166 board should con- 996512-A+ B. For price and ordering information, see the
tain the monitor core provided by HiTOP telemon 166. The Readers Services pages towards the end of this issue.

variables) m ay be d isp layed ij th e
proper format. With complex variables,
for example, structures or arrays, these
can be resolved in so-called ‘Examine’
windows (see Figure 1).
User SFR windows

It is widely known that the members of
the ‘C166’ controller family have exten-
sive on-chip peripheral circuitry. These
circu its m ay be activated by su itable
p rogram m in g of th e Special Function
Register, or ‘SFR’. To be able to d o so,
you normally have to study the proces-
sor m an u al in great d etail, becau se
these control registers consists of sub-
registers w h ose bit con ten ts d eter-
mines a particular function.
By m ean s of th e SFR w in d ow Figure 3 Create your
offered by HiTO P, the user is not only in th e illu stration own windows in HiTOP. am ou n t of stack sp ace
able to view th e con trol registers con - ‘m ake you r ow n w in - u sed so far m arked in
tents in plain language but also change dows in HiTO P ’. colour.
it as requ ired . In th is w ay, you n o Such windows are easily created with
lon ger h ave to th u m b th rou gh th e th e aid of scrip t th at d escribes th eir B RE AKP O I N TS
p rocessor m an u al to locate th e SFR structure. An example of a script for a HiTOP offers a very convenient way of
n am es, fu n ction s an d m ean in gs (see DIY window is shown below setting and clearing breakpoints. To do
Figure 2). so, you simply open an ‘Instruction’ or
HiTO P however also allows you to Stack window ‘List’ window. Left-clicking in the ‘BP ’
d efin e you r ow n w in d ow s, as w ell as The stack window shows the complete column at the relevant line then sets a
assign texts to variables. This is shown stack ran ge of th e p rocessor, w ith th e breakp oin t. Wh en th e cu rsor is in th e
; =========================================================================
; WI NDOW 1 “ Syst em St at us and Er r or Repor t ”
; =========================================================================
REGI ON: BASE “ #DEMOMOD#l ” , LENGTH 0x1 ; Def i ni t i on of Var i abl es ( as Symbol )
- l _hex 0x00, 1, RW, HEX, UPD_RUN ; Hex r epr esent at i on
- l _dec 0x00, 1, RW, DEC, UPD_RUN ; Deci mal r epr esent at i on
- l _t xt 0x00, 1, RW, ENUM, UPD_RUN ; Text r epr esent at i on
= 0: ” ➲”
= 1: ” ➲➲➲”
= 2: ” ➲➲➲➲➲➲”
= 3: ” ➲➲➲➲➲➲➲➲➲➲➲➲”
= 4: ” ➲➲➲➲➲➲➲➲➲➲➲➲➲➲➲➲➲➲➲➲➲➲➲➲” ; quasi - gr aphi c r epr esent at i on
ENDREGI ON
REGI ON: BASE “ #DEMOMOD#m” , LENGTH 0x1 ; one mor e var i abl e
- m_hex 0x00, 1, RW, HEX, UPD_RUN
- m_dec 0x00, 1, RW, DEC, UPD_RUN
- m_t xt 0x00, 1, RW, ENUM, UPD_RUN
= 10: “ Dat a Fr ame Er r or ”
= 11: “ Bad CRC”
= 12: “ Low Vol t age ! ! ! ”
= 13: “ Hi gh Pr essur e”
= 14: “ Syst em Shut Down”
ENDREGI ON
WI NDOW 1 “ User ´ s Var i abl es” ; Def i ni t i on of wi ndow l ayout

| ” Di gi t al / Anal og I nput and Er r or Repor t ”|
||
| ” Di gi t al / Anal og Val ue - Hex : ” [ - l _hex#] |
| ” Di gi t al / Anal og Val ue - Deci mal : ” [ - l _dec#] |
| ” Di gi t al / Anal og Val ue - gr aphi cal : ” [ - l _t xt ########################] |
||
| ” Er r or Val ue - Hex : ” [ - m_hex#] |
| ” Er r or Val ue - Deci mal : ” [ - m_dec##] |
| ” Er r or Val ue - gr aphi cal : ” [ - m_t xt ################] |
ENDWI NDOW

colu m n m arked ‘PC ’, left- it. After all, you want to see the response
clickin g th e m ou se cau ses of the program to the hardware. If the
th e p rogram to be exe- program d oes not respond the way it
cuted up to this line (tem- should , you should be n a position to
porary breakpoint). execute it step by step and so examine
the effects of individual instructions.
THE GO
MENU CONCLUS ION
The telemon 166 debugging system rep-
Th e Go m en u con - resen ts a lu xu riou s d evelop in g tool
tain s a n u m ber of which is also available as a freely con-
imp ortan t fu n ction s figurable system (it may be adapted to
th at are n ecessary just about any C166/167 hardware sys-
for com fortable tem ). In con ju n ction w ith th e ‘CO M-
debugging. This is BOX’ exten sion it is even p ossible to
called ‘Ru n -Con - employ other communication channels
trol’. betw een PC an d h ard w are th an ju st
If you want to th e RS232 lin k. Exam p les in clu d e a 2-
d ebug your wire link via two port pins with inter-
application pro- ru p t cap acity, CAN or a syn ch ron ou s
gram, you in terface. If you are in terested in
obviou sly exp lorin g th ese p ossibilities, go to
should be http://www.hitex.com for further infor-
able to start mation.
(990028-3)
C O N S T R U C T I O N G U I D E L I N E S
Elektor Electronics (Publishing) does not provide parts and compo- all the components in the correct position? Has correct polarity been
nents other than PCBs, fornt panel foils and software on diskette or IC observed? Have the powerlines been reversed? Are all solder joints
sound? Have any wire bridges been forgotten?
(not necessarily for all projects). Components are usually available If voltage levels have been given on the circuit diagram, do those
form a number of retailers – see the adverts in the magazine. measured on the board match them – note that deviations up to ± 10%
from the specified values are acceptable.
Large and small values of components are indicated by means of one
of the following prefixes : Possible corrections to published projects are published from time to
time in this magazine. Also, the readers letters column often contains
E (exa) = 1018 a (atto) = 10–18 useful comments/additions to the published projects.
P (peta) = 1015 f (femto) = 10–15
T (tera) = 1012 p (pico) = 10–12 The value of a resistor is indicated by a colour code as follows.
G (giga) = 109 n (nano) = 10–9
M (mega) = 106 µ (micro) = 10–6
k (kilo) = 103 m (milli) = 10–3
h (hecto) = 102 c (centi) = 10–2
da (deca) = 101 d (deci) = 10–1
In some circuit diagrams, to avoid confusion, but contrary to IEC and

BS recommandations, the value of components is given by substitut-
ing the relevant prefix for the decimal point. For example,
3k9 = 3.9 kΩ 4µ7 = 4.7 µF color 1st digit 2nd digit mult. factor tolerance
Unless otherwise indicated, the tolerance of resistors is ± 5% and their black – 0 – –
rating is 1⁄3–1⁄2 watt. The working voltage of capacitors is ≥ 50 V. brown 1 1 ×101 ±1%
red 2 2 ×102 ±2%
orange 3 3 ×103 –
In populating a PCB, always start with the smallest passive compo- yellow 4 4 ×104 –
nents, that is, wire bridges, resistors and small capacitors; and then IC green 5 5 ×105 ±0,5%
sockets, relays, electrolytic and other large capacitors, and connectors. blue 6 6 ×106 –
Vulnerable semiconductors and ICS should be done last. violet 7 7 – –
grey 8 8 – –
Soldering. Use a 15–30 W soldering iron with a fine tip and tin with white 9 9 – –
a resin core (60/40) Insert the terminals of components in the board, gold – – ×10–1 ±5%
bend them slightly, cut them short, and solder: wait 1–2 seconds for silver – – ×10–2 ±10%
the tin to flow smoothly and remove the iron. Do not overheat, par- none – – – ±20%
ticularly when soldering ICS and semiconductors. Unsoldering is best
done with a suction iron or special unsoldering braid. Examples:
brown-red-brown-gold = 120 Ω, 5%
Faultfinding. If the circuit does not work, carefully compare the pop- yellow-violet-orange-gold = 47 kΩ, 5%
ulated board with the published component layout and parts list. Are

POWER SUPPLIES
power for panel meter

without auxiliary battery
Most meter modules using a liquid-crystal dis- th e p resen t sim p le au xiliary circu it,
which is a variant of the d.c shifter used
play (LCD) and some using a light-emitting- in the ‘capacitance meter ’ published in
diode (LED) display need a power source that ou r N ovem ber 1994 issu e. Th e circu it
can be u sed w ith an y d igital voltage
is isolated from the measurand. In practice, this m od u le based on an ICL7106. It is
based on th e sh iftin g of th e referen ce
normally means that a separate battery has to level of the input signal.
be used. This is cumbersome and can be
DESIGN
avoided with the circuit described in this article. C O N S I D E R AT I O N S
Th e reason th at th e earth (com m on
retu rn ) of th e m eter m u st be isolated
from th at of th e m easu ran d (qu an tity
to be measured) is clear from Figure 1.
INTRODUCTION In this, the meter is is treated as a black
It is an an n oyin g fact th at w h en it is box w ith tw o in p u ts for th e su p p ly
desired to fit a digital panel meter to a lin es an d tw o for th e measu ran d . Th e
certain equ ip men t, th e p ow er for th is term in al ‘low in ’ is at th e p oten tial of
often can n ot be d raw n from th e su p - th e su p p ly lin es less 2.8 V. Th is mean s
p ly for th at equ ip m en t. Th is is n ot that if the meter and the signal source
always so, but it certainly is in the case are to be lin ked to th e same earth , th e
of m eters based on th e p op u lar value of the measurand has to be raised
ICL7106 and ICL7107. This means that by U S–2.8 (V).
a sep arate su p p ly h as to be p rovid ed This is achieved with the aid of the
for th e m eter w h ose earth (com m on popular non-inverting adder circuit in
retu rn ) is isolated from th at of th e Figure 2. In this, the operational ampli-
equipment supply. fier (op am p ) w ill try to equ alize th e
Design by G. Lindner A simple solution to this problem is

100
Figure 1. The potential signal source
at the ‘low in’ terminal of
the meter is U S–2.8 V,
1
which means that that at high in +U S
the ‘high in’ terminal
must be raised by an ICL7106 / 7 9V
identical value.
low in
levels at its two inputs. When R 2 /R 1 = +U S – 2V8

R 4 /R 3 = 1, th e ou tp u t voltage w ill 990006 - 11
assu m e a level of U O = U a + U b . Th e
m easu ran d is lin ked to term in al a.
When output U O is linked to the ‘high
in’ terminal of the meter and input U b
R4
to terminal ‘low in’, the desired shift is
achieved, whereupon the return lines
2
of th e p ow er su p p ly an d m easu ran d
can be connected to the same earth. Ua R1
Uo
CIRCUIT DESCRIPTION
Th e d iagram of th e au xiliary circu it is Ub R2
sh ow n in Figure 3, w h ich is basically
th e sam e as th at in Figu re 2, w ith th e R3
m eter term in als an d a p reset p oten -
tiometer, P 1, added.
The preset is essential, since it can-
not be assumed that the transfer ratio 990006 - 12
of th e in p u t sign al is 1:1. Th is is
because in practice all sorts of deviation
occu r ow in g to toleran ces, th e ou tp u t Figure 2. This circuit ensures that the ‘low in’ signal
im p ed an ce of th e sign al sou rce, an d is added to the signal from the source.
the offset of the op amp. All these can
be compensated with P1, provided that
th e ou tp u t im p ed an ce of th e sign al
source ≤ 2.5 kΩ. If this is not so (which
IC2 9V
in practice will be seldom), the value of
R1 has to be altered slightly. Note that
3 12V D1 78L09
the compensation provided with P 1 is
dependent on the supply voltage. This 1N4001
C1 C2
d ep en d en cy is su ch th at th e m eter
ind ication varies over a wid e range in C3
10µ 63V 10µ 63V
d irect p rop ortion to su p p ly voltage
fluctuations. This is because the offset 100n
of th e op am p is also com p en sated ; if R4
there were no offset, the meter indica- 100k
tion would be independent of the sup- 1%
p ly voltage. All th is is of n ot m u ch
R1 1
im p ortan ce, h ow ever, as lon g as th e 3 7
499k
su p p ly voltage is p rop erly regu lated . 6
1% IC1
2
5
4
R3 8
DVM
100k
Figure 3. The diagram of P1

TLC271
the auxiliary circuit com- 20k R2
1% com
plete with regulator. The 499k
regulator is essential 1%
since the compensation
set with P1 is dependent
on the supply voltage. 990006 - 13

1-600099 990006-1 990006-1 Parts list
4 R1
P1
H1
Resistors:
R1, R2 = 499 kΩ, 1%
T
R3, R4 = 100 kΩ, 1%
ROTKELE )C(
(C) ELEKTOR
R2 com P1 = multiturn 20 kΩ preset poten-
R3 tiometer, horizontal model
OUT1
C3
R4
0
IC1
Capacitors:
+
C2
C1, C2 = 10 µF, 63 V, radial
IC2
DVM
C3 = 0.1 µF, ceramic
C1
Semiconductors:
H2
D1 + 0 D1 = 1N4001
12V
IC1 = TLC271CP
Figure 4. Printed-circuit board for the auxil- IC2 = 78L09
iary circuit (not available ready made).
Miscellaneous:
Meter module based on ICL7106
Sin ce th e cu rren t d raw n by th e possible output and adjust its meter

ICL7106 is tin y, th is stabilization m ay output until the meter displays the
be effected simply with a zener d iod e correct level. It is assumed that the
an d series resistor. H ow ever, to avoid signal source has an integral poten-
any risks, the circuit in Figure 3 uses a tial divider for this purpose; if it has
popular three-pin regulator. Diode D 1 not, it has be ad d ed – see Figure 5.
protects the circuit against inadvertent The values of the resistors must be
wrong polarity of the input voltage. chosen so that at maximum output
of th e sign al sou rce th e m axim u m
CONSTRUCTION in p u t p oten tial of th e m eter
The circuit is best built on the printed- (200 mV) is not exceeded.
circu it board in Figure 4, w h ich is, • Since the output imped ance of the
however, not available ready-made. sign al sou rce varies sligh tly w h en
Th e size of th e board en ables th e the potential divider is set, it needs
circuit to be built into most equipment, to be ch ecked w h eth er th e com -
an d in m an y cases to be m ad e in to ‘a pensation set with P 1 is still correct.
sandwich’ with the meter. This means setting the output of the
If there is a suitable supply (9–15 V) signal source to 0 V again and read-
available in the signal source, regulator justing P 1.
IC2 may be replaced by a wire bridge. • Rep eat th e settin g u p p roced u re a
cou p le of tim es u n til a satisfactory
SETTING UP result is obtained.
• Lin k th e au xiliary circu it to th e [990006]
meter and connect the combination
to the output of the signal source.
• Set the output voltage of the signal
source to 0 V.
• Ad ju st P 1 u n til th e m eter read s
exactly 0 V: all d eviation s are th en
nullified.
• Set the signal source to the highest
Figure 5. A potential divider enables the output of the signal source to be

equated with the correct meter reading.
DVM module & auxiliary circuit

5
100k
signal source
P1
0 ... 20V
1k
990006 - 14

WHEN ELECTRONICS WAS YOUNG (6A)
In 1837, the first elec- Another important contribution to electrical technology
tric motor was developed (and came from the French physicist Robert Louis Gaston Planté
patented) in the USA by Thomas (1834–89), who in 1859 developed the lead-acid cell, which was the
Davenport. A few years later, in world’s first practical rechargeable or secondary battery. In fact,
1839, the magnetohydrodynamic the lead-acid battery is even today the most widely used recharge-
battery was proposed by Michael able battery in the world.
Faraday in the UK; the photo- In the same year, Michael Faraday discovered that silver
voltaic effect was described in sulphide possesses a high negative temperature coefficient. This dis-
France by Alexandre Edmond covery forms the basis of what are now termed thermistors, that
Becquerel (1820–91), and the fuel is, temperature-sensitive non-linear resistors. The name thermis-
cell was invented by Sir W illiam tor was coined by the Bell Telephone Laboratories of the USA dur-
Robert Grove (1811–96) in the ing their research into materials for these components. Also in that
UK. year, one of the century’s foremost experimentalists, the English
In 1843, the Scottish in- physicist James Prescott Joule (1818–89) described magnetostric-
ventor Alexander Bain patented tion, a phenomenon in which the mechanical dimension of a mag-
what has become known as fac- netic material is altered as the magnetization is varied.
simile reproduction (fax), and in Perhaps the most able theoretician of the 19th century,
1845–47 the German physicist James Clerk Maxwell the Scottish physicist James Clerk Maxwell (1831–79), started his
Gustav Robert Kirchoff (1824–87) (1831...1879) monumental research on electromagnetism in the late 1850s. This
published the two famous laws laid the foundations for the work of the German physicist Heinrich
that are named after him. In 1847, George Boole (1815–64) pub- Rudolph Hertz (1857–94) in discovering radio waves. Maxwell’s
lished his first ideas on symbolic logic, although his major work, In- ‘equations’ (1864) form fundamental laws of theoretical physics
vestigation of the Laws of Thought was not published until 1854. that govern the behaviour of electromagnetic (radio; television)
The kind of symbolic algebra that Boole developed led to Boolean waves in all practical situations. The equations are used to analyse
algebras, which are, of course, of great significance in modern al- the propagation of radio waves in free space, at all sorts of bound-
gebra and computing. ary, and in all guided-wave structures or transmission lines. His
In 1852, thin film technology was introduced by Sir field equations are mathematical formulations of the laws of Gauss,
W illiam Robert Grove. In 1860, professor T J Wray gave a public Faraday and Ampère from which the theory of electromagnetic
demonstration of the mercury arc lamp on the Hungerford Bridge waves can be derived. The Maxwell bridge can be used for the mea-
in London, and in Germany, the physicist Johann Philipp Reis surement of capacitance and inductance. Maxwell’s Rule states that
(1834–74) developed the first microphone. Unfortunately, this mi- every part of an electric circuit is acted upon by a force tending to
crophone was considered a toy and quickly forgotten. move in such a direction as to enclose the maximum magnetic flux.
CORRECTIONS
& updates
Eye pattern meter gates in IC4 have been trans- 1N5401. If the charger always should be changed to read
PC Topics Supplement, posed to improve the PCB lay- supplies currents smaller than
March 1999, p. 13. (992002) out. Functionally, this is of no about 1 A, diode D9 may also Flash Designs, Ltd.,
The moving coil meter shown consequence. be an 1N4001 or similar. North Parade House,
in Figure 3 should have a sen- However, one track on the North Parade,
sitivity of 100-200 µA f.s.d. board is missing: that between Bath BA2 4AL.
pin 2 and pin 8 of IC1 General Coverage Receiver Tel. (01225) 448630.
(ADC0804). If this link is January & February 1999
Electronics Freeware added, C1 is effectively con- (980084). We extend our apologies to
May 1999, PC Topics Supple- nected and the circuit will work In the preselector section, the Flash Designs and our readers
ment, p. 4 (990011-1) as described. upper varicap diode, D14, has for any inconvenience caused
The correct url for Digital no dc path. A suggested by the incorrect address infor-
Works is method of improving the mation.
Sealed lead-acid battery behaviour of the varicap (with-
http://www-scm.tees.ac.uk/ charger out modifying the PCB) is to
users/d.j.barker/digital/ May 1999, p. 26-31. replace capacitor C83 (220pF) Electronic Spirit-Level
digital.htm (990037-1) with a wire link. July/August 1998, p. 36
In Table 2 (Component Values), (984038).
the two formulas for R6 should In the circuit diagram, all LEDs
Battery capacity read Flash Designs – (D2 through D10) should be
measurement by PC address information reversed. The PCB layout is all
PC Topics Supplement, 0.45 / I [ohms]. April 1999, New Products, right.
December 1998, p. 14-16. p. 73.
(982093) D9 is missing from the parts In the New Products section,
With reference to the circuit list. As indicated in the circuit the address and telephone
diagram, a number of logic diagram, this diode is a type number of Flash Designs

t w o -w ir e t e m p e r a t u r e se n so r
5V
001present circuit.
When the LM35 is con-
nected as shown, a two-wire link
1 for the measurement range of
IC1
–5 °C to + 40 °C becomes possi-
R2 C1
2 ble. Actually, the circuit shown
200Ω
100n
is a temperature-dependent
current source, since it uses the
LM35 R3 R4 variation of the quiescent cur-
3
200Ω
2k00
10mV/°C rent with changes in tempera-
R1
ture. The values of resistors R 3
2k00
and R 4 are calculated to give an
output voltage of 10 mV °C –1.
(T ambient +10°C)
994101-11 –5°C ... +40°C Where good accuracy is desir-
able or necessary, 1% resistors
should be used. In this context,
A National Semiconductor application note that a loss resistance in the link between sensor and measur-
The Type LM35 temperature sensor from National Semiconductor ing circuit may cause a measurement error of about 1 °C for every
is very popular for two reasons: it produces an output voltage that 5 ohms of resistance. Capacitor C1 eliminates undesired interfer-
is directly proportional to the measured temperature in degrees ence and noise signals.
Celsius, and it enables temperatures below zero to be measured. At an ambient temperature of 25 °C, the circuit draws a cur-
A drawback of the device is, however, that in its standard applica- rent of about 2 mA.
tion circuit it needs to be connected to the actual measuring cir- [994101]
cuit via a three-wire link. This drawback is neatly negated by the
± 2 0 A c u r r e n t m o n it o r
+U
002 G. Kleine
The Type U CC3926 current
sensor IC from Unitrode is ide-
4V8...14V ally suited for use as a current
SIGN
27n 10µ monitor. It contains a 1.3 mΩ
current shunt and can handle
currents up to ± 20 A. The com-
13 mon-mode voltage for the shunt
SIGN COMP
is GND ± 75 mV or
VDD
V DD ± 75 mV, so that the cur-
1 CSP TRANS- SIGN 6
I IMPEDANCE rent can be monitored either in
2 1mΩ3 AMP
the positive supply rail or in the
100p 100p
3 AOP 5
+U
negative supply line of a load.
SHUNT
VD D ±75mV
U=
} The supply voltage, V DD , may
GND ±75mV 14 AON 12
lie between 4.8 V and 14 V.
15 CROSS SWITCH The potential across the
4k7
4k7
20A max.
I 16 shunt is applied to an internal
1k
CSN
NI 7 chopper-stabilized transimped-
+U UCC3926
10 OCREF ance amplifier, which converts
1k
INV 8 it into a differential voltage at
27n
pins 5 and 12 at a level of
OUT 9 1k 500 mV when the current is
1k GND OC 15 A. The differential voltage is
4k7
27n
4 11 applied via a low-pass filter to
OUT an operational amplifier, which
OVER-
CURRENT has unity gain and converts the
994036 - 11 voltage into a unipolar poten-
tial.

t w o -w ir e t e m p e r a t u r e se n so r
5V
001present circuit.
When the LM35 is con-
nected as shown, a two-wire link
1 for the measurement range of
IC1
–5 °C to + 40 °C becomes possi-
R2 C1
2 ble. Actually, the circuit shown
200Ω
100n
is a temperature-dependent
current source, since it uses the
LM35 R3 R4 variation of the quiescent cur-
3
200Ω
2k00
10mV/°C rent with changes in tempera-
R1
ture. The values of resistors R 3
2k00
and R 4 are calculated to give an
output voltage of 10 mV °C –1.
(T ambient +10°C)
994101-11 –5°C ... +40°C Where good accuracy is desir-
able or necessary, 1% resistors
should be used. In this context,
A National Semiconductor application note that a loss resistance in the link between sensor and measur-
The Type LM35 temperature sensor from National Semiconductor ing circuit may cause a measurement error of about 1 °C for every
is very popular for two reasons: it produces an output voltage that 5 ohms of resistance. Capacitor C1 eliminates undesired interfer-
is directly proportional to the measured temperature in degrees ence and noise signals.
Celsius, and it enables temperatures below zero to be measured. At an ambient temperature of 25 °C, the circuit draws a cur-
A drawback of the device is, however, that in its standard applica- rent of about 2 mA.
tion circuit it needs to be connected to the actual measuring cir- [994101]
cuit via a three-wire link. This drawback is neatly negated by the
± 2 0 A c u r r e n t m o n it o r
+U
002 G. Kleine
The Type U CC3926 current
sensor IC from Unitrode is ide-
4V8...14V ally suited for use as a current
SIGN
27n 10µ monitor. It contains a 1.3 mΩ
current shunt and can handle
currents up to ± 20 A. The com-
13 mon-mode voltage for the shunt
SIGN COMP
is GND ± 75 mV or
VDD
V DD ± 75 mV, so that the cur-
1 CSP TRANS- SIGN 6
I IMPEDANCE rent can be monitored either in
2 1mΩ3 AMP
the positive supply rail or in the
100p 100p
3 AOP 5
+U
negative supply line of a load.
SHUNT
VD D ±75mV
U=
} The supply voltage, V DD , may
GND ±75mV 14 AON 12
lie between 4.8 V and 14 V.
15 CROSS SWITCH The potential across the
4k7
4k7
20A max.
I 16 shunt is applied to an internal
1k
CSN
NI 7 chopper-stabilized transimped-
+U UCC3926
10 OCREF ance amplifier, which converts
1k
INV 8 it into a differential voltage at
27n
pins 5 and 12 at a level of
OUT 9 1k 500 mV when the current is
1k GND OC 15 A. The differential voltage is
4k7
27n
4 11 applied via a low-pass filter to
OUT an operational amplifier, which
OVER-
CURRENT has unity gain and converts the
994036 - 11 voltage into a unipolar poten-
tial.

An offset voltage is superimposed on to the unipolar potential
via a 1 kΩ multi-turn potentiometer to provide a preset voltage at
the OUT pin. This means that the voltage level at the OUT pin is
typically 500 mV plus the offset direct voltage when the current
through the shunt is 15 A.
The polarity of the output voltage is determined by the SIGN
comparator, which sets the internal cross switch to such a position 500mV
that the differential voltage between pins 5 and 12 is always posi-
tive. Uout
The polarity may be checked at pin 6: if the level at that pin is
high, the polarity is correct, that is, the current flows through the
shunt from pins 1, 2, 3 to pins 14, 15, 16.
A signal to show up an overvoltage may be generated with the
aid of an internal comparator. For this purpose, an overcurrent
reference may be applied to pin 10 via the 1 kΩ, 10-turn poten- 0V
tiometer. The digital signal at pin 11 is high when there is an over- -20A -15A 0A +15A +20A
current. I 994036 - 12
Further information from http://www.unitrode.com
[994036]
b u c k -b o o st c o n v e r t e r
w it h o u t m a g n e t ic s
R1
100k
3V3/50mA
003
voltage changes from about 4.5 V at full charge to about 2.7 V
when the battery is discharged. At full charge, the regulator must
step down the input voltage, and when the battery voltage drops
or
5V/50mA below 3.3 V, the regulator must step up the voltage. The same
2 8
RESET POR VOUT problem occurs when a 5 V output is required from a 4-cell input
IC1 voltage that varies from about 3.6 V to 6 V. Normally, a flyback or
1
ON/OFF SHDN 6
C1+ SEPIC configuration is required to solve this problem.
3 C1
5V/3V3 5/3 The LTC1515 switched-capacitor DC/DC converter can pro-
LTC1515 vide this buck-boost function for load currents up to 50 mA with
7 V -3.3/5 5 100n
IN C1– only three external capacitors. The circuit shown will provide a
3.3 V output from a 3-cell battery or a 5 V output from a 4-cell
C2 4 C3 input. Connecting the 5/3 pin to V IN will program the output to
5 V, whereas grounding the 5/3 pin programs the output to 3.3 V.
10µ 10µ
16V 16V The absence of bulky magnetics provides another benefit: this
3 or 4
cells circuit requires only 0.07 in 2 (0.45 cm 2) of board space in those
applications where components can be mounted on both sides of
994009 - 11
the board.
The addition of resistor R 1 provides a power-on reset flag that
A Linear Technology application goes high 200 ms after the output reaches 93.5% of its pro-
One of the problems that designers of portable equipment face is grammed value. The SHDN pin allows the output to be turned on
generating a regulated voltage whose level lies between those of a or off with a 3 V logic signal.
fully charged and a discharged battery. As an example, when a [994009]
3.3 V output is generated from a 3-cell battery, the regulator input
m u lt i- d e c a d e p u lse g e n e r a t o r
w it h se le c t a b le d u t y c y c le
Design: K.-H. Lorenz
Many pulse generators with adjustable duty cycle have a signifi-
004
lem. It uses a square wave generator consisting of IC2a and an RC
network. Range switch S1 selects one of three RC combinations
that control the pulse repetition rate. With the indicated values of
cant drawback, in that the pulse repetition rate also changes when C1, C2, C3 and P1, P2 and R1, there are three frequency ranges:
the duty cycle is adjusted. The circuit shown here avoids this prob-

tive. Uout
current. I 994036 - 12
[994036]
R1
100k
3V3/50mA
003
or
2 8
1
ON/OFF SHDN 6
3 C1
7 V -3.3/5 5 100n
10µ 10µ
3 or 4
994009 - 11
the board.
004

tive. Uout
current. I 994036 - 12
[994036]
R1
100k
3V3/50mA
003
or
2 8
1
ON/OFF SHDN 6
3 C1
7 V -3.3/5 5 100n
10µ 10µ
3 or 4
994009 - 11
the board.
004

I) 0.1 Hz to 10 Hz D12
II) 10 Hz to 1 kHz
III) 1 kHz to 100 kHz D10
1N4001 12V
16 C5 14 C6 C4
S1
IC1 IC2
Note that the actual frequency 8 100n 7 100n 100µ
25V
R3
depends on the hysteresis of the C1 C2 C3
3k3
4093, so that it is strongly 47µ 470n 4n7
S2
IC2b
dependent on the specific man- 25V
CTRDIV10/
0
3 5
4
DEC
ufacturer and fabrication of the 1
2 D1 6 &
R4
IC2a D2
IC used. For this reason, P1 and IC1 2
4
3k3
1
3 14 7 D3
P2 are provided for coarse and 2 & & + 3
10 D4
fine frequency adjustment, 13
4
1 D5
D11
5
respectively, to allow the pulse P1 R1 5 D6
1k
100k 4017 6
repetition rate to be set exactly P2 7
6 D7
IC2c
to the necessary value. If the 15 9 D8 8 IC2d
CT=0 8 10 12
11 D9 9 & 11
desired frequencies cannot be 10k 9 13 &
12
obtained in spite of the wide CT≥5
9x 1N4148 R2
4k7
adjustment range of the circuit, IC2 = 4093
the capacitor values should be 994011-11
modified.
The square wave generator
clocks a synchronous decimal
counter. Each time the count is incremented, the associated the PWM generator if all other switches are open.
decoded output goes high, while the remaining outputs stay low. The signal from the counter IC is connected to two inverters. Two
DIP switch S2 allows several outputs to be connected to a single LEDs are connected to IC2b. The lower the duty cycle, the
lead. The diodes prevent short-circuits between outputs selected brighter D11 shines and the dimmer D10. IC2b buffers (and
by S2, whenever the outputs have differing signal levels. For a inverts) the output signal of the circuit, and IC2d re-inverts the sig-
high/low ratio of 0.1, only the Q1 switch of S2 should be closed; nal levels, so that two complimentary signals are available at the
for a ratio of 0.2 Q1 and Q2 should be closed, and so on. If all out- output. The current consumption of the circuit is around 4 mA.
puts of the 4017 (except for Q0) are selected, the resulting duty (994011-1)
cycle is 0.9. The switch connected to earth can be closed to disable
m a t c h in g a t t e n u a t o r
Z0
R2
Z0
005
the cable(s), which may attenuate or magnify the forward signal
waves. In other words, there will be points along the cable(s) where
the resulting signal is much smaller than the original and others
u1 R1 R1 u2
where the resulting signal is much larger.
With the attenuators show in the diagram, the cables are cor-
rectly terminated, that is, there is proper matching. If the link is
via balanced cables, the network must also be balanced. In that
case, there is a series resistor in both signal lines that is half the
value of the series resistor used with an unbalanced connection.
1
/2 R2 The formulas shown give resistor values for both 50 Ω and 75 Ω
cables and wanted attenuation as listed in the table.
[994029]
u1 R1 R1 u2
Z0 Z0
50 Ω 75 Ω
Attenuation
1
/2 R2
994029 - 11
R1 R2 R1 R2
1 dB 909 Ω 5Ω62 1kΩ30 4Ω32
⎛ −a ⎞
2 ⎜ 20 dB ⎟
⎜ ⎟ 2 dB 475 Ω 10 Ω 619 Ω 18Ω2
A +1 A −1 U1 ⎝ ⎠
R 1 = Z O⋅ R 2 = Z O⋅ A= = 10
A −1 2A U2 3 dB 274 Ω 18Ω2 432 Ω 27Ω4
6 dB 150 Ω 35Ω7 221 Ω 56Ω2
G. Kleine 10 dB 100 Ω 68Ω1 150 Ω 100 Ω
When r.f. signals are (to be) attenuated, it is essential that the req- 15 dB 68Ω1 150 Ω 110 Ω 200 Ω
uisite network retains correct matching to the relevant (coaxial) 20 dB 61Ω9 243 Ω 90Ω9 392 Ω
cable(s). If this is not so, reflected signal waves will ensue along

I) 0.1 Hz to 10 Hz D12
II) 10 Hz to 1 kHz
III) 1 kHz to 100 kHz D10
1N4001 12V
16 C5 14 C6 C4
S1
IC1 IC2
Note that the actual frequency 8 100n 7 100n 100µ
25V
R3
depends on the hysteresis of the C1 C2 C3
3k3
4093, so that it is strongly 47µ 470n 4n7
S2
IC2b
dependent on the specific man- 25V
CTRDIV10/
0
3 5
4
DEC
ufacturer and fabrication of the 1
2 D1 6 &
R4
IC2a D2
IC used. For this reason, P1 and IC1 2
4
3k3
1
3 14 7 D3
P2 are provided for coarse and 2 & & + 3
10 D4
fine frequency adjustment, 13
4
1 D5
D11
5
respectively, to allow the pulse P1 R1 5 D6
1k
100k 4017 6
repetition rate to be set exactly P2 7
6 D7
IC2c
to the necessary value. If the 15 9 D8 8 IC2d
CT=0 8 10 12
11 D9 9 & 11
desired frequencies cannot be 10k 9 13 &
12
obtained in spite of the wide CT≥5
9x 1N4148 R2
4k7
adjustment range of the circuit, IC2 = 4093
the capacitor values should be 994011-11
modified.
The square wave generator
clocks a synchronous decimal
counter. Each time the count is incremented, the associated the PWM generator if all other switches are open.
decoded output goes high, while the remaining outputs stay low. The signal from the counter IC is connected to two inverters. Two
DIP switch S2 allows several outputs to be connected to a single LEDs are connected to IC2b. The lower the duty cycle, the
lead. The diodes prevent short-circuits between outputs selected brighter D11 shines and the dimmer D10. IC2b buffers (and
by S2, whenever the outputs have differing signal levels. For a inverts) the output signal of the circuit, and IC2d re-inverts the sig-
high/low ratio of 0.1, only the Q1 switch of S2 should be closed; nal levels, so that two complimentary signals are available at the
for a ratio of 0.2 Q1 and Q2 should be closed, and so on. If all out- output. The current consumption of the circuit is around 4 mA.
puts of the 4017 (except for Q0) are selected, the resulting duty (994011-1)
cycle is 0.9. The switch connected to earth can be closed to disable
m a t c h in g a t t e n u a t o r
Z0
R2
Z0
005
the cable(s), which may attenuate or magnify the forward signal
waves. In other words, there will be points along the cable(s) where
the resulting signal is much smaller than the original and others
u1 R1 R1 u2
where the resulting signal is much larger.
With the attenuators show in the diagram, the cables are cor-
rectly terminated, that is, there is proper matching. If the link is
via balanced cables, the network must also be balanced. In that
case, there is a series resistor in both signal lines that is half the
value of the series resistor used with an unbalanced connection.
1
/2 R2 The formulas shown give resistor values for both 50 Ω and 75 Ω
cables and wanted attenuation as listed in the table.
[994029]
u1 R1 R1 u2
Z0 Z0
50 Ω 75 Ω
Attenuation
1
/2 R2
994029 - 11
R1 R2 R1 R2
1 dB 909 Ω 5Ω62 1kΩ30 4Ω32
⎛ −a ⎞
2 ⎜ 20 dB ⎟
⎜ ⎟ 2 dB 475 Ω 10 Ω 619 Ω 18Ω2
A +1 A −1 U1 ⎝ ⎠
R 1 = Z O⋅ R 2 = Z O⋅ A= = 10
A −1 2A U2 3 dB 274 Ω 18Ω2 432 Ω 27Ω4
6 dB 150 Ω 35Ω7 221 Ω 56Ω2
G. Kleine 10 dB 100 Ω 68Ω1 150 Ω 100 Ω
When r.f. signals are (to be) attenuated, it is essential that the req- 15 dB 68Ω1 150 Ω 110 Ω 200 Ω
uisite network retains correct matching to the relevant (coaxial) 20 dB 61Ω9 243 Ω 90Ω9 392 Ω
cable(s). If this is not so, reflected signal waves will ensue along

PA L t im in g ( 1 )
IC1 = 74HCU04
IC2 = 74HC74
IC6 = 74HC32 2
D
5 12
D
9
006
IC2a IC2b
R1 4.43361875MHz
3 C 6 11 C 8
1M
R S R S
IC1a IC1b
1 4 5V 13 10
1 2 3 4
1 1
C4
X1
15p
IC3 IC4 IC5
CTR8 CTR8 CTR8
C1 1 1 1
C2 C3 1,2,4– 1,2,4– 1,2,4–
2C3 2C3 2C3
22p 27p 47p 2 2 2
CT=255 CT=255 CT=255
9 9 9
C3/G4 C3/G4 C3/G4
15 15 15
X1 = 17.734475MHz G2 G2 G2
3 3 3
EN1 EN1 EN1
IC1d 8
1 4 4 4
0 0 0
5 5 5
9
6 6 6
IC1e 10 IC6c 8
7 7 7
14 14 14
1 ≥1 10 3CT 1CT=0 10 3CT 1CT=0 10 3CT 1CT=0
11 11 11
11 9 10
12 12 12
IC1f 12 IC6d 11
13 13 13 60 ns
7 7 7
1 ≥1
74HC40103 74HC40103 74HC40103 IC6a
13 12 13 1
3
2 ≥1
5V 25Hz
5V
IC6b 6 IC1c 6
C5 14 C6 14 C7 16 C8 16 C9 16 C10 14
IC1 IC2 IC3 IC4 IC5 IC6 ≥1 1
7 7 8 8 8 7
100n 100n 100n 100n 100n 100n 4 5 5
994086 - 11
Design: T. Giesberts The crystal oscillator is a standard Pierce configuration with a trim-
This circuit is intended more as a design idea than as a finished mer capacitor, built around a 74HCU04 (IC1). The values of C2
project, in the light of the number of standard ICs that are and C3 must be properly chosen to obtain the specified load capac-
employed. itance for the crystal. An incorrect value of C load can make it
In the PAL television system, the CCIR B and G standards specify impossible to adjust the oscillator to the exact frequency. Two D -
that the colour carrier is directly coupled to the line rate, with a type flip-flops wired as divide-by-two stages are used to obtain the
25 Hz offset. The frequency ratio and offset are chosen to suppress colour carrier frequency.
interference patterns, according to the formula Four ICs are used for the division needed to obtain the frame rate
signal. IC3, IC4 and IC5 are presettable synchronous down-coun-
fcolour = 283.75 fline + 25 Hz ters (type 74HC40103) that are very well suited for timing and fre-
quency-division applications. The necessary division factor is split
At a line rate of 15,625 Hz, this means that the PAL colour carrier into two factors, namely 11 and 64,489. The 74HC40103 works as
frequency is 4.43361875 MHz. Single-sideband modulation is fre- an (1+ N) divider, so value of 10 is applied to the preset inputs of
quently used to obtain the correct relationship with the line rate. For IC3 for the first factor. The second factor is obtained by wiring IC4
example, the frequency of a crystal oscillator can be offset by and IC5 as a synchronous 16-bit divider, with the output of IC5
25 Hz, divided by 1135 and then multiplied by 8 to obtain twice the fed back to both synchronous preset inputs. The preset value is
actual line rate. This is a rather complicated procedure, which we again 1 less than the division factor.
think could be made a lot simpler. A disadvantage of the 74HC40103 is that glitches can occur, due
There is a fixed ratio between the 25 Hz frame rate and four times to differences in internal delay times. These glitches are eliminated
the colour carrier frequency. You can calculate this yourself —- by clocking an OR gate (IC6a) at the divider output with the
four times the colour carrier frequency is exactly equal to 709,379 divider input signal. The 25 H z output signal has an active low
times the frame rate! An obvious approach is to use a crystal oscil- pulse approximately 60 ns long, which is essentially equal to one
lator running at four times the colour carrier frequency and divide period of the crystal oscillator.
its output by 709,379 to obtain the frame rate. The line rate can The current consumption of the circuit is a bit more than 12 mA,
then be derived from the frame rate with the help of a PLL circuit primarily due to IC1.
(see ‘PAL timing (2)’). (994086-1)

A V C Lo g ic f a m ily
3 Volt Products Positioning
FBL
K.S.M. Walraven
007
Driven by customer demand, Philips Semiconductor’s AVC Logic
family is the fastest logic on the market today and offers ultra low
10
noise and low voltage for applications such as DRAM modules, per-
sonal computers, workstations, network servers, telecommunica-
35 LVT/
LVT16
ALVT tion switching equipment and base stations. ( AVC is an acronym of
A dvanced V ery-low-voltage CMOS).
LVC/
Devices in the AVC logic family are intended for use in systems
50 LVC16 ALVC AVC
that operate from a supply voltage of 1.2–3.6 V. The manufacturer
claims that this is the first family that offers a delay of not more
130 LV than 2 ns at such a low supply voltage.
As an example, with a supply voltage of 3.3 V, the 74AVC16244
10 5 2.5 1.5 (a three-state buffer) has a typical delay of 1 ns. At 2.5 V this
typ. Tpd (ns)
increases to 1.1 ns, and at 1.8 V, to 1.5 ns. This is about 40 per cent
faster than attainable with current logic families.
5 Volt Products Positioning The devices in the new family are provided with protection that
FB
makes hot insertion possible. This is an important aspect when, for
10 instance, expansion cards are to be added to communication systems
that should not be switched in any circumstances.
[994006]
ABT/MB
35 ABT16
FAST/ALS
50
130 HC/HCT AHC/T
10 5 2.5 1.5
typ. Tpd (ns) 994006 - 11
A M m o d u la t o r
a n d 5 0 Ω R F o u t p u t st a g e
HF K1
R7
6V
008 Design: Dr L. Köppen
The 10 MHz Function Genera-
tor design published in Elektor
3k3
R3 C4 C5 Electronics in June 1995 has one

T2
serious deficiency: it cannot
50Ω
100n 10µ
25V provide amplitude modulation.
BC238B The standard configuration of
11 12 10
D1
R5 the MAX038 IC has no provi-
sion for amplitude modulation,
50Ω
6V IC1
C1 in contrast to frequency modu-
14 8 1N4148 K3
10k lation which is easily achieved.
P1 R1 6n8
1 7 The circuit presented here
5k6
R6 makes amplitude modulation
D2
R2 NE592 possible, and it also has the sig-
50Ω
nificant advantage that it

50Ω
T1
LF K2 C2 4 3 5 1N4148
replaces the somewhat exotic
T3
100n R4
and quite expensive OP603AP
BC245B C3 C6
R8 output opamp with a standard
68k
P2 BC308B type. Of course, this amplitude

3k3
100n 10µ
25V
10k modulator can also be used with
6V other models of function gener-
6V 994084 - 11 ator or for other purposes.
As you know, the gain of an

A V C Lo g ic f a m ily
3 Volt Products Positioning
FBL
K.S.M. Walraven
007
Driven by customer demand, Philips Semiconductor’s AVC Logic
family is the fastest logic on the market today and offers ultra low
10
noise and low voltage for applications such as DRAM modules, per-
sonal computers, workstations, network servers, telecommunica-
35 LVT/
LVT16
ALVT tion switching equipment and base stations. ( AVC is an acronym of
A dvanced V ery-low-voltage CMOS).
LVC/
Devices in the AVC logic family are intended for use in systems
50 LVC16 ALVC AVC
that operate from a supply voltage of 1.2–3.6 V. The manufacturer
claims that this is the first family that offers a delay of not more
130 LV than 2 ns at such a low supply voltage.
As an example, with a supply voltage of 3.3 V, the 74AVC16244
10 5 2.5 1.5 (a three-state buffer) has a typical delay of 1 ns. At 2.5 V this
typ. Tpd (ns)
increases to 1.1 ns, and at 1.8 V, to 1.5 ns. This is about 40 per cent
faster than attainable with current logic families.
5 Volt Products Positioning The devices in the new family are provided with protection that
FB
makes hot insertion possible. This is an important aspect when, for
10 instance, expansion cards are to be added to communication systems
that should not be switched in any circumstances.
[994006]
ABT/MB
35 ABT16
FAST/ALS
50
130 HC/HCT AHC/T
10 5 2.5 1.5
typ. Tpd (ns) 994006 - 11
A M m o d u la t o r
a n d 5 0 Ω R F o u t p u t st a g e
HF K1
R7
6V
008 Design: Dr L. Köppen
The 10 MHz Function Genera-
tor design published in Elektor
3k3
R3 C4 C5 Electronics in June 1995 has one

T2
serious deficiency: it cannot
50Ω
100n 10µ
25V provide amplitude modulation.
BC238B The standard configuration of
11 12 10
D1
R5 the MAX038 IC has no provi-
sion for amplitude modulation,
50Ω
6V IC1
C1 in contrast to frequency modu-
14 8 1N4148 K3
10k lation which is easily achieved.
P1 R1 6n8
1 7 The circuit presented here
5k6
R6 makes amplitude modulation
D2
R2 NE592 possible, and it also has the sig-
50Ω
nificant advantage that it

50Ω
T1
LF K2 C2 4 3 5 1N4148
replaces the somewhat exotic
T3
100n R4
and quite expensive OP603AP
BC245B C3 C6
R8 output opamp with a standard
68k
P2 BC308B type. Of course, this amplitude

3k3
100n 10µ
25V
10k modulator can also be used with
6V other models of function gener-
6V 994084 - 11 ator or for other purposes.
As you know, the gain of an

NE592 video opamp can be set to 400, 100 or 10 by means of an impedance with low DC offset.
external jumper. Intermediate settings can be achieved by using a The complete circuit can deliver a constant amplitude output sig-
suitable resistance in place of the jumper. This adjustment takes nal of up to 2.5 Vpp (unmodulated) for frequencies ranging to over
place in the emitter leads of the differential amplifier, directly at 20 MHz. If the signal is not modulated, the maximum amplitude
the input to the opamp, where the signal amplitude is low. A can be increased somewhat. Output level controls (a potentiome-
BF245B FET is used here as a controllable resistance. With suitably ter and/or range switches), if used, should be placed between the
low signal levels, it provides at least 50% of clean amplitude mod- NE592 output and the input of the output stage. In such cases, an
ulation for modulating signals (LF) up to 10 kHz and modulated sig- emitter-follower stage with a high input impedance might be a
nals (HF) up to 20 MHz. The FET can also be driven with a DC good idea, since the opamp should operated with a load of at least
voltage to control the amplitude of the output signal over a 10:1 1 kΩ. Conceivably, the gate of the FET could be driven via an
range with low distortion. Any slight asymmetry of the modulated additional opamp, together with the demodulated signal from the
signal can be corrected by applying a small correction voltage via P1. output of the NE592 applied as negative feedback, to achieve
P2 is used to bias the FET at around –2.5 V. The output stage is higher modulation levels.
built using discrete transistors and guarantees a 50 Ω output (994084-1)
sw it c h - o n - c u r r e n t lim it in g
G. Kleine
009
In certain direct-current operated circuits, such as DC-to-DC con-
verters, the switch-on current may be so high that the output volt-
U IN age of the power supply cannot reach its nominal level. This difficulty
R1
D1 may be prevented with a limiting circuit as shown in the diagram.
*
1M
RL When the input voltage, Uin, is switched on, transistor T 1 is off

1N4148 since capacitor C 1 is not charged. The level of current Iat the
moment of switch-on is
D2
C1
* 100n
G T1 I(t= 0) = Uin /R 2.
Capacitor C 1 is charged slowly via resistor R 1 until the

S D
BUZ20
gate–source threshold voltage, UGS(th) , is exceeded, whereupon
D the transistor begins to conduct. The time interval between switch-
R2
* on and the transistor coming on is determined by time constant
BUZ20
R 1-C 1 and the ratio Uin :UGS(th) . The gate-source voltage, UGS, of
the BUZ20 is in the range ± 20 V. If V in is larger than these val-
* see text
zie tekst
ues, or a different transistor is used, UGS must be limited to the
* siehe Text range mentioned by zener diode D 2, for which a ZPD18 was used
* voir texte in the prototype.
* G S Diode D 1 enables C 1 to be discharged via the load when Uin
994035 - 11 D
is switched off. The circuit is then ready for the next period of
operation.
[994035]
t in y a n a lo g u e sw it c h a lle v ia t e s
I 2 C a d d r e ss c o n f lic t s
A Maxim application
To avoid address conflicts, every peripheral on an I2C™ bus must
010
The popular I 2C bus is an open-collector, 2-wire interface that
includes a clock line and a bidirectional data line. It allows a con-
troller (the master) to select a particular device (the slave) by first
have a unique address. Sometimes, however, peripherals may be issuing a serial address on the data line, then issuing appropriate
assigned the same address. The circuit shown resolves address con- commands or data. Master and slave can send data in both direc-
flicts by enabling the I 2C bus to select between two peripherals tions by pulling the data line low, and slaves can generate wait
with the same address. states by pulling the clock line low. Bus switching is complicated,

G. Kleine
009
R1
*
1M

D2
C1
* 100n
G T1 I(t= 0) = Uin /R 2.

S D
BUZ20
R2
BUZ20
* see text
zie tekst
994035 - 11 D
operation.
[994035]
A Maxim application
010

G. Kleine
009
R1
*
1M

D2
C1
* 100n
G T1 I(t= 0) = Uin /R 2.

S D
BUZ20
R2
BUZ20
* see text
zie tekst
994035 - 11 D
operation.
[994035]
A Maxim application
010

+U
however, by the open-collector architecture—it cannot be accom-
plished with the CMOS outputs of AND gates or 74HC157 data R1 R2 R3
C1
selectors.
10k
10k
47k
8
The peripherals shown in the diagram are a Philips I 2C real- 1 22p
X1
time clock (PCF-8583) and a large I 2C EEPR OM (Microchip IC2 X1
M-24LC16). Both have an internal, hexadecimal slave address of 5
PCF8583
SDA
A0. (The EEPROM takes up the entire address range, making it 6 X2
2
RTCI
SCL 7
impossible to avoid.) The analogue switch connects either one INT
8 2 A0
device or the other. Selection involves the data line (SDA) only, 3 4
INT OUTPUT
because an I 2C start condition requires that the SDA signal goes 32.768kHz
NO 7
low before the clock goes low. To select between the devices, the IC1
SDA
master device sets a port pin to control the state of the dual SPST 1
analogue switch. 5 +U
IC 1 is a CMOS chip well suited to this function. Its normally SCL MAXIM NC 3
R4
open switch and normally closed switch perform the 2:1 selector MAX325
10k
operation with no additional inverters or port line. It features low 13
on-resistance (33 Ω) and low supply current (1 µA), and is specified 4 6
9
for operation below 3 V. Also, its tiny 8-pin SOT package (µMAX) 10
SDA
IC3
SCL
is only half the size of an SO-8 package. M24LC16 12
TEST
Note: I 2C is a trademark of the Philips Corporation. SELECT A0 A1 A2

2 3 5 6
[994010]
H = 8583 RTC
L = 24C16 EEPROM 994010 - 11
m e a su r e m e n t in t e r v a l
g enera t o r
15V
011 0
3
15V
S2 CTRDIV10/ 1 2
15V DEC
D1
4
2
7
3
16 16 16 16 16 16 15
IC6 10 R5
C4 C5 CT=0 4
4017
1k
1
IC1 IC2 IC3 IC4 IC5 IC6 5
100n 100n 14 5
& 6
8 8 8 8 8 8 6 T1
R3 + 7 R4
13 9
8 470k
3k9
11
9
12
CT≥5 BC547C
* zie tekst
* see text * S1 10s; 1s; 100ms; 10ms; 1ms
* siehe Text
C1 * voir texte 1kHz 100Hz
10Hz
1Hz 0Hz1
50p
3 3 3 3
CTR14 7 0 0 0 0
3 CTRDIV10/ 1 2 CTRDIV10/ 1 2 CTRDIV10/ 1 2 CTRDIV10/ 1 2
C2 R2 5
10 4 DEC 4 DEC 4 DEC 4 DEC 4
2k2 RX !G 4 2 2 2 2
R1 IC1 5 7 7 7 7
39p X1 6 3 3 3 3
6 IC2 IC3 IC4 IC5
2M
9 10 10 10 10
CX 14 4 4 4 4
7 14 4017 1 14 4017 1 14 4017 1 14 4017 1
C3 + CT 13 & 5 & 5 & 5 & 5
11 8 5 5 5 5
RCX 15 + 6 + 6 + 6 + 6
9 13 6 13 6 13 6 13 6
56p 4.096MHz 1 7 7 7 7
12 11 9 9 9 9
CT=0 2 8 8 8 8
4060 12 15 11 15 11 15 11 15 11
3 CT=0 9 CT=0 9 CT=0 9 CT=0 9
13 12 12 12 12
CT≥5 CT≥5 CT≥5 CT≥5
994002 - 11
Design: K.-H. Lorenz use as a timing window generator for a frequency counter. It uses
The purpose of this circuit is to generate a pulse with a predefined only inexpensive standard components and can be quickly put
duration when a button is pressed. It is especially well suited for together.

+U
however, by the open-collector architecture—it cannot be accom-
plished with the CMOS outputs of AND gates or 74HC157 data R1 R2 R3
C1
selectors.
10k
10k
47k
8
The peripherals shown in the diagram are a Philips I 2C real- 1 22p
X1
time clock (PCF-8583) and a large I 2C EEPR OM (Microchip IC2 X1
M-24LC16). Both have an internal, hexadecimal slave address of 5
PCF8583
SDA
A0. (The EEPROM takes up the entire address range, making it 6 X2
2
RTCI
SCL 7
impossible to avoid.) The analogue switch connects either one INT
8 2 A0
device or the other. Selection involves the data line (SDA) only, 3 4
INT OUTPUT
because an I 2C start condition requires that the SDA signal goes 32.768kHz
NO 7
low before the clock goes low. To select between the devices, the IC1
SDA
master device sets a port pin to control the state of the dual SPST 1
analogue switch. 5 +U
IC 1 is a CMOS chip well suited to this function. Its normally SCL MAXIM NC 3
R4
open switch and normally closed switch perform the 2:1 selector MAX325
10k
operation with no additional inverters or port line. It features low 13
on-resistance (33 Ω) and low supply current (1 µA), and is specified 4 6
9
for operation below 3 V. Also, its tiny 8-pin SOT package (µMAX) 10
SDA
IC3
SCL
is only half the size of an SO-8 package. M24LC16 12
TEST
Note: I 2C is a trademark of the Philips Corporation. SELECT A0 A1 A2

2 3 5 6
[994010]
H = 8583 RTC
L = 24C16 EEPROM 994010 - 11
m e a su r e m e n t in t e r v a l
g enera t o r
15V
011 0
3
15V
S2 CTRDIV10/ 1 2
15V DEC
D1
4
2
7
3
16 16 16 16 16 16 15
IC6 10 R5
C4 C5 CT=0 4
4017
1k
1
IC1 IC2 IC3 IC4 IC5 IC6 5
100n 100n 14 5
& 6
8 8 8 8 8 8 6 T1
R3 + 7 R4
13 9
8 470k
3k9
11
9
12
CT≥5 BC547C
* zie tekst
* see text * S1 10s; 1s; 100ms; 10ms; 1ms
* siehe Text
C1 * voir texte 1kHz 100Hz
10Hz
1Hz 0Hz1
50p
3 3 3 3
CTR14 7 0 0 0 0
3 CTRDIV10/ 1 2 CTRDIV10/ 1 2 CTRDIV10/ 1 2 CTRDIV10/ 1 2
C2 R2 5
10 4 DEC 4 DEC 4 DEC 4 DEC 4
2k2 RX !G 4 2 2 2 2
R1 IC1 5 7 7 7 7
39p X1 6 3 3 3 3
6 IC2 IC3 IC4 IC5
2M
9 10 10 10 10
CX 14 4 4 4 4
7 14 4017 1 14 4017 1 14 4017 1 14 4017 1
C3 + CT 13 & 5 & 5 & 5 & 5
11 8 5 5 5 5
RCX 15 + 6 + 6 + 6 + 6
9 13 6 13 6 13 6 13 6
56p 4.096MHz 1 7 7 7 7
12 11 9 9 9 9
CT=0 2 8 8 8 8
4060 12 15 11 15 11 15 11 15 11
3 CT=0 9 CT=0 9 CT=0 9 CT=0 9
13 12 12 12 12
CT≥5 CT≥5 CT≥5 CT≥5
994002 - 11
Design: K.-H. Lorenz use as a timing window generator for a frequency counter. It uses
The purpose of this circuit is to generate a pulse with a predefined only inexpensive standard components and can be quickly put
duration when a button is pressed. It is especially well suited for together.

In the schematic diagram, IC1 (a 4060) is a 14-stage binary counter rising edge at pin 14 clocks the counter. The input signal, divided
with an integrated oscillator. An inexpensive 4.096 MHz crystal is by 2, appears at the Q1 output (pin 2). However, since Q3 (pin 7)
used as the timing reference, which means that a 1 kH z signal is connected to the /Enable input, the counter is disabled after the
appears at the output (pin 1) after division by 214. Following IC1 is first period of the output signal, so that only one pulse is gener-
a series of decimal counters (IC2 through IC5, type 4017) that are ated. Depending on the input signal, this pulse has a length of 10 s,
cascaded via their Carry Out outputs (pin 12). These counters pro- 1 s, 0.1 s, 0.01 s or 0.001 s.
duce reference frequencies of 100 Hz, 10 Hz, 1 Hz and 0.1 Hz. A simple transistor buffer drives an LED that is illuminated for
The non-shorting rotary switch S1 selects one of the reference fre- the duration of the pulse. An additional, similar buffer stage at the
quencies and applies it to the clock input of an additional 4017. In output would also be a good idea. The circuit should be powered
contrast to the other ICs of this type, its control inputs Reset and from a stabilized 15 V supply. It draws around 10 mA.
/Enable (pins 15 and 13) are used dynamically. When pushbutton (994002-1)
S2 is pressed, the count is reset to zero. When S2 is released, the first
h ig h - c u r r e n t , h ig h - sp e e d b u f f e r
T. Giesberts
The circuit shown in the diagram is intended for applications in
which relatively large pulse-shaped signals are to be applied to a
012
C3 C5
15V
10µ 35V 100n

standard impedance of, say, 50 Ω. The parallel circuit of two high-
speed buffers prevents overheating during periods of high loads
and high drive. IC1
7
The operational amplifiers used, Analog Devices’ Type R1 R3
3 6
BUF104, have a bandwidth of 110 MHz and a very high slew rate: 47Ω BUF04 100Ω
1
3000 V µs–1. The peak output current is 65 mA, which is not suf- C1
4
ficient to provide 5 V into 50 Ω, but the parallel combination is 8
22p
able to. Connecting 100 Ω resistors, R 3 and R 4, in series with the
outputs of the op amps gives an overall output impedance of 50 Ω. C4 C6
Owing to the large bandwidth, effective decoupling is impera- 10VPP
tive, which is why its is advisable to use tantalum capacitors for C3, 10µ 35V 100n
15V
C 4, C 7, and C 8 and ceramic ones for C5, C 6, C 9, and C 10.
With output currents exceeding 50 mA, the pulse response may
15V
be enhanced by damping the self-inductance of the tantalum C7 C9 50Ω
capacitors with the aid of series resistors of 1–4.7 Ω.
If the specified bandwidth of 110 MHz is to be attained, a cen- 10µ 35V 100n
tral earth plane and SMT components must be used, since the par-
asitic self-inductance of standard components is too high. One of IC2
the prototypes constructed with standard components had a band- 7
R2 R4
width of only 25 MHz. Also, with such a construction, the screen- 47Ω
3
BUF04
6
100Ω
ing is less effective, so that at high frequencies positive feedback, and C2
1
thus oscillations, may occur. This is the reason that there is an RC 8
4
filter at the input of the op amps: R 1-C 1, and R 2-C 2 respectively, 22p
which limits the bandwidth to 80–90 MHz.
C8 C10
The circuit draws a quiescent current of ± 15 mA. When the
output signal is rectangular at a level of 10 Vp-p, into 50 Ω, the cur- 10µ 35V 100n
rent drain rises to 60–65 mA. 15V 994042 - 11
[994042]
d isc r e t e v o lt a g e r e g u la t o r
Design: T. Giesberts
The title of this article naturally raises the question of why we think
that the generous selection of fully integrated voltage regulators
013
components. In other words, what does this circuit offer that the
well-known ‘three-leggers’ don’t have?
To start with, we can point out that this circuit is refreshingly sim-
needs to be extended with a version constructed using discrete ple for a discrete version. Three semiconductors, three resistors,

T. Giesberts
012
C3 C5
15V
10µ 35V 100n

and high drive. IC1
7
3 6
1
4
22p
15V
15V
R2 R4
3
BUF04
6
100Ω
1
4
C8 C10
[994042]
013

T. Giesberts
012
C3 C5
15V
10µ 35V 100n

and high drive. IC1
7
3 6
1
4
22p
15V
15V
R2 R4
3
BUF04
6
100Ω
1
4
C8 C10
[994042]
013

Table 1. Specifications
R2 with P1 without P1
10k
T1 Output voltage 15 V 14.5 V
T3 Ripple suppression 58 dB 64 dB (Iout = 100 mA)
46 dB 54 dB (Iout = 1 A)
BF Udropout 1.6 V 1 V (Iout = 100 mA)
256A
BD Inoload 2.1 mA ditto
R1 15V
1k
680
Maximum input voltage 30 V ditto
T2
P1
1k the circuit (U DSmax of T1), but this can easily be increased by using
BC special high-voltage transistors. The same applies to the band-
547B
width, which can be extended as desired, without any modifica-
D1 R3 tions to the circuit, by using high-speed transistors. Generally
C1
speaking, wide bandwidth is also not one of the strong points of
15V 12k
100µ 25V
integrated voltage regulators.
0W4 As noted, the circuit is basically very simple. A zener diode (D1) fed
with a constant current of around 1 mA by a JFET current source
994089 - 11 (T1) provides the reference potential. C1 is connected in parallel
with D1 to provide well-behaved startup behaviour (soft start). This
capacitor also provides additional buffering and decouples noise and
a capacitor and a diode are all it needs. Of course, that’s still more other disturbances. The startup time is around three seconds.
components than an integrated regulator, so what exactly are the The only additional item that is needed for the voltage regulator
advantages of this circuit? They are to be found in three areas: is an output buffer for the reference potential. This takes the form
voltage range, bandwidth and current rating. The last of these is of a sort of super-Darlington using T2 and T3. This works very
the primary strength of this circuit, since the maximum current well, but has the disadvantage that the output voltage is a bit lower
depends only on the specifications of the output transistor. With (one diode drop) than the Zener voltage. P1 can be added to cor-
the BD680, as used here, a current of 4 A can be delivered at a col- rect this, but this does reduce the regulation of the circuit. If the
lect-emitter voltage of 10 V with adequate cooling (R th = voltage difference is not important, it is thus better to replace P1
3.12 K/W). The peak current is even 6 A. Try matching that with with a wire jumper. The main specifications of the voltage regula-
an integrated voltage regulator! tor are listed in Table 1.
The maximum input voltage is 30 V with the illustrated version of (994089-1)
C3 C4
R4
5V
014
derive a line rate signal from a television frame rate
signal, using a PLL. Naturally, this technique can
also be used in situations where the line synchro-
4k7
100n 100n nization pulses are corrupted.

15625 Hz 16
D1
In the PAL television system, there are 625 lines per
0
9 frame. In the PLL circuit, a nominal frequency of
16 CTR12 1
7
15,625 Hz is thus divided by 625 and then compared
25 Hz 6
2 D2 to the 25 H z input signal. A 74H C4040 (IC2) is
14 4 10 5
SIGN Φ VCO 3 + 3
used for the divider. The correct division factor is
15 PLL 3
ZEN CIN 4 D3
6 1 IC2 2 obtained with the help of an AND circuit formed
CX PP 5
C1 IC1
P1
2 CT
6
4
D4
by several diodes, which produces the counter reset
74HC4046 74HC
P2
13
4040 7
13 signal (625 decimal = 1001110001 binary).
8n2
7 11 12
CX CT=0 8 D5 The well-known H C version of the 4046 IC has
11 9 14
12
R1 VCOIN
10 R3
9
15
been chosen for the PLL. H C logic must be used
DEM 10
R2
5x here to keep up with the fast pulse from the output
10k
1
INH 11 1N4148 of the ‘PAL timing (1)’ circuit. Since phase com-
5 8
R1 R2
C2
8 parator 2 is used, the inputs are edge triggered, and
no further requirements need be placed on the
100k
100k
10µ
63V
input signals.
As can be seen, the internal oscillator of the PLL
994087 - 11
IC is also used (pin 9). The necessary low-pass fil-
ter R3/C2 is not dimensioned entirely according to
the prescribed formulas, but this version proved to
Design: T. Giesberts yield the least jitter in practical tests. This brings us directly to the
This design is complementary to the design described in the article weak point of this circuit. With a normal RC oscillator, as used
‘PAL timing (1)’, which also appears in this issue. It is intended to here, it is not possible to reduce the jitter of the 15,625 Hz signal to

Table 1. Specifications
R2 with P1 without P1
10k
T1 Output voltage 15 V 14.5 V
T3 Ripple suppression 58 dB 64 dB (Iout = 100 mA)
46 dB 54 dB (Iout = 1 A)
BF Udropout 1.6 V 1 V (Iout = 100 mA)
256A
BD Inoload 2.1 mA ditto
R1 15V
1k
680
Maximum input voltage 30 V ditto
T2
P1
1k the circuit (U DSmax of T1), but this can easily be increased by using
BC special high-voltage transistors. The same applies to the band-
547B
width, which can be extended as desired, without any modifica-
D1 R3 tions to the circuit, by using high-speed transistors. Generally
C1
speaking, wide bandwidth is also not one of the strong points of
15V 12k
100µ 25V
integrated voltage regulators.
0W4 As noted, the circuit is basically very simple. A zener diode (D1) fed
with a constant current of around 1 mA by a JFET current source
994089 - 11 (T1) provides the reference potential. C1 is connected in parallel
with D1 to provide well-behaved startup behaviour (soft start). This
capacitor also provides additional buffering and decouples noise and
a capacitor and a diode are all it needs. Of course, that’s still more other disturbances. The startup time is around three seconds.
components than an integrated regulator, so what exactly are the The only additional item that is needed for the voltage regulator
advantages of this circuit? They are to be found in three areas: is an output buffer for the reference potential. This takes the form
voltage range, bandwidth and current rating. The last of these is of a sort of super-Darlington using T2 and T3. This works very
the primary strength of this circuit, since the maximum current well, but has the disadvantage that the output voltage is a bit lower
depends only on the specifications of the output transistor. With (one diode drop) than the Zener voltage. P1 can be added to cor-
the BD680, as used here, a current of 4 A can be delivered at a col- rect this, but this does reduce the regulation of the circuit. If the
lect-emitter voltage of 10 V with adequate cooling (R th = voltage difference is not important, it is thus better to replace P1
3.12 K/W). The peak current is even 6 A. Try matching that with with a wire jumper. The main specifications of the voltage regula-
an integrated voltage regulator! tor are listed in Table 1.
The maximum input voltage is 30 V with the illustrated version of (994089-1)
C3 C4
R4
5V
014
derive a line rate signal from a television frame rate
signal, using a PLL. Naturally, this technique can
also be used in situations where the line synchro-
4k7
100n 100n nization pulses are corrupted.

15625 Hz 16
D1
In the PAL television system, there are 625 lines per
0
9 frame. In the PLL circuit, a nominal frequency of
16 CTR12 1
7
15,625 Hz is thus divided by 625 and then compared
25 Hz 6
2 D2 to the 25 H z input signal. A 74H C4040 (IC2) is
14 4 10 5
SIGN Φ VCO 3 + 3
used for the divider. The correct division factor is
15 PLL 3
ZEN CIN 4 D3
6 1 IC2 2 obtained with the help of an AND circuit formed
CX PP 5
C1 IC1
P1
2 CT
6
4
D4
by several diodes, which produces the counter reset
74HC4046 74HC
P2
13
4040 7
13 signal (625 decimal = 1001110001 binary).
8n2
7 11 12
CX CT=0 8 D5 The well-known H C version of the 4046 IC has
11 9 14
12
R1 VCOIN
10 R3
9
15
been chosen for the PLL. H C logic must be used
DEM 10
R2
5x here to keep up with the fast pulse from the output
10k
1
INH 11 1N4148 of the ‘PAL timing (1)’ circuit. Since phase com-
5 8
R1 R2
C2
8 parator 2 is used, the inputs are edge triggered, and
no further requirements need be placed on the
100k
100k
10µ
63V
input signals.
As can be seen, the internal oscillator of the PLL
994087 - 11
IC is also used (pin 9). The necessary low-pass fil-
ter R3/C2 is not dimensioned entirely according to
the prescribed formulas, but this version proved to
Design: T. Giesberts yield the least jitter in practical tests. This brings us directly to the
This design is complementary to the design described in the article weak point of this circuit. With a normal RC oscillator, as used
‘PAL timing (1)’, which also appears in this issue. It is intended to here, it is not possible to reduce the jitter of the 15,625 Hz signal to

less than around 200 ns. For most applications, this is not good crystal oscillator for the VCO, in combination with a suitable
enough, so that there is no getting around the use of an external divider. (994087-1)
015
p o la r it y-f r e e P S U f ilt e r
f o r h a m r a d io
nal vehicle battery. However, the supply polarity on
R2
D6
the external power connector may not always be
known or easily found out when a hectic situation
1k5
D3 D1
C1 F1 L1 arises (traditionally, few hams have the Owners Man-
12V
R1
ual available…).
100n 2A T
This circuit was developed to allow handheld rigs to
1k5
D4 D2 D7
C2 C3 C4 C5
be connected to an external 12V vehicle battery with-
100µ 100n D5 100n 10µ out paying attention to polarity. This function is due
25V 15V 25V
D1...D4 = 1N5402 3W L2 to a bridge rectifier, D1-D4, at the input of the circuit.
Irrespective of the battery polarity, the radio will
994105-11
always receive the correct supply voltage.
Additional functions of the circuit include an effective
noise filter (L1-L2-C4-C5), high-voltage DC protec-
Design: N.S. Harisankar VU3NSH tion (zener diode D7), and blown fuse/power indicators (LEDs D6
Many radio amateurs will not fail to recall the chaotic situations and D5 respectively). Coils L1 and L2 consist of 8 turns of 24SWG
that may occur during fielddays or contests, when several radios (0.6 mm) enamelled copper wire on a large ferrite toroidal core
have to be connected in a hurry and under circumstances less com- from Amidon’s T series (check coil saturation specification!). Alter-
fortable than those in the shack at home. For instance, many oper- natively, use ‘EMI suppression beads’ type 4330 020 3326 from
ators may be busy at the same time connecting up the power leads Philips Components. The LEDs should be high-efficiency types.
to equipment which is not theirs. In such situations, supply polar- The circuit as shown can be used with any modern handheld that
ity errors may readily occur, with disastrous results. draws less than 2 A at supply voltages between 4.5 V and 14 V. In
Many currently available handhelds from Sony, Yaesu, Standard, fact, most of these rigs will draw 1.3-1.5 A at 13.8 V for 5 watts of
Kenwood, Alinco and other makes may be powered from an exter- RF output power. (994105-1)
c a l l f o r pa
Tec hnic al auth
to the Autumn
in which we pl
pe r s
ors and desig
and Winte r 19
an to co ve r th
ners are now
99 issue s of El
e fo llo wing su
invited to cont
rib ute
ekto r Elec tro ni
cs,
Send your man
uscrip t to
- Digitizing au bjec ts:
dio sig na ls Ele ktor Ele ctr
- New ba tte ry onics (Publish
and charging
te ch P.O . B o x 1 4 ing)
- New PC te ch
no lo gy
no lo gi es 14
Dorche ste r D
- Digita l med iu
m and short-w T2 8YH
- The 20th ce av e ra dio En gla nd
ntur y in re tro sp
ec t www.e le ktor-
Ad vic e on sty e le ctronics.c
re ga rd ing te
le , artic le siz
e and te c hnic o.uk
xt and illustrat al re quire m en If yo u would
ob ta ined fro m io ns (file fo rm ats, ts like to offe r yo ur
the Ed ito r. etc .) m ay be assig ne d subj fre e-la nc e w
ec ts, info rm us riting se rvic es
We also ca ll fo or fa (in writing) ab fo r
r sto rie s co ve rin vo urite interest, an out yo ur sp ec
the fie ld of el g inte re sting to d an y pr op osals you may ia lism
ec tro nics and pica l subjec ts Even if yo ur sp alread y ha ve
co mpute rs, as in ec ia lism is no .
and co nstruct well as fo r re vi lik e to he ar fro m t m en tio ne d ab ove, w
io n projec ts w ews yo u in view of e would still
Some expe rie ith an exte nsive ne xt ot he r subjec ts to be
nc e in writing explanatory te ye ar.
is ap prec ia te xt. co ve re d
(who knows, yo d, but no t esse Every artic le is
u co uld be a ntia l ju dg ed by
If you ha ve re na tu ra l ta le nt). public atio n va th e ed ito ria l sta ff on
cently finished lue. You will re the ba sis of its
write a te xt w an interesting sib le . If yo ur ar ce ive our ve rd
ith it and se nd construction pr tic le ic t as so on as
us the artic le . ojec t, is of inte re st, yo u w po s-
and illustratio Preferab ly, the ditio ns fo r publ ill also re ce ive
ns should be te xt ic atio n. ou r co
ap plies to revie su pp lie d on flo pp This ca ll is also n-
ws and topica y disk. The sa ad dressed to
l stories. me co mpa nies ha vin
and other inte g press releas
resting ba ckgr es
subjec ts men ound informat
tio ne d ab ove. ion availa ble
on the

less than around 200 ns. For most applications, this is not good crystal oscillator for the VCO, in combination with a suitable
enough, so that there is no getting around the use of an external divider. (994087-1)
015
p o la r it y-f r e e P S U f ilt e r
f o r h a m r a d io
nal vehicle battery. However, the supply polarity on
R2
D6
the external power connector may not always be
known or easily found out when a hectic situation
1k5
D3 D1
C1 F1 L1 arises (traditionally, few hams have the Owners Man-
12V
R1
ual available…).
100n 2A T
This circuit was developed to allow handheld rigs to
1k5
D4 D2 D7
C2 C3 C4 C5
be connected to an external 12V vehicle battery with-
100µ 100n D5 100n 10µ out paying attention to polarity. This function is due
25V 15V 25V
D1...D4 = 1N5402 3W L2 to a bridge rectifier, D1-D4, at the input of the circuit.
Irrespective of the battery polarity, the radio will
994105-11
always receive the correct supply voltage.
Additional functions of the circuit include an effective
noise filter (L1-L2-C4-C5), high-voltage DC protec-
Design: N.S. Harisankar VU3NSH tion (zener diode D7), and blown fuse/power indicators (LEDs D6
Many radio amateurs will not fail to recall the chaotic situations and D5 respectively). Coils L1 and L2 consist of 8 turns of 24SWG
that may occur during fielddays or contests, when several radios (0.6 mm) enamelled copper wire on a large ferrite toroidal core
have to be connected in a hurry and under circumstances less com- from Amidon’s T series (check coil saturation specification!). Alter-
fortable than those in the shack at home. For instance, many oper- natively, use ‘EMI suppression beads’ type 4330 020 3326 from
ators may be busy at the same time connecting up the power leads Philips Components. The LEDs should be high-efficiency types.
to equipment which is not theirs. In such situations, supply polar- The circuit as shown can be used with any modern handheld that
ity errors may readily occur, with disastrous results. draws less than 2 A at supply voltages between 4.5 V and 14 V. In
Many currently available handhelds from Sony, Yaesu, Standard, fact, most of these rigs will draw 1.3-1.5 A at 13.8 V for 5 watts of
Kenwood, Alinco and other makes may be powered from an exter- RF output power. (994105-1)
c a l l f o r pa
Tec hnic al auth
to the Autumn
in which we pl
pe r s
ors and desig
and Winte r 19
an to co ve r th
ners are now
99 issue s of El
e fo llo wing su
invited to cont
rib ute
ekto r Elec tro ni
cs,
Send your man
uscrip t to
- Digitizing au bjec ts:
dio sig na ls Ele ktor Ele ctr
- New ba tte ry onics (Publish
and charging
te ch P.O . B o x 1 4 ing)
- New PC te ch
no lo gy
no lo gi es 14
Dorche ste r D
- Digita l med iu
m and short-w T2 8YH
- The 20th ce av e ra dio En gla nd
ntur y in re tro sp
ec t www.e le ktor-
Ad vic e on sty e le ctronics.c
re ga rd ing te
le , artic le siz
e and te c hnic o.uk
xt and illustrat al re quire m en If yo u would
ob ta ined fro m io ns (file fo rm ats, ts like to offe r yo ur
the Ed ito r. etc .) m ay be assig ne d subj fre e-la nc e w
ec ts, info rm us riting se rvic es
We also ca ll fo or fa (in writing) ab fo r
r sto rie s co ve rin vo urite interest, an out yo ur sp ec
the fie ld of el g inte re sting to d an y pr op osals you may ia lism
ec tro nics and pica l subjec ts Even if yo ur sp alread y ha ve
co mpute rs, as in ec ia lism is no .
and co nstruct well as fo r re vi lik e to he ar fro m t m en tio ne d ab ove, w
io n projec ts w ews yo u in view of e would still
Some expe rie ith an exte nsive ne xt ot he r subjec ts to be
nc e in writing explanatory te ye ar.
is ap prec ia te xt. co ve re d
(who knows, yo d, but no t esse Every artic le is
u co uld be a ntia l ju dg ed by
If you ha ve re na tu ra l ta le nt). public atio n va th e ed ito ria l sta ff on
cently finished lue. You will re the ba sis of its
write a te xt w an interesting sib le . If yo ur ar ce ive our ve rd
ith it and se nd construction pr tic le ic t as so on as
us the artic le . ojec t, is of inte re st, yo u w po s-
and illustratio Preferab ly, the ditio ns fo r publ ill also re ce ive
ns should be te xt ic atio n. ou r co
ap plies to revie su pp lie d on flo pp This ca ll is also n-
ws and topica y disk. The sa ad dressed to
l stories. me co mpa nies ha vin
and other inte g press releas
resting ba ckgr es
subjec ts men ound informat
tio ne d ab ove. ion availa ble
on the

b e ll t r a n sf o r m e r su p p ly
f o r w a v e -f ile p la y e r 016
H. Bonekamp
If the wave-file player described in the Feb-
ruary 1999 issue of this magazine is used as a
programmable doorbell, it is, of course,
handy if its supply is derived from the door-
bell transformer. In the design of the circuit
in the diagram, it was borne in mind that as
little as possible should be changed in the
existing wiring of the doorbell and that it
would be convenient to be able to switch the
doorbell back on when the wave-file player is
removed to program it with a new sound.
The alternating voltage at the sec-
ondary of the doorbell transformer is recti-
fied by diode bridge D 2–D 5, and smoothed by
capacitor C 2. Z ener diode D 6, a fast type,
serves to suppress transients. The resulting
direct voltage is stabilized by regulator IC 1
which is set for 6.8 V. When the drop across
the protection diode in the wave-file player is
deducted from this, a direct voltage of about
6 V remains, which is used to supply the
amplifier IC
The need of modifying the existing
wiring is precluded by the circuit around tran-
K1 T1
D1 R1
12k
1N4148 R2
Sb C1 BC547B
S1
1k8
ON/OFF 10µ WAVE FILE PLAYER

BELL 25V
S1
F1
500mA T
K3
Tr1
K2 IC1
SW
D5 D3
6V8
LM317
8V
R3
270Ω
D4 D2
4x 1N4001 D6 R4
C2 C3 C4
1k2
2200µ 100n 1µ
1W3 15V 16V 63V
994080 - 11
H1 994080-1 C1 R1
T1
S1 D1 R2 H2
K1 C2 R4
R3
Sb
Sw
994080-1
1-080499
+
~
D6 C3
8V
D2 D3
~
D4 D5 K3
K2 F1 H3
H4
0.5AT C4
IC1

sistor T 1, which converts the alternating voltage arriving from the Parts list D6 = BZT03, 15 V, 1.3 W
Resistors: T1 = BC547B
doorbell into a switching signal that is applied to, and processed
R1 = 12 kΩ
by, the wave-file player. Switch S1 enables the doorbell to be used R2 = 1.8 kΩ Integrated circuits:
as normal when the wave-file player is removed for any reason. R3 = 270 Ω IC1 = LM317T
Remember to open the switch again when the wave-file player is R4 = 1.2 kΩ
replaced, otherwise the player does not work and it is set to the Miscellaneous:
wrong speed of 9600 baud via the S1 input. Capacitors: K1, K2 = 2-way terminal strip,
If desired, the unit can be coupled to a computer via a screened C1 = 10 µF, 25 V, radial pitch 5 mm
C2 = 2200 µF, 16 V K3 = 3-way terminal strip,
cable to make it possible for the program of the wave-file player
C3 = 0.1 µF, ceramic pitch 5 mm
to be altered without it being necessary to remove the unit. C4 = 1 µF, 63 V, radial S1 = slide switch
The circuit is best built on the printed-circuit board shown, F1 = fuse holder with
which is available through our Readers’ Services (see towards the Semiconductors: 500 mAT fuse
end of this issue). Note that the voltage regulator should be D1 = 1N4148 Enclosure, e.g. Bopla E410
mounted on a small appropriate heat sink of 24 K W –1. D2–D5 = 1N4001 Heat sink for IC1: 24 K W–1
[994080]
im p e d a n c e m a t c h in g n e t w o r k
Z1
R1
Z2
017
cable with an impedance Z 2, reflections ensue that cause standing
waves. Reflected signals then collide with incoming signals. The
consequent superimposition of the two signals causes the result-
ing signal to be weak at certain points in the cable or network and
R2 very strong at others.
The matching network shown in the diagram matches two
unequal impedances, provided that Z 1 is greater than Z 2. The table
shows a number of frequently encountered values of Z 1 and Z 2
and the requisite resistors, as well as the resulting attenuation. The
Z1 > Z2 994028 - 11 resistor values are the nearest standard values in the E-96 series
to the computed ones.
The matching of impedances in this manner is wideband and
Z1 Z2 R1 R2 Attenuation is often used in the test and measurement operations when 75 Ω
75Ω 50Ω 43Ω2 82Ω5 5,7 dB ad 50 Ω appliances are used.
150Ω 50Ω 121Ω 61Ω9 9,9 dB The resistor values are calculated from
300Ω 50Ω 274Ω 51Ω1 13,4 dB
R 1= Z 1–Z 2R 2/(Z 2+ R 2)
150Ω 75Ω 110Ω 110Ω 7,6 dB
300Ω 75Ω 243Ω 82Ω5 11,4 dB R 2= Z 2√Z 1/(Z 1–Z 2)
where Z 1 and Z 2are as described earlier and their, and the resis-
G. Kleine tor, values are in ohms.
When r.f. signals are transferred directly from a cable or other out- [994028]
put terminal with an impedance Z 1 to a signal input terminal or
n o st a lg ic c o m b in a t io n lo c k
Design: P. von Lay Tech. Bureau
There are many different types of code locks, ranging from
018
IC1a and IC1b are wired as comparators, with reference poten-
tials that can be adjusted using trimpots R2, R3 and R4. Diodes
D1 and D2 allow only positive voltages to pass to the subsequent
numeric keypads through chip cards and magnetic-card readers. logic gates, contained in IC2a-e and IC3a/b. These gates are con-
The one presented here resembles an old-fashioned combination nected such that only one of the three contacts of relay K1 will
lock. have a high level, according to the setting of R1 (which controls

R1 = 12 kΩ
[994080]
Z1
R1
Z2
017
300Ω 50Ω 274Ω 51Ω1 13,4 dB
R 1= Z 1–Z 2R 2/(Z 2+ R 2)
150Ω 75Ω 110Ω 110Ω 7,6 dB
300Ω 75Ω 243Ω 82Ω5 11,4 dB R 2= Z 2√Z 1/(Z 1–Z 2)
018

R1 = 12 kΩ
[994080]
Z1
R1
Z2
017
300Ω 50Ω 274Ω 51Ω1 13,4 dB
R 1= Z 1–Z 2R 2/(Z 2+ R 2)
150Ω 75Ω 110Ω 110Ω 7,6 dB
300Ω 75Ω 243Ω 82Ω5 11,4 dB R 2= Z 2√Z 1/(Z 1–Z 2)
018

4mA 6V
S1 S2
R14
IC1 = MC1458
Re1
330Ω
IC2 = 4069
IC3 = 4081 D9 Re2
6V
IC2a IC2b IC4
4 D10
S0 1N4148
1 2 3 4
1 1 3 2
IC3c R0 Q0
R2 X2 X1 9
3-STATE OUTPUTS
a 10 6
3 IC2c c 8 & S1 9
D1 7 Q1
1 5 6 R1 T1
IC1a 1 IC3a 13 R13
10k 2 1 11 12 10
1N4148 3 b b 12 & S2 Q2 4k2
2 & 11
R2
IC3d Q3
1 BC107
a c 14
S3
15
R1 R3 IC2d R3
9 8 5 EN
1 IC3b C1 C2 C3
5 4043
4
10k 10k 5 IC2e 6 & 100n 100n 100n
D2
7 11 10 D3
IC1b 1
6 D4
1N4148
6V D5
R4 D6
D7
D8
8 14 14 16
10k
IC1 IC2 IC3 IC4 6 x 1N4148
4 7 7 8
R5 R6 R15 R16 R17 R7 R9 R11 R8 R10 R12
10k
10k
10k
10k
10k
10k
10k
10k
10k
10k
10k
994001-11
the output levels of IC1a and IC1b). Points X1a-c are connected to points X2a-c by wire jumpers. The
If switch S1 is pressed, relay K1 is actuated. If a high level is present desired lock combination can thus be set using trimpots R 2-R 4
at X1a, RS flip-flop IC4a will be set, and the remaining flip-flops will together with these jumpers. Since the reference voltages are ana-
be reset at the same time. If R1 is then repositioned so that a high logue, there is theoretically an infinite number of possible combi-
level is applied to X1b when S1 is pressed, RS flip-flop IC4b will nations.
be set in turn. Finally, if R1 is again repositioned and S1 pressed The circuit draws around 4 mA, plus the currents drawn by the
to apply a high level to X1c, R S flip-flop IC4c will be set. This LED and the relays. If a high-efficiency LED is used, the value of
switches on T1, so that the LED D10 lights up and relay K2 is actu- R14 must be suitably increased (to 3.9 kΩ).
ated. Relay K2 can be used to energize a door-opener solenoid, as (994001-1)
an example. The lock can be reset by briefly pressing S2.
v a r ia b le o sc illa t o r
C1
15n
R1
10k
R7 D1
T. Giesberts
019
Although the oscillator in the diagram at first sight resembles a
standard Wien bridge type, it is in fact a variant of it since it is
220k
2x
tuned by varying only one component. This has the advantage of
R3 R6 D2
1N4148 not needing a carefully selected stereo potentiometer; instead, a
10k 150k
R5 P2
single potentiometer may be used. In the diagram, this is P 1, and
10k with values as specified, the output frequency of the oscillator may
P1 R2
2 500Ω be varied between 340 Hz and 3.4 kHz.
1k R4
100k IC1a
1
10k
6
R8
The basic Wien bridge consists of R 1-C 1 and (R 2+ P 1)-C 2.
3
IC1b
7
100Ω Since in this variant the well-known ×3 attenuation does not occur,
5
the conditions for stable oscillation are met by including the current
through R 2+ P1 in the positive feedback loop. This means that the
C2
circuit cannot be based on a single operational amplifier, which is
the reason that IC 1b has been added to it. Diodes D 1 and D 2
15n
ensure reasonable stability of the signal.
The design requires that the resistance of R 4 is more or less
15V equal to the impedance of network R 5-R 6-R 7P 2-D 1-D 2. Poten-
C5 C3 tiometer P 2 is set to a position which ensures that the level of the
100n 10µ
output signal is just below that of the supply voltage: the distortion
8
IC1
63V is then a minimum. For best results, it may be worthwhile to exper-
4 C6 C4
iment with the values of R 5, R 6, and P 2.
Frequency control P 1 may have a linear or logarithmic charac-
IC1 = TL072
100n 10µ
63V
teristic, although the latter will normally give more linear control.
15V 994040 - 11 The frequency, f, is, at least theoretically, determined by

4mA 6V
S1 S2
R14
IC1 = MC1458
Re1
330Ω
IC2 = 4069
IC3 = 4081 D9 Re2
6V
IC2a IC2b IC4
4 D10
S0 1N4148
1 2 3 4
1 1 3 2
IC3c R0 Q0
R2 X2 X1 9
3-STATE OUTPUTS
a 10 6
3 IC2c c 8 & S1 9
D1 7 Q1
1 5 6 R1 T1
IC1a 1 IC3a 13 R13
10k 2 1 11 12 10
1N4148 3 b b 12 & S2 Q2 4k2
2 & 11
R2
IC3d Q3
1 BC107
a c 14
S3
15
R1 R3 IC2d R3
9 8 5 EN
1 IC3b C1 C2 C3
5 4043
4
10k 10k 5 IC2e 6 & 100n 100n 100n
D2
7 11 10 D3
IC1b 1
6 D4
1N4148
6V D5
R4 D6
D7
D8
8 14 14 16
10k
IC1 IC2 IC3 IC4 6 x 1N4148
4 7 7 8
R5 R6 R15 R16 R17 R7 R9 R11 R8 R10 R12
10k
10k
10k
10k
10k
10k
10k
10k
10k
10k
10k
994001-11
the output levels of IC1a and IC1b). Points X1a-c are connected to points X2a-c by wire jumpers. The
If switch S1 is pressed, relay K1 is actuated. If a high level is present desired lock combination can thus be set using trimpots R 2-R 4
at X1a, RS flip-flop IC4a will be set, and the remaining flip-flops will together with these jumpers. Since the reference voltages are ana-
be reset at the same time. If R1 is then repositioned so that a high logue, there is theoretically an infinite number of possible combi-
level is applied to X1b when S1 is pressed, RS flip-flop IC4b will nations.
be set in turn. Finally, if R1 is again repositioned and S1 pressed The circuit draws around 4 mA, plus the currents drawn by the
to apply a high level to X1c, R S flip-flop IC4c will be set. This LED and the relays. If a high-efficiency LED is used, the value of
switches on T1, so that the LED D10 lights up and relay K2 is actu- R14 must be suitably increased (to 3.9 kΩ).
ated. Relay K2 can be used to energize a door-opener solenoid, as (994001-1)
an example. The lock can be reset by briefly pressing S2.
v a r ia b le o sc illa t o r
C1
15n
R1
10k
R7 D1
T. Giesberts
019
Although the oscillator in the diagram at first sight resembles a
standard Wien bridge type, it is in fact a variant of it since it is
220k
2x
tuned by varying only one component. This has the advantage of
R3 R6 D2
1N4148 not needing a carefully selected stereo potentiometer; instead, a
10k 150k
R5 P2
single potentiometer may be used. In the diagram, this is P 1, and
10k with values as specified, the output frequency of the oscillator may
P1 R2
2 500Ω be varied between 340 Hz and 3.4 kHz.
1k R4
100k IC1a
1
10k
6
R8
The basic Wien bridge consists of R 1-C 1 and (R 2+ P 1)-C 2.
3
IC1b
7
100Ω Since in this variant the well-known ×3 attenuation does not occur,
5
the conditions for stable oscillation are met by including the current
through R 2+ P1 in the positive feedback loop. This means that the
C2
circuit cannot be based on a single operational amplifier, which is
the reason that IC 1b has been added to it. Diodes D 1 and D 2
15n
ensure reasonable stability of the signal.
The design requires that the resistance of R 4 is more or less
15V equal to the impedance of network R 5-R 6-R 7P 2-D 1-D 2. Poten-
C5 C3 tiometer P 2 is set to a position which ensures that the level of the
100n 10µ
output signal is just below that of the supply voltage: the distortion
8
IC1
63V is then a minimum. For best results, it may be worthwhile to exper-
4 C6 C4
iment with the values of R 5, R 6, and P 2.
Frequency control P 1 may have a linear or logarithmic charac-
IC1 = TL072
100n 10µ
63V
teristic, although the latter will normally give more linear control.
15V 994040 - 11 The frequency, f, is, at least theoretically, determined by

f= 1/2π R 1 C 1 √ α, parallel network D 1-D 2 by a proper stabilization circuit.
The circuit draws a current of about 4 mA without load. When
where α= (R 2+ P 1)/R 1. a supply voltage of ± 15 V is used, the peak output signal is 9.4 V
Note the conditions that R 1 = R 3 and C 1 = C 2 . r.m.s. With the use of a Type TL072 as specified, the circuit can
The circuit has a drawback in that the frequency is dependent work from supply voltages as low as ± 5 V.
to some degree on the peak value of the signal, which cannot be [994040]
nullified with the present design. It can, however, by replacing the
3 V su p p ly sp lit t e r
3V
T. Giesberts
020
Many modern circuits tend to work from a single supply voltage
of 3 V. But often they need a virtual earth at half the supply voltage
for efficient operation.
R1
The splitter shown in the diagram bisects the supply voltage
C4 C2 with a high-resistance potential divider, R 1-R 2, and buffers the
1M
resulting 1.5 V line with an op amp. Since the op amp used is not
100n 100µ
10V a fast type, the output is decoupled by capacitive divider C 2-C 3.
1 This ensures that the impedance of the virtual earth point remains
3 7
5 R3 1V5 low over a wide frequency band. Because the potential at the junc-
6
IC1 100Ω tion C 2-C 3-R 3 is fed back to the inverting input of IC1, the circuit
2
becomes a standard voltage follower.
4
Resistor R 3 ensures that the regulation remains stable. The cir-
OP90GP cuit can regulate ± 2 mA without any difficulties. Because of the
R2
low current drawn by IC 1, and the high resistance of R 1 and R 2,
C1 C3 the overall current drain is low. In the absence of a load, it was
1M
13 µA in the prototype, of which 1.5 µA flows through R 1-R 2.

2µ2 100µ
10V Finally, since IC 1 can operate from a voltage as low as 1.6 V,
the splitter will remain fully operational when the battery nears
994066 - 11 the end of its charge or life.
[994066]
st r o b o sc o p e f ilt e r
R10 R3
8
12V
021 Design: J. Ferber
To drive a stroboscope from an
68k
100k
IC1 = TL082
IC1
4mA3
audio signal, the signal must
T1
C4
R4
4 first be reduced to its low-fre-
BC547 C1 100k quency component. This can be
2µ2/16V
< 1V
C5
R14 R15
27n
5 done with the circuit presented
100k 100k
3
IC1b
7 here. Coupling capacitors C4
2µ2/16V IC1a
1 6 R13
and C5, for the left and right
470Ω
2
5V74 channels, prevent any DC volt-
5V78
C2 R1 ages in the audio signals from

6V37 5V82 68k
27n R2 D1 reaching the transistor buffer
3V0 stage (T1). The buffered audio
5V79
5V77
62k
5V79
R7
signal is applied to an active sec-
3k3 ond-order low pass filter, whose
R9 R12
R8 C3 upper frequency limit can be
82k
10k
190k
83...167Hz adjusted over the range of

33µ
16V approximately 80 to 170 H z
994008-11 using the stereo potentiometer

3V
T. Giesberts
020
R1
1M
100n 100µ
3 7
6
2
4
R2
1M

2µ2 100µ
[994066]
R10 R3
8
12V
68k
100k
IC1 = TL082
IC1
4mA3
T1
C4
R4
2µ2/16V
< 1V
C5
R14 R15
27n
100k 100k
3
IC1b
2µ2/16V IC1a
1 6 R13
470Ω
2
5V78

6V37 5V82 68k
5V79
5V77
62k
5V79
R7
R9 R12
82k
10k
190k

33µ

3V
T. Giesberts
020
R1
1M
100n 100µ
3 7
6
2
4
R2
1M

2µ2 100µ
[994066]
R10 R3
8
12V
68k
100k
IC1 = TL082
IC1
4mA3
T1
C4
R4
2µ2/16V
< 1V
C5
R14 R15
27n
100k 100k
3
IC1b
2µ2/16V IC1a
1 6 R13
470Ω
2
5V78

6V37 5V82 68k
5V79
5V77
62k
5V79
R7
R9 R12
82k
10k
190k

33µ

R 14/R 15. Good tracking between the two halves of this poten- the filter and the stroboscope. As a rule, this is present at the input
tiometer is a basic requirement for proper operation of the filter. of the stroboscope, so all we have to do is to reduce the output
Here we are not so much interested in minimum distortion of the voltage by 3 V (using D1) and provide a current-limiting resistor
low-frequency component of the input signal, since all we need is (R13) at the filter output.
a signal that is suitable for triggering the stroboscope circuit. This Perfectly inexpensive opamps (such as the TL082) can be used for
is achieved by applying the signal to a comparator with an the filter. With a simple + 12-V supply and the indicated compo-
adjustable reference potential. The trigger level of the circuit can nent values, the current consumption of the filter circuit is around
be varied using R4. When the signal amplitude is high enough, a 4.3 mA.
pulse signal appears at the output of IC2a. (994008-1)
An optocoupler is essential to provide galvanic isolation between
su p p ly v o lt a g e m o n it o r
12V
R1
G. Kleine
022
A circuit for monitoring supply voltages of ± 5 V and ± 12 V is
1k
readily constructed as shown in the diagram. It is appreciably sim-

pler than the usual monitors that use comparators, and AND
T1
gates. The circuit is not intended to indicate the level of the inputs.
5V In normal operation, transistors T1 and T3 must be seen as cur-
BC558
D1 green
rent sources. The drop across resistors R 1 and R 2 is 6.3 V
groen (12–5–0.7). This means that the current is 6.3 mA and this flows
grün
vert through diode D 1 when all four voltages are present. However, if
T2 for instance, the –5 V line fails, transistor T 3 remains on but the
base-emitter junction of T 2 is no longer biased, so that this tran-
BC548 sistor is cut off. When this happens, there is no current through
BC548 D 1 which then goes out.
D2 BC558
[994026]
3x D3
1N4148
D4
T3
C E
5V B
BC548
R2
1k
12V 994026 - 11
t e m p e r a t u r e - c o m p e n sa t e d
c r y st a l o sc illa t o r
A Dallas Semiconductor application
The clock in computers and many other electronic systems is nor-
mally provided by a simple crystal oscillator. Unfortunately, the
023
however, are designed to work at room temperature, say, 20–25 °C.
When the ambient temperature is higher or lower, as happens in
rooms and offices which are not constantly heated or cooled as the
electromechanical properties of such a clock are normally such case may be, the clock will drift.
that it may vary as much as 100 minutes per year from real time. Dallas Semiconductor has now introduced a temperature-com-
This is, of course, a highly unsatisfactory, and, to many people, pensated oscillator (TXCO), which is eminently suitable for use
inexplicable situation. After all, if a cheap watch can keep (rea- in computers and other appliances where correct time-keeping is
sonable) time, why can an expensive computer not? important. The very small integrated oscillator enables a clock to
Yet, the reason for this is fairly simple. Watches, even the cheap be constructed that does not vary by more than ± 1 minute per
ones, are designed to work at body temperature, which is fairly year (± 2 ppm) over a temperature range of 0–40 °C.
constant Clocks in computers and other electronic appliances, The IC type-coded DS32kH z is an accurate and affordable

12V
R1
G. Kleine
022
1k

T1
BC558
D1 green
grün
D2 BC558
[994026]
3x D3
1N4148
D4
T3
C E
5V B
BC548
R2
1k
12V 994026 - 11
023

12V
R1
G. Kleine
022
1k

T1
BC558
D1 green
grün
D2 BC558
[994026]
3x D3
1N4148
D4
T3
C E
5V B
BC548
R2
1k
12V 994026 - 11
023

4V5...5V5
1 2
DS32KHZ
A B C D
IC1 1
2
32kHz 3
VCC: C2, C3, D2, D3
V BAT OUT 4
VBAT: A4, A5, B4, B5
5 32KHZ: C4, C5, D4, D5
Bt1 6 GND: All Remaining Balls
7
2V7...3V3 DS32KHZ 8
9
36-PIN SMD
(TOP VIEW) 994003 - 12
994003 - 11
replacement for standard 32,768 kHz crystals and oscillators. Its that when the mains voltage fails, the clock remains on. If a backup
output can drive virtually any RTC chip. battery is not used, VCC should be connected to GND and a supply
The SMD case of the DS32kHz contains a quartz crystal and a voltage of 2.7–5.5 V to V BAT.
temperature-compensating circuit. In this circuit, use is made of a The device is available only in SMD format. Its pins are
thermal sensing technology specially developed by Dallas. External arranged as a 36-pin ball grid array. The pinout is shown in Fig-
components are not needed: the IC is calibrated at the factory. ure 2.
The circuit in Figure 1 shows that connecting the TXCO is [994003]
straightforward. The backup battery connected to V BAT ensures
f ixe d - g a in lin e d r iv e r O PA 3 6 8 2
* see text
C7 C9 C4
L1
* 5V
024
The output stage architecture
provides high output current
with minimal headroom and
* voir texte crossover distortion to give
100n 100n 2µ2
* siehe Text 11 15
20V excellent single-supply opera-
tion. Operating from a single
* zie tekst IC1 400Ω
+ 5 V supply, the OPA3682 can
1 R7 K4
K1 R4 400Ω
A
14
75Ω R
deliver a 1–4 V output swing
2
R 10Ω with over 100 mA drive current
16 C1
DIS A
and a bandwidth of 200 MH z.
400Ω 100n
This combination makes the
4 R8 K5
K2 R5 400Ω 12 OPA3682 ideal for use as an
5 B 75Ω G
G 10Ω RGB line driver or a single-sup-
3 C2 C6
DIS B ply, triple ADC input driver.
400Ω 100n
10n Each amplifier has a dedi-
7 R9 K6 cated disable pin (3, 6, 16).
K3 R6 400Ω 10
8 C 75Ω B
B 10Ω When the disable function is
6 C3
R1 R2 R3 DIS C not used, a decoupling capaci-
100n
tor, C 1–C 3, links the relevant
75Ω
75Ω
75Ω
9 13 OPA3682 pin to earth. Correct decou-

pling, as well as faithful adher-
C8 C10 C5 ence to the circuit layout, is
important. A good guide is the
100n 100n 2µ2
20V
L2
* 5V
DEM-OPA368xE evaluation
994099-11 fixture sheet available from the
Burr-Brown Corporation or its
dealers or at http://www.burr-
A Burr-Brown application brown.com/ This sheet also outlines the reasons why all compo-
The OPA3682 provides an easy-to-use, broadband fixed gain, triple nents should be in surface mount technology (SMT).
buffer amplifier. Depending on the external connections, the inter- Resistors R 1–R 3 determine the input impedance, and resistors
nal resistor network may be used to provide either a fixed gain of R 7–R 9, the output impedance.
+ 2 video buffer or a gain of ± 1 voltage buffer. Operating on a low The quiescent current with all amplifiers enabled is about
6 mA/channel supply current, the device offers a slew rate and out- 18 mA and with the amplifiers disabled, about 900 µA.
put power normally associated with a much higher supply current. [994099]

4V5...5V5
1 2
DS32KHZ
A B C D
IC1 1
2
32kHz 3
VCC: C2, C3, D2, D3
V BAT OUT 4
VBAT: A4, A5, B4, B5
5 32KHZ: C4, C5, D4, D5
Bt1 6 GND: All Remaining Balls
7
2V7...3V3 DS32KHZ 8
9
36-PIN SMD
(TOP VIEW) 994003 - 12
994003 - 11
replacement for standard 32,768 kHz crystals and oscillators. Its that when the mains voltage fails, the clock remains on. If a backup
output can drive virtually any RTC chip. battery is not used, VCC should be connected to GND and a supply
The SMD case of the DS32kHz contains a quartz crystal and a voltage of 2.7–5.5 V to V BAT.
temperature-compensating circuit. In this circuit, use is made of a The device is available only in SMD format. Its pins are
thermal sensing technology specially developed by Dallas. External arranged as a 36-pin ball grid array. The pinout is shown in Fig-
components are not needed: the IC is calibrated at the factory. ure 2.
The circuit in Figure 1 shows that connecting the TXCO is [994003]
straightforward. The backup battery connected to V BAT ensures
f ixe d - g a in lin e d r iv e r O PA 3 6 8 2
* see text
C7 C9 C4
L1
* 5V
024
The output stage architecture
provides high output current
with minimal headroom and
* voir texte crossover distortion to give
100n 100n 2µ2
* siehe Text 11 15
20V excellent single-supply opera-
tion. Operating from a single
* zie tekst IC1 400Ω
+ 5 V supply, the OPA3682 can
1 R7 K4
K1 R4 400Ω
A
14
75Ω R
deliver a 1–4 V output swing
2
R 10Ω with over 100 mA drive current
16 C1
DIS A
and a bandwidth of 200 MH z.
400Ω 100n
This combination makes the
4 R8 K5
K2 R5 400Ω 12 OPA3682 ideal for use as an
5 B 75Ω G
G 10Ω RGB line driver or a single-sup-
3 C2 C6
DIS B ply, triple ADC input driver.
400Ω 100n
10n Each amplifier has a dedi-
7 R9 K6 cated disable pin (3, 6, 16).
K3 R6 400Ω 10
8 C 75Ω B
B 10Ω When the disable function is
6 C3
R1 R2 R3 DIS C not used, a decoupling capaci-
100n
tor, C 1–C 3, links the relevant
75Ω
75Ω
75Ω
9 13 OPA3682 pin to earth. Correct decou-

pling, as well as faithful adher-
C8 C10 C5 ence to the circuit layout, is
important. A good guide is the
100n 100n 2µ2
20V
L2
* 5V
DEM-OPA368xE evaluation
994099-11 fixture sheet available from the
Burr-Brown Corporation or its
dealers or at http://www.burr-
A Burr-Brown application brown.com/ This sheet also outlines the reasons why all compo-
The OPA3682 provides an easy-to-use, broadband fixed gain, triple nents should be in surface mount technology (SMT).
buffer amplifier. Depending on the external connections, the inter- Resistors R 1–R 3 determine the input impedance, and resistors
nal resistor network may be used to provide either a fixed gain of R 7–R 9, the output impedance.
+ 2 video buffer or a gain of ± 1 voltage buffer. Operating on a low The quiescent current with all amplifiers enabled is about
6 mA/channel supply current, the device offers a slew rate and out- 18 mA and with the amplifiers disabled, about 900 µA.
put power normally associated with a much higher supply current. [994099]

p u ll-u p a c c e le r a t o r
5V
1
BU
025
LTC1694CS5
C1
IC1 S2
4
LTC1694 BU
100n 2 S1
5
BUS1 BUS2
5 4 NC
GN 3
SCL D
VC 2
SOT-23 C
SDA 1
994076 - 13
994076 - 11
K.S.M. Walraven The characteristic shows the difference of the leading edge
Systems like the SMBus or I 2C™ use a standard resistor to pull up obtained with a standard resistor and that resulting when the IC
the signal levels to the positive supply rail (normally 5 V). The bus is used.
goes low because an appliance connected to it pulls the signal to [994076]
zero via its open-collector output. The well-known problem is this
output can draw a much higher current than the pull-up resistor
can compensate. This results in a steep trailing edge, but a much
more gradually rising leading edge, whose transition in addition is
not linear but exponential. This adversely affects the duty factor
of the signals and also reduces the speed of the bus.
Linear Technology have available an IC (Type LTC1694) to
replace the traditional pull-up resistor which can produce a cur-
rent that is dependent on the changes in level taking place on the 1V/div.
bus. When that level rises, the IC gives 2.2 mA, but when it falls,
the current is only 275 µA.
Since the IC contains two circuits for replacing both pull-up
resistors, it is possible to detect when the bus is in the quiescent
mode (both pull-ups high). In this case, the current is reduced even
more: to 100 µA.
The IC is intended for an I 2C bus frequency of 100 kHz. The VCC = 5V
400 kHz and recently introduced 3.4 MHz versions are not sup- CLD = 200pF
994076 - 12
ported. The IC is housed in a SOT-23 case. f bus = 100kHz
p u lse d o u b le r
T. Giesberts
The design of frequency and pulse doubling circuits is normally
026
that a quiescent trigger input is at a non-active level. But, because
the other trigger input is then at an active level for the duration of
complex and critical. The circuit in Figure 1a is a pleasant exception the pulse, the design ensures that the MMV is not retriggerable.
to this. It is based on a standard monostable multivibrator (MMV) If the width of the input pulse is shorter than the width of the out-
and produces an output pulse for both the leading and the trailing put pulse (determined by R 3-C 3), only one output pulse will be
edge of the input pulse. The duration of the output pulses is deter- produced, since the MMV can be retriggered only when the output
mined by the time constant R 3-C 3. pulse has terminated. It should therefore be ensured that the time
The TTL input signal is linked to both the + T (positive pulse) constants R 1-C 1 and R 2-C 2 are shorter than R 3-C 3 at all times.
and the –T (negative pulse) inputs IC 1a via capacitors C 1 and C 2 If a retriggerable version of the circuit is desired, the design
respectively. The two inputs cannot be active simultaneously. This shown in Figure 1b may be used. Again, the input signal is applied
means that at the leading edge of the input pulse, the negative to the two trigger inputs via capacitors. In this case, however, resis-
input must be high, and at the trailing edge, the positive input must tors R 1 and R 2 are linked directly to the supply voltage to make
be low. the inputs inactive. This results in the outputs being active as soon
Since IC 1a is a retriggerable MMV, each output pulse is as the duration of the input signal is shorter than that of the output
stretched by the time constant R 3-C3. The linking of both outputs pulse. No output pulses are produced then, of course.
with the relevant input via resistor R 1 and R 2 respectively ensures [994061]

p u ll-u p a c c e le r a t o r
5V
1
BU
025
LTC1694CS5
C1
IC1 S2
4
LTC1694 BU
100n 2 S1
5
BUS1 BUS2
5 4 NC
GN 3
SCL D
VC 2
SOT-23 C
SDA 1
994076 - 13
994076 - 11
K.S.M. Walraven The characteristic shows the difference of the leading edge
Systems like the SMBus or I 2C™ use a standard resistor to pull up obtained with a standard resistor and that resulting when the IC
the signal levels to the positive supply rail (normally 5 V). The bus is used.
goes low because an appliance connected to it pulls the signal to [994076]
zero via its open-collector output. The well-known problem is this
output can draw a much higher current than the pull-up resistor
can compensate. This results in a steep trailing edge, but a much
more gradually rising leading edge, whose transition in addition is
not linear but exponential. This adversely affects the duty factor
of the signals and also reduces the speed of the bus.
Linear Technology have available an IC (Type LTC1694) to
replace the traditional pull-up resistor which can produce a cur-
rent that is dependent on the changes in level taking place on the 1V/div.
bus. When that level rises, the IC gives 2.2 mA, but when it falls,
the current is only 275 µA.
Since the IC contains two circuits for replacing both pull-up
resistors, it is possible to detect when the bus is in the quiescent
mode (both pull-ups high). In this case, the current is reduced even
more: to 100 µA.
The IC is intended for an I 2C bus frequency of 100 kHz. The VCC = 5V
400 kHz and recently introduced 3.4 MHz versions are not sup- CLD = 200pF
994076 - 12
ported. The IC is housed in a SOT-23 case. f bus = 100kHz
p u lse d o u b le r
T. Giesberts
The design of frequency and pulse doubling circuits is normally
026
that a quiescent trigger input is at a non-active level. But, because
the other trigger input is then at an active level for the duration of
complex and critical. The circuit in Figure 1a is a pleasant exception the pulse, the design ensures that the MMV is not retriggerable.
to this. It is based on a standard monostable multivibrator (MMV) If the width of the input pulse is shorter than the width of the out-
and produces an output pulse for both the leading and the trailing put pulse (determined by R 3-C 3), only one output pulse will be
edge of the input pulse. The duration of the output pulses is deter- produced, since the MMV can be retriggered only when the output
mined by the time constant R 3-C 3. pulse has terminated. It should therefore be ensured that the time
The TTL input signal is linked to both the + T (positive pulse) constants R 1-C 1 and R 2-C 2 are shorter than R 3-C 3 at all times.
and the –T (negative pulse) inputs IC 1a via capacitors C 1 and C 2 If a retriggerable version of the circuit is desired, the design
respectively. The two inputs cannot be active simultaneously. This shown in Figure 1b may be used. Again, the input signal is applied
means that at the leading edge of the input pulse, the negative to the two trigger inputs via capacitors. In this case, however, resis-
input must be high, and at the trailing edge, the positive input must tors R 1 and R 2 are linked directly to the supply voltage to make
be low. the inputs inactive. This results in the outputs being active as soon
Since IC 1a is a retriggerable MMV, each output pulse is as the duration of the input signal is shorter than that of the output
stretched by the time constant R 3-C3. The linking of both outputs pulse. No output pulses are produced then, of course.
with the relevant input via resistor R 1 and R 2 respectively ensures [994061]

5...15V 5...15V
a b
R3 5...15V R3
100k
100k
R2
C3 C3
10k
1n 1n
C1 2 1 B C1 2 1 B
1n 1n
4 RCX CX 6 4 RCX CX 6
A A
≥1 ≥1
5 IC1a 7 5 IC1a 7
R A R A
C2 C2
1n 3 1n R1 3
10k
B B
5...15V 5...15V
R2 R3 x C3 R3 x C3
10k
R1
10k
5...15V 5...15V
14 15 14 15
C4 16 C4 16
≥1 ≥1
11 IC1b 9 IC1 11 IC1b 9 IC1
R 100n 8 R 100n 8
13 13
IC1 = 4538 IC1 = 4538
994061 - 11 994061 - 12
t h r e e -p h a se
sin e w a v e g e n e r a t o r
15V
A Burr-Brown application
027
The diagram shows how a three-phase sine wave oscillator can be
R1 built with a single Type UAF42 state-variable filter and some resis-
C1
tors and diodes. Three output nodes are available: high-pass out,
12k
1N914 10µ 25V band-pass out, and low-pass out. The signal at the band-pass and
Highpass Out Lowpass Out
low-pass out nodes is 90° and 180° out of phase, respectively, with
R2
A sin( ωt) A sin( ω t + 180°) that at the high-pass node. An on-chip auxiliary op amp is avail-
1k
able for use as a buffer or amplifier stage.

R F1 C EXT R F2 C EXT The frequency of oscillation is set with resistors R F 1 and R F 2
150k 150k according to
C3
R FB
Bandpass Out 10M
A sin( ω t + 90°)
100n f O SC = 1/2π R C,
IC1 where
12 13 8 7 14 1 5 10
50k
R = R F 1= R F 2
C1 C2 and
50k 1n 1n C= C 1 = C 2 = 1000 pF
6
2
50k
The maximum frequency of oscillation obtainable with the UAF42
UAF42 state-variable filter is 100 kH z. Distortion becomes a factor,
50k though, for frequencies above 10 kHz. For frequencies of oscilla-
3 8 7 11 4 9 tion below 100 Hz, the use of external capacitors is recommended.
These should be placed in parallel with the internal capacitors C1
R4
and C 2. This will reduce the requisite values of R F 1 and R F 2. The
external capacitors should preferably be NP0 ceramic or mica
1k
C4
1N914
types.
100n
To obtain the requisite output levels, resistors R 1–R 4 should
R3
C2 meet the following requirement:
12k
10µ 25V
R 1 /R 2 = R 3 /R 4 = (V O + V S )/(V O –0.15)–1
994049 - 11 15V
The values indicated in the diagram apply to a frequency of 1 kHz.

5...15V 5...15V
a b
R3 5...15V R3
100k
100k
R2
C3 C3
10k
1n 1n
C1 2 1 B C1 2 1 B
1n 1n
A A
≥1 ≥1
5 IC1a 7 5 IC1a 7
R A R A
C2 C2
1n 3 1n R1 3
10k
B B
5...15V 5...15V
R2 R3 x C3 R3 x C3
10k
R1
10k
5...15V 5...15V
14 15 14 15
C4 16 C4 16
≥1 ≥1
11 IC1b 9 IC1 11 IC1b 9 IC1
R 100n 8 R 100n 8
13 13
IC1 = 4538 IC1 = 4538
994061 - 11 994061 - 12
t h r e e -p h a se
sin e w a v e g e n e r a t o r
15V
027
The diagram shows how a three-phase sine wave oscillator can be
R1 built with a single Type UAF42 state-variable filter and some resis-
C1
tors and diodes. Three output nodes are available: high-pass out,
12k
1N914 10µ 25V band-pass out, and low-pass out. The signal at the band-pass and
Highpass Out Lowpass Out
low-pass out nodes is 90° and 180° out of phase, respectively, with
R2
A sin( ωt) A sin( ω t + 180°) that at the high-pass node. An on-chip auxiliary op amp is avail-
1k
able for use as a buffer or amplifier stage.

R F1 C EXT R F2 C EXT The frequency of oscillation is set with resistors R F 1 and R F 2
150k 150k according to
C3
R FB
Bandpass Out 10M
A sin( ω t + 90°)
100n f O SC = 1/2π R C,
IC1 where
12 13 8 7 14 1 5 10
50k
R = R F 1= R F 2
C1 C2 and
50k 1n 1n C= C 1 = C 2 = 1000 pF
6
2
50k
The maximum frequency of oscillation obtainable with the UAF42
UAF42 state-variable filter is 100 kH z. Distortion becomes a factor,
50k though, for frequencies above 10 kHz. For frequencies of oscilla-
3 8 7 11 4 9 tion below 100 Hz, the use of external capacitors is recommended.
These should be placed in parallel with the internal capacitors C1
R4
and C 2. This will reduce the requisite values of R F 1 and R F 2. The
external capacitors should preferably be NP0 ceramic or mica
1k
C4
1N914
types.
100n
To obtain the requisite output levels, resistors R 1–R 4 should
R3
C2 meet the following requirement:
12k
10µ 25V
R 1 /R 2 = R 3 /R 4 = (V O + V S )/(V O –0.15)–1
994049 - 11 15V
The values indicated in the diagram apply to a frequency of 1 kHz.

At this frequency,. the external capacitors may be omitted, since vided by coupling the output of the band-pass section to the input
the internal ones are sufficient. of the summing amplifier via resistor R FB. Suitable values for this
The actual output level may differ slightly from the calculated resistor are 10 MΩ for f> 1 kH z, 5 MΩ for f= 10–1000 Hz, and
one owing to non-ideal operation of diodes and op amps. It may 750 kΩ for f< 10 H z. Smaller values result in an increase in the
therefore be necessary to adapt the ratios R 1/R 2 and R 3/R 4 to output level and, consequently, distortion.
some extent. [994049]
Positive feedback necessary for the onset of oscillation is pro-
a d ju st a b le
p r e c isio n v o lt a g e so u r c e
C4 C1
15V
028
ous implementation of a bipolar voltage source would be to use a
bipolar voltage reference. However, a simpler solution is to use a
C3 100n 10µ 25V single voltage reference and a precision unity-gain inverting ampli-
100n
fier. If a precision difference amplifier is used for the unity-gain
IC2 7
inverting amplifier, the circuit requires just two chips and a poten-
IC1 2 tiometer.
INA105KP In the present circuit a Type INA105 differential amplifier is
Difference Amp
R1 R2
used as the unity-gain amplifier. A potentiometer is connected
6 2 5
10V between the input and ground. The slider of the potentiometer is
REF102
25k 25k connected to the non-inverting input of the unity-gain amplifier.
U OUT
AP (The non-inverting input of a unity-gain amplifier is normally con-
6
3
R3 nected to ground.) With the slider at the bottom of the poten-
4 25k +10V...–10V tiometer, the circuit is a normal precision unity-gain inverting
1
R4 amplifier with a gain of –1.0 V/V ± 0.01% max. With the slider at
10k 25k
the top of the potentiometer, the circuit is a normal precision volt-
lin.
age follower with a gain of + 1.0 V/V ± 0.001% max. With the
4
slider at the centre of its travel, there is equal positive and nega-
tive gain for a net gain of 0 V/V. The accuracy between –1.0 V/V
C5 C2 and + 1.0 V/V is normally limited by the accuracy of the poten-
tiometer. Precision 10-turn potentiometers are available with
100n 10µ 25V 0.01% linearity.
15V
994050 - 11
The –1.0 V/V to + 1.0 V/V linear gain control amplifier has
many applications. With the addition of a precision + 10.0 V ref-
erence, it becomes a –10 V to + 10 V adjustable precision voltage
A Burr-Brown application source.
Many applications require a precision voltage source which can be [994050]
adjusted through zero to both positive and negative output volt-
age. An example is a bipolar power supply. Perhaps the most obvi-
iso la t in g t r a n sf o r m e r f o r S /P D IF
75Ω
Tr1
029
75Ω
coax 75Ω
6:6
TN13/7.5/5-3E25 994043 - 11
because its insulation is not capable of handling this. It is intended

T. Giesberts to prevent earth loops arising or undesired signals being applied
WAR NING: do not use this transformer for mains isolating, to the input of an appliance. For instance, a tape recorder is to be

a d ju st a b le
C4 C1
15V
028
100n
IC2 7
IC1 2 tiometer.
Difference Amp
R1 R2
6 2 5
REF102
U OUT
6
3
1
10k 25k
lin.
4
15V
994050 - 11
75Ω
Tr1
029
75Ω
coax 75Ω
6:6
TN13/7.5/5-3E25 994043 - 11


a d ju st a b le
C4 C1
15V
028
100n
IC2 7
IC1 2 tiometer.
Difference Amp
R1 R2
6 2 5
REF102
U OUT
6
3
1
10k 25k
lin.
4
15V
994050 - 11
75Ω
Tr1
029
75Ω
coax 75Ω
6:6
TN13/7.5/5-3E25 994043 - 11


linked to a sound card in a computer which has an S/PDIF elled copper wire, are laid on opposite sides of the toroid. The
(Sony/Philips Digital Interface Format); the computer is not con- windings should be covered with insulating tape. If heavy-duty,
nected to protective earth (which in the UK is next to impossible insulated wire is used for the windings, they can be laid over one
and certainly not advisable). Owing to the mains filter, half the another, which improves the coupling factor. But even with the
mains voltage will be present on the enclosure and thus on the first method, the bandwidth ranged from 50 kHz to 17 MHz, which
input earth. The linking of this potential to the tape recorder is is more than adequate for an S/PDIF link.
prevented by the isolating transformer in the diagram. Place the transformer directly at the output of the signal source.
To ensure a good bandwidth, the coupling factor of the trans- The reason for this is that the input and output impedances of the
former must be good (low stray self-inductance), so that a core transformer are not exactly 75 Ω. With the transformer directly at
with a high µτ is needed. The prototype uses a Philips Type the source and provided the coaxial cable at the computer end is ter-
TN13/7.5/5-3E25, which has a µτ of 4500. The primary and sec- minated correctly into 75 Ω, all will be well.
ondary windings, each consisting of six turns of 0.5 mm dia. enam- [994043]
sw it c h in g r e g u la t o r
LT1108CS8 MURS120T3
D1
84V
030
stages to the requisite output level determined by potential divider
R 2-R 3 according to the equation
I LIM 1 8 FB
V IN 2 7 SET
Uout = 1.245(R 2+ R 3)/R 3.
SW1 3 6 A0
D2
SW2 4 5 GND With resistor values specified in the diagram, the output voltage is
C2
84 V. Resistor R 3 may be replaced by a fixed resistor and a 10 kΩ
100n
D3
preset.
100V
Regulator IC 1 applies the direct voltage at the input to induc-
2...12V L1 C3 C4
tor L 1. Internally, pin 3 (SW1) is periodically short-circuited to
100µH
100n 470n pin 4 (SW2= earth). When SW1 is opened, a counter-e.m.f. pulse
R1 100V 200V
100Ω
is generated across L1, which charges capacitor C 3 via diode D 3.

2 1
The voltage pulse is also applied to C 2. The voltage across C 3 is
V IN I LIM
R2 applied to C 4 via D 2 together with that across C 2 via D 1. The
2M2
7 3
SET SW1 diodes used must be fast types with a high reverse voltage rating. In
C1
IC1 the prototype, Motorola Type MURS120T3 diodes were used.
100µ 6
LT1108CS8 The current through switches SW1 and SW2 is determined by
8
16V A0 FB
R3 resistor R 1. With a resistance of 100 Ω as specified, it is about
SW2
700 mA. The peak current must not exceed 1.5 A.
33k
5 4
CAUTION The generated voltages may be lethal, so care must
be taken in handling the circuit. Also, after the input voltage has
D1..D3 = MURS120T3 (Motorola) 994032 - 11 been switched off, capacitor C4 may retain a lethal charge for some
time.
Detailed information on Linear Technology’s regulator IC
G. Kleine Type LT1108 from: http://www.linear-tech.com
Potentials of up to more than 100 V may be generated by a switch- [994032]
ing regulator IC complemented by a cascode circuit of diodes and
reservoir capacitors. The regulator pumps the voltage up in two
EEP R O M p r o t e c t io n
in A V R c o n t r o lle r s
H. Bonekamp
AVR controllers have the unfortunate property of their data EEP-
031
This requirement is met by the circuit in the diagram, which
draws a low enough current to enable it being powered by a bat-
ROM being affected when the supply voltage drops below a cer- tery. The circuit may be split into a detector, T 1, and an amplifier,
tain level, which can, of course, be prevented by making the reset T 2–T 3.
low in good time to disable the processor. U nfortunately, this The trip voltage of the detector is determined by the values of
requires a circuit for monitoring the supply voltage and for taking R 1 and R 2. Normally, the transistor conducts, but as soon as the
the requisite action automatically when needed. supply voltage drops below the trip level, it is cut off. The output of

LT1108CS8 MURS120T3
D1
84V
030
I LIM 1 8 FB
V IN 2 7 SET
Uout = 1.245(R 2+ R 3)/R 3.
SW1 3 6 A0
D2
C2
100n
D3
preset.
100V
2...12V L1 C3 C4
100µH
R1 100V 200V
100Ω

2 1
V IN I LIM
2M2
7 3
C1
100µ 6
8
16V A0 FB
SW2
33k
5 4
time.
H. Bonekamp
031

LT1108CS8 MURS120T3
D1
84V
030
I LIM 1 8 FB
V IN 2 7 SET
Uout = 1.245(R 2+ R 3)/R 3.
SW1 3 6 A0
D2
C2
100n
D3
preset.
100V
2...12V L1 C3 C4
100µH
R1 100V 200V
100Ω

2 1
V IN I LIM
2M2
7 3
C1
100µ 6
8
16V A0 FB
SW2
33k
5 4
time.
H. Bonekamp
031

T 1 is applied to a low-power amplifier.
During normal operation, transistor T 3 is off, so that R 5 func-
tions as pull-up resistor to retain the R ST input of the AVR
processor high. When the detector goes off, T 3 is switched on and
5V
the RST input goes low, a process that is enhanced by transistor R1 R4 R5
T 2 being switched on, whereupon R 3 is shorted out. The resulting
10M
3M3
47k
hysteresis requires the supply voltage to exceed the trip voltage
before this situation can change. A manual reset is possible at all BC
ISP VCC
times with witch S1. R3 T2 557B

As stated earlier, the trip voltage is determined by the values AVR
10M
RST
of R 1 and R 2 (and, to some degree, the base-emitter potential of T1 AT90S.....
T3
– about 540 mV), and the tolerance of these resistors should there-
fore be 1% . If the trip voltage needs to be altered, it is best to T1
retain the value of R 1 at 10 MΩ and change the value of R 2 BC GND
according to 547B
R2 S1
C3 C1 C2
1M2
R 2 = 0.54R 1 /(U b –0.54) , BC
100n 547B 100n
100n RESET
where R 2 is in ohms and Ub is the supply voltage.
994083 - 11
The hysteresis is determined by the value of R 4: the smaller this
is, the larger the hysteresis. The specified value of 3.3 MΩ is fine
for most cases, but some experimentation does no harm.
[994083]
c o d e lo c k
G. Vanderplancke
The combination of a couple of thyristors, key switches and a relay
as shown in the diagram forms a suitable, reasonably tamper-proof
032
this happens, D 2 lights briefly. The lock can then be opened only by
starting with pressing S4 again. This applies also if S5 is not pressed
within the initial 15 seconds.
code lock for use in, say, a car. To open the lock,a number of keys The lock is provided with a rapid access facility. In the actuated
must be pressed in a prescribed sequence to energize a relay, state, capacitor C 3 is charged via TH R 3. When the ignition is
whereupon the battery voltage is applied to the ignition switch. switched off for only a brief period (for instance, when the driver
The first key to be pressed is S4, whereupon capacitor C 1 is stops to post a letter [sic]), the capacitor is discharged only slowly,
charged via resistor R 1. The charge on this capacitor ensures that so that THR 3 may be switched on again by pressing S8. Since this
transistor T 1 is on for about 15 seconds, during which relay Re 1 is makes the lock less secure, the rapid access facility may be disabled
energized. H owever, within these 15 seconds, key S5 must be by pressing S9. Capacitor C 3 is then discharged rapidly and D 4
pressed to switch on thyristor THR 1. Then S6 must be pressed to lights briefly.
switch on THR 2. Finally, S7 is to be pressed to switch on THR 3. The circuit draws a quiescent current of about 12 mA, which
When that is done, relay Re 2 is energized, and the lock is open. rises to some 80 mA when both relays are actuated.
If within the initial 15 seconds the wrong key is pressed, C 1 is [994017]
discharged, whereupon T 1 is cut off and Re 1 is deactuated. When
D7 12V
C4 1N4001
Th3
220µ 25V
D1 Re1
S4 BRX46
D3 K1
D5 Re2
1N4001
R1 Th2 1N4148
S5
100Ω
BRX46
1N4001
T1 R5 R7 R9 D4
R2 R3
100k
100k
100k
1k 100k Th1
R4 R11
S6 S7 S8 R10
BC547B
1k
1k
1k
S1 S2 S3 BRX46
D2 R6 R8 D6
C1 C2 C3 S9
1k
1k
47µ 100µ 10µ

25V 25V 25V
994017 - 11

T 1 is applied to a low-power amplifier.
During normal operation, transistor T 3 is off, so that R 5 func-
tions as pull-up resistor to retain the R ST input of the AVR
processor high. When the detector goes off, T 3 is switched on and
5V
the RST input goes low, a process that is enhanced by transistor R1 R4 R5
T 2 being switched on, whereupon R 3 is shorted out. The resulting
10M
3M3
47k
hysteresis requires the supply voltage to exceed the trip voltage
before this situation can change. A manual reset is possible at all BC
ISP VCC
times with witch S1. R3 T2 557B

As stated earlier, the trip voltage is determined by the values AVR
10M
RST
of R 1 and R 2 (and, to some degree, the base-emitter potential of T1 AT90S.....
T3
– about 540 mV), and the tolerance of these resistors should there-
fore be 1% . If the trip voltage needs to be altered, it is best to T1
retain the value of R 1 at 10 MΩ and change the value of R 2 BC GND
according to 547B
R2 S1
C3 C1 C2
1M2
R 2 = 0.54R 1 /(U b –0.54) , BC
100n 547B 100n
100n RESET
where R 2 is in ohms and Ub is the supply voltage.
994083 - 11
The hysteresis is determined by the value of R 4: the smaller this
is, the larger the hysteresis. The specified value of 3.3 MΩ is fine
for most cases, but some experimentation does no harm.
[994083]
c o d e lo c k
G. Vanderplancke
The combination of a couple of thyristors, key switches and a relay
as shown in the diagram forms a suitable, reasonably tamper-proof
032
this happens, D 2 lights briefly. The lock can then be opened only by
starting with pressing S4 again. This applies also if S5 is not pressed
within the initial 15 seconds.
code lock for use in, say, a car. To open the lock,a number of keys The lock is provided with a rapid access facility. In the actuated
must be pressed in a prescribed sequence to energize a relay, state, capacitor C 3 is charged via TH R 3. When the ignition is
whereupon the battery voltage is applied to the ignition switch. switched off for only a brief period (for instance, when the driver
The first key to be pressed is S4, whereupon capacitor C 1 is stops to post a letter [sic]), the capacitor is discharged only slowly,
charged via resistor R 1. The charge on this capacitor ensures that so that THR 3 may be switched on again by pressing S8. Since this
transistor T 1 is on for about 15 seconds, during which relay Re 1 is makes the lock less secure, the rapid access facility may be disabled
energized. H owever, within these 15 seconds, key S5 must be by pressing S9. Capacitor C 3 is then discharged rapidly and D 4
pressed to switch on thyristor THR 1. Then S6 must be pressed to lights briefly.
switch on THR 2. Finally, S7 is to be pressed to switch on THR 3. The circuit draws a quiescent current of about 12 mA, which
When that is done, relay Re 2 is energized, and the lock is open. rises to some 80 mA when both relays are actuated.
If within the initial 15 seconds the wrong key is pressed, C 1 is [994017]
discharged, whereupon T 1 is cut off and Re 1 is deactuated. When
D7 12V
C4 1N4001
Th3
220µ 25V
D1 Re1
S4 BRX46
D3 K1
D5 Re2
1N4001
R1 Th2 1N4148
S5
100Ω
BRX46
1N4001
T1 R5 R7 R9 D4
R2 R3
100k
100k
100k
1k 100k Th1
R4 R11
S6 S7 S8 R10
BC547B
1k
1k
1k
S1 S2 S3 BRX46
D2 R6 R8 D6
C1 C2 C3 S9
1k
1k
47µ 100µ 10µ

25V 25V 25V
994017 - 11

v o lt a g e b o o st in g w it h in v e r t e r s
1 4 U in 2
U in
(+2...+6V)
033
14 100k
100p
IC1 = 4069 IC1c IC1b IC1a 14
IC5
IC2 ... = 74HCU04 100µ
7
1 1 1 IC2
3 U in
7
14
10µ 10µ
IC4 U in
100µ
7
U in 2 U in 14
14
IC1 IC3
7 100µ
14 7
14
IC1 10µ U in
7 IC3
100µ
7
14
10µ
U in IC1 = 4069 IC4
IC2 ... = 74HCU04 100µ
(+2...+6V) 7
2 U in
100k
100p
10µ
IC1c IC1b IC1a 14
14
10µ
1 1 1 IC2
IC5
7 100µ
7
3 U in
994025 - 11 994025 - 12
G. Kleine 3V IN appears, the efficiency is about 90% . However, it drops to

A ‘tree’ of inverters is highly suitable for boosting a voltage. That around 75% when the current is increased to 15 mA.
in the diagram provides voltages that are whole multiples of the The circuit can also be arranged as a voltage-inverting booster.
input voltage by clock-driven charging of capacitors. The voltage The ICs should then be arranged as shown in Figure 2.
across the capacitors is added stage by stage to the input voltage. [994025]
Here, integrated circuits, IC 2–IC 7, each containing six inverters
are used. In each IC, except IC 2, one of the inverters is connected
in series with the parallel combination of the other five.
Circuit IC 1 is configured as a 50 H z oscillator that controls
1
inverting driver IC 2. A 10 µF capacitor interlinks the outputs of
1
IC2 and IC3. The bidirectional properties of the MOSFET output
1 IC3, IC4, IC5.....
of IC 3 ensure that the voltage across supply terminals 7 and 14 is
1
identical to the input voltage. The increased voltage, equal to 2VIN, 14
1
14
is filtered by a 100 µF capacitor. IC2 1 1

The outputs of IC 3 and IC 4 are also interlinked by a 10 µF 7 1 7
capacitor, and a similar process as just described takes place. This 1
continues up to the last IC on the tree. 1
The efficiency of the booster increases when the clock fre- 1
quency is lower than 50 Hz, but then the available output current 1
994025 - 13
drops. If a current of 5 mA is drawn from the terminal at which

c r y st a l f r e q u e n c y m u lt ip lie r
X1
IC1
C1
C2
+
034
C3
0
JP1
JP2
Components list Semiconductors:

IC1 = ICS501M
Capacitors:
C1,C2 = 33 p cer. Miscellaneous:
C3 = 100 n cer. X1 = crystal approx.
5–27 MHz
JP1,JP2 = 3-way jumper
or seventh of the operating frequency. If, however, an overtone

crystal is used in an oscillator designed for operation on the fun-
damental, it is doubtful whether the wanted frequency will be gen-
erated. In most such cases, there are difficulties that make it nec-
essary for the oscillator circuit to be modified.
One practical solution for such problems is offered by the circuit
H. Bonekamp in the diagram, which enables frequencies up to 160 MHz to be
Crystals for operation above 20 MHz are invariably cut to an over- generated with the use of a fundamental-frequency crystal. The
tone (harmonic), which may be the third, fifth, or seventh. In other output signal is virtually free of any jitter.
words, the fundamental frequency of such a crystal is a third, fifth The circuit makes use of an IC that contains not only an oscil-
lator but also a phase-locked
loop (PLL) controlled fre-
5V
JP1 JP2 X1 min quency multiplier. The associ-
0 0 4x
ated R OM stores nine differ-
C3 0 x 5.3125 x 20 MHz ent multipliers, which may be
0 1 5x selected by appropriate placing
JP1
100n x 0 6.25 x 4 MHz of the jumpers in JP 1 and JP 2
7 x x 2x as shown in the table. A 0 in
OE x 1 3.125 x 8 MHz the table indicates that the
2 1 0 6x
6 IC1 jumper is linked to earth; a 1,
S0 1 x 3x
JP2 4 CLK
5
1 1 8x
that it is linked to the + 5 V
S1
ICS501M 3
line; and a × that it should be
ICS501M left open.
X1 X2 The circuit may conve-
1 X1 8
X1/ICLK 1 8 X2 niently be built on the printed-
2 7 OE
circuit board shown, which is
C2 C1
not available ready made.
3 6 S0
33p 33p
The circuit draws a current
S1 4 5 CLK of about 20 mA.
12.288MHz
994067 - 11 [994067]
sin g le - su p p ly p r e c isio n r e c t if ie r
An Analog Devices application
The precision full-wave rectifier circuit shown in the diagram
035
d.c. to 2 kHz. The single-supply operation at very low quiescent
current drain makes the circuit particularly useful for battery-pow-
ered equipment.
accepts a.c. inputs of up to ± 3 V, yet operates from a single + 5 V When the input voltage, V IN is positive, A 1 drives T 1 and D 2 to
supply voltage. The quiescent current is only 320 µA. Rectifier gain make output voltage V O equal to the input voltage. The output
is unity, with the gain accuracy almost entirely dependent on the swing at V O is about three diode drops below the supply voltage,
match between the two resistors 2R 1. The frequency range is about so that the peak output voltage is around + 3 V. The output of

c r y st a l f r e q u e n c y m u lt ip lie r
X1
IC1
C1
C2
+
034
C3
0
JP1
JP2
Components list Semiconductors:

IC1 = ICS501M
Capacitors:
C1,C2 = 33 p cer. Miscellaneous:
C3 = 100 n cer. X1 = crystal approx.
5–27 MHz
JP1,JP2 = 3-way jumper
or seventh of the operating frequency. If, however, an overtone

crystal is used in an oscillator designed for operation on the fun-
damental, it is doubtful whether the wanted frequency will be gen-
erated. In most such cases, there are difficulties that make it nec-
essary for the oscillator circuit to be modified.
One practical solution for such problems is offered by the circuit
H. Bonekamp in the diagram, which enables frequencies up to 160 MHz to be
Crystals for operation above 20 MHz are invariably cut to an over- generated with the use of a fundamental-frequency crystal. The
tone (harmonic), which may be the third, fifth, or seventh. In other output signal is virtually free of any jitter.
words, the fundamental frequency of such a crystal is a third, fifth The circuit makes use of an IC that contains not only an oscil-
lator but also a phase-locked
loop (PLL) controlled fre-
5V
JP1 JP2 X1 min quency multiplier. The associ-
0 0 4x
ated R OM stores nine differ-
C3 0 x 5.3125 x 20 MHz ent multipliers, which may be
0 1 5x selected by appropriate placing
JP1
100n x 0 6.25 x 4 MHz of the jumpers in JP 1 and JP 2
7 x x 2x as shown in the table. A 0 in
OE x 1 3.125 x 8 MHz the table indicates that the
2 1 0 6x
6 IC1 jumper is linked to earth; a 1,
S0 1 x 3x
JP2 4 CLK
5
1 1 8x
that it is linked to the + 5 V
S1
ICS501M 3
line; and a × that it should be
ICS501M left open.
X1 X2 The circuit may conve-
1 X1 8
X1/ICLK 1 8 X2 niently be built on the printed-
2 7 OE
circuit board shown, which is
C2 C1
not available ready made.
3 6 S0
33p 33p
The circuit draws a current
S1 4 5 CLK of about 20 mA.
12.288MHz
994067 - 11 [994067]
sin g le - su p p ly p r e c isio n r e c t if ie r
The precision full-wave rectifier circuit shown in the diagram
035
d.c. to 2 kHz. The single-supply operation at very low quiescent
current drain makes the circuit particularly useful for battery-pow-
ered equipment.
accepts a.c. inputs of up to ± 3 V, yet operates from a single + 5 V When the input voltage, V IN is positive, A 1 drives T 1 and D 2 to
supply voltage. The quiescent current is only 320 µA. Rectifier gain make output voltage V O equal to the input voltage. The output
is unity, with the gain accuracy almost entirely dependent on the swing at V O is about three diode drops below the supply voltage,
match between the two resistors 2R 1. The frequency range is about so that the peak output voltage is around + 3 V. The output of

amplifier A 2 goes to negative saturation, which is about + 0.8 V; 5V 5V
T 2 is then reverse-biased and off.
When the input voltage is negative, the output of A 1 goes into
IC1
negative saturation so that T 1 is switched off. Amplifier A 2 then R1
2 7 T1 T2
100k
serves as a unity-gain inverter. Since VO is equal to VIN in magnitude 6
R1 OP22
but opposite in polarity, V O will be equal to the absolute value of 100k
3
V IN. 4
2x
8 R 2N2222
The quiescent current is determined by the the set current, ISET. D1
SET
390k
With a 5 V supply, the set current is 3.7/R SET. Slew rate and band-
width vary directly with the set current. 1N4148 D2
Amplifier A 1 essentially operates with unity-gain feedback , UIN t UO t

1N4148
while A 2 operates with a feedback gain of 0.5. The closed-loop 2R1 2R1
gain-bandwidth is therefore made equal, and the frequency 200k 200k

1% 5V 1%
response symmetrical, by making the set current of A2 twice that of
A 1. Amplifier A 2 has a set current of 3.7/2×105, that is, 18.5 µA,
and amplifier A 1 has a set current of 3.7/39×104, which is 9.5 µA. IC2
2 7
These set currents result in quiescent currents of 100 µA for ampli-
6
fier A 1 and 220 µA for amplifier A 2. 3
OP22
RL
The input stage of the amplifiers is a p-n-p Darlington, so that 4
a negative input voltage can forward-bias the collector-base junc- R1 8 R
SET
tion of the input transistor. This potential problem is prevented by
100k
200k
adding resistor R 1 and diode D 1 at the A 1 input to limit the nega-
tive input voltage.
[994048] 994048 - 11
d u a l- o u t p u t , lo w -p o w e r
t h e r m o st a t
IC1 R4
10V max.
R5
036
can switch up to 5 mA (400 mV drop at 50 µA). If it is required to
switch a higher current, a buffer stage is needed at the output. The
outputs are enabled when the values set with R 1, R 2, and R 3 are
100k
100k
VREF
exceeded—see the timing diagram. Resistors R 4 and R 5 are pull-
1 1.250V
REFERENCE
8 up components.
R3
70°C The output voltage of the temperature sensor is 6.2 mV °C –1
9k09
LM56 plus a fixed offset voltage of 395 mV. When the component values
V T2
OUT1 of potential divider R 1-R 2-R 3 are calculated, assume a load cur-
2 7
R2
50°C rent of 50 µA for VREF. This means that the total value of the three
resistors is about 27 kΩ. If great accuracy is wanted, the bias current
2k67
V T1 of the comparators should be taken into account, although the typ-

OUT2
R1
3 6 ical value of these is only 150 nA, so that they do not make much
difference in practice. With values as specified in the circuit dia-
15k4
6.2mV/°C + 395mV
gram, switching takes place at 50 °C and 70 °C.
GND
4 5
Capacitor C2 serves to decouple any interference. If such inter-
TEMPERATURE
VTEMP
SENSOR
C1 C2
V TEMP
100n 100n
V T2
994041 - 11
V T1
A National Semiconductor application

The LM56 from National Semiconductor is an accurate, dual-out- OUT2
put, low-power thermostat contained in an 8-pin SMD case. It con-
tains a 1.25 V bandgap voltage reference, two comparators with OUT1
5 °C hysteresis and a temperature sensor. The output voltage of V TEMP

the sensor is internally linked to the comparators. The supply volt- V T2
age may lie in the range 2.7–10 V.
There are several variants: the LM56CIM has an accuracy of V T1
± 4 °C and the LM56BIM ± 3 °C, both over the temperature range

–40 °C to + 125 °C. Typical applications are temperature monitor-
ing in a variety of system, protection against low or high tempera- OUT1
tures, and control of alarm systems or fans.

OUT2
Outputs OUT1 and OUT2 are open-collector outputs, which 994041 - 12

amplifier A 2 goes to negative saturation, which is about + 0.8 V; 5V 5V
T 2 is then reverse-biased and off.
When the input voltage is negative, the output of A 1 goes into
IC1
negative saturation so that T 1 is switched off. Amplifier A 2 then R1
2 7 T1 T2
100k
serves as a unity-gain inverter. Since VO is equal to VIN in magnitude 6
R1 OP22
but opposite in polarity, V O will be equal to the absolute value of 100k
3
V IN. 4
2x
8 R 2N2222
The quiescent current is determined by the the set current, ISET. D1
SET
390k
With a 5 V supply, the set current is 3.7/R SET. Slew rate and band-
width vary directly with the set current. 1N4148 D2
Amplifier A 1 essentially operates with unity-gain feedback , UIN t UO t

1N4148
while A 2 operates with a feedback gain of 0.5. The closed-loop 2R1 2R1
gain-bandwidth is therefore made equal, and the frequency 200k 200k

1% 5V 1%
response symmetrical, by making the set current of A2 twice that of
A 1. Amplifier A 2 has a set current of 3.7/2×105, that is, 18.5 µA,
and amplifier A 1 has a set current of 3.7/39×104, which is 9.5 µA. IC2
2 7
These set currents result in quiescent currents of 100 µA for ampli-
6
fier A 1 and 220 µA for amplifier A 2. 3
OP22
RL
The input stage of the amplifiers is a p-n-p Darlington, so that 4
a negative input voltage can forward-bias the collector-base junc- R1 8 R
SET
tion of the input transistor. This potential problem is prevented by
100k
200k
adding resistor R 1 and diode D 1 at the A 1 input to limit the nega-
tive input voltage.
[994048] 994048 - 11
d u a l- o u t p u t , lo w -p o w e r
t h e r m o st a t
IC1 R4
10V max.
R5
036
can switch up to 5 mA (400 mV drop at 50 µA). If it is required to
switch a higher current, a buffer stage is needed at the output. The
outputs are enabled when the values set with R 1, R 2, and R 3 are
100k
100k
VREF
exceeded—see the timing diagram. Resistors R 4 and R 5 are pull-
1 1.250V
REFERENCE
8 up components.
R3
70°C The output voltage of the temperature sensor is 6.2 mV °C –1
9k09
LM56 plus a fixed offset voltage of 395 mV. When the component values
V T2
OUT1 of potential divider R 1-R 2-R 3 are calculated, assume a load cur-
2 7
R2
50°C rent of 50 µA for VREF. This means that the total value of the three
resistors is about 27 kΩ. If great accuracy is wanted, the bias current
2k67
V T1 of the comparators should be taken into account, although the typ-

OUT2
R1
3 6 ical value of these is only 150 nA, so that they do not make much
difference in practice. With values as specified in the circuit dia-
15k4
6.2mV/°C + 395mV
gram, switching takes place at 50 °C and 70 °C.
GND
4 5
Capacitor C2 serves to decouple any interference. If such inter-
TEMPERATURE
VTEMP
SENSOR
C1 C2
V TEMP
100n 100n
V T2
994041 - 11
V T1
A National Semiconductor application

The LM56 from National Semiconductor is an accurate, dual-out- OUT2
put, low-power thermostat contained in an 8-pin SMD case. It con-
tains a 1.25 V bandgap voltage reference, two comparators with OUT1
5 °C hysteresis and a temperature sensor. The output voltage of V TEMP

the sensor is internally linked to the comparators. The supply volt- V T2
age may lie in the range 2.7–10 V.
There are several variants: the LM56CIM has an accuracy of V T1
± 4 °C and the LM56BIM ± 3 °C, both over the temperature range

–40 °C to + 125 °C. Typical applications are temperature monitor-
ing in a variety of system, protection against low or high tempera- OUT1
tures, and control of alarm systems or fans.

OUT2
Outputs OUT1 and OUT2 are open-collector outputs, which 994041 - 12

ference persists, the value of the capacitor may be increased to potential divider, will not exceed 400 µA. This makes the IC par-
1 µF without any adverse effect on the speed of reaction. ticularly useful for systems operating from 3 V or 5 V battery
The LM56 draws a current of not more than 230 µA, which packs.
means that the total current drain, including the current through the [994041]
t h e r m o st a t I
2V7...5V5
MAX6501
037
VC C
100n
OUT 5
4 OUT
1
Hyst. = 10°C IC1 TTH
3 5 MAX650X TEMP
HYST OUT
Hyst. = 2°C 1 5
MAX650X
2
3 4 VC C
1 2
MAX6502
OUT 5 OUT
TTH
TEMP
G. Kleine
MAX6503
The MAX6501–MAX6504 integrated circuits contain a thermo- VC C
stat with fixed temperature thresholds. Available are thresholds OUT 5
of –15 °C, + 5 °C, + 45 °C, + 55 °C, + 65 °C, + 75 °C, + 85 °C, and OUT
+ 95 °C. The MAX6501 and MAX6502 are for use over the tem-
TTH
perature range + 35 °C to + 115 °C, while the MAX6503 and TEMP
MAX6504 can be programmed from –45 °C to + 15 °C.
The tiny circuit, terminated in a 5-pin SOT-23-SMD case is ide-
ally suited for building into an existing appliance. The supply volt- MAX6504 VC C
age may be 2.7–5.5 V. The HYST input allows a hysteresis of 2 °C

OUT
(HYST= GND) or 10 °C (HYST= V CC) to be selected. OUT 5
The difference between the four ICs is only in their output con-
TTH
figuration. The MAX6501 and MAX6503 have open-drain out- TEMP
puts that need a pull-up resistor, whereas the MAX6502 and 994037 - 11
MAX6504 have a push-pull output that can gate GND or V CC. At

high temperatures, the MAX6501 and MAX6504 gate to ground,
whereas the other two link the output to V CC.
Further information about these useful circuits may be had
from http://www.maxim-ic.com
[994037]
p o la r it y p r o t e c t io n
G. Kleine
In many cases, the battery or batteries in electronic equipment may
be inserted with incorrect polarity. It is, therefore, advisable to use
038
The use of a MOSFET, p-channel or n-channel, as the case may
be, ensures that when the polarity is correct, the battery voltage is
applied to the load without any loss. For good efficiency, it is best
polarity protection such as shown in the diagrams. It should be to use an n-channel MOSFET, although this has the disadvantage
noted that although a Schottky diode may be used, this causes a of having to be inserted in the negative supply line. In cases where
voltage drop of a few hundred millivolts, which in the case of a this is impossible or impractical, a p-channel device must be used.
3 V or 1.5 V battery supply is too much. The protection in the dia- In the choice of MOSFET, it must be borne in mind that the
grams does not cause any reduction in the supply voltage. drain–source breakdown voltage, V(BR)DSS, must be larger than

2V7...5V5
MAX6501
037
VC C
100n
OUT 5
4 OUT
1
3 5 MAX650X TEMP
HYST OUT
Hyst. = 2°C 1 5
MAX650X
2
3 4 VC C
1 2
MAX6502
OUT 5 OUT
TTH
TEMP
G. Kleine
MAX6503
TTH

OUT
TTH

[994037]
G. Kleine
038

2V7...5V5
MAX6501
037
VC C
100n
OUT 5
4 OUT
1
3 5 MAX650X TEMP
HYST OUT
Hyst. = 2°C 1 5
MAX650X
2
3 4 VC C
1 2
MAX6502
OUT 5 OUT
TTH
TEMP
G. Kleine
MAX6503
TTH

OUT
TTH

[994037]
G. Kleine
038

ensure that, provided the polar-
P-MOSFET
D S
ity is correct, the transistor can
RL transfer the battery voltage to
RL the load. Suitable types are cer-
G U BAT tain H EXFETs from Interna-
U BAT tional Rectifier. In the case of
G
n-channel types, the IRF7401 in
D S an SO-8 case, the IRF7601 in a
Micro-8 case, and the IR LML
N-MOSFET
in a Micro-3 case are suitable.
994034 - 11 994034 - 12 Types suitable for p-channel
operation are the IR F7404 in
an SO-8 case, the IRF7604 in a
the battery voltage to ensure that the transistor survives an incor- Micro-8 case, and the IRML6302 in a Micro-3 case.
rectly connected battery. At the same time, the gate threshold volt- Data sheets are available at: http://www.irf.com
age, VGS(th) must be small compared with the battery voltage to [994034]
m o d if ie d m a in s sw it c h
F1
S0602MH
039
a larger load than it was designed for. Normally, a relay is used for
these situations, but this has the disadvantage of needing an auxiliary
voltage for operating the relay.
K1 2A T K2
Th1 The diagram shows that the wanted aim can also be achieved
by two thyristors instead of a relay, which has the advantage of not
230V 230V
S1 requiring an auxiliary supply. The arrangement depends on the
leakage current of one thyristor firing the other. It is important
Th2
that the thyristors are sensitive types, otherwise there is a risk that
the setup does not work. The thyristors used in the prototype are
Type S0602MH from SGS-Thomson. These fire at an I GT as low as
S0602MH 994021 - 11 200 µA and can switch currents of up to 3.8 A. For safety’s sake,
the fuse is rated at 2 A (slow). It hardly needs mentioning that the
switch must be a Class II approved type.
H. Bonekamp [994021]
It sometimes happens that it is necessary for the contacts of a
mains switch to be isolated or for the switch to be able to handle
slo w e d - d o w n f a n
K.S.M. Walraven
If, like many other people, you
have ever been annoyed by the
Rv
Z = U2/P,
040
noise of, say, the extractor fan in where P is the rating of the fan, and U is the working voltage, nor-
your bathroom, here’s a tip that M mally the mains voltage. If, for instance, the rating of the fan is
may quieten things down a bit. 33 W, and the mains voltage is 230 V, its impedance is 1600 Ω, give
The fans in bathrooms and or take an ohm.
cooker hoods are normally 994004-11 The series resistor should have a value of about 1/3 of this
small ones that rotate at high value, that is, 470 Ω or 560 Ω. Since it will have to dissipate about
speed (but note that many 10 W, it is advisable to use two 1 kΩ resistors, rated at 10 W, in par-
cooker hoods have a speed con- allel. In view of the heat produced in them, it is advisable not to
trol). The idea is to displace many cubic feet of air at little cost. solder them to the motor connections, but to make the connec-
Fortunately, the speed of these fans can be lowered fairly sim- tions via a three-way terminal block.
ply by placing a resistor in series with the motor. The impedance, [994004]
Z , of the fan is calculated from

P-MOSFET
D S
G
N-MOSFET
F1
S0602MH
039
K1 2A T K2
230V 230V
Th2
K.S.M. Walraven
Rv
Z = U2/P,
040

P-MOSFET
D S
G
N-MOSFET
F1
S0602MH
039
K1 2A T K2
230V 230V
Th2
K.S.M. Walraven
Rv
Z = U2/P,
040

f if t h - o r d e r lo w -p a ss f ilt e r
H. Bonekamp
041
The LTC1062 is an integrated fifth-order low-pass filter that stands
out by the absence of any d.c. error. This is achieved by keeping
P1
5V the actual filter outside the d.c. range to eliminate matters like d.c.
10k C8 offset and low-frequency interference. It therefore makes the
R2
LTC1062 eminently suitable for filter applications where d.c.
5k6
100n
4 8 errors cannot be tolerated. A pivotal role in this is played by exter-
7 R
DIS nal resistor R 5. The output signal is fed back to the input of the fil-
R1
IC1 5V ter via external capacitor C 4. Network R 5-C 4, in association with
12k
3
TLC
OUT the internal switched-capacitor network, provides the fifth-order
6
2
THR
555 C9
R3
C7
low-pass function.
TR
The cut-off frequency of the filter is determined by an internal
27k
CV
5 1 4kHz 100n 10µ 16V clock that can be controlled externally. This control is provided by
C2 C1
oscillator IC 1, which is configured as an astable multivibrator
R6
10n 100n 330k
(AMV). The filter has an internal divider that can be set for a scal-
ing factor of 1, 2 or 4. In the present circuit, this factor is set to 4,
5 6
resulting in a cut-off frequency equal to 1/400 of the clock fre-
C5
7 2 quency. Since the clock here is 4 kHz, the cut-frequency is 10 Hz.
R5
1µ MKT
IC2 If a different cut-off frequency is wanted, R 5, R 6, C4 and C5 must
27k
C4 LTC1062 C6
meet the following requirement to retain a smooth pass band.
1 CN8 8
1µ MKT 10µ 1/2π R 5 C 4 = f C /1.84,

16V
4 3
R4 provided that C 4 = C 5 and R 6 = 12R 5 .
C3
R 1, R 2, P 1 and C 2 must satisfy the following requirement
27k
10µ
16V
R 1 C 2 = 1.4/3400f C ,
994052 - 11
provided that R 2 = R 1 /2 and P 1 = R 1 .
[994052]
R S -2 3 2 t r a n sc e iv e r
f o r p o r t a b le a p p lic a t io n s
042
The ADM101E is a single-channel RS-232 driver and receiver in the
Analog Devices Craft Port™ series, designed to operate from a
single + 5 V supply. A highly efficient charge-pump voltage
100n inverter generates an on-chip –5 V supply, which eliminates the
need for a negative power supply for the driver, and permits
ADM101E
R S-232 compatible output levels to be developed using charge-
VC C
5V pump capacitors as small as 0.1 µF.
GND
1 +5V TO –5V 10 A shutdown input disables the charge pump and puts the
VOLTAGE
C1–
2 INVERTER 9
C1+ device into a low-power shutdown mode, in which the current
100n V–
drain is typically less than 5 µA.
3 8 SD An epitaxial BiCMOS construction minimizes power con-
TIN 4 T1 7 TOUT sumption to 3 mW and also guards against latch-up. Overvoltage
protection is provided allowing the receiver inputs to withstand
ROUT 5 R1 6 R IN continuous voltage in excess of ± 30 V. In addition, all pins have
ESD protection to levels greater than 2 kV.
The transmitter converts 5 V logic input signals into RS-232-
compatible output levels, whose average value is ± 4.2 V. The
receiver translates EIA-232 signals into 5 V logic levels.
100n 994047 - 11
The inputs are provided with 5 kΩ pull-down resistors. The
guaranteed switching thresholds are 0.4 V minimum and 2.4 V
maximum. The Schmitt trigger inputs have an hysteresis of 0.5 V,

f if t h - o r d e r lo w -p a ss f ilt e r
H. Bonekamp
041
The LTC1062 is an integrated fifth-order low-pass filter that stands
out by the absence of any d.c. error. This is achieved by keeping
P1
5V the actual filter outside the d.c. range to eliminate matters like d.c.
10k C8 offset and low-frequency interference. It therefore makes the
R2
LTC1062 eminently suitable for filter applications where d.c.
5k6
100n
4 8 errors cannot be tolerated. A pivotal role in this is played by exter-
7 R
DIS nal resistor R 5. The output signal is fed back to the input of the fil-
R1
IC1 5V ter via external capacitor C 4. Network R 5-C 4, in association with
12k
3
TLC
OUT the internal switched-capacitor network, provides the fifth-order
6
2
THR
555 C9
R3
C7
low-pass function.
TR
The cut-off frequency of the filter is determined by an internal
27k
CV
5 1 4kHz 100n 10µ 16V clock that can be controlled externally. This control is provided by
C2 C1
oscillator IC 1, which is configured as an astable multivibrator
R6
10n 100n 330k
(AMV). The filter has an internal divider that can be set for a scal-
ing factor of 1, 2 or 4. In the present circuit, this factor is set to 4,
5 6
resulting in a cut-off frequency equal to 1/400 of the clock fre-
C5
7 2 quency. Since the clock here is 4 kHz, the cut-frequency is 10 Hz.
R5
1µ MKT
IC2 If a different cut-off frequency is wanted, R 5, R 6, C4 and C5 must
27k
C4 LTC1062 C6
meet the following requirement to retain a smooth pass band.
1 CN8 8
1µ MKT 10µ 1/2π R 5 C 4 = f C /1.84,

16V
4 3
R4 provided that C 4 = C 5 and R 6 = 12R 5 .
C3
R 1, R 2, P 1 and C 2 must satisfy the following requirement
27k
10µ
16V
R 1 C 2 = 1.4/3400f C ,
994052 - 11
provided that R 2 = R 1 /2 and P 1 = R 1 .
[994052]
R S -2 3 2 t r a n sc e iv e r
f o r p o r t a b le a p p lic a t io n s
042
The ADM101E is a single-channel RS-232 driver and receiver in the
Analog Devices Craft Port™ series, designed to operate from a
single + 5 V supply. A highly efficient charge-pump voltage
100n inverter generates an on-chip –5 V supply, which eliminates the
need for a negative power supply for the driver, and permits
ADM101E
R S-232 compatible output levels to be developed using charge-
VC C
5V pump capacitors as small as 0.1 µF.
GND
1 +5V TO –5V 10 A shutdown input disables the charge pump and puts the
VOLTAGE
C1–
2 INVERTER 9
C1+ device into a low-power shutdown mode, in which the current
100n V–
drain is typically less than 5 µA.
3 8 SD An epitaxial BiCMOS construction minimizes power con-
TIN 4 T1 7 TOUT sumption to 3 mW and also guards against latch-up. Overvoltage
protection is provided allowing the receiver inputs to withstand
ROUT 5 R1 6 R IN continuous voltage in excess of ± 30 V. In addition, all pins have
ESD protection to levels greater than 2 kV.
The transmitter converts 5 V logic input signals into RS-232-
compatible output levels, whose average value is ± 4.2 V. The
receiver translates EIA-232 signals into 5 V logic levels.
100n 994047 - 11
The inputs are provided with 5 kΩ pull-down resistors. The
guaranteed switching thresholds are 0.4 V minimum and 2.4 V
maximum. The Schmitt trigger inputs have an hysteresis of 0.5 V,

which ensures faultless reception in all conditions. where a full RS-232 serial interface is not required, but compact
The ADM101E is available in a 10-pin micro-SO package, size and low power drain are paramount.
which makes it ideal for serial communications in small, portable [994047]
applications, such as palmtop computers and mobile telephones,
sy n c h r o n o u s sy st e m
t o m e a su r e µ Ω
The circuit in the diagram uses a synchronous-detection scheme
to measure low-level resistances. Other low-resistance-measuring
R1
10k
IC1
043 15V
R3
1M
circuits sometimes inject unacceptably large currents into the sys- 1

3
8
C1
tem on test. The present circuit synchronously demodulates the R TEST
11 9 R2
2
AD524 10k
voltage drop across the system on test and can therefore use very 2 10 1µ IC2a
1
low currents while measuring the resistance. 6

7 3
The generator, whose output is a 1 kHz signal at a peak level

of 10 V, injects a 1 mA reference current into unknown resistor
R TEST. Instrument amplifier IC1 and precision op amp IC2A amplify 15V
the voltage across R TEST ×10 5 . Synchronous detector IC 3 demod-
ulates this voltage, which is then applied to low-pass filter IC 2B. C2
The low-pass filtering attenuates all uncorrelated disturbances,
such as noise, drifts, or offsets, while passing a direct voltage that 1µ
is proportional to R TEST.
The relationship between the output voltage and R TEST is 15 19 20 16 1 6
G1 10 12 7
IC3 R4 R5 IC2b
V O U T = 10×2/π ×R T E ST ×10 5 /10 3 , ±1
13
100k 100k
5
9 14
AD630 C3
1kHz
so that
1µ
8 17 11
R T E ST = 0.0157×V O U T ,
15V
C4 C5
which is 15.7 mΩ V –1 at the output of the circuit. 15V 15V
8 100n 10µ 25V
[994045]
IC2
4 C6 C7
IC2 = AD708
100n 10µ 25V
15V
994045 - 11
t h e r m o st a t II
2V7...7V0
G. Kleine
044
The Type AD22105 from Analog Devices is an integrated circuit
that contains a temperature sensor, a threshold comparator with
7 hysteresis and an output stage. A single external resistor, R SET
100n
allows setting the tripping threshold accurately anywhere between
RPU 1 –40 °C and + 150 °C. The value of R SET is calculated with
IC1
6 2
RSET OUT R SET= 39×106/(tSET+ 281.6)–90.3×103,
AD22105
R SET 3 where tSET is the numerical value of the trip temperature and
R SET is in ohms. This gives values of R SET of, for instance,
47.5 kΩ for a trip temperature of 0 °C, 36 kΩ for 25 °C, and
994038 - 11 12 kΩ for 100 °C.

R1
10k
IC1
043 15V
R3
1M

3
8
C1
11 9 R2
2
AD524 10k
1

7 3

G1 10 12 7
IC3 R4 R5 IC2b
V O U T = 10×2/π ×R T E ST ×10 5 /10 3 , ±1
13
100k 100k
5
9 14
AD630 C3
1kHz
so that
1µ
8 17 11
R T E ST = 0.0157×V O U T ,
15V
C4 C5
8 100n 10µ 25V
[994045]
IC2
4 C6 C7
IC2 = AD708
100n 10µ 25V
15V
994045 - 11
2V7...7V0
G. Kleine
044
100n
IC1
6 2
AD22105
994038 - 11 12 kΩ for 100 °C.

R1
10k
IC1
043 15V
R3
1M

3
8
C1
11 9 R2
2
AD524 10k
1

7 3

G1 10 12 7
IC3 R4 R5 IC2b
V O U T = 10×2/π ×R T E ST ×10 5 /10 3 , ±1
13
100k 100k
5
9 14
AD630 C3
1kHz
so that
1µ
8 17 11
R T E ST = 0.0157×V O U T ,
15V
C4 C5
8 100n 10µ 25V
[994045]
IC2
4 C6 C7
IC2 = AD708
100n 10µ 25V
15V
994045 - 11
2V7...7V0
G. Kleine
044
100n
IC1
6 2
AD22105
994038 - 11 12 kΩ for 100 °C.

The internal comparator trips when the ambient temperature
measured by the sensor exceeds the set limit. The maximum error
is ± 2 °C at 25 °C and ± 3 °C over the entire temperature range.
The hysteresis, which prevents rapid operation of the comparator, R PULL UP
1 200k 8 NC
is set at 4 °C during production.
The AD22105 needs a supply voltage of 2.7–7.0 V. Since the AD22105
dissipation at 3.3 V is only 230 µW, the error caused by this is neg- OUT 2 7 VS
ligible. The low dissipation makes the device ideally suited for bat-
tery operation. SET-
The output stage is an open-collector n-p-n transistor with the GND 3 POINT 6 R SET
emitter at ground potential. A pull-up resistor of 200 kΩ may be

connected between pin 1 and pin 7. The transistor comes on when TEMPERATURE
SENSOR
NC 4 5 NC
the ambient temperature exceeds the set limit. The output may be
connected directly to low-current LEDs and CMOS inputs.
The AD22105 is housed in a SO8 case. 994038 - 12
Further information may be had from http://www.analog.com
[994038]
3 -f r e q u e n c y o sc illa t o r
R1
1k2
G. Kleine
045
The output frequency of the oscillator shown in the diagram may
be derived via two control inputs, A and B, and may, therefore
R3 D1
IC1a
1 1k have three different values. If the logic level at both inputs is low,
3
2 & C2 1N4148 the oscillator is disabled.
A
The oscillator proper is formed by gate IC 1c. Depending on
IC1b 100n IC1c
4 9 Q whether a high logic level is applied to IC 1a or IC 1b, either net-
6 8
IC1 = 74HC132 5 & 10 & work R 1-C 2 or network R 2-C 3 determines the output frequency.
C3
If both inputs are high, the output frequency is somewhere
IC1d
12 between the other two. With values as indicated, the output fre-
B 11
13 & 220n R4 D2 quencies are 1300 Hz, 200 Hz, and 2700 Hz.
1k Branches R 3-D 1 and R 4-D 2 ensure that the pulse duty ratio of
1N4148 the output signal is 1:1. If the oscillator is to be used in applica-
R2
1k2 tions where this ratio is irrelevant, the two branches may be omit-
ted.
5V The oscillator is particularly suitable for use in frequency shift
A B Q
C1 14 keying modulators.
IC1 0 0 OFF
[994023]
100n 7 0 1 1300Hz
1 0 2700Hz
1 1 2000Hz
994023 - 11
sw it c h -m o d e
lit h iu m -io n b a t t e r y c h a r g e r
A Maxim application
More and more lithium-ion batteries are being used in all kinds of
046
cost n-channel MOSFET as the power switch.
The MAX745 regulates the voltage set point and charging cur-
rent using two loops that work together to transition smoothly
appliances. These require a battery charger and for this Maxim’s between voltage and current regulation. The per-cell battery volt-
MAX745 is ideal. It provides all the functions necessary for charg- age regulation limit is set between 4.0 V and 4.4 V using standard
ing such batteries or packs of them. It provides a regulated charg- 1% resistors, and then the number of cells is set from 1 to 4 by pin-
ing current of up to 4 A without getting hot, and a regulated volt- strapping. The total output voltage error is less than ± 0.75%.
age with a total error at the battery terminals of only ± 0.75%. It The charger is available as an evaluation kit, which is an assem-
uses low-cost, 1% resistors to set the output voltage, and a low- bled and tested printed-circuit board that implements a step-down,

1 200k 8 NC

SENSOR
NC 4 5 NC
[994038]
R1
1k2
G. Kleine
045
R3 D1
IC1a
3
A
IC1b 100n IC1c
6 8
C3
IC1d
B 11
R2
ted.
A B Q
IC1 0 0 OFF
[994023]
100n 7 0 1 1300Hz
1 0 2700Hz
1 1 2000Hz
994023 - 11
sw it c h -m o d e
A Maxim application
046

1 200k 8 NC

SENSOR
NC 4 5 NC
[994038]
R1
1k2
G. Kleine
045
R3 D1
IC1a
3
A
IC1b 100n IC1c
6 8
C3
IC1d
B 11
R2
ted.
A B Q
IC1 0 0 OFF
[994023]
100n 7 0 1 1300Hz
1 0 2700Hz
1 1 2000Hz
994023 - 11
sw it c h -m o d e
A Maxim application
046

6...24V D4
MBRS340T3
5V1
FAST/FLOAT
D1 R7
C8 C10 C9 C11 C5
24Ω
150µ 150µ 100n 100n R6 4µ7 10V
35V 35V D2 5 6
1k
2 3 T1
DCIN VL 1N
7 13 4148 4
REF STATUS
IC1 20
R4 R5 R3 BST
C7
MAXIM 3 1
/2 IRF7303
10k
100k
100k
MAX745 100n
C6 BAT+
1 15
IBAT EAP CS
1% 1%
6 18 1n
THM/SHDN DHI L1 D3 R1
JP3 19
8 LX 0Ω1
2A VADJ 17 22µH
9 DLO 2A8 3W
1A SETI MBRS340T3
14
0A BATT
4 12
CCV CELL0
S1 R8 R9 R2 5 11
CCI CELL1
7 8
100k
100k
10k
GND PGND JP1 JP2

T2
10 16 D5
ON/OFF 3,4 2,4
1% 1%
C4 C2 C3 2 C1
1,2 1,3
MBRS340T3
220n 100n 47n 68µ
1 20V
1
/2 IRF7303
BAT–
984074 - 11
switching power supply designed for charging lithium-ion (Li-ion) Switch S1 may be replaced by a resistor with negative temper-
batteries. The output voltage can be set for one to four cells. The ature coefficient (NTC). When the voltage at pin TH M drops
cell voltage can be set between 4.0 V and 4.4 V. below 2.1 V, the circuit is switched off automatically; when the volt-
The Li-ion battery pack is connected between BATT and GND age reaches 2.3 V again, the circuit is switched on anew.
(BATT is positive, GND is negative). The battery may be con- Transistor T 1 is an n-channel FET whose auxiliary gate voltage
nected with the charger off without causing damage, or it can be is derived from capacitor C 7.
connected after power is applied. Diode D 1 is a freewheeling diode in case T 1 is cut off. When
The charging voltage is determined by the potential at junction this happens, the diode is shunted by T 2 (which is on) to improve
R 3-R 9. Replacing these resistors by a multiturn potentiometer the efficiency. This is because the drop across the diode is
enables the voltage to be set very accurately. 0.3–0.4 V, whereas that across a conducting transistor is only 0.1 V.
The charging current is selected with jumper JP 3. Here also, a The three Schottky diodes are fast 3 A, 40 V types from
multiturn potentiometer to replace R 5 and R 8 enables a more Motorola. The FETs may be part of a dual FET from International
accurate setting. Rectifier. If discrete ones are used, in view of the switching fre-
The number of cells, and thus the charging voltage, is set with quency of 300 kHz, types with a high input capacity must not be
jumpers JP1 and JP2: both to ground for one cell, only JP2 to VL for used: there is a current of only about 20 mA available for driving the
two cells, only JP 1 to VL for three cells, both to VL for four cells. gates. The IRF7303 has parameters: 30 V, 5 A, 0.05 Ω, and 520 pF.
[994074]
in f r a -r e d se n so r /m o n it o r
A Maxim Application
The sensor/monitor shown in the diagram ‘wakes up’ the host sys-
047
Newton/Sharp ASK (an amplitude shift keying protocol developed
by Sharp and used in the Apple Newton). The range for 115,000-
baud IrDA is limited to about 6 in (15 cm), but for 2400-baud
tem on detection of infra-red (IR) signals. It draws so little supply IrDA, it improves to more than 12 in (30 cm).
current that it can remain on continuously in a notebook computer Immunity to ambient light is very good, although bright flashes
or PDA device. Its ultra-low current drain (4 µA maximum, 2.5 µA usually cause false triggers. To handle such triggers, the system sim-
typical) is primarily that of the comparator/reference device, IC1. ply looks for IR activity after waking and then returns to sleep
The circuit is intended for the non-carrier systems common in mode if none is present.
infra-red Data Association (IrDA) applications. It also operates The sensor shown, D 1, a relatively large-area photodiode pack-
with carrier protocols such as those of TV remote controllers and aged in an IR-filter material, produces about 60 µA when exposed

6...24V D4
MBRS340T3
5V1
FAST/FLOAT
D1 R7
C8 C10 C9 C11 C5
24Ω
150µ 150µ 100n 100n R6 4µ7 10V
35V 35V D2 5 6
1k
2 3 T1
DCIN VL 1N
7 13 4148 4
REF STATUS
IC1 20
R4 R5 R3 BST
C7
MAXIM 3 1
/2 IRF7303
10k
100k
100k
MAX745 100n
C6 BAT+
1 15
IBAT EAP CS
1% 1%
6 18 1n
THM/SHDN DHI L1 D3 R1
JP3 19
8 LX 0Ω1
2A VADJ 17 22µH
9 DLO 2A8 3W
1A SETI MBRS340T3
14
0A BATT
4 12
CCV CELL0
S1 R8 R9 R2 5 11
CCI CELL1
7 8
100k
100k
10k
GND PGND JP1 JP2

T2
10 16 D5
ON/OFF 3,4 2,4
1% 1%
C4 C2 C3 2 C1
1,2 1,3
MBRS340T3
220n 100n 47n 68µ
1 20V
1
/2 IRF7303
BAT–
984074 - 11
switching power supply designed for charging lithium-ion (Li-ion) Switch S1 may be replaced by a resistor with negative temper-
batteries. The output voltage can be set for one to four cells. The ature coefficient (NTC). When the voltage at pin TH M drops
cell voltage can be set between 4.0 V and 4.4 V. below 2.1 V, the circuit is switched off automatically; when the volt-
The Li-ion battery pack is connected between BATT and GND age reaches 2.3 V again, the circuit is switched on anew.
(BATT is positive, GND is negative). The battery may be con- Transistor T 1 is an n-channel FET whose auxiliary gate voltage
nected with the charger off without causing damage, or it can be is derived from capacitor C 7.
connected after power is applied. Diode D 1 is a freewheeling diode in case T 1 is cut off. When
The charging voltage is determined by the potential at junction this happens, the diode is shunted by T 2 (which is on) to improve
R 3-R 9. Replacing these resistors by a multiturn potentiometer the efficiency. This is because the drop across the diode is
enables the voltage to be set very accurately. 0.3–0.4 V, whereas that across a conducting transistor is only 0.1 V.
The charging current is selected with jumper JP 3. Here also, a The three Schottky diodes are fast 3 A, 40 V types from
multiturn potentiometer to replace R 5 and R 8 enables a more Motorola. The FETs may be part of a dual FET from International
accurate setting. Rectifier. If discrete ones are used, in view of the switching fre-
The number of cells, and thus the charging voltage, is set with quency of 300 kHz, types with a high input capacity must not be
jumpers JP1 and JP2: both to ground for one cell, only JP2 to VL for used: there is a current of only about 20 mA available for driving the
two cells, only JP 1 to VL for three cells, both to VL for four cells. gates. The IRF7303 has parameters: 30 V, 5 A, 0.05 Ω, and 520 pF.
[994074]
in f r a -r e d se n so r /m o n it o r
A Maxim Application
The sensor/monitor shown in the diagram ‘wakes up’ the host sys-
047
Newton/Sharp ASK (an amplitude shift keying protocol developed
by Sharp and used in the Apple Newton). The range for 115,000-
baud IrDA is limited to about 6 in (15 cm), but for 2400-baud
tem on detection of infra-red (IR) signals. It draws so little supply IrDA, it improves to more than 12 in (30 cm).
current that it can remain on continuously in a notebook computer Immunity to ambient light is very good, although bright flashes
or PDA device. Its ultra-low current drain (4 µA maximum, 2.5 µA usually cause false triggers. To handle such triggers, the system sim-
typical) is primarily that of the comparator/reference device, IC1. ply looks for IR activity after waking and then returns to sleep
The circuit is intended for the non-carrier systems common in mode if none is present.
infra-red Data Association (IrDA) applications. It also operates The sensor shown, D 1, a relatively large-area photodiode pack-
with carrier protocols such as those of TV remote controllers and aged in an IR-filter material, produces about 60 µA when exposed

to heavy illumination, and 400 mV when open-circuited. Most pho-
R1
todiodes may be used. 7 2V5...11V
100k
Operation is in the photovoltaic mode without applied bias. C3 V+ 4µA
4 IN
This mode is slow and not generally used in photodiode circuits, –
R3 OC 8
1n5 A
but speed is not essential here. The photovoltaic mode simplifies the 3 IN +
150k
circuit and saves a significant amount of power. In a more con- 100ns/10µs
5 HYST IC1
ventional configuration, for instance, photoconductive, photo cur- MAX
rents caused by ambient light and sourced by the bias network R2 R4 6 REF 971 1 B
D1
would increase the quiescent current about ten times.
4k7
10M
C2
100n 74HC14
2 REF C1
[994007] LT546
GND 100p
1
994007-11
p u lse g e n e r a t o r
w it h v a r ia b le d u t y f a c t o r
W. Dijkstra
The duty factor of the pulse 5V 5V 5V
048
generator in the diagram is vari- 1 R1 5V
C1 C2
able in 10% steps from 10% to
R2
90%. 100n 100n
10k
With the aid of thumb wheel 4x 39k 16 9 16
2 3 4 5
switch S1, a 4-bit word, S, is B/D
6 15 1
added to one input of IC 1 and 7
A1 CLK PE
to IC 2. Circuit IC 1 is a full B1 10 4
A QA
6
4
A2 IC2 D1 11 IC3
adder, while IC 2 functions as a 5 D2
12
B QB
11
B2 12 13 14
switch. The binary equivalent of 2 D3 C QC
A3 13 3 4029 2
5 is applied to the other input of 3
B3 4019
D4 D QD T1
R3
IC1. The output of IC 1 is linked 15
A4 G1
14 10
U/D CO
7
100k
to the second input of IC 2. 1
B4 G2
9
The output of IC 2 is applied CI BC547

to the programmable input of 8 5 8
up/down counter IC 3 via
bistable IC 4a . The terminal
count output of IC 3 clocks IC 4a
via transistor T 1. The output of
IC 4a switches the counter from
up to down and at the same 5V
time links data S or data S+ 5 to
the programmable input of the C4 5 1
D Q
counter and vice versa. 100n
IC4a
3 2
Imagine that the non-invert- 16
CLK Q
ing output (pin 1) of IC 4a is R S

high. Counter IC 3 then counts 7
A1 C4
14 4 6
downward and the programma- 5

A2
3 IC1
ble input is linked with S, which A3 S1 10
1 IC4 = 4013 5V
is, say, in position 6. The A4 S2 11
S1 6 12
counter counts downward until B1 S3
4008 S4 13 13
4 9
it reaches 0, which is after six B2 D Q
2
B3 IC4b
input pulses. The terminal 15 9 11 12 C3 14
B4 CO CLK Q
count output goes low, where- IC4
R S
upon the non-inverting output 100n 7
8 10 8
of IC4a also goes low, IC3 starts
counting upward and is pro- 994073 - 11
grammed with data S+ 5 (here,
11), so that the terminal count
output becomes high again.
When the counter reaches position 15, the terminal count output switch, the non-inverting output of IC 4a (pin 1) is high for six and
goes low again, pin 1 of IC4a becomes high, and the whole process low for four of every ten input pulses.
starts repeating itself. In short: in position 6 of the thumbwheel [994073]

to heavy illumination, and 400 mV when open-circuited. Most pho-
R1
todiodes may be used. 7 2V5...11V
100k
Operation is in the photovoltaic mode without applied bias. C3 V+ 4µA
4 IN
This mode is slow and not generally used in photodiode circuits, –
R3 OC 8
1n5 A
but speed is not essential here. The photovoltaic mode simplifies the 3 IN +
150k
circuit and saves a significant amount of power. In a more con- 100ns/10µs
5 HYST IC1
ventional configuration, for instance, photoconductive, photo cur- MAX
rents caused by ambient light and sourced by the bias network R2 R4 6 REF 971 1 B
D1
would increase the quiescent current about ten times.
4k7
10M
C2
100n 74HC14
2 REF C1
[994007] LT546
GND 100p
1
994007-11
p u lse g e n e r a t o r
w it h v a r ia b le d u t y f a c t o r
W. Dijkstra
The duty factor of the pulse 5V 5V 5V
048
generator in the diagram is vari- 1 R1 5V
C1 C2
able in 10% steps from 10% to
R2
90%. 100n 100n
10k
With the aid of thumb wheel 4x 39k 16 9 16
2 3 4 5
switch S1, a 4-bit word, S, is B/D
6 15 1
added to one input of IC 1 and 7
A1 CLK PE
to IC 2. Circuit IC 1 is a full B1 10 4
A QA
6
4
A2 IC2 D1 11 IC3
adder, while IC 2 functions as a 5 D2
12
B QB
11
B2 12 13 14
switch. The binary equivalent of 2 D3 C QC
A3 13 3 4029 2
5 is applied to the other input of 3
B3 4019
D4 D QD T1
R3
IC1. The output of IC 1 is linked 15
A4 G1
14 10
U/D CO
7
100k
to the second input of IC 2. 1
B4 G2
9
The output of IC 2 is applied CI BC547

to the programmable input of 8 5 8
up/down counter IC 3 via
bistable IC 4a . The terminal
count output of IC 3 clocks IC 4a
via transistor T 1. The output of
IC 4a switches the counter from
up to down and at the same 5V
time links data S or data S+ 5 to
the programmable input of the C4 5 1
D Q
counter and vice versa. 100n
IC4a
3 2
Imagine that the non-invert- 16
CLK Q
ing output (pin 1) of IC 4a is R S

high. Counter IC 3 then counts 7
A1 C4
14 4 6
downward and the programma- 5

A2
3 IC1
ble input is linked with S, which A3 S1 10
1 IC4 = 4013 5V
is, say, in position 6. The A4 S2 11
S1 6 12
counter counts downward until B1 S3
4008 S4 13 13
4 9
it reaches 0, which is after six B2 D Q
2
B3 IC4b
input pulses. The terminal 15 9 11 12 C3 14
B4 CO CLK Q
count output goes low, where- IC4
R S
upon the non-inverting output 100n 7
8 10 8
of IC4a also goes low, IC3 starts
counting upward and is pro- 994073 - 11
grammed with data S+ 5 (here,
11), so that the terminal count
output becomes high again.
When the counter reaches position 15, the terminal count output switch, the non-inverting output of IC 4a (pin 1) is high for six and
goes low again, pin 1 of IC4a becomes high, and the whole process low for four of every ten input pulses.
starts repeating itself. In short: in position 6 of the thumbwheel [994073]

p o w e r su p p ly r e g u la t o r
w it h se n se lin e s 049
where UO is in volts and R P is the effective resistance of P 1. Resis-
tor R 2 in series with terminal A enables current limiting. The peak
level of the output current, IO , in amperes is
IO = 0.45/R 2
The maximum input voltage to the regulator is 40 V, and the peak

output current is 2 A.
The regulator has on-board thermal protection, but this does
not mean, of course, that it should not be mounted on a suitable
heat sink when the dissipation is high.
The regulator is best built on the printed-circuit board shown,
which is available via our Readers’ Services – see toward the end of
this issue.
[994014]
IC1
H1
H2
K2
C2
+
C1
R2
S+
+ C3
K.S.M. Walraven R1
OUT
There are applications in which it is important for the supply volt- S-
age to be largely independent of the level of the output current, 1-410499
-
ROTKELE )C(
which is, of course, particularly so in the case of variable loads. 0 K3 P1 K1
When the load is linked to the power supply by relatively short
H3
H4
994014-1
wires, a good variable power supply maintains the output voltage
at a virtually constant level. Unfortunately, in practice, these wires
IC1 2
CS
K2
R2
1 L200C 5 A
0Ω47
994014-1
5W (C) ELEKTOR
B S+
3 4 P1
K3
C3 C2 RL
10k
2200µ 220n R1
40V C1
820Ω
K1
100n C S–
994014 - 11
can be fairly long, and since they have resistance, there is a volt- Parts list Integrated circuits:
age drop across them. This interferes with good regulation; the IC1 = L200 (ST Microelec-
Resistors: tronics)
only way of avoiding this problem is to link the control part of the
R1 = 820 Ω
power supply to the load via separate sense lines. R2 = 0.47 Ω, 5 W Miscellaneous:
Unfortunately, this cannot be done readily in every power sup- P1 = 10 kΩ, preset K1–K3 = terminal block for
ply without some tedious work, but as the diagram shows, in the board mounting, pitch
case of the L200 it presents no problems. Capacitors: 5 mm
In the diagram, A and D are the usual output terminals, while C1 = 0.1 µF Heat sink for IC1
B and C are the sense input terminals. The output voltage, UO , is C2 = 0.22 µF PCB Order no. 994014 (see
C3 = 2200 µF, 40 V Readers’ Services toward
the end of this issue)
UO = 2.77(1+ R P/R 1),

lin e sw it c h f o r P C so u n d c a r d
050
installation. The same effect can be seen in the application realm.
In addition to the classical applications, the computer is being used
more and more for digital audio.
Anyone who for example spends a lot of time with sampling and
making his or her own CDs, soon finds that the single input con-
nector of the sound card is insufficient to deal with a large num-
ber of audio sources. A cassette deck, MiniDisk player, phono-
graph, microphone — in principle, all of these can be connected,
although the phonograph and the microphone naturally require
special preamplifiers.
If you want to avoid the inconvenience of disconnecting and recon-
necting cables, the only solution is to use a line switch box. Such a
box is not at all complicated in the electronic sense, as can be seen
from the schematic diagram. A handful of 3.5-mm jacks and a six-
position, two-pole rotary switch are all that you need. The practi-
With the equipment that is found in the domes-
tic or office environment, the distinction between
H2
H1
the various disciplines is becoming increasingly

K1 K2 K3 K4 K5 K6 K7
blurred. The stereo, television set and video OUT
recorder have long since been merged into a sin- H5 H6
gle audiovisual installation, and there are signs of

the same sort of process with the computer. For-
merly, this consisted of just a main enclosure, a 994082-1 1-280499
ROTKELE )C(
monitor and a keyboard, but nowadays it is being
surrounded by a steadily increasing number of
peripheral devices, and it is in a manner of speak-
H4
H3
H7
S1 H8
ing growing in the direction of the audiovisual
K1
(C) ELEKTOR
994082-1
K2
2 1
S1a
3
13
K3 5 6
K7
Components List
S1 = rotary switch, 6
K4 K1-K7 = 3.5 mm stereo-jack positions/2 poles, PCB
PCB mount (e.g. Conrad mount
no. 73 28 93-55)
8 7
9
K5 14 cal aspects, as usual, are rather more onerous. For this reason, we
10
have developed a tidy printed circuit board for the line switch box,
11 12
S1b
which eliminates hand wiring — which will no doubt be appreci-
ated by the constructor! It should not be difficult to find a suitable
enclosure for the line switch. You should preferably use a metal
K6 enclosure and connect it to the circuit earth.
(994082-1)
994082 - 11

p a ssiv e sp lit t e r f o r S /P D IF
051
age at the other output rises to 0.43 V p-p , which is caused by the
slightly higher primary impedance and the slightly smaller load on
the signal source.
A drawback of the splitter is that the output voltage is 34%
below the internationally specified level. However, most S/PDIF
(Sony/Philips Digital Interface Format) inputs can cope with this
perfectly well.
Place the transformer directly at the output of the signal source.
The reason for this is that the input and output impedances of the
transformer are not exactly 75 Ω. With the transformer directly at
the source and provided the coaxial cable at the computer end is ter-
minated correctly into 75 Ω, all will be well.
[994044]
75Ω
Tr1 coax 75Ω
T. Giesberts 75Ω
The circuit in the diagram enables the digital audio output of, say,
a compact-disc (CD) player to be linked to two different appli-
ances simultaneously. It is, of course, considerably less expensive
than the proprietary active splitters on the market.
The circuit is in effect a small transformer that can be wound
easily on a Philips Type TN13/7.5/5-3E25 toroidal core. The wire coax 75Ω
75Ω
should be 0.5 mm dia. enamelled copper wire. The primary wind- 7:5:5
TN13/7.5/5-3E25
ing is seven turns and there are two secondary windings, each of
five turns. The bandwidth of the transformer is 40 kHz to 16 MHz.
When both outputs are loaded, there is a voltage of 0.33 V p-p at
994044 - 11
each output. When one of the outputs is open-circuited, the volt-
z e n e r d io d e
1
G. Kleine
Only zener diodes rated at 6 V
have a negligible temperature
resistors in potential divider
R 1-R 2: R 1 must be ×6.3 as
052
gives a guide to the ratio of the
2
D1 coefficient (TC). At lower rat- large as R 2. If, therefore, R 2 is

UZ ings, the coefficient becomes chosen as 1 kΩ, R 1 needs to be D1
negative, and at higher ratings, 6.3 kΩ. Therefore, to obtain an
positive. At a rating of 30 V, overall zener voltage of 18 V, a
R1
the coefficient is 0.01% K –1, zener diode rated at 15 V is
and remains constant at higher needed in the D 1 position.
U Z tot T1
ratings. If the zener voltage itself is
T1
The present transistor cir- not too critical, but it must be P1
U CE cuit enables a positive TC to be unaffected by temperature
compensated by making use of changes, variable compensation
the negative TC (–2.2 mV K–1) may be obtained as shown in Fig-
R2 of the base-emitter junction ure 2 The potentiometer should
For instance, an 18 V preferably be a 10-turn type.
zener diode has a TC of The transistor in both cases 994031 - 12
994031 - 11 16 mV K–1, which is ×7.3 as may be general purpose n-p-n
large as the TC of the base- type such as the BC238.
emitter junction in T 1. This [994031]

p a ssiv e sp lit t e r f o r S /P D IF
051
age at the other output rises to 0.43 V p-p , which is caused by the
slightly higher primary impedance and the slightly smaller load on
the signal source.
A drawback of the splitter is that the output voltage is 34%
below the internationally specified level. However, most S/PDIF
(Sony/Philips Digital Interface Format) inputs can cope with this
perfectly well.
Place the transformer directly at the output of the signal source.
The reason for this is that the input and output impedances of the
transformer are not exactly 75 Ω. With the transformer directly at
the source and provided the coaxial cable at the computer end is ter-
minated correctly into 75 Ω, all will be well.
[994044]
75Ω
Tr1 coax 75Ω
T. Giesberts 75Ω
The circuit in the diagram enables the digital audio output of, say,
a compact-disc (CD) player to be linked to two different appli-
ances simultaneously. It is, of course, considerably less expensive
than the proprietary active splitters on the market.
The circuit is in effect a small transformer that can be wound
easily on a Philips Type TN13/7.5/5-3E25 toroidal core. The wire coax 75Ω
75Ω
should be 0.5 mm dia. enamelled copper wire. The primary wind- 7:5:5
TN13/7.5/5-3E25
ing is seven turns and there are two secondary windings, each of
five turns. The bandwidth of the transformer is 40 kHz to 16 MHz.
When both outputs are loaded, there is a voltage of 0.33 V p-p at
994044 - 11
each output. When one of the outputs is open-circuited, the volt-
z e n e r d io d e
1
G. Kleine
Only zener diodes rated at 6 V
have a negligible temperature
resistors in potential divider
R 1-R 2: R 1 must be ×6.3 as
052
gives a guide to the ratio of the
2
D1 coefficient (TC). At lower rat- large as R 2. If, therefore, R 2 is

UZ ings, the coefficient becomes chosen as 1 kΩ, R 1 needs to be D1
negative, and at higher ratings, 6.3 kΩ. Therefore, to obtain an
positive. At a rating of 30 V, overall zener voltage of 18 V, a
R1
the coefficient is 0.01% K –1, zener diode rated at 15 V is
and remains constant at higher needed in the D 1 position.
U Z tot T1
ratings. If the zener voltage itself is
T1
The present transistor cir- not too critical, but it must be P1
U CE cuit enables a positive TC to be unaffected by temperature
compensated by making use of changes, variable compensation
the negative TC (–2.2 mV K–1) may be obtained as shown in Fig-
R2 of the base-emitter junction ure 2 The potentiometer should
For instance, an 18 V preferably be a 10-turn type.
zener diode has a TC of The transistor in both cases 994031 - 12
994031 - 11 16 mV K–1, which is ×7.3 as may be general purpose n-p-n
large as the TC of the base- type such as the BC238.
emitter junction in T 1. This [994031]

u n iv e r sa l c o u n t d o w n t im e r
053
5V 5V
C7 C4
K1 IC1 1µ 16V 100n
R10
20
8k2
A A 1
RST
R1 IC3
2 12 R2 DPA
390Ω RXD/P30 P10/IN+ 390Ω
S202S11 3 13 R3 DPB
TXD/P31 P11/IN– 390Ω
6 14 R4 DPC
INT0/P32 P12 390Ω
7 15 R5 DPD
INT1/P33 P13 390Ω
A1 8 16 R6 DPE
T0/P34 P14 390Ω
A2 9 17 R7 DPF
Tr1 T1/P35 P15 390Ω
89C2051 18 R8 DPG
P16 390Ω
K2 A3 11 19 R9 DPP
IC2 P37 P17 390Ω
7805 5V
230V
B1 X1 X0
10 5 X1 4
C1 C2 C3 S1 S2
F1
C5 C6
9V 1000µ 25V 100n 10µ
2A T 1VA5 16V
B80C1500 22p 12MHz 22p
A3
A2
A1
5V 5V 5V
R11 R12 R13
3k3
3k3
3k3
T1 T2 T3
BC556 BC556 BC556
LD1 3 HD1131O LD2 3 HD1131O LD3 3 HD1131O

CA a 7 CA a 7 CA a 7 DPA
6 6 6 DPB
b b b
4 4 4 DPC
c c c
2 2 2 DPD
d d d
1 1 1 DPE
e e e
9 9 9 DPF
f f f
10 10 10 DPG
g g g
5 5 5 DPP
dp dp dp
CA CA CA
8 8 8 994015 - 11

Normal State S202S11 is used to control an
external (mains-powered)
load. This load is switched on
S2 Pressed S1 Pressed when the timer starts, and is
Time = 0
switched off again when the
programmed time has
Time > Time-OUT elapsed. The maximum cur-
On / Off Time = Time - 1 Programming Time = Time + 1
rent that may be switched by
D0 D1 D2
the SSR is about 2 A.
The timer has its own mains
power supply consisting of
the usual elements: mains
Dot flashes
S2 S1
transformer (Tr1), bridge rec-
Pressed Pressed tifier (B1) and voltage regula-
S1 Pressed
Display active
tor (IC2). This section of the
Increment (Data[Display active])
Time = 0 D0 D1 D2 circuit may be separated from
the rest by cutting the printed
994015 - 12
circuit board in two (see com-
ponent overlay). Due atten-
Design: Prof. A. Roldán Aranda tion should be given to electrical safety when connecting the load
This universal countdown timer is good example of what can be and all other mains wiring.
achieved in terms of bare-bones hardware when using a powerful Pressing switch S1 selects the desired digit, next its value is incre-
microcontroller like the AT89C2051 from Atmel. This 20-pin mented by pressing S2. The time format is [mm.s], where the sec-
microcontroller has a 2-kBytes Flash ROM which is compatible onds digit indicates tens of seconds. So, the maximum time you
with the 8051 Intel architecture. Here, the author has loaded the can set is 99.5 minutes = 99 minutes and 50 seconds. The resolu-
AT89C2051 with a program that simply eliminates a lot of hard- tion of the timer is 10 seconds, and the accuracy is derived from
ware. The microcontroller is available ready-programmed from quartz crystal X1.
the Publishers. Once all digits are programmed, you have to wait until the display
The user interface of the timer consists of two pushbuttons and stops flashing (time-out for entry). Next, pressing S2 causes the load
three multiplexed 7-segment LED displays. As you can see from to be switched on, and the countdown operation to start. The pro-
the circuit diagram, a very small number of inexpensive external gramming of the timer is illustrated in the state diagram.
parts is required to make it all work. In order to ensure the neces- (994015-1)
sary degree of electrical isolation, a solid-state relay (SSR ) type
X2
LD1 LD2 LD3
COMPONENTS LIST
H8
H1
H5 H2
K1
K2 IC1
994015-1
Resistors:
R1-R9 = 390Ω
R10 = 8kΩ2
R11,R12,R13 = 3kΩ3
R1
C7
TR1 1-510499 T3 Capacitors:
ROTKELE )C(
R4
R9
R6
R5
R8
R7
R3
R2
A A
T2
C1 = 1000µF 25V radial
C2,C4 = 100nF ceramic
C4
0 0 T1 C3 = 10µF 16V radial

R10
F1 2AT + + R11 C5,C6, = 22pF ceramic

IC3
B1 R12 C7 = 1µF 16V radial
X1 R13
C1
Semiconductors:
IC2
C3 S1 S2 B1 = B80C1500
(rectangular model)
H6
H3
H7 H4
C2
C6
C5
T1,T2,T3 = BC556
IC1 = S202S11 (Sharp;
distributor: Eurodis)
IC2 = 7805
IC3 = AT89C2051
(programmed, Publishers
order code 996511-1)
Miscellaneous:
Tr1 = mains transformer, 9V
1.5VA, Block type VV1109
S1,S2 = pushbutton, PCB
(C) ELEKTOR
mount, MEC type 3CTL
994015-1 X1 = quartz crystal, 12MHz
LD1,LD2,LD3 = HD1131O
(Siemens)
K1,K2 = 2-wayPCB terminal
block, pitch 7.5mm
F1 = fuse, 2A, slow, with
PCB mount holder
PCB, order code 994015-1

sim p le c o n st a n t - c u r r e n t so u r c e
U+
The simplest version of a con-
054
of R1 can be made high since T1 is a high-gain Darlington tran-
sistor. The advantage of this is that the resulting error in the current
setting is very small. If the value of R1 is 10 MΩ, the base-emitter
1mA
stant-current source, which we voltage of T2 is less than 0.5 V, so that a current of around 1 mA
often use for that reason, con- flows through the current source when R2 is 470 Ω.
R1 sists of only a FET with the The current regulation that a constant-current source must pro-
source and gate connected vide comes from the fact that T2 controls the base current of T1.
10M
T1 together. This utilizes the zero- This means that if the current through R 2 should increase, the
gate-voltage drain current base current of T1 would be reduced since the collector current of
(I DSS) of the FET. Sometimes a T2 would increase. If we assume that the amplification factor of
T2 BC517 source resistor is added to allow T2 is at least 10,000, then the value of R1 must be at least 10 MΩ
the current level to be set more to produce a voltage drop of 1 V. The error current through R1 is
R2 exactly. thus negligible in comparison to the total current.
BC
470Ω
547B A disadvantage of such a very Since the current through R1 varies with the applied voltage, the
simple current source is that the base-emitter voltage of T2 will also vary. A disadvantage of this is
maximum drain-source voltage that the internal resistance of the current source is reduced. In
of most standard FETs is no addition, the temperature dependence of T2 shows up fully in the
994094 - 11 more than 30 to 40 V. If we look output current. For a number of applications, this is however not
at bipolar transistors instead, that important. In fact, this characteristic could be used inten-
the range of available voltages tionally, for example to provide temperature compensation or for
is significantly larger. This is adequate justification for developing a particular measurement or control circuit.
an alternative current source, using bipolar transistors, that is com- In spite of its simplicity, this circuit in fact proved to be able to
parably simple. deliver a nice constant current. With the prototype, the measured
In the example shown here, we use a BC547 and a small Darling- current (at room temperature) was 0.91 mA with an input voltage
ton transistor (BC517). For convenience, we have chosen a cur- of 5 V; this increased to 0.99 mA at 15 V, and a value of exactly
rent of 1 mA for calculating component values. Transistor T2 con- 1.04 mA was measured with a 30 V input.
trols the current, and resistor R1 determines the base-emitter volt- (994094-1)
age of T2. R1 also provides the base current for T1, but the value
LO G O ! in t e r f a c e
R5 IC2 = PC827(Sharp) R1
1N4148
055 Design: W. Kriegmaier
A special adapter cable is
needed to connect a PLC of the
D2 D1
IC3 = 4049B Siemens LOGO ! series to the ser-
10k
10k
C1
10µ
ial interface of a PC. Of course,
R3
3 IC3a 2
2k2
400mW 5V1 10V you can obtain such a cable
1 IC2a C2 ready-made (at a price!), but
1 8
10µ
you can also make one yourself
3 2 1 10V 2 inexpensively.
Logo 16
V+
C1+
1
C4
The interface circuit consists of
2 7
IC1 D9 a galvanic isolator and a level
4 5 6 3
C1– 10µ
10V
converter. The galvanic isola-
11 14 1
R4 10
T1IN T1OUT
7 2
6 tion is provided here by a dual
T2IN T2OUT 7
1 optocoupler (Sharp PC827),
10k
R2 12 13 3
R1OUT R1IN 8
IC3 4k7 9
R2OUT R2IN
8 4 although two single PC817
9
8 4 IC3b 5
C2+
4
C5
5 optocouplers could be used
1
IC2b 15
MAX232 instead, or other types as long
6 3 5
V-
C2– 10µ
10V as their current transfer ratio
6 10 12 15 6
(CTR ) is at least 50% at a for-
C3
ward current I F of 5mA. Since
IC3c IC3d IC3e IC3f
1 1 1 1 5 4
10µ the two optocouplers are built
10V
7 9 11 14 as inverters, a pair of inverter
gates must be used to restore
994016 - 11
the signals — IC3a (to the PC)

sim p le c o n st a n t - c u r r e n t so u r c e
U+
The simplest version of a con-
054
of R1 can be made high since T1 is a high-gain Darlington tran-
sistor. The advantage of this is that the resulting error in the current
setting is very small. If the value of R1 is 10 MΩ, the base-emitter
1mA
stant-current source, which we voltage of T2 is less than 0.5 V, so that a current of around 1 mA
often use for that reason, con- flows through the current source when R2 is 470 Ω.
R1 sists of only a FET with the The current regulation that a constant-current source must pro-
source and gate connected vide comes from the fact that T2 controls the base current of T1.
10M
T1 together. This utilizes the zero- This means that if the current through R 2 should increase, the
gate-voltage drain current base current of T1 would be reduced since the collector current of
(I DSS) of the FET. Sometimes a T2 would increase. If we assume that the amplification factor of
T2 BC517 source resistor is added to allow T2 is at least 10,000, then the value of R1 must be at least 10 MΩ
the current level to be set more to produce a voltage drop of 1 V. The error current through R1 is
R2 exactly. thus negligible in comparison to the total current.
BC
470Ω
547B A disadvantage of such a very Since the current through R1 varies with the applied voltage, the
simple current source is that the base-emitter voltage of T2 will also vary. A disadvantage of this is
maximum drain-source voltage that the internal resistance of the current source is reduced. In
of most standard FETs is no addition, the temperature dependence of T2 shows up fully in the
994094 - 11 more than 30 to 40 V. If we look output current. For a number of applications, this is however not
at bipolar transistors instead, that important. In fact, this characteristic could be used inten-
the range of available voltages tionally, for example to provide temperature compensation or for
is significantly larger. This is adequate justification for developing a particular measurement or control circuit.
an alternative current source, using bipolar transistors, that is com- In spite of its simplicity, this circuit in fact proved to be able to
parably simple. deliver a nice constant current. With the prototype, the measured
In the example shown here, we use a BC547 and a small Darling- current (at room temperature) was 0.91 mA with an input voltage
ton transistor (BC517). For convenience, we have chosen a cur- of 5 V; this increased to 0.99 mA at 15 V, and a value of exactly
rent of 1 mA for calculating component values. Transistor T2 con- 1.04 mA was measured with a 30 V input.
trols the current, and resistor R1 determines the base-emitter volt- (994094-1)
age of T2. R1 also provides the base current for T1, but the value
LO G O ! in t e r f a c e
R5 IC2 = PC827(Sharp) R1
1N4148
055 Design: W. Kriegmaier
A special adapter cable is
needed to connect a PLC of the
D2 D1
IC3 = 4049B Siemens LOGO ! series to the ser-
10k
10k
C1
10µ
ial interface of a PC. Of course,
R3
3 IC3a 2
2k2
400mW 5V1 10V you can obtain such a cable
1 IC2a C2 ready-made (at a price!), but
1 8
10µ
you can also make one yourself
3 2 1 10V 2 inexpensively.
Logo 16
V+
C1+
1
C4
The interface circuit consists of
2 7
IC1 D9 a galvanic isolator and a level
4 5 6 3
C1– 10µ
10V
converter. The galvanic isola-
11 14 1
R4 10
T1IN T1OUT
7 2
6 tion is provided here by a dual
T2IN T2OUT 7
1 optocoupler (Sharp PC827),
10k
R2 12 13 3
R1OUT R1IN 8
IC3 4k7 9
R2OUT R2IN
8 4 although two single PC817
9
8 4 IC3b 5
C2+
4
C5
5 optocouplers could be used
1
IC2b 15
MAX232 instead, or other types as long
6 3 5
V-
C2– 10µ
10V as their current transfer ratio
6 10 12 15 6
(CTR ) is at least 50% at a for-
C3
ward current I F of 5mA. Since
IC3c IC3d IC3e IC3f
1 1 1 1 5 4
10µ the two optocouplers are built
10V
7 9 11 14 as inverters, a pair of inverter
gates must be used to restore
994016 - 11
the signals — IC3a (to the PC)

and IC3b (from the PC). R3 acts as a current-limiting resistor, and ply. The level converter, the phototransistor of IC2a and the LED
R4 is a pull-up resistor that holds the line securely high when the of IC2b are powered from the RS232 interface. Zener diode D2
signal level is not definitely low. limits the voltage to + 5 V for this purpose. The LOGO ! PLC provides
The well-known MAX232 IC is used to convert the signal levels the operating voltage for the inverters, the LED of IC2a and the
between 0/+ 5 V (on the PLC side) and symmetric ±12 V (RS232) phototransistor of IC2b.
for the serial interface. Since only the R xD and TxD lines are The interface circuit needs only around 10 mA from the R S232
needed, two drivers of the MAX232 can be connected in parallel in interface. In certain rare cases this can overload the interface drivers
each direction. of the PC, in which case an external + 5 V supply will be necessary.
As a rule, the LOGO ! interface does not need its own power sup- (994016-1)
o n e - c h ip LC D in t e r f a c e
5V
056 CW
EDE702
3 4 14
0 = 2400, 1 = 9600 1 BAUD OUT 18 Digital Output
0 = Inverted, 1 = Standard 2 POLARITY RCV 17 Serial Receive 1 6

BAUD ENABLE
7
Connect to +5V DC * 3 +5V OSC1 16 Oscillator Connection IC1 RS
17 8
33k RCV RW
Connect to +5V DC 4 +5V OSC2 15 Oscillator Connection EDE702
to PC Serial Out
16 10
Digital Ground 5 GND +5V 14 Connect to +5V DC OSC1 DATA 4
11
DATA 5
LCD Enable Line 6 ENABLE D7 13 LCD Data Pin 7 12
DATA 6
4MHz 15 13
LCD RS Line 7 RS D6 12 LCD Data Pin 6 OSC2 DATA 7
14 13 12 11 10 9 8 7 6 5 4 3 2 1
LCD RW Line 8 RW D5 11 LCD Data Pin 5 2
POLARITY D7
D6
D5
D4
D3
D2
D1
D0
R/W
VDD
VSS
E
RS
VO
No Connection 9 N/C D4 10 LCD Data Pin 4
to PC Ground 5
994091 - 11
994091 - 12
Source: E-Lab Digital Engineering Inc.

The EDE702 Serial LCD Interface IC has been designed to REM Open communi cat i on channel t o COM1 at 9600 Baud
provide a cost-effective LCD control solution for a wide vari- OPEN ” com1: 9600, n, 8, 1, cd0, cs0, ds0, op0, r s” FOR OUTPUT AS #1
ety of embedded designs. The chip, a firmware-programmed
PIC16C54A, allows nearly any text-based LCD module to REM Cl ear Di spl ay
be controlled via a simple one-wire data link, freeing an addi- GOSUB 999
tional 6 to 10 I/O lines on your microcontroller or micro- OUT &H3F8, &HFE
processor system. GOSUB 999
Besides full LCD control, the EDE702 also allows the OUT &H3F8, &H1
creation of custom characters. Another useful feature is
REM Pause f or LCD scr een cl ear command t o compl et e on LCD
the serial-controlled digital output pin for lighting an
modul e
indicator LED, driving a sounder, etc.
FOR del ay=1 t o 5000: NEXT del ay
With a 2400 or 9600 baud rate and selectable serial data
REM Wr i t e f i r st r ow of t ext t o LCD scr een
polarity, the EDE702 can easily communicate with any GOSUB 999
device capable of sending asynchronous serial data PRI NT #1, ” EDE702 Test Scr een” ;
(including the BASIC Stamp!). Connection to a PC’s
serial port (RS232) requires only one 33-kΩ resistor. REM Jump t o second r ow on 2 l i ne LCD
The application diagram shows how the EDE702 may GOSUB 999
be employed as the ‘glue’ between a PC and an LCD OUT &H3F8, &HFE
(based on the H D44780 controller). A 4-MH z res- GOSUB 999
onator is used to clock the EDE702. If an external OUT &H3F8, &HC0
(TTL) oscillator is used, its output should be connected
to only OSC1 (pin 16), while OSC2 (pin 15) is left REM Wr i t e second r ow of t ext t o LCD scr een
unconnected. The LCD contrast is set in the usual way GOSUB 999
with a 10-20 kΩ preset. The schematic may be easily PRI NT #1, ” Ti me i s: ” ; TI ME$;
tested with the aid of a small QBASIC program as END
shown in the listing. More interesting E-Lab products
and datasheets in pdf format may be found on their REM Hol d unt i l Tr ansmi t Buf f er i s empt y
website at http://www.elabinc.com. E-Lab’s UK distrib- 999 I F ( I NP( &H3FD) AND &H40) = 0 THEN GOTO 999
utor is Dannell Electronics, http://www.dannell.co.uk. RETURN
(994091-1)

and IC3b (from the PC). R3 acts as a current-limiting resistor, and ply. The level converter, the phototransistor of IC2a and the LED
R4 is a pull-up resistor that holds the line securely high when the of IC2b are powered from the RS232 interface. Zener diode D2
signal level is not definitely low. limits the voltage to + 5 V for this purpose. The LOGO ! PLC provides
The well-known MAX232 IC is used to convert the signal levels the operating voltage for the inverters, the LED of IC2a and the
between 0/+ 5 V (on the PLC side) and symmetric ±12 V (RS232) phototransistor of IC2b.
for the serial interface. Since only the R xD and TxD lines are The interface circuit needs only around 10 mA from the R S232
needed, two drivers of the MAX232 can be connected in parallel in interface. In certain rare cases this can overload the interface drivers
each direction. of the PC, in which case an external + 5 V supply will be necessary.
As a rule, the LOGO ! interface does not need its own power sup- (994016-1)
o n e - c h ip LC D in t e r f a c e
5V
056 CW
EDE702
3 4 14
0 = 2400, 1 = 9600 1 BAUD OUT 18 Digital Output
0 = Inverted, 1 = Standard 2 POLARITY RCV 17 Serial Receive 1 6

BAUD ENABLE
7
Connect to +5V DC * 3 +5V OSC1 16 Oscillator Connection IC1 RS
17 8
33k RCV RW
Connect to +5V DC 4 +5V OSC2 15 Oscillator Connection EDE702
to PC Serial Out
16 10
Digital Ground 5 GND +5V 14 Connect to +5V DC OSC1 DATA 4
11
DATA 5
LCD Enable Line 6 ENABLE D7 13 LCD Data Pin 7 12
DATA 6
4MHz 15 13
LCD RS Line 7 RS D6 12 LCD Data Pin 6 OSC2 DATA 7
14 13 12 11 10 9 8 7 6 5 4 3 2 1
LCD RW Line 8 RW D5 11 LCD Data Pin 5 2
POLARITY D7
D6
D5
D4
D3
D2
D1
D0
R/W
VDD
VSS
E
RS
VO
No Connection 9 N/C D4 10 LCD Data Pin 4
to PC Ground 5
994091 - 11
994091 - 12
Source: E-Lab Digital Engineering Inc.

The EDE702 Serial LCD Interface IC has been designed to REM Open communi cat i on channel t o COM1 at 9600 Baud
provide a cost-effective LCD control solution for a wide vari- OPEN ” com1: 9600, n, 8, 1, cd0, cs0, ds0, op0, r s” FOR OUTPUT AS #1
ety of embedded designs. The chip, a firmware-programmed
PIC16C54A, allows nearly any text-based LCD module to REM Cl ear Di spl ay
be controlled via a simple one-wire data link, freeing an addi- GOSUB 999
tional 6 to 10 I/O lines on your microcontroller or micro- OUT &H3F8, &HFE
processor system. GOSUB 999
Besides full LCD control, the EDE702 also allows the OUT &H3F8, &H1
creation of custom characters. Another useful feature is
REM Pause f or LCD scr een cl ear command t o compl et e on LCD
the serial-controlled digital output pin for lighting an
modul e
indicator LED, driving a sounder, etc.
FOR del ay=1 t o 5000: NEXT del ay
With a 2400 or 9600 baud rate and selectable serial data
REM Wr i t e f i r st r ow of t ext t o LCD scr een
polarity, the EDE702 can easily communicate with any GOSUB 999
device capable of sending asynchronous serial data PRI NT #1, ” EDE702 Test Scr een” ;
(including the BASIC Stamp!). Connection to a PC’s
serial port (RS232) requires only one 33-kΩ resistor. REM Jump t o second r ow on 2 l i ne LCD
The application diagram shows how the EDE702 may GOSUB 999
be employed as the ‘glue’ between a PC and an LCD OUT &H3F8, &HFE
(based on the H D44780 controller). A 4-MH z res- GOSUB 999
onator is used to clock the EDE702. If an external OUT &H3F8, &HC0
(TTL) oscillator is used, its output should be connected
to only OSC1 (pin 16), while OSC2 (pin 15) is left REM Wr i t e second r ow of t ext t o LCD scr een
unconnected. The LCD contrast is set in the usual way GOSUB 999
with a 10-20 kΩ preset. The schematic may be easily PRI NT #1, ” Ti me i s: ” ; TI ME$;
tested with the aid of a small QBASIC program as END
shown in the listing. More interesting E-Lab products
and datasheets in pdf format may be found on their REM Hol d unt i l Tr ansmi t Buf f er i s empt y
website at http://www.elabinc.com. E-Lab’s UK distrib- 999 I F ( I NP( &H3FD) AND &H40) = 0 THEN GOTO 999
utor is Dannell Electronics, http://www.dannell.co.uk. RETURN
(994091-1)

a c c e le r o m e t e r t ilt se n so r
5V
057 output scale factor at pin 9 of
the accelerometer will be
± 400 mV g–1, so the voltage
C3
IC1 +3V4 REF
1
ADXL05
6 10Ω output will be ± 1.8 V ± 0.4 V.
C6
10n The output scale factor at pin 3
C1 PRE-AMP
BUFFER
AMP R5 100n of the 555 will be about
2 VOUT
16,500 H z ± 2.600 H z g–1. The
10k
9 4 8
22n 5 R
characteristic shown is the cir-
C1 VPR
4 8 10 3
7
DIS cuit’s output frequency vs the
R6 FREQUENCY
VPR VIN COM IC2 OUTPUT TO voltage occurring at pin 5 of the
100k
C2 555CP µP
2 TR 3
555.
OUT
22n R1 R3
6 Frequency stability of the
49k9 100k THR
C4
circuit is good. With a 15.5 kHz
C5 CV
5 1
0 g frequency, the measured 0 g
100n 510p frequency drift over the range
0–70 °C temperature range was
994046 - 11
5 Hz °C –1, which is 0.03% °C–1.
The change in frequency vs sup-
ply voltage is less than 10 H z
An Analog Devices application with a supply voltage of 5–9 V.
The circuit in the diagram shows how a Type ADXL05 accelerom- [994046]
eter can be connected to a low-cost CMOS 555 to provide a fre-
quency output. The component values indicated apply for a ± 1 g 25000
tilt application.
The nominal 200 mV g–1 output of the accelerometer appears
at pin 8 and is amplified ×2 to a level of 400 mV g–1 by the on- 20000
FREQ. OUTPUT [Hz]
board buffer amplifier. The 0 g bias level at pin 9 is about 1.8 V.

Capacitor C4 and resistor R 3 form a 16 Hz low-pass filter to lower
noise and improve the measurement resolution. 15000
The 555 operates as a voltage-controlled oscillator where R 5,
R 6 and C5 set the nominal operating frequency. The values of R 5 10000
and R 6 give a duty cycle of about 50% when a + 1.8 V (0 g) input
signal is applied to pin 5 of the 555. To prevent any change in fre-
quency owing to supply variations, the 555 operates from the 5000
accelerometer’s + 3.4 V reference rather than directly off the + 5 V
supply line.
The output frequency of the circuit is determined by the charg- 0
ing and discharge times set by R 5, R 6, and C 5. 3 2.5 2 1.5 1
With the circuit and component values shown in the diagram, the VIN
994046 - 12
o v e r v o lt a g e p r o t e c t io n
G. Kleine
Electronic circuits must never be operated with an excessive sup-
VC
6
1.19V
VC
7
VC
8
058 FLAG
4
UC3908
ply voltage. Such a situation may be prevented with the protection
circuit shown in the diagram. If the current through the IC
ADJ 5
becomes excessive, or the IC overheats, an external silicon-con-
trolled rectifier (thyristor), Th 1, is triggered, whereupon the sup- 4 SCR
ply voltage is short-circuited. This causes the current limiting in GND 1

C/S
S Q
the power supply to be enabled or the relevant fuse in the supply to GND 2
blow. Whatever, the circuit being supplied is protected. R
In the diagram, the overvoltage protection comes into action SATURATION

DETECTOR
THERMAL
SHUTDOWN
PWR
UP
when the supply voltage exceeds 5 V, but this may be set anywhere 994033 - 12

a c c e le r o m e t e r t ilt se n so r
5V
057 output scale factor at pin 9 of
the accelerometer will be
± 400 mV g–1, so the voltage
C3
IC1 +3V4 REF
1
ADXL05
6 10Ω output will be ± 1.8 V ± 0.4 V.
C6
10n The output scale factor at pin 3
C1 PRE-AMP
BUFFER
AMP R5 100n of the 555 will be about
2 VOUT
16,500 H z ± 2.600 H z g–1. The
10k
9 4 8
22n 5 R
characteristic shown is the cir-
C1 VPR
4 8 10 3
7
DIS cuit’s output frequency vs the
R6 FREQUENCY
VPR VIN COM IC2 OUTPUT TO voltage occurring at pin 5 of the
100k
C2 555CP µP
2 TR 3
555.
OUT
22n R1 R3
6 Frequency stability of the
49k9 100k THR
C4
circuit is good. With a 15.5 kHz
C5 CV
5 1
0 g frequency, the measured 0 g
100n 510p frequency drift over the range
0–70 °C temperature range was
994046 - 11
5 Hz °C –1, which is 0.03% °C–1.
The change in frequency vs sup-
ply voltage is less than 10 H z
An Analog Devices application with a supply voltage of 5–9 V.
The circuit in the diagram shows how a Type ADXL05 accelerom- [994046]
eter can be connected to a low-cost CMOS 555 to provide a fre-
quency output. The component values indicated apply for a ± 1 g 25000
tilt application.
The nominal 200 mV g–1 output of the accelerometer appears
at pin 8 and is amplified ×2 to a level of 400 mV g–1 by the on- 20000
FREQ. OUTPUT [Hz]
board buffer amplifier. The 0 g bias level at pin 9 is about 1.8 V.

Capacitor C4 and resistor R 3 form a 16 Hz low-pass filter to lower
noise and improve the measurement resolution. 15000
The 555 operates as a voltage-controlled oscillator where R 5,
R 6 and C5 set the nominal operating frequency. The values of R 5 10000
and R 6 give a duty cycle of about 50% when a + 1.8 V (0 g) input
signal is applied to pin 5 of the 555. To prevent any change in fre-
quency owing to supply variations, the 555 operates from the 5000
accelerometer’s + 3.4 V reference rather than directly off the + 5 V
supply line.
The output frequency of the circuit is determined by the charg- 0
ing and discharge times set by R 5, R 6, and C 5. 3 2.5 2 1.5 1
With the circuit and component values shown in the diagram, the VIN
994046 - 12
o v e r v o lt a g e p r o t e c t io n
G. Kleine
Electronic circuits must never be operated with an excessive sup-
VC
6
1.19V
VC
7
VC
8
058 FLAG
4
UC3908
ply voltage. Such a situation may be prevented with the protection
circuit shown in the diagram. If the current through the IC
ADJ 5
becomes excessive, or the IC overheats, an external silicon-con-
trolled rectifier (thyristor), Th 1, is triggered, whereupon the sup- 4 SCR
ply voltage is short-circuited. This causes the current limiting in GND 1

C/S
S Q
the power supply to be enabled or the relevant fuse in the supply to GND 2
blow. Whatever, the circuit being supplied is protected. R
In the diagram, the overvoltage protection comes into action SATURATION

DETECTOR
THERMAL
SHUTDOWN
PWR
UP
when the supply voltage exceeds 5 V, but this may be set anywhere 994033 - 12

between 3.3 V and 9 V. Potential divider R 1-R 2 reduces the sup- 5V
ply voltage to 1.19 V (nominal) at the ADJ(ust) pin of IC1. As long
R1 R3
as the level at this pin is ≤ 1.14 V, IC1 remains in the standby mode
10k
10k
and draws a current of about 70 µA.
6 7 8
When the potential at pin 5 rises above 1.19 V (maximum
VC VC VC FLAG
< 1V19
1.24 V), IC 1 draws a current of up to 17 A so as to pull down the 3
FLAG
supply voltage – the flag signal is then actuated. If in this situation the 5 IC1 Th1
peak current of 17 A is exceeded, or the body temperature of the ADJ
UC3908D
IC rises above 165 °C, or when the internal shunt transistor goes SCR
4
*
into saturation, the external thyristor is triggered via pin 4 (SCR).
This protects the IC itself and ensures that the overvoltage is C1
R2
1 2
R4
* zie tekst
* see text
35k7
10k
negated. The rating of the thyristor must, of course, be in accor- 10µ * voir texte
dance with that of the power supply. In this situation, IC 1 shorts * siehe Text
out its internal shunt transistor to minimize the internal dissipation.
The UCC3908 is available in three different enclosures. For sit- UC3908T UC3908TD
UC3908D
uations in which large supply currents flow for long periods, the
GND
TO-220 version is recommended (if necessary with heat sink). GND 1 8 VC
When the load current is not large, the SO-8 version may be used. GND 2 7 VC 12345
In that situation, it may even be possible to omit the thyristor, but VC
1: FLAG 1: FLAG
FLAG 3 6
the anticipated maximum temperature must then be calculated 2: SCR
3: GND
2: SCR
3: GND
SCR 4 5 ADJ
very carefully. 4: ADJ 4: ADJ
5: VC 5: VC
Further information from: http://www.unitrode.com 1 3 5
[994033] 2 4 994033 - 11
d isc r e t e v o lt a g e in v e r t e r
U in T1 T3
G. Kleine
059
The circuit in the diagram enables a negative voltage to be derived
without the use of integrated circuits. Instead, it uses five n-p-n
transistors that are driven by a 1 kHz (approx) TTL clock.
R1 R6 R4 When the clock input is high, transistors T 1 and T 2 link capac-
itor C1 to the supply voltage, UIN, which typically is 5 V. During this
2k2
2k2
2k2
process, transistor T 5 conducts so that T 3 and T 4 are off.

When the clock input is low, T 5 is cut off, whereupon transis-
T5
TTL-CLK R3 tors T 3 and T 4 are switched on via pull-up resistor R 6 and either
2k2 R 4 or R 5. This results in the charge on C 1 being shared between
(ca. 1kHz) R2
C1
R5 C1 this capacitor and C 2 Since the + ve terminal of C 2 is at ground
10k
10k
22µ
potential, its –ve terminal must become negative w.r.t. earth.
22µ
The high level at the clock input must be of the same order as
U in the positive input voltage, UIN, otherwise T 1 cannot be switched
on.
T2 T4
The clock frequency should be around 1 kHz to ensure a duty
cycle ratio of 1:1. Altering the ratio results in a different level of
BC548 negative output voltage, but this is always smaller than that with a
ratio of 1:1.
T1...T5 = BC548
[994024]
C E
B 994024 - 11
o v e n - c o n t r o lle d t e m p e r a t u r e
st a b ilit y
G. Kleine
Accurate measurements that are not affected by ambient temper-
060
ature may be taken when the part or circuit being tested is placed
in an oven whose inside temperature is held constant after a short
warming-up period. This works very well, indeed, when the tem-

R1 R3
10k
10k
6 7 8
VC VC VC FLAG
< 1V19
FLAG
UC3908D
4
*
R2
1 2
R4
* zie tekst
* see text
35k7
10k
UC3908D
GND
1: FLAG 1: FLAG
FLAG 3 6
3: GND
2: SCR
3: GND
SCR 4 5 ADJ
5: VC 5: VC
[994033] 2 4 994033 - 11
U in T1 T3
G. Kleine
059
2k2
2k2
2k2

T5
(ca. 1kHz) R2
C1
10k
10k
22µ
22µ
on.
T2 T4
ratio of 1:1.
T1...T5 = BC548
[994024]
C E
B 994024 - 11
st a b ilit y
G. Kleine
060

R1 R3
10k
10k
6 7 8
VC VC VC FLAG
< 1V19
FLAG
UC3908D
4
*
R2
1 2
R4
* zie tekst
* see text
35k7
10k
UC3908D
GND
1: FLAG 1: FLAG
FLAG 3 6
3: GND
2: SCR
3: GND
SCR 4 5 ADJ
5: VC 5: VC
[994033] 2 4 994033 - 11
U in T1 T3
G. Kleine
059
2k2
2k2
2k2

T5
(ca. 1kHz) R2
C1
10k
10k
22µ
22µ
on.
T2 T4
ratio of 1:1.
T1...T5 = BC548
[994024]
C E
B 994024 - 11
st a b ilit y
G. Kleine
060

perature inside the oven is held 5V
higher than the maximum ambi-
R1 R2 R8 R12
ent temperature. This is C1 C3
330Ω
1k5
100k
27k
because the inside of the oven
may be heated but cannot be 1µ 100µ
R4
cooled. This type of control is
1M R11
frequently used to stabilize a 100k
R13
crystal oscillator or a surface
10k
R3
6
acoustic wave (SAW) filter. 10k
7
R7
2 T1
The circuit consists of a R5 IC1b 100k
5 1
heating element, R 14, which is 680Ω IC1a
3
thermally coupled to tempera-
4V096
BD676
3V48
ture sensor IC 3. The output of +75°C
R10
the sensor at 75 °C is + 3.48 V, P1 100k
which rises linearly at a rate of 1k
10 mV °C . –1 3V48 @+75°C +10mV/K
IC2 IC3
Integrated circuit IC 1 com- 2
R6 R9 R14
prises an operational amplifier C2
6k8
100k
7Ω5
(at pins 5, 6 and 7) and a com-
LM4040 1n 5W
parator (at pins 1, 2 and 3). The LM335
3 -4.1
op amp is arranged as a ×100
amplifier and delivers an error LM335 BD676
voltage that depends on the dif- 5V
ference between the actual tem-
perature and that set with P 1. LM4040
2 8
The preset can set the wanted 1 IC1
temperature between + 55 °C 3
4
and + 105 °C. The stable voltage
across potential divider E B 994030 - 11
R 5-P 1-R 6 is 4.096 V, which is C
provided by reference voltage
source IC 2.
The error voltage across R 7 is applied to the oscillator which is transistor T 1, and thus heating element R 14, remains on a little
based on the comparator in IC 1. It alters the duty factor of the longer than when the temperature is stable.
oscillator output in such a way that when the temperature drops, [994030]
f e e d b a c k c ir c u it c la m p s
p r e c ise ly
R4
1k
R3
10k
061
A linear circuit consisting of an input buffer, IC1a, and output-scal-
2
ing amplifier, IC1b, two zener diodes, D 1 and D 2, and several other
1 components can supply sharp, precise, bipolar clamp levels with
IC1a
3 R1 continuous variable control, from 0 V to ± 11 V. A feedback loop
C1
Ui 6 Uo enclosing the amplifiers and zener diodes generates the high
1k
7
2n2 IC1b clamping accuracy—see diagram.
5
Within the limit range of the clamp, ± VL, the zener diodes are off,
and IC 1b feeds back its output to the inverting input of IC 1a via
D1
R2
5V6 R 4. At the same time, IC1a drives IC1b via voltage divider R V. The
P
13k
20k
feedback forces the inverting input of op amp IC1a to equal Ui at
D2
5V6 the non-inverting input terminal.
The circuit forces the inverting input of IC1b also to follow Ui.
There is no signal voltage drop across R 4, because no current can
IC1 = OPA2111
flow from it into the inverting input of IC 1a . Consequently, the
15V
C4 C2 non-inverting input of IC1b, which defines the potentiometer out-
put at feedback equilibrium, must also track Ui. In fixed-level lim-
100n 10µ 25V
8 iting applications, a resistive divider may replace potentiometer
IC1 R V. Amplifier IC 1a then delivers an output
4 C5 C3
UO = (1+ R 3/R 2)/Ui

100n 10µ 25V
15V 994051 - 11
when

perature inside the oven is held 5V
higher than the maximum ambi-
R1 R2 R8 R12
ent temperature. This is C1 C3
330Ω
1k5
100k
27k
because the inside of the oven
may be heated but cannot be 1µ 100µ
R4
cooled. This type of control is
1M R11
frequently used to stabilize a 100k
R13
crystal oscillator or a surface
10k
R3
6
acoustic wave (SAW) filter. 10k
7
R7
2 T1
The circuit consists of a R5 IC1b 100k
5 1
heating element, R 14, which is 680Ω IC1a
3
thermally coupled to tempera-
4V096
BD676
3V48
ture sensor IC 3. The output of +75°C
R10
the sensor at 75 °C is + 3.48 V, P1 100k
which rises linearly at a rate of 1k
10 mV °C . –1 3V48 @+75°C +10mV/K
IC2 IC3
Integrated circuit IC 1 com- 2
R6 R9 R14
prises an operational amplifier C2
6k8
100k
7Ω5
(at pins 5, 6 and 7) and a com-
LM4040 1n 5W
parator (at pins 1, 2 and 3). The LM335
3 -4.1
op amp is arranged as a ×100
amplifier and delivers an error LM335 BD676
voltage that depends on the dif- 5V
ference between the actual tem-
perature and that set with P 1. LM4040
2 8
The preset can set the wanted 1 IC1
temperature between + 55 °C 3
4
and + 105 °C. The stable voltage
across potential divider E B 994030 - 11
R 5-P 1-R 6 is 4.096 V, which is C
provided by reference voltage
source IC 2.
The error voltage across R 7 is applied to the oscillator which is transistor T 1, and thus heating element R 14, remains on a little
based on the comparator in IC 1. It alters the duty factor of the longer than when the temperature is stable.
oscillator output in such a way that when the temperature drops, [994030]
f e e d b a c k c ir c u it c la m p s
p r e c ise ly
R4
1k
R3
10k
061
A linear circuit consisting of an input buffer, IC1a, and output-scal-
2
ing amplifier, IC1b, two zener diodes, D 1 and D 2, and several other
1 components can supply sharp, precise, bipolar clamp levels with
IC1a
3 R1 continuous variable control, from 0 V to ± 11 V. A feedback loop
C1
Ui 6 Uo enclosing the amplifiers and zener diodes generates the high
1k
7
2n2 IC1b clamping accuracy—see diagram.
5
Within the limit range of the clamp, ± VL, the zener diodes are off,
and IC 1b feeds back its output to the inverting input of IC 1a via
D1
R2
5V6 R 4. At the same time, IC1a drives IC1b via voltage divider R V. The
P
13k
20k
feedback forces the inverting input of op amp IC1a to equal Ui at
D2
5V6 the non-inverting input terminal.
The circuit forces the inverting input of IC1b also to follow Ui.
There is no signal voltage drop across R 4, because no current can
IC1 = OPA2111
flow from it into the inverting input of IC 1a . Consequently, the
15V
C4 C2 non-inverting input of IC1b, which defines the potentiometer out-
put at feedback equilibrium, must also track Ui. In fixed-level lim-
100n 10µ 25V
8 iting applications, a resistive divider may replace potentiometer
IC1 R V. Amplifier IC 1a then delivers an output
4 C5 C3
UO = (1+ R 3/R 2)/Ui

100n 10µ 25V
15V 994051 - 11
when

VL and
Uo V L= x[(1+ R 3/R 2)](V Z + V F )
where x is the setting fraction of R V and V Z and V F are the zener

Ui and forward voltages respectively. The overall circuit response,
then, is simply that of a voltage amplifier when the output signal
is within the limit boundaries.
Amplifier IC 1a generates small deviations from an ideal
response because the gain of IC1b, (1+ R 3/R 2), magnifies any off-
set voltage and noise from IC1a . Similarly, the loop gain mitigates
-VL the clamping error by sharpening its clamping response. The zener
drive increases during the transition to the clamping state. The
994051 - 12 maximum clamping level depends on the zener voltage and the
closed-loop gain of IC 1b. Z ener diodes rated at 5.6 V provide a
wide control range and good temperature stability. At higher zener
voltages, the even wider control range is offset by increasing drift
–V L< UO < V L of the clamping level with temperature.
[994051]
m a in s/f u se f a ilu r e in d ic a t o r
S1 F1
G. Kleine
062
The indicator shows when the mains is present at its output by a
continuous glow of a neon bulb, La1, and when the fuse is blown by
D1
flashing of the neon bulb.
When the fuse is intact, capacitor C 2 acts as the series resis-
1N4007 C2 tance for the neon bulb, so that this glows continuously. When the
L
fuse has blow, the mains voltage across diode D 1 is applied as a
R1
680k
47n pulsating direct voltage to network R 1-C 1. Capacitor C 1 charges

240V D2
400V ~ slowly and when the voltage across it reaches 80–100 V, the neon
50Hz to load
bulb comes on. Capacitor C 1 is then discharged slowly via diode
C1 1N4007 La1 D 2 and the bulb. When the voltage across it has dropped suffi-
N ciently, the bulb goes out, whereupon C1 slowly charges again. This
1µ process repeats itself, so that, provided the values of R 1 and C1 are
250V ~ right, the bulb flashes visibly.
The potential across capacitor C 2 is a ramp with a peak value
of 30 V (which is, of course, applied to the load).
E Note that the neon bulb used for this purpose must not be a
994027 - 11 type that has a built-in series resistor.
[994027]
1 3 V /2 A P S U f o r h a n d h e ld r ig s
Design by N.S. Harisankar VU3NSH
This compact 13-V/2-A power supply for ham radio rigs and other
063
invariably associated with a fair number of external components,
while we should also consider design factors like total power dis-
sipation and input voltage range.
VHF/UHF portable PMR s is based on the STR 2012/13 voltage The STR is a hybrid power IC containing a switch-mode power
regulator IC from Sanken Electric Co. Many power supplies for supply. It supplies a fixed output voltage and accepts relatively high
handheld amateur radio rigs are based on the LM317, LM350 or input voltages. Another advantage is its relatively high power dis-
even the good old LM723. U nfortunately, these regulators are sipation rating. The 5-pin STR is available for 5.1 V, 12 V, 13 V,

VL and
Uo V L= x[(1+ R 3/R 2)](V Z + V F )

[994051]
S1 F1
G. Kleine
062
D1
L
R1
680k

240V D2
50Hz to load
[994027]
063

VL and
Uo V L= x[(1+ R 3/R 2)](V Z + V F )

[994051]
S1 F1
G. Kleine
062
D1
L
R1
680k

240V D2
50Hz to load
[994027]
063

IC1
15 V and 24 V at an output current rating of 2 A. H ere, the 12V
STR2012 and STR2013 are suggested for output voltages of 12 V STR2012 L1 F1 (13V)
5 1
or 13 V respectively. The normal operating voltage of most hand- STR2013
300µH
2A F
helds being between 12.6 V and 13.8 V, the STR1303 will be the 2A
preferred device in most cases. 3 4 Th1
A high-speed crowbar circuit is added to the regulator output.
C1 C2 D2
Thyristor Th1 (a TIC106 or 2N4442) is triggered when the output
voltage rises above the zener voltage of D2, that is, 15 volts TIC106
1000µ 1000µ 15V
63V 25V 400mW 2N4442
(approximately). When this happens, the thyristor short-circuits R1
D1
the supply output, protecting the radio against overvoltage and
1k5
blowing fuse F1. Diode D1 acts as a reverse polarity protection,
also in combination with fuse F1.
To allow for its dissipated heat, the STR regulator should be 1N5401 994075 - 11
mounted on a heatsink. Efficiency will be around 80% , with rip-
ple rejection at a comfortable 45 dB. The raw input voltage to the
regulator should be in the range 18 to 35 V.
The coil, L1, may be selected from the range produced by New- that number to arrive at about 300 µH.
port. The type 1430430 is suggested. If difficult to obtain, then an Finally, keep the wire between pin 3 of the STR and ground as
ordinary triac suppressor type may be used instead. Note, how- short as possible, and connect at least the negative terminals of C1
ever, that the inductance of these coils is usually just 100 µH, so and C3 to this point to give a ‘star’ type ground connection.
you have to count the number of turns and add another 0.7 times (9944075-1)
sim p le r e la y st e p -u p c ir c u it s
A R3
6V
064
briefly 12 volts — enough to actuate the contact(s). However, the
coil voltage drops to the supply voltage fairly quickly. The period is
2k7
T2 determined by the R-C time constant of the relay coil resistance

R4 and the 220-µF capacitor.
27k
While this circuit is simple and works well in many situations, it
BC558 has a few weaknesses in its current form. The relay may remain
energized for as long as one second after the control input has
CONTROL IN
fallen. Also, if the control input goes high before the capacitor has
R1
T1
C1 D1
Re1 fully recharged, it may not have enough energy to control the relay
1k2 reliably. Also, the voltage drop across the diode limits the voltage
> 3V
R2
220µ
16V 12V to about 10.8 volts. The more complex version of the circuit shown
in Figure B fixes these problems by using an extra transistor and
270Ω
D2
BC548 2x
1N4148 diode. In this arrangement, the BC558 is now isolated from the
recharge current of the capacitor. The new transistor provides fast
994081 - 11
charging for the capacitor. Charging is completed within the
mechanical response time of the relay.
When using these circuits it should be noted that the contact pres-
Design by R. Graham sure of the relay contacts may be al little lower than with the nom-
Have you ever needed to power a 12-volt relay in a circuit but only inal coil voltage. It is therefore advisable to keep contact currents
had 6 or 9 volts available? This simple circuit will solve that prob- well below the maximum specified value.
lem. It allows 12-volt relays to be operated from 6 or 9 volts, or 24- (994081-1)
volt relays from 12 volts. While most normal relays require the
manufacturer-specified coil voltage to reliably pull the contacts
6V
together, once the contacts are together you only need about half R3
that rated voltage to hold them in. This circuit works by using that B
2k7
T3
principle to provide a short burst of twice the supply voltage to R4
move the contacts and then applies the available 6 or 9 volts to the 27k
relay to lock the contacts in place. T2
BC558
With reference to Figure A., when the main supply is applied to
the circuit the 220-µF capacitor, C1, charges quickly to + 6 volts D3 BC548
through resistor R3. The circuit is now awaiting voltage on the con- CONTROL IN
trol input. When a control voltage (can be as little as 3 volts) is 1N4148

T1 Re1
R1 C1 D1
applied to the control input, transistor T1 switches on. The other
4k7
transistor, a BC558, is also switched on. This allows connection of > 3V 220µ
12V
R2 BC548 16V
the relay coil to the main supply rail while T1 shorts the positive
D2
1k2
terminal of the 220-µF capacitor to ground. Now the negative ter- 2x

1N4148
minal of the capacitor is at a potential of –6 volts. This is applied to
the other side of the relay coil. The relay coil potential is then
994081 - 12

IC1
15 V and 24 V at an output current rating of 2 A. H ere, the 12V
STR2012 and STR2013 are suggested for output voltages of 12 V STR2012 L1 F1 (13V)
5 1
or 13 V respectively. The normal operating voltage of most hand- STR2013
300µH
2A F
helds being between 12.6 V and 13.8 V, the STR1303 will be the 2A
preferred device in most cases. 3 4 Th1
A high-speed crowbar circuit is added to the regulator output.
C1 C2 D2
Thyristor Th1 (a TIC106 or 2N4442) is triggered when the output
voltage rises above the zener voltage of D2, that is, 15 volts TIC106
1000µ 1000µ 15V
63V 25V 400mW 2N4442
(approximately). When this happens, the thyristor short-circuits R1
D1
the supply output, protecting the radio against overvoltage and
1k5
blowing fuse F1. Diode D1 acts as a reverse polarity protection,
also in combination with fuse F1.
To allow for its dissipated heat, the STR regulator should be 1N5401 994075 - 11
mounted on a heatsink. Efficiency will be around 80% , with rip-
ple rejection at a comfortable 45 dB. The raw input voltage to the
regulator should be in the range 18 to 35 V.
The coil, L1, may be selected from the range produced by New- that number to arrive at about 300 µH.
port. The type 1430430 is suggested. If difficult to obtain, then an Finally, keep the wire between pin 3 of the STR and ground as
ordinary triac suppressor type may be used instead. Note, how- short as possible, and connect at least the negative terminals of C1
ever, that the inductance of these coils is usually just 100 µH, so and C3 to this point to give a ‘star’ type ground connection.
you have to count the number of turns and add another 0.7 times (9944075-1)
sim p le r e la y st e p -u p c ir c u it s
A R3
6V
064
briefly 12 volts — enough to actuate the contact(s). However, the
coil voltage drops to the supply voltage fairly quickly. The period is
2k7
T2 determined by the R-C time constant of the relay coil resistance

R4 and the 220-µF capacitor.
27k
While this circuit is simple and works well in many situations, it
BC558 has a few weaknesses in its current form. The relay may remain
energized for as long as one second after the control input has
CONTROL IN
fallen. Also, if the control input goes high before the capacitor has
R1
T1
C1 D1
Re1 fully recharged, it may not have enough energy to control the relay
1k2 reliably. Also, the voltage drop across the diode limits the voltage
> 3V
R2
220µ
16V 12V to about 10.8 volts. The more complex version of the circuit shown
in Figure B fixes these problems by using an extra transistor and
270Ω
D2
BC548 2x
1N4148 diode. In this arrangement, the BC558 is now isolated from the
recharge current of the capacitor. The new transistor provides fast
994081 - 11
charging for the capacitor. Charging is completed within the
mechanical response time of the relay.
When using these circuits it should be noted that the contact pres-
Design by R. Graham sure of the relay contacts may be al little lower than with the nom-
Have you ever needed to power a 12-volt relay in a circuit but only inal coil voltage. It is therefore advisable to keep contact currents
had 6 or 9 volts available? This simple circuit will solve that prob- well below the maximum specified value.
lem. It allows 12-volt relays to be operated from 6 or 9 volts, or 24- (994081-1)
volt relays from 12 volts. While most normal relays require the
manufacturer-specified coil voltage to reliably pull the contacts
6V
together, once the contacts are together you only need about half R3
that rated voltage to hold them in. This circuit works by using that B
2k7
T3
principle to provide a short burst of twice the supply voltage to R4
move the contacts and then applies the available 6 or 9 volts to the 27k
relay to lock the contacts in place. T2
BC558
With reference to Figure A., when the main supply is applied to
the circuit the 220-µF capacitor, C1, charges quickly to + 6 volts D3 BC548
through resistor R3. The circuit is now awaiting voltage on the con- CONTROL IN
trol input. When a control voltage (can be as little as 3 volts) is 1N4148

T1 Re1
R1 C1 D1
applied to the control input, transistor T1 switches on. The other
4k7
transistor, a BC558, is also switched on. This allows connection of > 3V 220µ
12V
R2 BC548 16V
the relay coil to the main supply rail while T1 shorts the positive
D2
1k2
terminal of the 220-µF capacitor to ground. Now the negative ter- 2x

1N4148
minal of the capacitor is at a potential of –6 volts. This is applied to
the other side of the relay coil. The relay coil potential is then
994081 - 12

S /P D IF t e st g e n e r a t o r
5V
14 14
5V
R9
4Ω7
R8
065 IC4
TOTX173
S/PDIF
8k2
C7 C8
5V IC1 IC2 3
100n 100n C4
7 7 2
L1 OPTO
D1 4
100n
128f s
R1 1N4148 1
47µH
100Ω
D2
R5
K1
C5 S1
C6
75Ω
1N4148
47µ 25V 100n COAX
270Ω
Tr1 R4
5V
19
C2
4 10
5 20
MCK TXP
2 S 5 12 S 9 8 17 47n
D D SDATA TXN
IC2a IC2b IC3
3 6 11 8 9 2 R7
K2
C C V PRO
10 3 75Ω
R R C/SBF C1/FC0
11 24 COAX
270Ω
U TRNPT/FC1 R6
1 13
6 4 20 : 2 : 2
JP1 SCK C6/C2
15 1
L R CBL/SBC C7/C3
13 5V
EM1/C8 C3
7 14 R3
FSYNC EM0/C9
2 5V
10k
21 12 47n
IC1a M0 C9/C15
22
1 IC1 = 74HC04 M1C S 8 4 0 2 A
23 16
IC2 = 74HC74 M2 RST
1
2 3 4 5 6 7 8 9
C1
IC1f IC1e IC1d 18
5V
13 11 9
1 1 1 22µ
12 10 8 40V
R2 1 8x 10k
3 5
1 1
4 6
994098 - 11
IC1b IC1c
T. Giesberts analogue filters, so that the level of the sinusoidal signal more or less
The generator is intended primarily for checking S/PDIF (Sony/ coincides with that of a 0 dB signal. At this frequency, it is also
Philips Digital Interface Format) receivers and any associated dig- clearly discernible whether de-emphasis correction is present (S1–4
ital-to-analogue converters (DAC) and/or output filters. The exter- off: de-emphasis on) and, if so, whether this provides the requisite
nal clock – standard TTL level – enables 128 sample frequencies attenuation of 10 dB.
to be generated. The clock may also be used for generating standard The CS8402A is used in mode 0 (low level at inputs M 0–M 2).
frequencies with the remaining inverters serving as crystal oscilla- This mode is really intended for interfacing with analogue-to-dig-
tors (provided a 74HCU04 is used). ital converters (ADC), but is used here since it enables the FSYNC
The sender is a Type CS8402A digital audio interface trans- of the L/R clock and the bit clock, SCK, to be derived internally
mitter from Crystal. In this short article it is not possible to list all from the MCK clock, and to be arranged as outputs. The data for
settings that may be obtained with switch S1: the reader is referred half the sampling frequency are obtained by halving the L/R clock
to the data sheet of the IC or to the ‘sampling rate converter’ pub- in IC2a. Since the data must be the 2s complement, they are shifted
lished in the October 1996 issue of this magazine. The connections by one clock period in IC2b, so that, depending on the phase of the
to the switch are exactly as described in that article. L/R clock, that is, inverter IC 1a , either the left-hand or the right-
There is an optical (IC 4) as well as a coaxial output (K1, K2). hand channel contains a peak-level signal. The other channel then
Toroidal transformer Tr 1 provides electrical isolation of the coax- toggles one LSB at identical frequency.
ial sockets and also serves to prevent earth loops. Capacitors C 2 It should be noted that some DACs, particularly 1st generation
and C 3 provide the earth connections for the sockets. 1-bit types, fail to operate correctly with 0 dB signals, which may
The transformer is wound on a TN13/7.5/5-3E25 core with a cause difficulties with overdriven CDs (see ‘Clipping and the CD’
transformation ratio of 20:2:2 since TXP and TXN (on IC 3) are in the Readers’ Letters column in the April 1999 issue of this mag-
differential outputs. The primary voltage is 10 V pp to give a signal azine). This may be checked with the present generator. If the
across the 75 Ω coaxial outputs of 0.5 V pp. After a reset, both out- audio signal is not wanted, the SDATA input should be linked to
puts are low and are not short-circuited by Tr 1. A coarse audio sig- earth and IC 1 and IC 2 omitted.
nal is added to prevent, for instance, muting of the outputs. Resistor R 1 and diodes D 1, D 2 protect the MCK input against
Jumper JP 1 enables either the left-hand or right-hand signal to excessive or unbalanced clock signals.
contain a rectangular signal at peak value and half the sampling The generator draws a current of about 30 mA.
frequency. This enables, for instance, the channel separation and [994098]
the combination of digital and analogue signals to be checked. In
most DACs, filter action commences at half the sampling fre-
quency. At that instance, there is hardly any attenuation by the

p r o g r a m m a b le
st a t e -v a r ia b le a c t iv e f ilt e r
C14
5VA 2V5
066
R6 C4 HP
100n 100Ω
820n
IC4
3 5 3 5
1 R7 C5 LP
3 7 1 7 1 7
5 IC2a IC2b IC3a IC3b 100Ω
6 2 6 2 6
C1 R5 820n
2
47k
4 R1 C2 C3
180n 8
10k
1% 10n 10n R8 C6 BP
TLC271
100Ω
R10 R2 820n
47k 10k
1% R9 C7 BR
100Ω
820n
W4
W2
A4
A2
B2
B4
W1
W3
B1
B3
5V
R11
16 5VA
10k
K1 VDD 23
10 A1
19 1 SHDN 22 W1
W1
20 2 12 24 B1 8 C10 8 C11
SDI B1
21 3 14 21 IC2 IC3
SCLK AGND1
4 100n 4 100n
22 4 11
CS IC2, IC3 = OP279G
3 A2
23 5 15 A2
RS 4 W2
24 6 IC1 W2
2 B2
25 7 B2
1
26 8 AGND2
27 9 AD8403 A3
19
28 10 AR10 18 W3 5V 5VA 2V5
W3
29 11 20 B3
B3
30 12 17 5V L1 R3
AGND3
31 13 100k
13 7 A4 100µH
32 14 SDO A4
8 W4 R4
33 15 W4 C7 C8 C9 C12 C13
100k
6 B4
34 16 B4
5 100µ 100n 10µ 100µ 100n
35 17 AGND4
DGND 16V 16V 16V
36 18
9 L2
100µH
984112 - 11
Design: H. Bonekamp i.e., the resolution is 8 bits. This particular pot controls the signal
Dimensioning and testing active filters for audio and measurement level applied to opamp IC2a.
applications is not seriously good fun, in fact, many hobbyists seem After a reset pulse on the RS terminal, the wipers of the four elec-
to avoid the subject altogether just because of the complexity of the tronic pots inside the ADC8403 are set to ‘mid travel’. The chip
calculations involved. And indeed, there are so many parameters to reads its control information via 3 input terminals: CS (chip select),
observe in active filter design (slope, phase response, high-pass, low- SDI (serial data in) and SCLK (serial clock). Internally, the SDI
pass, band-pass or stop pass, etc.) that only a select few are interested. signal (data) is applied to a serial-to-parallel shift register. The data
The project described here alleviates some of the above problems by consists of 10 bits. The first two bits select the desired DAC (1 of 4),
joining the forces of advanced hardware (a 4-channel digitally con- and the next 8 bits, the value for the relevant DAC. The SDO (ser-
trolled variable resistor chip) and some clever computer software (a ial data out) pin allows two or more ADC8403’s to be cascaded.
program written in C). The upshot is that you, the user, define the The filter has one input and four outputs: HP (high-pass), LP (low-
filter you want, and the hardware/software combination does the rest. pass), BP (band-pass) and BR (band-reject). The relation between
The hardware consists of a basic active filter comprising four the filter type and the associated frequency band is summarized in
opamps. The resistive elements in the filter (which determine the the Table. The highest and lowest frequencies may be lowered by
filter response) are electronically controlled potentiometers con- a factor of 10 by replacing C2 and C3 with 100-nF polystyrene
tained in IC1, a 4-channel ‘TRIMDAC’ type ADC8403. For exam- close-tolerance capacitors.
ple, one such potentiometer (with a value of 10 kΩ typ.) is avaial- The circuit is powered by a regulated 5-volt supply. Note the use
ble on pins A2, W2 and B2 of the ADC8403, where W2 is the of two chokes (L1 and L2) and a fair number of decoupling capac-
wiper. By means of suitable control signals received from the PC’s itors to ensure a pristine supply voltage to the DACs and opamps.
printer port, this pot can be programmed to take on 1 of 256 values, The program that arranges for the correct filter parameters (i.e.,

0 +
C8
H2
L1 R3
K1 L2 R4
C7
C12 T
C6
R11
C9 BP
C3
C11
R8 C5
O
R7 LP
IC3
C4
O1
HP
C13
R2
C2 C14
O2
ROTKELE )C(
1-211489
R6
R10
IC1
IC4
T
C10
C1
R5
BR
R1
IC2 984112-1
O3
C15
H1
R9
potentiometer values) to be set was written in the ‘C’ higher pro-

gramming language. Its source code and executable file may be
found on a diskette supplied through the Publishers’ Readers Ser-
vices. The screendump gives an impression of the available options.
(C) ELEKTOR
984112-1
The filter is built on a compact printed circuit board. Once fully
COMPONENTS LIST
populated, the board may be powered up and then connected
direct to the PC’s printer port using a standard parallel printer Resistors: Inductors:
cable. The circuit draws about 10 mA. R1,R2 = 10kΩ 1% L1,L2 = 100µH choke
Although the electronic potentiometers inside the ADC8403 are R3,R4 = 100kΩ
R5,R10 = 47kΩ Semiconductors:
R6-R9 = 100Ω IC1 = AD8403AR10 (Analog
R11 = 10kΩ Devices)
Filter Type Frequency Range (Hz)
IC2,IC3 = OP279G
Band-pass 2.0k – 20k Capacitors: IC4 = TLC271CP
Band reject 2.0k – 20k C1 = 180nF MKT (Siemens)
C2,C3 = 10nF 1% Miscellaneous:
Low-pass: polystyrene K1 = 36-way Centronics
Critically damped 1.03k – 20.5k C4,C5,C6,C15 = 820nF MKT socket, PCB mount, angled
Bessel 1.26k – 25.0k (Siemens) pins
Butterworth 1.61k – 31.8k C7,C12 = 100µF 16V radial PCB, order code 984112-1
Chebychev 0.5dB 1.89k – 37.4k C8,C10,C11,C13,C14 = Disk (source code and
100nF ceramic executable), order code
Chebychev 1dB 2.00k – 39.6k
C9 = 10µF 16V radial 996018-1
High-pass: matched to 1%, their absolute value may deviate from the nominal
Critically damped 2.50k – 49.5k 10 kΩ. The actual value has to be measured and entered into the
Bessel 2.04k – 40.5k control program. To do so, switch on the circuit and measure the
Butterworth 1.61k – 31.8k resistance between pins 23 and 24 of IC1. Enter this value into the
Chebychev 0.5dB 1.37k – 27.1k program — it will be stored in a configuration file. This calibra-
Chebychev 1dB 1.29k – 25.6k tion procedure is only required once. Finally, the control program
Chebychev 2dB 1.21k – 23.9k is best used in ‘real-DOS mode — we recommend against running
Chebychev 3dB 1.16k – 22.9k it in a Windows ‘DOS box’.
(984112-1)

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THE ELECTRONICS & COMPUTER MAGAZINE JULY/AUGUST 1999

COP8 PROGRAMMING CONTEST

This article presents a

Design by MadLab, Edinburgh

Elektor Electronics 7-8/99

LINK 1 LINK 2 LINK 3 LINK 4

Figure 1. Circuit dia-

Elektor Electronics 7-8/99 15

16 Elektor Electronics 7-8/99

Elektor Electronics 7-8/99 17

Figure 2. PCB artwork.

18 Elektor Electronics 7-8/99

Elektor Electronics 7-8/99 19

The 80C32 BASIC

Elektor Electronics 7-8/99

possible for the LCD unit to be driven

ally, so that a d etailed d iscussion here 6 5V K3

in the table below. &

Figure 1. Circuit diagram of the LCD

en su re th at after th e 2 × 1 6 visible 8- B I T I N TE RFACE ad d ress lin es A14 an d A15. Th is

Elektor Electronics 7-8/99 23

IC2 IC1 C1 C4 + P1 = 10 kΩ preset potentiometer

C1* , C2, C5* , C6* = 0.1 µF

K1* = 20-way SIL socket

P1 K2 K3 K5 = 2¥16 character liquid-crystal

* Not used in 4-bit version

Figure 2. The single-sided printed-circuit board for the LCD interface

Li s t i ng 1 160 K = O : GOSUB 700 : REM Di s pl ay on,

24 Elektor Electronics 7-8/99

Li s t i ng 2 330 D = 223 : REM not hav i ng a di s pl ay f unc t i on

Elektor Electronics 7-8/99 25

Although the model railway may be controlled manually, it is more

Design by S van de Vries

Elektor Electronics 7-8/99

Elektor Electronics 7-8/99 29

30 Elektor Electronics 7-8/99

Elektor Electronics 7-8/99 31

Elektor Electronics 7-8/99 33

INTRODUCTION erator d escribed in th is article is on e

Elektor Electronics 7-8/99

sw1 data0 rep0 (CQ) 100n 5V

sw2 data1 rep1 5V

dard call generator, a CQ generator, a R8 1 8x 10k

DESCRIPTION 100n 22n 4n7 3n3

Elektor Electronics 7-8/99 37

Figure 2. Printed-cir- S0 = push-button switch

switches S1(1–5). sw1 sw2 sw3 sw4 sw5 sw6 sw7

38 Elektor Electronics 7-8/99

Elektor Electronics 7-8/99 39

Charging NiCd batter-

INTRODUCTION an d ap p lied to regu lator IC 5. Wh en

Elektor Electronics 7-8/99

Elektor Electronics 7-8/99 81

1-490089 P1 C9 = 470 µF, 25 V, radial

Elektor Electronics 7-8/99

PC-controlled model railway:

Elektor Electronics 7-8/99

Figure 9. Circuit diagram of the

Elektor Electronics 7-8/99 93

because switching transistors for volt- O VE R LO AD