Course Plan

A. Course Handout

Institute/School Name Chitkara University Institute of Engineering and Technology

Department Name Department of Interdisciplinary Courses in Engineering (DICE)
Programme Name Bachelor of Engineering (B.E.), Computer Science & Engineering
Course Name Digital Electronics and Computer Architecture Session 2023-2024
Course Code 23IC001 Semester/Batch 2nd/2023
L-T-P (Per Week) 3-0-2 Course Credits 04
Course Coordinator Dr. Gaurav Sharma

1. Objectives of the Course

Digital electronics is an area of computer science and a computer facilitates a binary number system for its
services. Digital electronics defines the two binary numbers, including 1 and 0, using two voltage levels in a
machine known as a logic gate. It contains the data mechanism, the instruction group, and methods for
addressing memory. The structural design of a computer system is concerned with the descriptions of the
multiple functional modules, including processors and memories, and managing them together into an
electronic system. This course provides a wide scope of learning & understanding of basic digital electronics
and computer architecture . The main objectives of the course are:

 To familiarize the students with the basic understanding of electronics components and their
application in engineering field.
 To apply the concept of basic building blocks of digital electronics.
 To familiarize the students with the basic understanding of computer system architecture and
organisation.
 To Interpret the concept of machine instruction, input-output and program interrupt.
 To Illustrate concepts regarding pipelining, parallel processing and Direct Memory Access.

2. Course Learning Outcomes

Student should be able:

Course Outcome POs CL* KC** Sessions

To understand the basics of electronics PO1,PO3,PO4, PO7 K2 Fundamental 12

CLO01 elements, their functionality and application Conceptual
to perceive the concept of analog circuits.
CLO02 To apply and analyse the concept of boolean PO1,PO4,PO5 K3 Conceptual 13
algebra in the field of digital electronics for Procedural
various digital circuits.
CLO03 To conceptualize and understand the PO7,PO11 K4 Conceptual 9
fundamental organization of the computer Fundamental
system architecture.
CLO04 To comprehend the register organisation, PO1,PO2,PO12 K2 Factual 6
instruction format and control process in Fundamental
central processing unit of computer.
CLO05 To analyse the concept of parallel PO3, PO5, PO12 K4 Conceptual 7
processing, pipelining and direct memory Procedural
access to speed-up the computer processing.
Total Contact Hours 71
Revised Bloom’s Taxonomy Terminology
*Cognitive Level =CL
**Knowledge Categories = KC

Digital Electronics and Computer Architecture / 23IC001 Page 1 of 9

 Course Plan

Course PO1 PO2 PO3 PO4 PO5 PO6 PO7 PO8 PO9 PO10 PO11 PO12
Learning
Outcomes

CLO01 L L M L

CLO02 M L H

CLO03 H L

CLO04 M L L

CLO05 M H L

H=High, M=Medium, L=Low

3. ERISE Grid Mapping

Feature Enablemnet Level(1-5, 5 being highest)

Entrepreneurship 2

Research 3

Innovation 3

Skills 4

Employability 3

4. Recommended Books (Reference Books/Text Books)

B1: Basic Electronics and Linear Circuits by N. N Bhargava, D. C Kulshreshtha, S. C Gupta; McGraw Hill
Publications, Second Edition, 2013.
B2: Modern Digital Electronics by R. P. Jain; McGraw Hill Publications, Fourth Edition, 2010.
B3: Fundamentals of Digital Circuits by A. Anand Kumar; PHI Learning Publications, Second Edition,
2011.
B4: Computer System Architecture by M. Morris Mano; Pearson Education, Revised Third Edition,
2018.
B5: Computer Architecture and Organization by John P Hayes, McGraw Hill Publications, Third Edition,
1998.
B6: Digital Electronics and Computer Architecture by J. V. Suresh Babu and N. Nagendra Reddy, Falcon
Publications, First Edition, 2017.
B7: Basic Electrical and Electronics Engineering by V. Jegathesan, K. Vinoth Kumar, R. Saravana Kumar,
Wiley India, First Edition, 2011.

5. Other readings and relevant websites

Serial No Link of Journals, Magazines, websites and Research Papers
1. https://www.vedantu.com/evs/capacitor-inductor-resistor
2. https://www.electronics-tutorials.ws/diode/diode_2.html/
3. https://www.electrical4u.com/pnp-transistor/
4. https://nptel.ac.in/courses/106104073
5. https://nptel.ac.in/courses/106106134

Digital Electronics and Computer Architecture / 23IC001 Page 2 of 9

 Course Plan

6. Recommended Tools and Platforms

Virtual Labs, NPTEL, SWAYAM

7. Course Plan

Session Number Topic(s) Book(page no.)

Introduction to Course Handout B1-B7
Introduction to Basic Electronics, Digital Electronics and Computer
1
Architecture
Active and passive components, Ohm’s law, Concept and various types B1 (5)
of Resistors
2-3 Capacitors, Inductors and their series and parallel combinations B1 (12), B7(6, 10,
12)
4 n-type and p-type semiconductor, P-N Junction Diode, V-I B1 (69), B1 (79)
Characteristics, Ideal Diode, Diode application as a switch
5-6 Rectifiers: Half Wave, Full Wave Rectifier: Centre-tap and Bridge B1 (89)
Rectifiers, PIV, Efficiency and Ripple Factors
7-9 Rectification with Filters: Shunt Capacitor, Chock input LC and pi-Filters, B1(105), B1 (137),
Zener Diode, Light Emitting Diode, Bipolar Transistors: NPN and PNP B7 (436)
transistor.
Digital Electronics: Digital and analog systems, logic levels, duty cycle & B3 (1), B2 (28)
pulse waveform, Number Systems (Decimal, Binary, Octal and
9-10
hexadecimal), Conversions in Number System, 1's Complement and 2's
complement

ST-1

11-12 Representation of Signed Numbers using 1’s and 2’s Complement B3 (31, 36, 39)
Method, Binary Addition, Subtraction and Multiplication, Arithmetic
using Complement Method
Logic Gates, Basic gates, Universal Gates and special purpose gates with B3 (108), B3 (141)
their truth table, symbols, logical expression, Boolean algebra - Laws of
13-14
Boolean algebra, Realization of simplified Boolean Expressions using
Logic Gates
K-Map (upto 4 variables) with don’t care conditions, Encoders and B3 (196), B3 (330,
15-17 Decoders, Multiplexers and Demultiplexers, Basic Latches and Flip- 345, 354, 459)
Flops with truth tables.
18 Computer Organisation: Introduction to Computer Organization & B4 (3)
Architecture, Basic Computer Organization
19-20 Instruction Codes, Computer Registers, Computer Instructions, Memory B4 (144,149)
Reference, Register Reference and I/O Instructions, instruction Set
Completeness

ST-2

21-22 Timing and Control, Instruction Cycle, Process to determine the type of B4 (153, 170)
instructions, Input-Output and Program Interrupts.

23-24 Central Processing Unit: Introduction, General Register Organization, B4 (265)

Operation of Control Unit
25-26 Control Word, Stack Organization and Instruction Format, Various B4 (268, 270, 283)
Addressing Modes

Digital Electronics and Computer Architecture / 23IC001 Page 3 of 9

 Course Plan

27-28 RISC and CISC Characteristics, Introduction to Parallel Processing, B4 (304, 323)
Flynn’s Classification of Computers
29-30 Pipelining, Pipeline Hazards, Direct Memory Access (DMA), DMA B4 (329, 446, 450)
Transfer, Input-Output Processor (IOP),

ST-3

31-32 General Introduction to Computer memory: Memory hierarchy, Main B4(479)

Memory: RAM and ROM, Auxiliary Memory: Magnetic Disks and Tape,
Chache Memory
End Term Exam

8. Delivery/Instructional Resources

Session Topics Web References Audio-Video

No.
1-3 Basics of Electronics: https://www.electronics- https://nptel.ac.in/courses/
Introduction to Basic notes.com/articles/basic_conce 122106025
Electronics, Active and pts/
passive components, Ohm’s
law, Concept and various http://web.mit.edu/6.012/ww https://nptel.ac.in/courses/
types of Resistors, w/SP07-L2.pdf 108101091
Capacitors, Inductors and
their series and parallel
combinations, n-type and p-
type semiconductor
4-7 https://www.physics-and-radio- https://nptel.ac.in/courses/
P-N Junction Diode, V-I
electronics.com/electronic- 122106025
Characteristics, Ideal Diode,
devices-and-
Diode application as a
circuits/semiconductor-
switch, Rectifiers: Half
diodes/pnjunctionsemiconduct
Wave, Full Wave Rectifier:
ordiode.html https://nptel.ac.in/courses/
Centre-tap and Bridge
108101091
Rectifiers, PIV, Efficiency
https://ecenotesgeu.files.word
and Ripple Factors,
press.com/2016/09/rectifiers.p
Rectification with Filters:
df
Shunt Capacitor, Chock
input LC and pi-Filters, Zener
Diode, Light Emitting Diode
8-9 Bipolar Transistors : NPN https://www.elprocus.com/diff https://nptel.ac.in/courses/
and PNP transistor. erence-between-npn-and-pnp- 122106025
transistor/
10-13 Digital Electronics: Digital https://www.studocu.com/in/d https://nptel.ac.in/courses/
and analog systems, logic ocument/kannur- 108105132
levels, duty cycle & pulse university/computer-
waveform Number Systems science/digital-electronics-
(Decimal, Binary, Octal and number-system/32305209
hexadecimal), Conversions
in Number System, 1's
Complement and 2's
complement,
Representation of Signed
Numbers using 1’s and 2’s

Digital Electronics and Computer Architecture / 23IC001 Page 4 of 9

 Course Plan

Complement Method,
Binary Addition, Subtraction
and Multiplication,
Arithmetic using
Complement Method
14-15 Logic Gates, Basic gates, https://www.madeeasy.in/uplo https://nptel.ac.in/courses/
Universal Gates and special ads/examsolution/09.DigitalEle 108105132
purpose gates with their ctronics_UPPSCTheory.pdf
truth table, symbols, logical
expression, Boolean algebra
- Laws of Boolean algebra,
Realization of simplified
Boolean Expressions using
Logic Gates.
16-17 K-Map (upto 4 variables) https://www.electronicshub.or https://nptel.ac.in/courses/
with don’t care conditions, g/flip-flops/ 108105132
Encoders and Decoders,
Multiplexers and https://web.ece.ucsb.edu/Facul
Demultiplexers, Basic ty/Johnson/ECE152A/L3%20-
Latches and Flip- Flops with %20Karnaugh%20Maps%20&%
truth tables. 20Combinational%20Logic%20
Design.pdf

https://www.electronicsforu.co
m/technology-trends/learn-
electronics/flip-flop-rs-jk-t-
d?utm_source=google&utm_m
edium=cpc&utm_campaign=Ele
.com+-
+traffic+Dynamic+Search+-22-
12-
2021&gclid=CjwKCAjwqZSlBhB
wEiwAfoZUIGkXdVDy-
xW_0HQoDy--
4J412LbqZrlzattmewS9lF7eOCO
S4yPaxRoCdHsQAvD_BwE

18 Computer Organisation: https://nitsri.ac.in/Department https://archive.nptel.ac.in/c

Introduction to Computer /Electronics%20&%20Communi ourses/106/105/106105163
Organization & Architecture, cation%20Engineering/Chapter /
Basic Computer 1-Introduction.pdf
Organization, Instruction
Codes https://www.geeksforgeeks.org
/computer-organization-and-
architecture-tutorials/

https://www.codingninjas.com/
studio/library/instruction-
codes-and-addresses

Digital Electronics and Computer Architecture / 23IC001 Page 5 of 9

 Course Plan

19-20 Computer Registers, https://www.pvpsiddhartha.ac.i https://archive.nptel.ac.in/c

Computer Instructions, n/dep_it/lecture%20notes/COA ourses/106/105/106105163
Memory Reference, Register /CSA%20UNIT%202.pdf /
Reference and I/O
Instructions, instruction Set https://www.studocu.com/in/d
Completeness, Timing and ocument/babu-banarasi-das-
Control university/computer-
organization-
architecture/computer-
architecture-21-40/48437969

21-22 Instruction Cycle, Process to https://vardhaman.org/wp- https://archive.nptel.ac.in/c

determine the type of content/uploads/2021/03/COA- ourses/106/105/106105163
instructions, Input-Output Unit-II-part-1.pdf /
and Program Interrupts
https://www.lkouniv.ac.in/site/
writereaddata/siteContent/202
004171006162950anshu_singh
_engg_input_output.pdf

23-25 Central Processing Unit: http://gacbe.ac.in/pdf/emateri https://nptel.ac.in/courses/

Introduction, General al/18BIT44A-U3.pdf 106103068
Register Organization,
Operation of Control Unit, https://gppanchkula.ac.in/wp-
Control Word, Stack content/uploads/2021/06/e_co https://archive.nptel.ac.in/c
Organization and Instruction ntent_of_co-1.pdf ourses/106/105/106105163
Format, Various Addressing /
Modes
26-28 RISC and CISC https://www.geeksforgeeks.org https://nptel.ac.in/courses/
Characteristics, /computer-organization-risc- 106103068
Introduction to Parallel and-cisc/
Processing, Flynn’s
Classification of Computers, https://byjus.com/gate/flynns- https://archive.nptel.ac.in/c
Pipelining, Pipeline Hazards classification-notes/ ourses/106/105/106105163
/

https://www.studytonight.com
/computer-
architecture/pipelining

29-32 Direct Memory Access https://www.elprocus.com/dire https://archive.nptel.ac.in/c

(DMA), DMA Transfer, ct-memory-access-dma-in- ourses/106/105/106105163
Input-Output Processor computer-architecture/ /
(IOP), General Introduction
to Computer memory:
Memory hierarchy, Main https://www.studytonight.com https://nptel.ac.in/courses/
Memory: RAM and ROM, /computer-architecture/input- 106103068
Auxiliary Memory: Magnetic output-processor
Disks and Tape, Chache
Memory https://www.studytonight.com
/computer-
architecture/memory-
organization

Digital Electronics and Computer Architecture / 23IC001 Page 6 of 9

 Course Plan

9. Action plan for different types of learners

Slow Learners Average Learners Fast Learners

Remedial Classes, Doubt Sessions, Workshop, Doubt Session More Practical Assignments/
Guided Tutorials Quiz/Competitions, Project

10. Evaluation Scheme & Components

Evaluation No. of Weightage of Mode of

Type of Component
Component Assessments Component Assessment
Component 1 Continuous Evaluations 02* 25% Computer Based Test

Component 2 Sessional Tests (STs) 03** 25% Computer Based Test

Component 3 End Term Examination (ETE) 01*** 50% Computer Based Test

Total 100%
* There will be two Continuous Evaluations (CE) for a lab in a semester as CE-1 and CE-2, one will be considered as mid term/day to day
evaluation and another one will be based on developed project. Average marks of CE-1 and CE-2 will be taken as final marks. Lab file
record, lab performance in whole semester and internal viva with experiment performance will be taken in consideration of CE-1.

** All STs are compulsory. ST1 and ST2 have weightage of 25% each and ST3 has 50% out of total weightage of component 2.

***It is mandatory to complete Components 1 and 2. Further, as per Academic Guidelines minimum 75% attendance is required to
become eligible for appearing in the End Semester Examination.

11. Syllabus of the Course

Subject: Digital Electronics and Computer Architecture

No. of
S. No. Topic (s) Weightage %
Sessions
1 Basics of Electronics: Introduction to basic electronics, Active and 12 20%
passive components, Ohm’s law, Concept and various types of
Resistors, Capacitors, Inductors and their series and parallel
combinations, n-type and p-type semiconductor, P-N Junction Diode,
V-I Characteristics, Ideal Diode, Diode application as a switch,
Rectifiers: Half Wave, Full Wave Rectifier: Centre-tap and Bridge
Rectifiers, PIV, Efficiency and Ripple Factors, Rectification with Filters:
Shunt Capacitor, Chock input LC and pi-Filters, Zener Diode, Light
Emitting Diode, Bipolar Transistors: NPN and PNP transistor.

2 Digital Electronics: Digital and analog systems, logic levels, duty cycle & 13 30%
pulse waveform, Number Systems (Decimal, Binary, Octal and
hexadecimal), Conversions in Number System, 1's Complement and 2's
complement, Representation of Signed Numbers using 1’s and 2’s

Digital Electronics and Computer Architecture / 23IC001 Page 7 of 9

 Course Plan

Complement Method, Binary Addition, Subtraction and Multiplication,

Arithmetic using Complement Method, Logic Gates, Basic gates,
Universal Gates and special purpose gates with their truth table,
symbols, logical expression, Boolean algebra - Laws of Boolean algebra,
Realization of simplified Boolean Expressions using Logic Gates, K-Map
(upto 4 variables) with don’t care conditions, Encoders and Decoders,
Multiplexers and Demultiplexers, Basic Latches and Flip- Flops with
truth tables.
3 Computer Organisation: Introduction to Computer Organization & 9 20%
Architecture, Basic Computer Organization, Instruction Codes,
Computer Registers, Computer Instructions, Memory Reference,
Register Reference and I/O Instructions, instruction Set Completeness,
Timing and Control, Instruction Cycle, Process to determine the type of
instructions, Input-Output and Program Interrupts.

4 Central Processing Unit: Introduction, General Register Organization, 13 30%

Operation of Control Unit, Control Word, Stack Organization and
Instruction Format, Various Addressing Modes, RISC and CISC
Characteristics, Introduction to Parallel Processing, Flynn’s
Classification of Computers, Pipelining, Pipeline Hazards, Direct
Memory Access (DMA), DMA Transfer, Input-Output Processor (IOP),
General Introduction to Computer memory: Memory hierarchy, Main
Memory: RAM and ROM, Auxiliary Memory: Magnetic Disks and Tape,
Chache Memory

12. Complete Lab Course Coverage Plan:

Session Lab Session Resource Link

No.
1 To familiarize with basic electronic equipments CRO and Function Generator:-
(CRO, DSO, Function Generator, Multimeter, DC
Power Supply, Breadboard etc.) and electronics http://vlabs.iitkgp.ac.in/psac/newlabs
components (resistor, capacitor, inductor, diode, 2020/vlabiitkgpAE/exp1/index.html#
LED, transistor, etc.).
Basic Electronic Components:-

http://vlabs.iitkgp.ernet.in/be/index.ht
ml#

Digital Electronics and Computer Architecture / 23IC001 Page 8 of 9

 Course Plan

2 To plot and analyse the forward and reverse http://vlabs.iitkgp.ernet.in/be/exp5/in

characteristics of PN junction Si / Ge diode and dex.html
determine the knee voltage.
3 To analyze and plot Zener diode as voltage regulator http://vlabs.iitkgp.ernet.in/be/exp10/i
and observe the output voltage with variable input ndex.html#
voltage.
4 To study the operation of half wave and full wave Half Wave Rectifier:-
rectifiers (with and without filters).
http://vlabs.iitkgp.ernet.in/be/exp6/in
dex.html

Full Wave Rectifier:-

http://vlabs.iitkgp.ernet.in/be/exp7/in
dex.html
5 To study and verify the truth tables of various logic https://de-iitr.vlabs.ac.in/exp/truth-
gates on digital trainer kit using TTL ICs. table-gates/theory.html

6 To study and verify D and J-K Flip-Flop using their https://de-iitr.vlabs.ac.in/exp/truth-

respective ICs. tables-flip-flops/simulation.html

7 To study and verify the function of BCD (Binary http://vlabs.iitkgp.ernet.in/dec/exp1/i

Coded Decimal) to seven segment decoder (IC 7447) ndex.html#
and operation of 7-segment LED display on digital
trainer kit.
8 To implement and study 4:1 multiplexer and 1:4 https://de-
demultiplexer using logic gates using virtual labs. iitr.vlabs.ac.in/exp/multiplexer-
demultiplexer/index.html
9 To study various internal and external hardware https://gptcthirurangadi.in/download/
components of computer architecture and its pdf/academic-files/4137--
organization. AKNMGptc.pdf
10 To design and simulation of Arithmetic Logic Unit http://vlabs.iitkgp.ac.in/coa/exp8/inde
(ALU) using virtual labs. x.html

11
Continuous Evaluation-1
(Experiment Performance)
12-14 Project Work

15 Continuous Evaluation-2
(Based on Project Work)

This Document is approved by:

Designation Name Signature

Course Coordinator Dr. Gaurav Sharma
Dean-DICE Dr. Rajneesh Talwar
Date (DD-MM-YYYY) 03-01-2024

Digital Electronics and Computer Architecture / 23IC001 Page 9 of 9