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    The document summarizes the boot log of a Linux system on an ARM processor. It shows the kernel version, CPU and memory details, initialization of processes like SLUB allocator and RCU, and bringing up of the secondary CPU. Various subsystems are also initialized like interrupt handling, timers, L2 cache and pin control.

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    23 views2 pages
    The document summarizes the boot log of a Linux system on an ARM processor. It shows the kernel version, CPU and memory details, initialization of processes like SLUB allocator and RCU, and bringing up of the secondary CPU. Various subsystems are also initialized like interrupt handling, timers, L2 cache and pin control.

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    Openswrt

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    The document summarizes the boot log of a Linux system on an ARM processor. It shows the kernel version, CPU and memory details, initialization of processes like SLUB allocator and RCU, and bringing up of the secondary CPU. Various subsystems are also initialized like interrupt handling, timers, L2 cache and pin control.

    Copyright:

    © All Rights Reserved
    Download as TXT, PDF, TXT or read online from Scribd
    Download as txt, pdf, or txt
    23 views2 pages

    1

    Uploaded by

    acclaim1464
    The document summarizes the boot log of a Linux system on an ARM processor. It shows the kernel version, CPU and memory details, initialization of processes like SLUB allocator and RCU, and bringing up of the secondary CPU. Various subsystems are also initialized like interrupt handling, timers, L2 cache and pin control.

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    © All Rights Reserved
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    of 2

    Closing network.

    Starting program at 0x00008000


    C:0x00008120-0x002990C0->0x00A8F600-0x00D205A0
    Uncompressing Linux... done, booting the kernel.
    [ 0.000000] Booting Linux on physical CPU 0x0
    [ 0.000000] Linux version 5.15.134 (builder@buildhost) (arm-openwrt-linux-
    muslgnueabi-gcc (OpenWrt GCC 12.3.0 r23497-6637af95aa) 12.3.0, GNU ld (GNU
    Binutils) 2.40.0) #0 SMP Mon Oct 9 21:45:35 2023
    [ 0.000000] CPU: ARMv7 Processor [413fc090] revision 0 (ARMv7), cr=10c5387d
    [ 0.000000] CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing instruction
    cache
    [ 0.000000] OF: fdt: Machine model: Linksys EA6300 V1
    [ 0.000000] Memory policy: Data cache writealloc
    [ 0.000000] Zone ranges:
    [ 0.000000] Normal [mem 0x0000000000000000-0x0000000007ffffff]
    [ 0.000000] HighMem empty
    [ 0.000000] Movable zone start for each node
    [ 0.000000] Early memory node ranges
    [ 0.000000] node 0: [mem 0x0000000000000000-0x0000000007ffffff]
    [ 0.000000] Initmem setup node 0 [mem 0x0000000000000000-0x0000000007ffffff]
    [ 0.000000] percpu: Embedded 11 pages/cpu s13068 r8192 d23796 u45056
    [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 32480
    [ 0.000000] Kernel command line: console=ttyS0,115200
    [ 0.000000] Dentry cache hash table entries: 16384 (order: 4, 65536 bytes,
    linear)
    [ 0.000000] Inode-cache hash table entries: 8192 (order: 3, 32768 bytes, linear)
    [ 0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off
    [ 0.000000] Memory: 119552K/131072K available (6457K kernel code, 570K rwdata,
    860K rodata, 1024K init, 299K bss, 11520K reserved, 0K cma-reserved, 0K highmem)
    [ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=2, Nodes=1
    [ 0.000000] rcu: Hierarchical RCU implementation.
    [ 0.000000] Tracing variant of Tasks RCU enabled.
    [ 0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 10
    jiffies.
    [ 0.000000] NR_IRQS: 16, nr_irqs: 16, preallocated irqs: 16
    [ 0.000000] L2C: DT/platform modifies aux control register: 0x0a130000 ->
    0x3a530000
    [ 0.000000] L2C-310 enabling early BRESP for Cortex-A9
    [ 0.000000] L2C-310 full line of zeros enabled for Cortex-A9
    [ 0.000000] L2C-310 ID prefetch enabled, offset 1 lines
    [ 0.000000] L2C-310 dynamic clock gating enabled, standby mode enabled
    [ 0.000000] L2C-310 cache controller enabled, 16 ways, 256 kB
    [ 0.000000] L2C-310: CACHE_ID 0x410000c8, AUX_CTRL 0x7e530001
    [ 0.000002] sched_clock: 64 bits at 400MHz, resolution 2ns, wraps every
    4398046511103ns
    [ 0.000039] clocksource: arm_global_timer: mask: 0xffffffffffffffff max_cycles:
    0x5c4093a7d1, max_idle_ns: 440795210635 ns
    [ 0.000075] Switching to timer-based delay loop, resolution 2ns
    [ 0.000392] Calibrating delay loop (skipped), value calculated using timer
    frequency.. 800.00 BogoMIPS (lpj=4000000)
    [ 0.000414] CPU: Testing write buffer coherency: ok
    [ 0.000454] CPU0: Spectre v2: using BPIALL workaround
    [ 0.000466] pid_max: default: 32768 minimum: 301
    [ 0.001160] Mount-cache hash table entries: 1024 (order: 0, 4096 bytes, linear)
    [ 0.001183] Mountpoint-cache hash table entries: 1024 (order: 0, 4096 bytes,
    linear)
    [ 0.003107] CPU0: thread -1, cpu 0, socket 0, mpidr 80000000
    [ 0.004213] Setting up static identity map for 0x100000 - 0x10003c
    [ 0.004436] rcu: Hierarchical SRCU implementation.
    [ 0.004921] smp: Bringing up secondary CPUs ...
    [ 1.040172] CPU1: failed to come online
    [ 1.040264] smp: Brought up 1 node, 1 CPU
    [ 1.040279] SMP: Total of 1 processors activated (800.00 BogoMIPS).
    [ 1.040291] CPU: All CPU(s) started in SVC mode.
    [ 1.043846] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff,
    max_idle_ns: 19112604462750000 ns
    [ 1.043893] futex hash table entries: 512 (order: 3, 32768 bytes, linear)
    [ 1.044242] pinctrl core: initialized pinctrl subsystem
    [ 1.045359] NET: Registered PF_NETLINK/PF_ROUTE protocol family
    [ 1.046097] DMA: preallocated 256 KiB pool for atomic coherent allocations

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