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Module - 5

The document discusses various I/O interfaces including the 8255 programmable peripheral interface chip. It describes the architecture and modes of operation of the 8255 chip, which can interface with input and output devices by programming its control word register to function ports independently as input or output.

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Deepthi nagella
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0% found this document useful (0 votes)
17 views

Module - 5

The document discusses various I/O interfaces including the 8255 programmable peripheral interface chip. It describes the architecture and modes of operation of the 8255 chip, which can interface with input and output devices by programming its control word register to function ports independently as input or output.

Uploaded by

Deepthi nagella
Copyright
© © All Rights Reserved
Available Formats
Download as PDF, TXT or read online on Scribd
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UNIT-5 I/O INTERFACES ECE DEPARTMENT

UNIT-V
I/O INTERFACES

Contents at a glance:

 8255 programmable Peripheral Interface


o Various modes of operation
o Interfacing to 8086
 8051 interfacing with
o Seven segment LED displays
o Stepper motor interfacing
o D/A converter interfacing
o Interfacing DC motor
o Interfacing 4*4 Matrix Keypad
o Interfacing to Alphanumeric Displays (LCD)
o A/D converter interfacing.

Introduction to I/O Ports Interfacing:

 I/O ports or Input/output ports are the devices through which the microprocessor communicates with other
devices or external data source/destinations.
 Input activity, as one may expect, is the activity that enables the microprocessor to read data from external
devices, for example keyboards. These devices are known as input devices as they feed data into microprocessor
system.
 Output activity transfers data from the microprocessor to the external devices, for example CRT display. These
devices which accept the data from a microprocessor system are called output devices.
 Thus for a microprocessor the input activity is similar to read operation, while the output activity is similar to
write operation.
Steps in Interfacing an I/O Device:
 Connect the data bus of the microprocessor system with the data bus of the I/O port.
 Derive a device address pulse by decoding the required address of the device and use it as the chip select of
the device.
 Use a suitable control signal i.e. IORD or IOWR to carry out device operations
Input Port:
 The input device is connected to the microprocessor through buffer. The simplest form of a input port is a
buffer as shown in the figure.
 This buffer is a tri-state buffer and its output is available only when enable signal is active. When
microprocessor wants to read data from the input device (keyboard), the control signals from the
microprocessor activates the buffer by asserting enable input of the buffer. Once the buffer is enabled, data
from the device is available on the data bus. Microprocessor reads this data by initiating read command.

Output Port:
 It is used to send the data to the output device such as display from the microprocessor. The simplest
form of the output port is a latch.

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 The output device is connected to the microprocessor through latch as shown in the figure.
 When microprocessor wants to send data to the output device it puts the data on the data bus and activates
the clock signal of the latch, latching the data from the data bus at the output of latch. It is then available at
the output of latch for the output device.

I/O Interfacing Techniques:

 Input/output devices can be interfaced with microprocessor systems in two ways :

1. I/O mapped I/O


2. Memory mapped I/O

1. I/O mapped I/O:

 8086 has special instructions IN and OUT to transfer data through the input/output ports in I/O mapped I/O
system.
 The IN instruction copies data from a port to the Accumulator. If an 8-bit port is read data will go to AL and if
16-bit port is read the data will go to AX.
 The OUT instruction copies a byte from AL or a word from AX to the specified port.
 The M/IO signal is always low when 8086 is executing these instructions. In this address of I/O device is 8-bit
or 16-bit. It is 8-bit for direct addressing and 16-bit for indirect addressing.
Memory mapped I/O:
 In this type of I/O interfacing, the 8086 uses 20 address lines to identify an I/O device.
 The I/O device is connected as if it is a memory device. The 8086 uses same control signals and instructions to
access I/O as those of memory, here RD and WR signals are activated indicating memory bus cycle.
Comparison of Memory mapping I/O and I/O mapping I/O:
Memory Mapping I/O I/O mapping I/O

1. 20-bit addresses are provided for I/O devices. 1. 8-bit or 16-bit address are provided for I/O devices

2. The I/O ports or peripherals can be treated like 2. Only IN and OUT instructions can be used for data
memory locations and so all instructions related to transfer between I/O device and the processor.
memory can be used for data transfer.

3. In memory mapped ports, the data can be moved 3. In I/O mapped ports, the data transfer can take only
from any register to port and vice versa between the accumulator and the ports

4. When memory mapping is used for I/O devices, the 4. When I/O mapping is used for I/O devices, then the full
full memory address space cannot be used for address space can be used for addressing memory.
addressing memory.

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5. For accessing memory mapped devices, the 5. For accessing I/O mapped devices, the processors
processors executes the memory read or write cycle. executes the I/O read or write cycle. During this cycle,
During this cycle, is asserted high. is asserted low.

Problem:

 Interface an input port 74LS245 to read the status of the switches SW1 to SW8. the switches when shorted,
input a ‘1’ else input a ‘0’ to the microprocessor system. Store the status in register BL. The address of the port
is 0740H

Solution:

The hardware interface circuit is shown in figure. The address, control and data lines are assumed to be readily
available at the microprocessor system The ALP is given as follows:

MOV BL, 00H ; clear BL for status


MOV DX, 0740H ; 16-bit Port address in DX
IN AL,DX ; Read Port 0740H for switch positions.
MOV BL, AL; Store status of switches from AL into BL
HLT; Stop
Programmable Peripheral Interface (PPI) – 8255:

 The parallel input-output port chip 8255 is also known as programmable peripheral input-output port.
 It has 24 input/output lines which may be individually programmed in two groups of twelve lines each, or
three groups of eight lines.
 The two groups of I/O pins are named as Group A and Group B.
 Each of these two group contains a subgroup of eight I/O lines called as 8-bit port and another subgroup of
four I/O lines or a 4-bit port.
 Thus Group A contains an 8-bit port A along with a 4-bit port, C upper. The port A lines are identified by
symbols PA0 –PA7 while the port C lines are identified as PC4-PC7.
 Similarly Group B contains an 8-bit port and a 4-bit port C with lower bits.
 The port C upper and port C lower can be used in combination as an 8-bit port C.
 All of these ports function independently either as input or as output ports.
 This can be achieved by programming the bits of internal register of 8255 called as Control Word Register.
 The 8-bit data bus buffer is controlled by read/write control logic.
 The read/write control logic manages all of the internal and external transfer of both data and control words.

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Programmable Peripheral Interface (PPI) Architecture:

Data Bus Buffer:


 This three-state bi-directional 8-bit buffer is used to interface the 82C55A to the system data bus. Data is
transmitted or received by the buffer upon execution of input or output instructions by the CPU. Control
words and status information are also transferred through the data bus buffer.
Read/Write and Control Logic
 The function of this block is to manage all of the internal and external transfers of both Data and Control or
Status words. It accepts inputs from the CPU Address and Control busses and in turn, issues commands to both
of the Control Groups.
(A0 and A1) Port Select0 and Port Select1:
 These input signals, in conjunction with the RD and WR inputs, control the selection of one of the three ports
or the control word register. They are normally connected to the least significant bits of the address bus (A0
and A1).
(CS) Chip Select:
 A “low” on this input pin enables the communication between the 82C55A and the CPU.
(RD) Read:
 A “low” on this input pin enables82C55A to send the data or status information to the CPU on the data bus. In
essence, it allows the CPU to “read from” the 82C55A.
(WR) Write:
 A “low” on this input pin enables the CPU to write data or control words into the 82C55A.
(RESET) Reset:
 A “high” on this input initializes the control register to 9Bh and all ports (A, B, C)are set to the input mode.
“Bus hold” devices internal to the 82C55A will hold the I/O port inputs to a logic “1” state with a maximum
hold current of 400mA.

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Modes of Operation of 8255:

 There are two basic modes of operation of 8255 - I/O mode and BSR (Bit-Set-Reset) mode.
 In the I/O mode, the 8255 ports work as programmable I/O ports, while in BSR mode only port C (PC0 – PC7)
can be used to set or reset its individual port bits.
 Under the I/O mode of operation, further there are three modes of operation of 8255,so as to support
different types of applications, viz. mode 0, mode 1 and mode 2.
 All these modes can be selected by programming a register internal to 8255, known as Control Word Register
(CWR).
BSR Mode:
 In this mode, any of the 8-bits of port C can be set or reset depending on B0 of the control word.
 The bit to be set or reset is selected by bit select flags B3, B2 and B1 of the CWR as given in the table
below.

 The CWR format is as shown below:

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I/O Modes:

 The CWR format is as shown below:

I/O Modes – MODE 0 (Basic I/O Mode) :

 This mode is also known as basic input/output mode.


 This mode provides input and output capability using each of the three ports.
 Data can be simply read from or written to the input and output ports respectively, after appropriate
initialization.
 The salient features of this mode are
1. Two 8 bit ports (port A and port B) and two 4-bits ports(port C upper and lower) are available. The two 4-
bit ports can be combinedly used as a third 8-bit port.
2. Any port can be used as an input and output port
3. Output ports are latched. Input ports are not latched.
4. A maximum of four ports are available so that overall 16 I/O configurations are possible.
I/O Modes – Mode 1 (Strobed I/O Mode):
 This mode is also known as strobed input/output mode. In this mode the handshaking signals control the input
or output action of the specified port. Port C lines PC0-PC2, provide strobe or handshake lines for port B. Port C
lines PC3-PC5, and provide strobe or handshake lines for port A.
 Features of MODE 1
1. Two groups- group A and group B are available for strobed data transfer.
2. Each group contains one 8-bit data I/O port and one 4-bit control/data port.
3. The 8-bit port can be either used as input or an output port.
4. Out of 8-bit port C, PC0-PC2 are used to generate control signals for port B and PC3-PC5 are used to
generate control signals for port A. the lines PC6,PC7 may be used as independent data lines.

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I/O Modes – Mode 2 (Strobed Bidirectional I/O Mode) :

 This mode is also known as strobed Bidirectional input/output mode. This mode of operation provides 8255
with an additional feature for communicating with a peripheral device on an 8-bit data bus. Handshaking
signals are provided to maintain proper data flow and synchronization between data transmitter and receiver.
 Features of MODE 2
1. The single 8-bit port in group A is available.
2. The 8-bit port is bidirectional and additionally a 5-bit control port is available.
3. Three I/O lines are available at port C
4. Input and output ports are both latched
5. The 5-bit control port C is used for generating/accepting handshake signals for 8-bit data transfer on
port A.

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Interfacing 8255 to 8086:

Problem: Interface an 8255 with 8086 to work as an I/O port. Initialize port A as output port, port B as input port and
port C as output port. Port A address should be 0740H. Write a program to sense switch positions SW0-SW7
connected to port B. the sensed pattern is to display on port A, to which 8 LEDs are connected, while the port C lower
displays number of on switches out of the total eight switches.

Solution:

Thus 82H is the control word for the requirements in the problem. The port address can be done as given
below.

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 The 8255 is to be interfaced with lower order data bus, i.e. D0-D7
 The A0 and A1 pins of 8255 are connected to A01 and A02 pins of microprocessor respectively.
 The A00 pin of the microprocessor is used for selecting lower byte of data bus.
 Hence any change in the status of A00 does not affect the port to be selected.
 Let us use absolute decoding scheme that uses all the 16 address lines for deriving the device address pulse.
 Out of A0-A15 lines, two address lines A02 and A01 are directly required by 8255 for three port and CWR address
decoding.
 Hence only A3 to A15 are used for decoding address.

Flow Chart

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Program:

MOV DX, 0746H ; Initialize CWR with


MOV AL, 82H ; control word 82H
OUT DX, AL ;
MOV DX, 0742H ; Get address of port B in DX
IN AL, DX ; Read port B for switch
MOV DX, 0740H ; positions in to AL and get port A address in DX
OUT DX, AL ; Display switch positions on port A
MOV BL, 00H ; Initialize BL for switch count
MOV CL, 08H
Back: ROL AL , 1 ; Rotate AL through carry to check,
JNC Next ; whether the switches are on or
INC BL ; off, i.e. either 1 or 0
Next: LOOP Back ; Check for next switch. If all switch are checked, the
MOV AL, BL ; number of on switches are
MOV DX, 0744H ; in BL. Display it on port C
OUT DX, AL ; lower
HLT
8051 interfacing with LED:
 LEDs can be connected with the port line in two ways as presented in below figure.

 In fir 18.8 (a) a logic level ‘1’ needs to be applied for glowing the LED. The resistance R is a current limiting
resistance usually in the range of 220Ω to 470Ω.
 In this configuration, the current required for glowing the LED is sourced by the pin. Hence it is also called as
source mode.
 In fir 18.8 (b) logic level ‘0’ needs to be applied for glowing the LED. In this configuration, the current required
for glowing the LED is sourced by the ‘+5V’ supply while it is sinked by the microcontroller pin. Hence it is also
called as sink mode.
Problem: Design the hardware circuit to interface an LED to 8051 port pin P1.5 and write a ALP to blink LED with some
delay.

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Program:
ORG 0000H
CLR P1.5
AGAIN: CPL P1.5
ACALL DELAY
SMP AGAIN
DELAY: MOV R3,#0AH
UP: MOV R4, #0FFH
HERE: DJNZ R4, HERE
DJNZ R3, UP
RET
END
Seven segment interfacing with 8051:
 Seven segment displays are used to indicate numerical information. Seven segments display can display digits
from 0 to 9 and even we can display few characters like A, b, C, H, E, e, F, etc. These are very popular and have
many more applications.
 Seven segment displays internally consist of 8 LEDs. In these LEDs, 7 LEDs are used to indicate the digits 0 to 9
and single LED is used for indicating decimal point. Generally seven segments are two types, one is common
cathode and the other is common anode.
 In common cathode, all the cathodes of LEDs are tied together and labelled as com. and the anode are left
alone. In common anode, seven segment display all the anodes are tied together and cathodes are left freely.
Below figure shows the internal connections of seven segment Display.

 To display the digits on common cathode 7 segment, we need to glow different logic combinations of
segments.
 For example if you want to display the digit 3 on seven segment then you need to glow the segments a, b, c, d
and g.
 The below table show you the Hex decimal values what we need to send from PORT to Display the digits from
0 to 9.

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Problem: Interfacing common cathode 7 segment display with 8051. Write an ALP to display the decimal
counter (0- 9) with a delay of 10msec.

ORG 0000H
START: MOV R2, #0AH
MOV TMOD, #01H
MOV DPTR, #0400H
MOV A1, #00H
MOV P1, #00H
MOV R1, #00H
BACK: MOVC A,@A+DPTR
MOV P1, A
MOV TH0, #0DCH
MOV TL0, #00H
SETB TR0
HERE: JNB TF0, HERE
CLR TF0
CLR TR0
INC R1
MOV A, R1
DJNZ R2, BACK
SJMP START
ORG 0400H
DB 3FH,06H,5BH,4F,66H,6DH,7DH,07H,7FH,6FH
END
Problem: Write an ALP to display 0-99 on seven segment display.

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ORG 000H
MOV P2,#00H
CLR P3.0
CLR P3.1
MOV DPTR,#0400H
AGAIN:MOV R1,#00H
MSB: MOV R2,00H
LSB: MOV A,@A+DPTR
SETB P3.0
CLR P3.1
MOV P2,A
MOV A,R2
MOVC A,@A+DPTR
CLR P3.0
SETB P3.1
MOV P2,A
ACALL DELAY
INC R2
CJNE R2,#0AH,LSB
INC R1
CJNE R1,#0AH,MSB
SJMP AGAIN
END
DELAY:MOV R3,#0AH
UP: MOV R4,#OFFH
HERE: DJNZ R3,UP
RET
ORG 0400H
DB 3FH,06H,5BH,4F,66H,6DH,7DH,07H,7FH,6FH
END
Stepper Motor Interfacing:

 Stepper motor is a widely used device that translates electrical pulses into mechanical movement.
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UNIT-5 I/O INTERFACES ECE DEPARTMENT

 Stepper motor is used in applications such as; disk drives, dot matrix printer, robotics etc,.
 The construction of the motor is as shown in figure 1 below.

 It has a permanent magnet rotor called the shaft which is surrounded by a stator.
 Commonly used stepper motors have four stator windings that are paired with a center – tapped
common.
 Such motors are called as four-phase or unipolar stepper motor.
 The stator is a magnet over which the electric coil is wound. One end of the coil are connected
commonly either to ground or +5V.
 The other end is provided with a fixed sequence such that the motor rotates in a particular direction.
 Stepper motor shaft moves in a fixed repeatable increment, which allows one to move it to a precise
position.
 Direction of the rotation is dictated by the stator poles. Stator poles are determined by the current sent
through the wire coils.

Step angle:

 Step angle is defined as the minimum degree of rotation with a single step.
No of steps per revolution = 360° / step angle
Steps per second = (rpm x steps per revolution) / 60
Example: step angle = 2°
No of steps per revolution = 180

Switching Sequence of Motor:

 As discussed earlier the coils need to be energized for the rotation. This can be done by sending a bits
sequence to one end of the coil while the other end is commonly connected.
 The bit sequence sent can make either one phase ON or two phases ON for a full step sequence or it can
be a combination of one and two phase ON for half step sequence. Both are tabulated below.

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Problem: Interfacing a 4 phase 200 teeth, 9v , stepper motor with 8051 using ULN and write ALP for

a) Rotating shift of the stepper motor at a speed of 2 rotations per min in clock wise direction.

ORG 0000H
MOV P1, #00H
MOV A, #11H
AGAIN: MOV PL, A
ACALL DELAY (150 MSEC)
RL A
SJMP AGAIN
DELAY: MOV TMOD, #01H ; time delay as 15x10msec
MOV R1, #15
UP: MOV TH0, #0DCH
MOV TL0, #00H
HERE: JNB TF0, HERE
CLR TF0
CLR TR0
DJNZ R1, UP
END
b) Rotating the shaft 180 anti-clock wise in one min

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ORG 0000H
MOV P1, #00H
AGAIN: MOV R0, #00H
MOV A, #88H
CONTINUE: MOV P1, A
ACALL DELAY (600MS)
INC R0
RR A
CJNE R0, #100, CONITUE
SJMP AGAIN
DELAY: MOV TMOD, #01H
MOV R1, #60
UP: MOV TH0, #0DCH
MOV TL0, #00H
SETB TR0
HERE: JNB TF0, HERE
CLR TF0
CLR TR0
DJNZ R1, UP
END
c) Rotating the shaft 90 back and forward in 30 seconds each continuously
ORG 0000H
MOV P1, 00H
AGAIN: MOV R0, #00H
MOV A, #88H
CONTINUE: MOV P1, A
ACALL DELAY (600mS)
INC R0
RR A
CJNE R0, #50, CONTINUE
CONT1: MOV P1, A
ACALL DELAY (600mS)
DEC R0
RL A
CJNE R0, #0FFh, CONT1
SJMP AGAIN

DC Motor Interfacing with 8051:

 The DC motor is another widely used device that translates electrical pulses into mechanical movement.
 Motor has 2 leads +ve and – ve , connecting them to a DC voltage supply moves the motor in one direction.
 On reversing the polarity rotates the motor in the reverse direction.
 Basic difference between Stepper and DC motor is stepper motor moves in steps while DC motor moves
continuously.

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 Another difference is with stepper motor the number of steps can be counted while it is not possible in DC
motor.

Unidirectional Control:

 Figure 3 shows the rotation of the DC motor in clockwise and anticlockwise direction.

Bidirectional Control:

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UNIT-5 I/O INTERFACES ECE DEPARTMENT

Problem: Interface the DC motor with 8051 and write an ALP to rotate the motor in clock wise direction
continuously.

CLR P1.0
CLR P1.1
SETB P1.0
CLR P1.1
HERE: SJMP HERE
END

Example: A switch is connected to pin P2.7. Write an ALP to monitor the status of the SW. If SW = 0, DC
motor moves clockwise and if SW = 1, DC motor moves anticlockwise.

Program:
CLR P1.0 SJMP CHECK
CLR P1.1 CLOCK: SETB P1.0
SETB P2.7 CLR P1.1
CHECK: JNB P2.7, CLOCK SJMP CHECK
CLR P1.0 END
SETB P1.1
Analog-to-digital converter (ADC) interfacing:
 ADCs (analog-to-digital converters) are among the most widely used devices for data acquisition. A physical
quantity, like temperature, pressure, humidity, and velocity, etc., is converted to electrical (voltage, current)
signals using a device called a transducer, or sensor We need an analog-to-digital converter to translate the
analog signals to digital numbers, so microcontroller can read them.

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ADC0808/0809 chip:

 ADC0808/0809 has 8 analog inputs. It allows us to monitor up to 8 different transducers using only single chip.
 The chip has 8-bit data output.
 The 8 analog input channels are multiplexed and selected according to the values given to the three address
pins, A, B, and C. that is; if CBA=000, CH0 is selected; CBA=011, CH3 is selected and so on.
 The pin details of ADC0808 are as shown in the figure below.

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Steps to Program ADC0808/0809

1. Select an analog channel by providing bits to A, B, and C addresses.


2. Activate the ALE pin. It needs an H-to-L pulse to latch in the address.
3. Activate SC (start conversion) by an H-to-L pulse to initiate conversion.
4. Monitor EOC (end of conversion) to see whether conversion is finished.
5. Activate OE (output enable) to read data out of the ADC chip. An H-to-L pulse to the OE pin will bring digital
data out of the chip.

Problem: Interface an 8-bit ADC 0808/0809 with 8051 ports. Further write ALP for

a) Reading the digital equivalent of the analog inputs applied at channel 0 and channel 5 and stores them in R0
and R1.
b) Reading the digital equivalent of all the channel (0-7) and store those starting form address 50H in internal
RAM.

Programs:

a) Reading the digital equivalent of the analog inputs applied at channel 0 and channel 5 and stores them in R0 and R1.

ORG 0000H SETB P1.1


MOV P0, #0FF H NOP
MOV P2, #00H CLR P1.1
CLR P1.0 WAIT: JB P1.3, WAIT
CLR P1.1 HERE: JNB P1.3, HERE
SETB P1.3 SETB P1.2
CLR P1.2 MOV A, P0
MOV P2, #00H CLR P1.2
SETB P1.0 MOV R0, A
NOP MOV P2, #O5H
CLR P1.0 SETB P1.0

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NOP HERE1: JNB P1.3, HERE1


CLR P1.0 SETB P1.2
SETB P1.1 MOV A, P0
NOP CLR P1.2
CLR P1.1 MOV R1, A
WAIT1: JB P1.3, WAIT1 END

b) Reading the digital equivalent of all the channel (0-7) and store those starting form address 50H in internal RAM.

ORG 0000H SETB P1.1


MOV P0, #0FFH NOP
MOV P2, #00H CLR P1.1
CLR P1.0 WAIT: JB P1.3, WAIT
CLR P1.1 HERE: JNB P1.3, HERE
SETB P1.3 SETB P1.2
CLR P1.2 MOV A, P0
MOV R1, #50H CLR P1.2
MOV R2, #00H MOV @R1, A
CONTINUE: MOV A, R2 INC R2
MOV P2, A INC R1
SETB P1.0 CJNE R2, #08, CONTINUE
NOP END
CLR P1.0
Digital-to-Analog (DAC) converter:
 The DAC is a device widely used to convert digital pulses to analog signals. In this section we will discuss the
basics of interfacing a DAC to 8051.
 The two method of creating a DAC is binary weighted and R/2R ladder.

DAC0808:
 The digital inputs are converter to current Iout, and by connecting a resistor to the Iout pin, we can
convert the result to voltage.

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UNIT-5 I/O INTERFACES ECE DEPARTMENT

 The 8051 connection to DAC0808 is as shown in the figure below.

Problem: interface DAC 0808 with 8051 port P0 and write assembly language programs,

a) To generate a triangular wave of 0 to 3V with frequency 100Hz


b) To generate a square waveform of 0-5V frequency 500Hz
c) To generate the following pattern

Solution:

The interfacing circuit for (a) and (b) of the problem is shown in above figure (18.8(a)). In the above circuit Vref + and
Vref – are directly tied with +5V and 0V respectively. The maximum output swing will be 0 to 5V.

Program:

a) To generate a triangular wave of 0 to 3V with frequency 100Hz


Resolution of DAC = 5 / 28 – 1 = 5/255 = 0.0196V = 19.6mV
Binary equivalent of 3V = 3/19.6mV = 153 = 99H
Frequency f = 100Hz; T = 1/f = 1/100 = 10000 µsec
Delay for one binary value = 5000 µsec/153 = 32.6 µsec
AGAIN: MOV P0, 00H
MOV R1, #00H
INCR: MOV A, R1
MOV P0, A
ACALL DELAY (32.6µS)
INC R1
CJNE R1, #9A, INCR
DEC R1
DECR: MOV A, R1
MOV P0, A
ACALL DELAY (32.6µS)
DEC R1
CJNE R1, #0FFH, DECR
SJMP AGAIN
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UNIT-5 I/O INTERFACES ECE DEPARTMENT

; Timer 0 in mode 2 (8 – bit auto reload timer) used to generate a delay of 32.6µsec

No of pulses to be count for delay of 32.6µsec is = 32.6µsec/1.085 µsec =~ 30

Initial value to be load into timer registers is = 256 – 30 = 226 = E2H

DELAY: MOV TMOD, #02H


MOV TH0, #0E2H
SETB TR0
HERE: JNB TF0, HERE
CLR TF0
RET
END

b) To generate a square waveform of 0-5V frequency 500Hz

f = 500Hz; T = 1/f = 1/500 = 2 ms; TLOW = 1ms, THIGH = 1 ms

Program:
ORG 0000H
MOV A, #00H
AGAIN: MOV P0, A
ACALL DELAY (1ms)
CPL A
SJMP AGAIN
; Timer 0 in mode 1 (16 – bit timer) used to generate a delay of 1msec
No of pulses to be count for delay of 1msec is = 1msec/1.085 µsec =~ 922

Initial value to be load into timer registers is = 65556 – 922 = 64614 = FC66 H

DELAY: MOV TMOD, #01H


MOV TH0, #0FCH
MOV TL0, #66H
SETB TR0
HERE: JNB TF0, HERE
CLR TF0
CLR TR0
RET
END

c) Program to generate the given pattern

For generate the given waveform. The above interfacing circuit will be useful with Vref + tied to 10V and Vref – tied to
0V.

Program:
ORG 0000H MOV A, #0FFH
MOV A, #00H MOV P0, A
MOV P0, A ACALL DELAY (1ms)
REPEAT: MOV A, #80H ACALL DELAY (1ms)
MOV P0, A MOV A, #80H
ACALL DELAY (1ms) MOV P0, A

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UNIT-5 I/O INTERFACES ECE DEPARTMENT

ACALL DELAY (1ms) MOV TL0, #66H


MOV A, #00H SETB TR0
MOV P0, A HERE: JNB TF0, HERE
ACALL DELAY (1ms) CLR TF0
ACALL DELAY (1ms) CLR TR0
SJMP REPEAT RET
DELAY: MOV TMOD, #01H END
MOV TH0, #0FCH

4x4 Matrix Keyboard Interfacing with 8051:

 Keyboards are organized in a matrix of rows and columns. The CPU accesses both rows and columns through
ports.
 Therefore, with two 8-bit ports, an 8 x 8 matrix of keys can be connected to a microcontroller. When a key is
pressed, a row and a column make a contact.
 Otherwise, there is no connection between rows and columns. A 4x4 matrix connected to a port.
 The rows and the columns are connected to an input port like as shown in below figure.

Problem: Interface a 4x4 matrix keyboard with 8051 ports and get the key number (from 0-15) after a key is pressed in
R0.

Assembly Language Program:

ORG 0000H INC R2


SJMP ROW
START: MOV R2, #00H ; for row count COL: MOV A, R1
MOV R3, #03H ; for column count ANL A, #0F0H
WAIT: MOV P2, #0FFH COL1: RLC A
MOV A, P2 JNC KEYCODE
CJNE A, #0FFH, KEY DEC R3
SJMP WAIT SJMP COL1
KEY: CALL DEBOUNCE KEYCODE: MOV A, R2
MOV P2, #0FFH RL A
MOV A, P2 RL A
MOV R1, A ADD A, R3
ANL A, #0FH MOV R0, A
ROW: RRC A SJMP START
JNC COL END
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UNIT-5 I/O INTERFACES ECE DEPARTMENT

16X2 LCD Interfacing with 8051:

 LCD is finding widespread use replacing LEDs for the following reasons:
o The declining prices of LCD
o The ability to display numbers, characters, and graphics
o Incorporation of a refreshing controller into the LCD, thereby relieving the CPU of
o the task of refreshing the LCD
o Ease of programming for characters and graphics
 The below figure show the 16x2 LCD pin diagram

Pin Descriptions for LCD:

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UNIT-5 I/O INTERFACES ECE DEPARTMENT

Sending Data/ Commands to LCDs with Time Delay:

 To send any of the commands to the LCD, make pin RS=0. For data, make RS=1.
 Then send a high-to-low pulse to the E pin to enable the internal latch of the LCD.

Problem: Interface 16x2 LCD with 8051 and write an ALP to initialize the LCD and display message “ECE”.

Program:

ORG 0000H MOV A, #06H


MOV A, #38H ACALL COMNWRT
ACALL COMNWRT ACALL DELAY
ACALL DELAY MOV A, #87H
MOV A, #0EH ACALL COMNWRT
ACALL COMNWRT ACALL DELAY
ACALL DELAY MOV A,#’E’
MOV A, #01 ACALL DATAWRT
ACALL COMNWRT ACALL DELAY
ACALL DELAY MOV A,#’C’

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UNIT-5 I/O INTERFACES ECE DEPARTMENT

ACALL DATAWRT DATAWRT: MOV P1, A


ACALL DELAY SETB P2.0; RS=1 for data
MOV A,#’E’ CLR P2.1; R/W=0 for write
ACALL DATAWRT SETB P2.2; E=1 for high pulse
ACALL DELAY ACALL DELAY
AGAIN: SJMP AGAIN CLR P2.2; E=0 for H-to-L pulse
RET
COMNWRT: MOV P1, A DELAY: MOV R3,#50
CLR P2.0; RS=0 for command HERE2: MOV R4,#255
CLR P2.1; R/W=0 for write HERE: DJNZ HERE
SETB P2.2;E=1 for high pulse DJNZ R3, HERE2
ACALL DELAY RET
CLR P2.2; E=0 for H-to-L pulse END
RET

Problem: Write an assembly language program to display a string “VardhamanCollege of Engineering” on 16x2 LCD
display.
ORG 0000H
MOV A, #38H
ACALL COMNWRT
ACALL DELAY
MOV A, #0EH
ACALL COMNWRT
ACALL DELAY
MOV A, #01
ACALL COMNWRT
ACALL DELAY
MOV A, #06H
ACALL COMNWRT
ACALL DELAY
MOV A, #80H
ACALL COMNWRT
ACALL DELAY
MOV DPTR, #0500H
MOV R1, #00H
NEXT: MOV A, R1
MOVC A,@A+DPTR
ACALL DATAWRT
ACALL DELAY
INC R1
CJNE R1,#10H, NEXT
MOV A, #0C0H
ACALL COMNWRT
ACALL DELAY
NEXT1: MOV A, R1
MOVC A,@A+DPTR
ACALL DATAWRT
ACALL DELAY
INC R1
CJNE R1,#20H, NEXT1
AGAIN: SJMP AGAIN

COMNWRT: MOV P1, A


CLR P2.0; RS=0 for command

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UNIT-5 I/O INTERFACES ECE DEPARTMENT

CLR P2.1; R/W=0 for write


SETB P2.2; E=1 for high pulse
ACALL DELAY
CLR P2.2; E=0 for H-to-L pulse
RET
DATAWRT: MOV P1, A
SETB P2.0; RS=1 for data
CLR P2.1; R/W=0 for write
SETB P2.2; E=1 for high pulse
ACALL DELAY
CLR P2.2; E=0 for H-to-L pulse
RET
DELAY: MOV R3,#50
HERE2: MOV R4,#255
HERE: DJNZ HERE
DJNZ R3, HERE2
RET
ORG 0500H
DB “VardhamanCollege of Engineering”
END

Problem: Write an assembly language program to display a string “Microprocessors & Microcontrollers” on 16x2 LCD
display.
ORG 0000H
MOV A, #38H
ACALL COMNWRT
ACALL DELAY
MOV A, #0EH
ACALL COMNWRT
ACALL DELAY
MOV A, #01
ACALL COMNWRT
ACALL DELAY
MOV A, #06H
ACALL COMNWRT
ACALL DELAY
MOV A, #80H
ACALL COMNWRT
ACALL DELAY
MOV DPTR, #0500H
MOV R1, #00H
NEXT: MOV A, R1
MOVC A,@A+DPTR
ACALL DATAWRT
ACALL DELAY
INC R1
CJNE R1,#10H, NEXT
MOV A, #0C0H
ACALL COMNWRT
ACALL DELAY
NEXT1: MOV A, R1
MOVC A,@A+DPTR
ACALL DATAWRT
ACALL DELAY
INC R1

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UNIT-5 I/O INTERFACES ECE DEPARTMENT

CJNE R1,#20H, NEXT1


AGAIN: SJMP AGAIN

COMNWRT: MOV P1, A


CLR P2.0; RS=0 for command
CLR P2.1; R/W=0 for write
SETB P2.2;E=1 for high pulse
ACALL DELAY
CLR P2.2; E=0 for H-to-L pulse
RET
DATAWRT: MOV P1, A
SETB P2.0; RS=1 for data
CLR P2.1; R/W=0 for write
SETB P2.2; E=1 for high pulse
ACALL DELAY
CLR P2.2; E=0 for H-to-L pulse
RET
DELAY: MOV R3,#50
HERE2: MOV R4,#255
HERE: DJNZ HERE
DJNZ R3, HERE2
RET
ORG 0500H
DB “Microprocessors & Microcontrollers”
END

MICROPROCESSORS AND MICROCONTROLLERS Page 29

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