Electronics Device and Circuits

By:- Prashant Kumar Pandiya

Introduction

Semiconductors
- Conductivity in between those of metals and insulators.
- Conductivity can be varied over orders of magnitude by changes in temperature, optical excitation, and
impurity content (doping).
- Generally found in column IV and neighboring columns of the periodic table.
- Elemental semiconductors: Si, Ge.
- Compound semiconductors:

Binary :

GaAs, AlAs, GaP, etc.
(III-V).
ZnS, ZnTe, CdSe (II-VI).

SiC, SiGe (IV
compounds).
-
Ternary : GaAsP.
Quaternary : InGaAsP.
- Si widely used for rectifiers, transistors, and ICs.
- III-V compounds widely used in optoelectronic and high-speed applications.
Applications
- Integrated circuits (ICs) SSI, MSI, LSI, and VLSI.
- Fluorescent materials used in TV screens II-VI (ZnS).
- Light detectors InSb, CdSe, PbTe, HgCdTe.
- Infrared and nuclear radiation detectors Si and Ge.
- Gunn diode (microwave device) GaAs, InP.
- Semiconductor LEDs GaAs, GaP.
- Semiconductor LASERs GaAs, AlGaAs.
Energy Gap
- Distinguishing feature among metals, insulators, and semiconductors.
- Determines the absorption/emission spectra, the leakage current, and the intrinsic conductivity.
- Unique value for each semiconductor (e.g. 1.12 eV for Si, 1.42 eV for GaAs) function of temperature.
Impurities
- Can be added in precisely controlled amounts.
- Can change the electronic and optical properties.
- Used to vary conductivity over wide ranges.
- Can even change conduction process from conduction by negative charge carriers to positive charge
carriers and vice versa.
- Controlled addition of impurities doping.
Charge Carriers in Semiconductors
- In a metal, the atoms are imbedded in a "sea" of free electrons, and these electrons can move as a group
under the influence of an applied electric field.
- In semiconductors at 0 K, all states in the valence band are full, and all states in the conduction band are
empty.
- At T > 0 K, electrons get thermally excited from the valence band to the conduction band, and contribute to
the conduction process in the conduction band.
- The empty states left in the valence band can also contribute to current conduction.
- Also, introduction of impurities has an important effect on the availability of the charge carriers.
- Considerable flexibility in controlling the electrical properties of semiconductors.
Electrons and Holes
- For T> 0 K, there would be some electrons in the otherwise empty conduction band, and some empty
states in the otherwise filled valence band.
- The empty states in the valence band are referred to as holes.
- If the conduction band electron and the valence band hole are created by thermal excitation of a valence
band electron to the conduction band, then they are called electron-hole pair (EHP).
- After excitation to the conduction band, an electron is surrounded by a large number of empty states, e.g.,
the equilibrium number of EHPs at 300 K in Si is , whereas the Si atom density is .
Steady State Carrier Generation: Quasi-Fermi Levels
- For any temperature T, there is a thermal generation rate g(T) balanced by a recombination rate r(T).
- Now, if a steady light is shone on the sample, an optical generation rate will be added to g(T), and the
carrier concentrations n and p would increase to their new steady state values.
- Generation/recombination rate balance equation:


- For steady state recombination and no trapping, ; and, under low level injection approximation


- Thus, the excess carrier concentrations can be given by
- In general, when trapping is present, , and and .
- Note: when excess carriers are present, .
- When excess carriers are present, the equilibrium Fermi level is no more meaningful; instead, the carrier
concentrations are defined in terms of quasi-Fermi levels (also referred to as Imref, which is Fermi spelled
backwards) as

- Imref for the minority carriers deviates significantly from the equilibrium Fermi level, whereas, for majority
carriers, the Imref stays very close to the equilibrium Fermi level, and the separation between these two
Imrefs is a measure of how far the system is from equilibrium.
- With concentrations varying with position, the Imrefs would also vary with position, thus drawing Imrefs in
band diagrams clearly shows the positional variations of the carrier concentrations.

EXAMPLE
A Si sample with is illuminated by a steady light thus creating optically. Assume
no trapping, and
(a) Determine the electron and hole concentrations n and p respectively, and their percentage change from the
equilibrium concentrations.
(b) Comment on the magnitude of the product np.
(c) Determine the locations of the Imrefs ,and compare their locations with the equilibrium Fermi leve

SOLUTION
(a) The equilibrium hole concentration . Hence, the equilibrium electron concentration

Since there is no trapping and ,therefore, the excess electron and hole concentrations can be given
by

Therefore, the net electron concentration is given by

and the net hole concentration is given by

Therefore, the percentage change in the electron concentration

And the percentage change in the hole concentration
Note: with optical excitation (under the low-level injection approximation), there is a very large change in the
minority carrier concentration, whereas the change in the majority carrier concentration is hardly noticeable!
(b) Note:
Whenever excess carriers are present, , and the amount of deviation quantifies the departure from
equilibrium.
(c) In equilibrium,

In the presence of excess carriers, the electron Imref
and the hole Imref

Thus, the majority carrier Imref almost coincides with the equilibrium Fermi level, whereas the minority carrier Imref
shows a large departure from the equilibrium value.


Photoconductive Devices
- Devices which change their resistance while exposed to light.
- Examples: automatic night light controllers, exposure meters in cameras, moving-object counters, burglar
alarms, detectors in fiber optic communication systems, etc.
- Considerations in choosing a photoconductor for a given application: sensitive wavelength range, time
response, and optical sensitivity (responsivity) of the material.
- The photoconductivity change while exposed to light is

- Obvious that for large changes in , the carrier mobility and lifetime should be high (e.g., in
, and could be used as infrared detector with high sensitivity).
- Time response is limited by recombination times, degree of carrier trapping, and time required for the
carriers to drift through the device in an electric field.
- Dark resistance (i.e., the resistance of the device without any illumination) should be as small as possible.
- Generally, all these requirements cannot be satisfied simultaneously, and some kind of optimization is
required.
Diffusion of Carriers
When excess carriers are created in a semiconductor and their concentrations vary with position, then there
is a net carrier motion from regions of higher concentration to regions of lower concentration.
- This type of motion is called the diffusion, and it is an important charge transport mechanism in
semiconductors.
- Diffusion and drift are the two main current transport mechanisms.
Diffusion processes
- Natural result of the random motion of individual electrons.
- Electrons move randomly and experience collisions, on the average, after each mean free time .
- Since the motion is truly random, an electron has equal probability of moving into or out of a volume through
a boundary.


Fig.3.5 Spreading of a narrow pulse of electrons created at x = 0 at t = 0 with time
- A pulse of excess electrons injected at x = 0 at time t = 0 will spread out in time due to diffusion, and
eventually n(x) becomes a constant, when no more net motion takes place.




P N Junction Diode
Diode:
A pure silicon crystal or germanium crystal is known as an intrinsic semiconductor. There are not
enough free electrons and holes in an intrinsic semi-conductor to produce a usable current. The
electrical action of these can be modified by doping means adding impurity atoms to a crystal to
increase either the number of free holes or no of free electrons.
When a crystal has been doped, it is called a extrinsic semi-conductor. They are of two types
n-type semiconductor having free electrons as majority carriers
p-type semiconductor having free holes as majority carriers
By themselves, these doped materials are of little use. However, if a junction is made by joining
p-type semiconductor to n-type semiconductor a useful device is produced known as diode. It
will allow current to flow through it only in one direction. The unidirectional properties of a diode
allow current flow when forward biased and disallow current flow when reversed biased. This is
called rectification process and therefore it is also called rectifier.
How is it possible that by properly
joining two semiconductors each of
which, by itself, will freely conduct the
current in any direct refuses to allow
conduction in one direction.
Consider first the condition of p-type
and n-type germanium just prior to
joining fig. 1. The majority and
minority carriers are in constant motion.
The minority carriers are thermally
produced and they exist only for short
time after which they recombine and
neutralize each other. In the mean time,
other minority carriers have been
produced and this process goes on and
on.
The number of these electron hole pair
that exist at any one time depends upon
the temperature. The number of
majority carriers is however, fixed
depending on the number of impurity
atoms available. While the electrons
and holes are in motion but the atoms
are fixed in place and do not move.

Fig.1

- Holes from the p-side diffuse into n-side where they recombine
with free electrons.
- Free electrons from n-side diffuse into p-side where they
recombine with free holes.
- The diffusion of electrons and holes is due to the fact that large
no of electrons are concentrated in one area and large no of
holes are concentrated in another area.
- When these electrons and holes begin to diffuse across the
junction then they collide each other and negative
charge in the electrons cancels the positive charge of the hole
and both will lose their charges.
- The diffusion of holes and electrons is an electric current
referred to as a recombination current. The
recombination process decay exponentially with both time
and distance from the junction. Thus most of the recombination
occurs just after the junction is made and very near to junction.
- A measure of the rate of recombination is the lifetime defined
as the time required for the density of carriers to decrease to
37% to the original concentration





The impurity atoms are fixed in their individual places. The atoms itself is a part of the crystal
and so cannot move. When the electrons and hole meet, their individual charge is cancelled and
this leaves the originating impurity atoms with a net charge, the atom that produced the electron
now lack an electronic and so becomes charged positively, whereas the atoms that produced
the hole now lacks a positive charge and becomes negative.
The electrically charged atoms are called ions since they are no longer neutral. These ions
produce an electric field as shown in. After several collisions occur, the electric field is great
enough to repel rest of the majority carriers away of the junction. For example, an electron trying
to diffuse from n to p side is repelled by the negative charge of the p-side. Thus diffusion
process does not continue indefinitely but continues as long as the field is developed.
Relationship between Diode Current and Diode Voltage
An exponential relationship exists between the carrier density and applied potential of
diode junction as given in equation E-3. This exponential relationship of the current i
D

and the voltage v
D
holds over a range of at least seven orders of magnitudes of current
- that is a factor of 10
7
.
(E-3)
Where,
i
D
= Current through the diode (dependent variable in this expression)
v
D
= Potential difference across the diode terminals (independent variable in this
expression)
I
O
= Reverse saturation current (of the order of 10
-15
A for small signal diodes, but I
O
is a
strong function of temperature)
q = Electron charge: 1.60 x 10
-19
joules/volt
k = Boltzmann's constant: 1.38 x l0
-23
joules /K
T = Absolute temperature in degrees Kelvin (K = 273 + temperature in C)
n = Empirical scaling constant between 0.5 and 2, sometimes referred to as the
Exponential Ideality Factor
The empirical constant, n, is a number that can vary according to the voltage and
current levels. It depends on electron drift, diffusion, and carrier recombination in the
depletion region. Among the quantities affecting the value of n are the diode
manufacture, levels of doping and purity of materials. If n=1, the value of k T/ q is 26 mV
at 25C. When n=2, k T/ q becomes 52 mV.
For germanium diodes, n is usually considered to be close to 1. For silicon diodes, n is
in the range of 1.3 to 1.6. n is assumed 1 for all junctions all throughout unless
otherwise noted.
Equation (E-3) can be simplified by defining V
T
=k T/q, yielding
(E-4)
At room temperature (25C) with forward-bias voltage only the first term in the
parentheses is dominant and the current is approximately given by
(E-5)
The current-voltage (l-V) characteristic of the diode, as defined by (E-3) is illustrated in
fig. 1. The curve in the figure consists of two exponential curves. However, the
exponent values are such that for voltages and currents experienced in practical
circuits, the curve sections are close to being straight lines. For voltages less than V
ON
,
the curve is approximated by a straight line of slope close to zero. Since the slope is the
conductance (i.e., i / v), the conductance is very small in this region, and the equivalent
resistance is very high. For voltages above V
ON
, the curve is approximated by a straight
line with a very large slope. The conductance is therefore very large, and the diode has
a very small equivalent resistance.

Fig.1 - Diode Voltage relationship
The slope of the curves of fig.1 changes as the current and voltage change since the l-
V characteristic follows the exponential relationship of relationship of equation (E-4).
Differentiate the equation (E-4) to find the slope at any arbitrary value of v
D
or i
D
,
(E-6)
This slope is the equivalent conductance of the diode at the specified values of v
D
or i
D
.
We can approximate the slope as a linear function of the diode current. To eliminate the
exponential function, we substitute equation (E-4) into the exponential of equation (E-7)
to obtain
(E-7)
A realistic assumption is that I
O
<< i
D
equation (E-7) then yields,
(E-8)
The approximation applies if the diode is forward biased. The dynamic resistance is the
reciprocal of this expression.
(E-9)
Although r
d
is a function of i
d
, we can approximate it as a constant if the variation of i
D
is
small. This corresponds to approximating the exponential function as a straight line
within a specific operating range.
Normally, the term R
f
to denote diode forward resistance. R
f
is composed of r
d
and the
contact resistance. The contact resistance is a relatively small resistance composed of
the resistance of the actual connection to the diode and the resistance of the
semiconductor prior to the junction. The reverse-bias resistance is extremely large and
is often approximated as infinity.

The circuit of fig. 2, has a source voltage of Vs = 1.1 + 0.1 sin 1000t. Find the current, iD. Assume that
nVT = 40 mV
VON = 0.7 V
Solution:
We use KVL for dc equation to yield
Vs= VON+ ID RL


Fig.2
This sets the dc operating point of the diode. We need to determine the dynamic resistance so we can establish the
resistance of the forward-biased junction for the ac signal.

Assuming that the contact resistance is negligible Rf= rD Now we can replace the forward-biased diode with a 10 W
resistor. Again using KVL, we have,
vs= Rf id + RL id

The diode current is given by
I = 4 + 0.91 sin 1000 t mA
Since iD is always positive, the diode is always forward-biased, and the solution is complete

Ideal Diode:
- When diode is forward biased, resistance offered is zero,
- When it is reverse biased resistance offered is infinity. It acts as a perfect
switch.
The characteristic and the equivalent circuit of the diode is shown in fig. 1.

Fig. 1


Approximation 1:
- When forward voltage is more than 0.7 V, for Si diode then it conducts and
offers zero resistance. The drop across the diode is 0.7V.
- When reverse biased it offers infinite resistanc
- e.

Approximation 2:
When forward voltage is more than 0.7 V, then the diode conducts and the voltage
drop across the diode becomes 0.7 V and it offers resistance R
f
(slope of the current)
V
D
= 0.7 + I
D
R
f
.
The output characteristic and the equivalent circuit is shown in fig. 3.

Fig. 3
- When reverse biased resistance offered is very high & not infinity, then the
diode equivalent circuit is as shown in


Fig. 4
Temperature Effects:
Temperature plays an important role in determining the characteristic of diodes. As temperature
increases, the turn-on voltage, v
ON
, decreases. Alternatively, a decrease in temperature results in
an increase in v
ON
. This is illustrated in fig. 2, where V
ON
varies linearly with temperature which is
evidenced by the evenly spaced curves for increasing temperature in 25 C increments.
The temperature relationship is described by equation
V
ON
(T
New
) V
ON
(T
room
) = k
T
(T
New
T
room
) (E-10)

Fig. 2 - Dependence of iD on temperature versus vD for real diode (kT = -2.0 mV /C)
where,
T
room
= room temperature, or 25C.
T
New
= new temperature of diode in C.
V
ON
(T
room
) = diode voltage at room temperature.
V
ON
(T
New
) = diode voltage at new temperature.
k
T
= temperature coefficient in V/C.
Although k
T
varies with changing operating parameters, standard engineering practice permits
approximation as a constant. Values of k
T
for the various types of diodes at room temperature are
given as follows:
k
T
= -2.5 mV/C for germanium diodes
k
T
= -2.0 mV/C for silicon diodes
The reverse saturation current, I
O
also depends on temperature. At room temperature, it
increases approximately 16% per C for silicon and 10% per C for germanium diodes. In other
words, I
O
approximately doubles for every 5 C increase in temperature for silicon, and for every
7 C for germanium. The expression for the reverse saturation current as a function of
temperature can be approximated as
(E-11)
where K
i
= 0.15/C ( for silicon) and T1 and T2 are two arbitrary temperatures.

Lecture - 4: Applications of Diode
Applications of diode:
Half wave Rectifier:
The single phase half wave rectifier is shown in fig. 8.


Fig. 8 Fig. 9
In positive half cycle, D is forward biased and conducts. Thus the output voltage is same
as the input voltage. In the negative half cycle, D is reverse biased, and therefore output
voltage is zero. The output voltage waveform is shown in fig. 9.
The average output voltage of the rectifier is given by

The average output current is given by

When the diode is reverse biased, entire transformer voltage appears across the diode.
The maximum voltage across the diode is Vm. The diode must be capable to withstand
this voltage. Therefore PIV half wave rating of diode should be equal to Vm in case of
single-phase rectifiers. The average current rating must be greater than Iavg
Full Wave Rectifier:
A single phase full wave rectifier using center tap transformer is shown in fig. 10. It
supplies current in both half cycles of the input voltage.


Fig. 10 Fig. 11
In the first half cycle D1 is forward biased and conducts. But D2 is reverse biased and
does not conduct. In the second half cycle D2 is forward biased, and conducts and D1 is
reverse biased. It is also called 2 pulse midpoint converter because it supplies current in
both the half cycles. The output voltage waveform is shown in fig. 11.
The average output voltage is given by

and the average load current is given by

When D1 conducts, then full secondary voltage appears across D2, therefore PIV rating
of the diode should be 2 Vm.

Bridge Rectifier:
The single phase full wave bridge rectifier is shown in fig. 1. It is the most widely used
rectifier. It also provides currents in both the half cycle of input supply.


Fig. 1 Fig. 2
In the positive half cycle, D1 & D4 are forward biased and D2 & D3 are reverse biased. In
the negative half cycle, D2 & D3 are forward biased, and D1 & D4 are reverse biased. The
output voltage waveform is shown in fig. 2 and it is same as full wave rectifier but the
advantage is that PIV rating of diodes are V m and only single secondary transformer is
required.
The main disadvantage is that it requires four diodes. When low dc voltage is required
then secondary voltage is low and diodes drop (1.4V) becomes significant. For low dc
output, 2-pulse center tap rectifier is used because only one diode drop is there.
The ripple factor is the measure of the purity of dc output of a rectifier and is defined as

Therefore,




Clippers:
Clipping circuits are used to select that portion of the input wave which lies above or
below some reference level. Some of the clipper circuits are discussed here. The
transfer characteristic (v
o
vs v
i
) and the output voltage waveform for a given input
voltage are also discussed.
Clipper Circuit 1:
The circuit shown in fig. 3, clips the input signal above
a reference voltage (V
R
).
In this clipper circuit,
If v
i
< V
R
, diode is reversed biased and does not
conduct. Therefore, v
o
= v
i

and, if v
i
> V
R
, diode is forward biased and thus, v
o
=
V
R
.
The transfer characteristic of the clippers is shown in
fig. 4.

Fig. 3


Fig. 4


Clipper Circuit 2:
The clipper circuit shown in fig. 5 clips the input signal
below reference voltage V
R
.
In this clipper circuit,
If v
i
> V
R
, diode is reverse biased. v
o
= v
i

and, If v
i
< V
R
, diode is forward biased. v
o
= V
R

The transfer characteristic of the circuit is shown in fig.
6.

Fig. 5

Fig. 6
Clipper Circuit 3:




o clip the input signal between two
independent levels (V
R1
< V
R2
), the clipper
circuit is shown in fig. 7.
The diodes D
1
& D
2
are assumed ideal
diodes.
For this clipper circuit, when v
i
V
R1
,
v
o
=V
R1

and, v
i
V
R2
, v
o
= V
R2

and, V
R1
< v
i
< V
R2
v
o
= v
i


Fig. 7
The transfer characteristic of the clipper is
shown in fig. 8.






.
Clipper Circuit 4:
Consider the clipper circuit shown in fig. 1 to clip the input signal above reference
voltage


Fig. 1 Fig. 2
When v
i
< (V
R
+ V
r
), diode D is reverse biased and therefore, v
o
= v
i
.
and when v
i
> ( V
R
+ V
r
), diode D is forward biased and conducts. The equivalent
circuit, in this case is shown in fig. 2.
The current i in the circuit is given by

The transfer characteristic of the circuit is
shown in fig. 3.

Fig. 3
Clipper Circuit 5:
Consider the clipper circuit shown in fig. 4, which clips the input signal below the
reference level (V
R
).
If v
i
> (V
R
V
r
), diode D is reverse biased, thus v
O
= v
i
and when v
i
< (v
R
-V
r
), D
condcuts and the equivalent circuit becomes as shown in fig. 5.

Fig. 4 Fig. 5
Therefore,

The transfer characteristic of the
circuit is shown in fig. 6.

Fig. 6










Clamper Circuits:
Clamping is a process of introducing a dc level into a signal. For example, if the input
voltage swings from -10 V and +10 V, a positive dc clamper, which introduces +10 V in
the input will produce the output that swings ideally from 0 V to +20 V. The complete
waveform is lifted up by +10 V.
Negative Diode clamper:
A negative diode clamper is shown in fig. 8, which introduces a negative dc voltage
equal to peak value of input in the input signal.


Fig. 8 Fig. 9
Let the input signal swings form +10 V to -
10 V. During first positive half cycle as V i
rises from 0 to 10 V, the diode conducts.
Assuming an ideal diode, its voltage, which
is also the output must be zero during the
time from 0 to t
1
. The capacitor charges
during this period to 10 V, with the polarity
shown.
At that V
i
starts to drop which means the
anode of D is negative relative to cathode, (
V
D
= v
i
- v
c
) thus reverse biasing the diode
and preventing the capacitor from
discharging. Fig. 9. Since the capacitor is
holding its charge it behaves as a DC
voltage source while the diode appears as
an open circuit, therefore the equivalent
circuit becomes an input supply in series

Fig. 10
with -10 V dc voltage as shown in fig. 10,
and the resultant output voltage is the sum
of instantaneous input voltage and dc
voltage (-10 V).




Positive Clamper:
The positive clamper circuit is shown in fig. 1, which introduces positive dc voltage
equal to the peak of input signal. The operation of the circuit is same as of negative
clamper.


Fig. 1 Fig. 2
Let the input signal swings form +10 V to -10 V. During first negative half cycle as V
i

rises from 0 to -10 V, the diode conducts. Assuming an ideal diode, its voltage, which is
also the output must be zero during the time from 0 to t
1
. The capacitor charges during
this period to 10 V, with the polarity shown.
After that V
i
starts to drop which means the anode of D is negative relative to cathode,
(V
D
= v
i
- v
C
) thus reverse biasing the diode and preventing the capacitor from
discharging. Fig. 2. Since the capacitor is holding its charge it behaves as a DC voltage
source while the diode appears as an open circuit, therefore the equivalent circuit
becomes an input supply in series with +10 V dc voltage and the resultant output
voltage is the sum of instantaneous input voltage and dc voltage (+10 V).
To clamp the input signal by a voltage other than peak value, a dc source is required.
As shown in fig. 3, the dc source is reverse biasing the diode.
The input voltage swings from +10 V to -10 V. In the negative half cycle when the
voltage exceed 5V then D conduct. During input voltage variation from 5 V to -10 V,
the capacitor charges to 5 V with the polarity shown in fig. 3. After that D becomes
reverse biased and open circuited. Then complete ac signal is shifted upward by 5 V.
The output waveform is shown in fig. 4.


Fig. 3 Fig. 4


Voltage Multiplier
Voltage Doubler :
A voltage doubler circuit is shown in fig. 5. The circuit produces a dc voltage, which is
double the peak input voltage.


Fig. 5 Fig. 6
At the peak of the negative half cycle D
1
is forward based, and D
2
is reverse based. This
charges C
1
to the peak voltage V
p
with the polarity shown. At the peak of the positive
half cycle D
1
is reverse biased and D
2
is forward biased. Because the source and C
1
are
in series, C
2
will change toward 2V
p
. e.g. Capacitor voltage increases continuously and
finally becomes 20V. The voltage waveform is shown in fig. 6.
To understand the circuit operation, let the input voltage varies from -10 V to +10 V. The
different stages of circuit from 0 to t
10
are shown in fig. 7(a).

Fig. 7(a)
During 0 to t
1
, the input voltage is negative, D
1
is forward biased the capacitor is
charged to 10 V with the polarity as shown in fig. 7b.

Fig. 7(b)
During t
1
to t
2
, D
2
becomes forward biased and conducts and at t
2
, when V
i
is 10V total
voltage change is 20V. If C
1
= C
2
= C, both the capacitor voltages charge to +10 V i.e.
C
1
voltage becomes 0 and C
2
charges to +10V.

Fig. 7(c)
From t
2
to t
3
there is no conduction as both D
1
and D
2
are reverse biased.
During t
3
to t
4
D
1
is forward biased and conducts. C
1
again charges to +10V

Fig. 7(d)
During t
4
to t
5
both D
1
and D
2
are reverse biased and do not conduct.
During t
5
to t
6
D
2
is forward biased and conducts. The capacitor C
2
voltage becomes
+15 V and C
1
voltage becomes +5 V.

Fig. 7(e)
Again during t
6
to t
7
there is no conduction and during t
7
to t
8
, D
1
conducts. The
capacitor C
1
recharges to 10 V.

Fig. 7(f)
During t
8
to t
9
both D
1
and D
2
are reverse biased and there is no conduction.
During t
9
to t
10
D
2
conducts and capacitor C
2
voltage becomes + 17.5 V and C
1
voltage
becomes 7.5V. This process continues till the capacitor C
1
voltage becomes +20V.

Fig. 7(g)







Zener Diode:


The diodes designed to work in breakdown region are called zener diode. If the reverse
voltage exceeds the breakdown voltage, the zener diode will normally not be destroyed
as long as the current does not exceed maximum value and the device closes not over
load.
When a thermally generated carrier (part of the reverse saturation current) falls down
the junction and acquires energy of the applied potential, the carrier collides with crystal
ions and imparts sufficient energy to disrupt a covalent bond. In addition to the original
carrier, a new electron-hole pair is generated. This pair may pick up sufficient energy
from the applied field to collide with another crystal ion and create still another electron-
hole pair. This action continues and thereby disrupts the covalent bonds. The process is
referred to as impact ionization, avalanche multiplication or avalanche breakdown.
There is a second mechanism that disrupts the covalent bonds. The use of a sufficiently
strong electric field at the junction can cause a direct rupture of the bond. If the electric
field exerts a strong force on a bound electron, the electron can be torn from the
covalent bond thus causing the number of electron-hole pair combinations to multiply.
This mechanism is called high field emission or Zener breakdown. The value of reverse
voltage at which this occurs is controlled by the amount ot doping of the diode. A heavily
doped diode has a low Zener breakdown voltage, while a lightly doped diode has a high
Zener breakdown voltage.
At voltages above approximately 8V, the predominant mechanism is the avalanche
breakdown. Since the Zener effect (avalanche) occurs at a predictable point, the diode
can be used as a voltage reference. The reverse voltage at which the avalanche occurs
is called the breakdown or Zener voltage.
A typical Zener diode characteristic is shown in fig. 1. The circuit symbol for the Zener
diode is different from that of a regular diode, and is illustrated in the figure. The
maximum reverse current, I
Z(max)
, which the Zener diode can withstand is dependent on
the design and construction of the diode. A design guideline that the minimum Zener
current, where the characteristic curve remains at V
Z
(near the knee of the curve), is
0.1/ I
Z(max)
.

Fig. 1 - Zener diode characteristic
The power handling capacity of these diodes is better. The power dissipation of a zener
diode equals the product of its voltage and current.
P
Z
= V
Z
I
Z

The amount of power which the zener diode can withstand ( V
Z
.I
Z(max)
) is a limiting factor
in power supply design.
Zener Regulator:
When zener diode is forward biased it works as a diode and drop across it is 0.7 V.
When it works in breakdown region the voltage across it is constant (V
Z
) and the current
through diode is decided by the external resistance. Thus, zener diode can be used as
a voltage regulator in the configuration shown in fig. 2 for regulating the dc voltage. It
maintains the output voltage constant even through the current through it changes.


Fig. 2 Fig. 3
The load line of the circuit is given by V
s
= I
s
R
s
+ V
z
. The load line is plotted along with
zener characteristic in fig. 3. The intersection point of the load line and the zener
characteristic gives the output voltage and zener current.
To operate the zener in breakdown region V
s
should always be greater then V
z
. R
s
is
used to limit the current. If the V
s
voltage changes, operating point also changes
simultaneously but voltage across zener is almost constant. The first approximation of
zener diode is a voltage source of V
z
magnitude and second approximation includes the
resistance also. The two approximate equivalent circuits are shown in fig. 4.


If second approximation of zener diode is considered, the output voltage varies slightly
as shown in fig. 5. The zener ON state resistance produces more I * R drop as the
current increases. As the voltage varies form V
1
to V
2
the operating point shifts from Q
1

to Q
2
.

The voltage at Q
1
is
V
1
= I
1
R
Z
+V
Z

and at Q
2

V
2
= I
2
R
Z
+V
Z

Thus, change in voltage is
V
2
V
1
= ( I
2
I
1
) R
Z

Light Emitting Diode :
In a forward biased diode free electrons cross the junction and enter into p-layer where
they recombine with holes. Each recombination radiates energy as electron falls from
higher energy level to a lower energy level. I n ordinary diodes this energy is in the form
of heat. In light emitting diode, this energy is in the form of light.
The symbol of LED is shown in fig. 2. Ordinary diodes are made of Ge or Si. This
material blocks the passage of light. LEDs are made of different materials such as
gallium, arsenic and phosphorus. LEDs can radiate red, green, yellow, blue, orange or
infrared (invisible). The LED's forward voltage drop is more approximately 1.5V. Typical
LED current is between 10 mA to 50 mA.



Fig. 2 Fig. 3
Seven Segment Display :
Seven segment displays are used to display digits and few alphabets. It contains seven
rectangular LEDs. Each LED is called a Segment. External resistors are used to limit
the currents to safe Values. It can display any letters a, b, c, d, e, f, g.as shown in fig. 3.

Fig. 4
The LEDs of seven-segment display are connected in either in common anode
configuration or in common cathode configuration as shown in fig. 4.
Photo diode :
When a diode is reversed biased as shown in fig. 5, a reverse current flows due to
minority carriers. These carriers exist because thermal energy keeps on producing free
electrons and holes. The lifetime of the minority carriers is short, but while they exist
they can contribute to the reverse current. When light energy bombards a p-n junction, it
too can produce free electrons.

Fig. 5
In other words, the amount of light striking the junction can control the reverse current in
a diode. A photo diode is made on the same principle. It is sensitive to the light. In this
diode, through a window light falls to the junction. The stronger the light, the greater the
minority carriers and larger the reverse current.
Opto Coupler:
It combines a LED and a photo diode in a single package as shown in fig. 6. LED
radiates the light depending on the current through LED. This light fails on photo diode
and this sets up a reverse current. The advantage of an opto coupler is the electrical
isolation between the input and output circuits. The only contact between the input and
output is a beam of light. Because of this, it is possible to have an insulation resistance
between the two circuits of the order of thousands of mega ohms. They can be used to
isolate two circuits of different voltage levels.

Fig. 6



Uni-junction transistor
The UJT as the name implies, is characterized by a single pn junction. It exhibits
negative resistance characteristic that makes it useful in oscillator circuits.
The symbol for UJT is shown in fig. 1. The UJT is having three terminals base1 (B1),
base2 (B2) and emitter (E). The UJT is made up of an N-type silicon bar which acts as
the base as shown in fig. 2. It is very lightly doped. A P-type impurity is introduced into
the base, producing a single PN junction called emitter. The PN junction exhibits the
properties of a conventional diode.




Fig. 1

Fig .2
A complementary UJT is formed by a P-type base and N-type emitter. Except for the
polarity of voltage and current the characteristic is similar to those of a conventional
UJT.
A simplified equivalent circuit for the UJT is shown in fig. 3. V
BB
is a source of biasing
voltage connected between B2 and B1. When the emitter is open, the total resistance
from B2 to B1 is simply the resistance of the silicon bar, this is known as the inter base
resistance R
BB
. Since the N-channel is lightly doped, therefore R
BB
is relatively high,
typically 5 to 10K ohm. R
B2
is the resistance between B2 and point a', while R
B1
is the
resistance from point a' to B1, therefore the interbase resistance R
BB
is
R
BB
= R
B1
+ R
B2


Fig. 3
The diode accounts for the rectifying properties of the PN junction. V
D
is the diode's
threshold voltage. With the emitter open, I
E
= 0, and I
1
= I
2
. The interbase current is
given by
I
1
= I
2
= V
BB
/ R
BB
.
Part of V
BB
is dropped across R
B2
while the rest of voltage is dropped across R
B1
. The
voltage across R
B1
is
V
a
= V
BB
* (R
B1
) / (R
B1
+ R
B2
)
The ratio R
B1
/ (R
B1
+ R
B2
) is called intrinsic standoff ratio
q = R
B1
/ (R
B1
+ R
B2
) i.e. V
a
= q V
BB
.
The ratio q is a property of UJT and it is always less than one and usually between 0.4
and 0.85. As long as I
B
= 0, the circuit of behaves as a voltage divider.
Assume now that v
E
is gradually increased from zero using an emitter supply V
EE
. The
diode remains reverse biased till v
E
voltage is less than q V
BB
and no emitter current
flows except leakage current. The emitter diode will be reversed biased.
When v
E
= V
D
+ q V
BB
, then appreciable emitter current begins to flow where V
D
is the
diode's threshold voltage. The value of v
E
that causes, the diode to start conducting is
called the peak point voltage and the current is called peak point current I
P
.
V
P
= V
D
+ q V
BB
.
The graph of fig. 4 shows the relationship
between the emitter voltage and current. v
E
is
plotted on the vertical axis and I
E
is plotted on the
horizontal axis. The region from v
E
= 0 to v
E
= V
P

is called cut off region because no emitter current
flows (except for leakage). Once v
E
exceeds the
peak point voltage, I
E
increases, but v
E

decreases. up to certain point called valley point
(V
V
and I
V
). This is called negative resistance
region. Beyond this, I
E
increases with v
E
this is
the saturation region, which exhibits a positive
resistance characteristic.
The physical process responsible for the negative
resistance characteristic is called conductivity
modulation. When the v
E
exceeds V
P
voltage,
holes from P emitter are injected into N base.
Since the P region is heavily doped compared
with the N-region, holes are injected to the lower
half of the UJT.

Fig. 4
The lightly doped N region gives these holes a long lifetime. These holes move towards
B1 to complete their path by re-entering at the negative terminal of V
EE
. The large holes
create a conducting path between the emitter and the lower base. These increased
charge carriers represent a decrease in resistance R
B1
, therefore can be considered as
variable resistance. It decreases up to 50 ohm.
Since q is a function of R
B1
it follows that the reduction of R
B1
causes a corresponding
reduction in intrinsic standoff ratio. Thus as I
E
increases, R
B1
decreases, q decreases,
and V
a
decreases. The decrease in V
a
causes more emitter current to flow which
causes further reduction in R
B1
, q, and V
a
. This process is regenerative and therefore V
a

as well as v
E
quickly drops while I
E
increases. Although R
B
decreases in value, but it is
always positive resistance. It is only the dynamic resistance between V
V
and V
P
. At
point B, the entire base1 region will saturate with carriers and resistance R
B1
will not
decrease any more. A further increase in I
e
will be followed by a voltage rise.
The diode threshold voltage decreases with temperature and R
BB
resistance increases
with temperature because Si has positive temperature coefficient.



Bipolar Junction Transistor:
A transistor is basically a Si on Ge crystal containing three separate regions. It can be
either NPN or PNP type. The middle region is called the base and the outer two regions
are called emitter and the collector. The outer layers although they are of same type but
their functions cannot be changed. They have different physical and electrical
properties.
In most transistors, emitter is heavily doped. Its job is to emit or inject electrons into the
base. These bases are lightly doped and very thin, it passes most of the emitter-injected
electrons on to the collector. The doping level of collector is intermediate between the
heavy doping of emitter and the light doping of the base.
The collector is so named because it collects electrons from base. The collector is the
largest of the three regions; it must dissipate more heat than the emitter or base. The
transistor has two junctions. One between emitter and the base and other between the
base and the collector. Because of this the transistor is similar to two diodes, one
emitter diode and other collector base
When transistor is made, the diffusion of free electrons across the junction produces
two depletion layers. For each of these depletion layers, the barrier potential is 0.7 V for
Si transistor and 0.3 V for Ge transistor.
The depletion layers do not have the same width, because different regions have
different doping levels. The more heavily doped a region is, the greater the
concentration of ions near the junction. This means the depletion layer penetrates more
deeply into the base and slightly into emitter. Similarly, it penetration more into collector.
The thickness of collector depletion layer is large while the base depletion layer is small

If both the junctions are forward biased using two d.c sources, as shown in. free
electrons (majority carriers) enter the emitter and collector of the transistor, joins at the
base and come out of the base. Because both the diodes are forward biased, the
emitter and collector currents are large.

If both the junction are reverse biased as shown in then small currents flows through
both junctions only due to thermally produced minority carriers and surface leakage.
Thermally produced carriers are temperature dependent it approximately doubles for
every 10 degree Celsius rise in ambient temperature. The surface leakage current
increases with voltage.



Fig. 4
When emitter diodes forward biased and the applied voltage is more than 0.7 V (barrier
potential) then larger number of majority carriers (electrons in n-type) diffuse across the
junction.
Once the electrons are injected by the emitter enter into the base, they become minority
carriers. These electrons do not have separate identities from those, which are
thermally generated, in the base region itself. The base is made very thin and is very
lightly doped. Because of this only few electrons traveling from the emitter to base
region recombine with holes. This gives rise to recombination current. The rest of the
electrons exist for more time. Since the collector diode is reverse biased, (n is
connected to positive supply) therefore most of the electrons are pushed into collector
layer. These collector elections can then flow into the external collector lead.
Thus, there is a steady stream of electrons leaving the negative source terminal and
entering the emitter region. The V
EB
forward bias forces these emitter electrons to enter
the base region. The thin and lightly doped base gives almost all those electrons
enough lifetime to diffuse into the depletion layer. The depletion layer field pushes a
steady stream of electron into the collector region. These electrons leave the collector
and flow into the positive terminal of the voltage source. In most transistor, more than
95% of the emitter injected electrons flow to the collector, less than 5% fall into base
holes and flow out the external base lead. But the collector current is less than emitter
current.
Relation between different currents in a transistor:
The total current flowing into the transistor must be equal to the total current flowing out
of it. Hence, the emitter current I
E
is equal to the sum of the collector (I
C
) and base
current (I
B
). That is,
I
E
= I
C
+ I
B

The currents directions are positive directions. The total collector current I
C
is made up
of two components.
1. The fraction of emitter (electron) current which reaches the collector ( o
dc
I
E
)
2. The normal reverse leakage current I
CO


o
dc
is known as large signal current gain or dc alpha. It is always positive. Since
collector current is almost equal to the I
E
therefore dc I
E
varies from 0.9 to 0.98.
Usually, the reverse leakage current is very small compared to the total collector
current.

NOTE: The forward bias on the emitter diode controls the number of free electrons
infected into the base. The larger (V
BE
) forward voltage, the greater the number of
injected electrons. The reverse bias on the collector diode has little influence on the
number of electrons that enter the collector. Increasing V
CB
does not change the
number of free electrons arriving at the collector junction layer.





The symbol of npn and pnp transistors are shown in fig. 5.

Fig. 5

Breakdown Voltages:
Since the two halves of a transistor are diodes, two much reverse voltage on either
diode can cause breakdown. The breakdown voltage depends on the width of the
depletion layer and the doping levels. Because of the heavy doping level, the emitter
diode has a low breakdown voltage approximately 5 to 30 V. The collector diode is less
heavily doped so its breakdown voltage is higher around 20 to 300 V.


The Common Base Configuration :
If the base is common to the input and output circuits, it is know as common base
configuration as shown in fig. 1.

Fig. 1
For a pnp transistor the largest current components are due to holes. Holes flow from
emitter to collector and few holes flow down towards ground out of the base terminal.
The current directions are shown in fig. 1.
(I
E
= I
C
+ I
B
).
For a forward biased junction, V
EB
is positive and for a reverse biased junction V
CB
is
negative. The complete transistor can be described by the following two relations, which
give the input voltage V
EB
and output current I
C
in terms of the output voltage (V
CB
) and
input current I
E
.
V
EB
= f
1
(V
CB
, I
E
)
I
C
= f
2
(V
CB
, I
E
)


The output characteristic:
The collector current I
C
is completely determined by the input current I
E
and the V
CB

voltage. The relationship is given in fig. 2. It is a plot of I
C
versus V
CB
, with emitter
current I
E
as parameter. The curves are known as the output or collector or static
characteristics. The transistor consists of two diodes placed in series back to back (with
two cathodes connected together). The complete characteristic can be divided in three
regions.

Figure 7.2
(1). Active region:
In this region the collector diode is reverse biased and the emitter diode is forward
biased. Consider first that the emitter current is zero. Then the collector current is small
and equals the reverse saturation current I
CO
of the collector junction considered as a
diode.
If the forward current I
B
is increased, then a fraction of I
E
ie. o
dc
I
E
will reach the collector.
In the active region, the collector current is essentially independent of collector voltage
and depends only upon the emitter current. Because o
dc
is, less than one but almost
equal to unity, the magnitude of the collector current is slightly less that of emitter
current. The collector current is almost constant and work as a current source.
The collector current slightly increases with voltage. This is due to early effect. At higher
voltage collector gathers in a few more electrons. This reduces the base current. The
difference is so small, that it is usually neglected. If the collector voltage is increased,
then space charge width increases; this decreased the effective base width. Then there
is less chance for recombination within the base region.


(2). Saturation region:
The region to the left of the ordinate V
CB
= 0, and above the I
E
= 0, characteristic in
which both emitter and collector junction are forward biased, is called saturation region.
When collector diode is forward biased, there is large change in collector current with
small changes in collector voltage. A forward bias means, that p is made positive with
respect to n, there is a flow of holes from p to n. This changes the collector current
direction. If diode is sufficiently forward biased the current changes rapidly. It does not
depend upon emitter current.
(3). Cut off region:
The region below I
E
= 0 and to the right of V
CB
for which emitter and collector junctions
are both reversed biased is referred to cutoff region. The characteristics I
E
= 0, is similar
to other characteristics but not coincident with horizontal axis. The collector current is
same as I
CO
. I
CBO
is frequently used for I
CO
. It means collector to base current with
emitter open. This is also temperature dependent
The Input Characteristic:




Common Emitter Curves:
The common emitter configuration of BJT is shown in fig. 1.

Fig. 1
In the active region the input diode is forward
biased, therefore, input characteristic is simply
the forward biased characteristic of the emitter to
base diode for various collector voltages. fig. 3.
Below cut in voltage (0.7 or 0.3) the emitter
current is very small. The curve with the
collector open represents the forward biased
emitter diode. Because of the early effect the
emitter current increases for same V
EB
. (The
diode becomes better diode).
When the collector is shorted to the base, the
emitter current increases for a given V
EB
since
the collector now removes minority carriers from
the base, and hence base can attract more holes
from the emitter. This mean that the curve V
CB
=
0, is shifted from the character when V
CB
= open.

Fig. 3
In C.E. configuration the emitter is made common to the input and output. It is also
referred to as grounded emitter configuration. It is most commonly used configuration.
In this, base current and output voltages are taken as impendent parameters and input
voltage and output current as dependent parameters
V
BE
= f
1
( I
B
, V
CE
)
I
C
= f
2
( I
B
, V
CE
)
Input Characteristic:
The curve between I
B
and V
BE
for different values of V
CE
are shown in fig. 2. Since the
base emitter junction of a transistor is a diode, therefore the characteristic is similar to
diode one. With higher values of V
CE
collector gathers slightly more electrons and
therefore base current reduces. Normally this effect is neglected. (Early effect). When
collector is shorted with emitter then the input characteristic is the characteristic of a
forward biased diode when V
BE
is zero and I
B
is also zero.

Output Characteristic:
The output characteristic is the curve between V
CE
and I
C
for various values of I
B
. For
fixed value of I
B
and is shown in fig. 3. For fixed value of I
B
, I
C
is not varying much
dependent on V
CE
but slopes are greater than CE characteristic. The output
characteristics can again be divided into three parts.

Fig. 3
(1) Active Region:
In this region collector junction is reverse biased and emitter junction is forward biased.
It is the area to the right of V
CE
= 0.5 V and above I
B
= 0. In this region transistor current
responds most sensitively to I
B
. If transistor is to be used as an amplifier, it must operate
in this region.

If o
dc
is truly constant then I
C
would be independent of V
CE
. But because of early effect,
o
dc
increases by 0.1% (0.001) e.g. from 0.995 to 0.996 as V
CE
increases from a few
volts to 10V. Then |
dc
increases from 0.995 / (1-0.995) = 200 to 0.996 / (1-0.996) = 250
or about 25%. This shows that small change in o reflects large change in |. Therefore
the curves are subjected to large variations for the same type of transistors.
(2) Cut Off:
Cut off in a transistor is given by I
B
= 0, I
C
= I
CO
. A transistor is not at cut off if the base
current is simply reduced to zero (open circuited) under this condition,
I
C
= I
E
= I
CO
/ ( 1-
dc
) = I
CEO

The actual collector current with base open is designated as I
CEO
. Since even in the
neighborhood of cut off, o
dc
may be as large as 0.9 for Ge, then I
C
=10
I
CO
(approximately), at zero base current. Accordingly in order to cut off transistor it is not
enough to reduce I
B
to zero, but it is necessary to reverse bias the emitter junction
slightly. It is found that reverse voltage of 0.1 V is sufficient for cut off a transistor. In Si,
the o
dc
is very nearly equal to zero, therefore, I
C
= I
CO
. Hence even with I
B
= 0, I
C
= I
E
=
I
CO
so that transistor is very close to cut off.
In summary, cut off means I
E
= 0, I
C
= I
CO
, I
B
= -I
C
= -I
CO
, and V
BE
is a reverse voltage
whose magnitude is of the order of 0.1 V for Ge and 0 V for Si.




Reverse Collector Saturation Current I
CBO
:
When in a physical transistor emitter current is reduced to zero, then the collector
current is known as I
CBO
(approximately equal to I
CO
). Reverse collector saturation
current I
CBO
also varies with temperature, avalanche multiplication and variability from
sample to sample. Consider the circuit shown in fig. 4. V
BB
is the reverse voltage
applied to reduce the emitter current to zero.
I
E
= 0, I
B
= -I
CBO

If we require, V
BE
= - 0.1 V
Then - V
BB
+ I
CBO
R
B
< - 0.1 V

Fig. 4
If R
B
= 100 K, I
CBO
= 100 m A, Then V
BB
must be 10.1 Volts. Hence transistor must be
capable to withstand this reverse voltage before breakdown voltage exceeds.
(3).Saturation Region:
In this region both the diodes are forward biased by at least cut in voltage. Since the
voltage V
BE
and V
BC
across a forward is approximately 0.7 V therefore, V
CE
= V
CB
+ V
BE

= - V
BC
+ V
BE
is also few tenths of volts. Hence saturation region is very close to zero
voltage axis, where all the current rapidly reduces to zero. In this region the transistor
collector current is approximately given by V
CC
/ R
C
and independent of base current.
Normal transistor action is last and it acts like a small ohmic resistance.


Large Signal Current Gain
dc
:-
The ratio I
c
/ I
B
is defined as transfer ratio or large signal current gain |
dc


Where I
C
is the collector current and I
B
is the base current. The |
dc
is an indication if
how well the transistor works. The typical value of |
dc
varies from 50 to 300.
In terms of h parameters, |
dc
is known as dc current gain and in designated h
fE
( |
dc
=
h
fE
). Knowing the maximum collector current and |
dc
the minimum base current can be
found which will be needed to saturate the transistor.

This expression of |
dc
is defined neglecting reverse leakage current (I
CO
).
Taking reverse leakage current (I
CO
) into account, the expression for the |
dc
can be
obtained as follows:
|
dc
in terms of o
dc
is given by

Since, I
CO
= I
CBO


Cut off of a transistor means I
E
= 0, then I
C
= I
CBO
and I
B
= - I
CBO
. Therefore, the above
expression |
dc
gives the collector current increment to the base current change form cut
off to I
B
and hence it represents the large signal current gain of all common emitter
transistor.
Biasing Circuit Techniques or Locating the Q - Point:
Fixed Bias or Base Bias:
In order for a transistor to amplify, it has to be properly biased. This means forward
biasing the base emitter junction and reverse biasing collector base junction. For linear
amplification, the transistor should operate in active region ( If I
E
increases, I
C
increases,
V
CE
decreases proportionally).
The source V
BB
, through a current limit resistor R
B
forward biases the emitter diode and
V
CC
through resistor R
C
(load resistance) reverse biases the collector junction as shown
in fig. 1.

Fig. 1
The dc base current through R
B
is given by
I
B
= (V
BB
- V
BE
) / R
B

or V
BE
= V
BB
- I
B
R
B

Normally V
BE
is taken 0.7V or 0.3V. If exact voltage is required, then the input
characteristic ( I
B
vs V
BE
) of the transistor should be used to solve the above equation.
The load line for the input circuit is drawn on input characteristic. The two points of the
load line can be obtained as given below
For I
B
= 0, V
BE
= V
BB
.
and For V
BE
= 0, I
B
= V
BB
/ R
B
.
The intersection of this line with input characteristic gives the operating point Q as shown
in fig. 2. If an ac signal is connected to the base of the transistor, then variation in V
BE
is
about Q - point. This gives variation in I
B
and hence I
C
.

In the output circuit, the load equation can be written as
V
CE
= V
CC
- I
C
R
C

This equation involves two unknown V
CE
and I
C
and therefore can not be solved. To
solve this equation output characteristic ( I
C
vs V
CE
) is used.
The load equation is the equation of a straight line and given by two points:
I
C
= 0, V
CE
= V
CC

& V
CE
= 0, I
C
= V
CC
/ R
C

The intersection of this line which is also called dc load line and the characteristic gives
the operating point Q as shown in fig. 3.

Fig. 3
The point at which the load line intersects with I
B
= 0 characteristic is known as cut off
point. At this point base current is zero and collector current is almost negligibly small.
At cut off the emitter diode comes out of forward bias and normal transistor action is
lost. To a close approximation.
V
CE
( cut off) ~ V
CC
(approximately).
The intersection of the load line and I
B
= I
B(max)
characteristic is known as saturation
point . At this point I
B
= I
B(max)
, I
C
= I
C(sat)
. At this point collector diodes comes out of
reverse bias and again transistor action is lost. To a close approximation,
I
C(sat)
~ V
CC
/ R
C
(approximately ).
The I
B(sat)
is the minimum current required to operate the transistor in saturation region.
If the I
B
is less than I
B (sat)
, the transistor will operate in active region. If I
B
> I
B (sat)
it
always operates in saturation region.
If the transistor operates at saturation or cut off points and no where else then it is
operating as a switch is shown in fig. 4.

Fig. 4
V
BB
= I
B
R
B
+ V
BE

I
B
= (V
BB
V
BE
) / R
B

If I
B
> I
B(sat)
, then it operates at saturation, If I
B
= 0, then it operates at cut off.
If a transistor is operating as an amplifier then Q point must be selected carefully.
Although we can select the operating point any where in the active region by choosing
different values of R
B
& R
C
but the various transistor ratings such as maximum collector
dissipation P
C(max)
maximum collector voltage V
C(max)
and I
C(max)
& V
BE(max)
limit the
operating range.
Once the Q point is established an ac input is connected. Due to this the ac source the
base current varies. As a result of this collector current and collector voltage also varies
and the amplified output is obtained.
If the Q-point is not selected properly then the output waveform will not be exactly the
input waveform. i.e. It may be clipped from one side or both sides or it may be distorted
one.
Stability of Operating Point
Let us consider three operating points of transistor operating in common emitter
amplifier.
1. Near cut off
2. Near saturation
3. In the middle of active region
If the operating point is selected near the cutoff region, the output is clipped in negative
half cycle as shown in fig. 1.

Fig. 1
If the operating point is selected near saturation region, then the output is clipped in
positive cycle as shown in fig. 2.


Fig. 2 Fig. 3
If the operating point is selected in the middle of active region, then there is no clipping
and the output follows input faithfully as shown in fig. 3. If input is large then clipping at
both sides will take place. The first circuit for biasing the transistor is CE configuration is
fixed bias.
In biasing circuit shown in fig. 4(a), two different power supplies are required. To avoid
the use of two supplies the base resistance R
B
is connected to V
CC
as shown in fig.
4(b).


Fig. 4(a) Fig. 4(b)
Now V
CC
is still forward biasing emitter diode. In this circuit Q point is very unstable. The
base resistance R
B
is selected by noting the required base current I
B
for operating point
Q.
I
B
= (V
CC
V
BE
) / R
B


Voltage across base emitter junction is approximately 0.7 V. Since V
CC
is usually very
high
i.e. I
B
= V
CC
/ R
B

Since I
B
is constant therefore it is called fixed bias circuit.
Stability of quiescent operating point:
Let us assume that the transistor is replaced by an other transistor of same type. The
|
dc
of the two transistors of same type may not be same. Therefore, if |
dc
increases then
for same I
B
, output characteristic shifts upward. If |
dc
decreases, the output
characteristic shifts downward. Since I
B
is maintained constant, therefore the operating
point shifts from Q to Q
1
as shown in fig. 5. The new operating point may be completely
unsatisfactory.
Therefore, to maintain operating point stable, I
B
should be allowed to change so as to
maintain V
CE
& I
C
constant as |
dc
changes.

Fig. 5
A second cause for bias instability is a variation in temperature. The reverse saturation
current changes with temperature. Specifically, I
CO
doubles for every 10
o
C rise in
temperature. The collector current I
C
causes the collector junction temperature to rise,
which in turn increases I
CO
. As a result of this growth I
CO
, I
C
will increase ( |
dc
I
B
+ (1+ |
dc
) I
CO
) and so on. It may be possible that this process goes on and the ratings of the
transistors are exceeded. This increase in I
C
changes the characteristic and hence the
operating point.



Stability Factor:
The operating point can be made stable by keeping I
C
and V
CE
constant. There are two
techniques to make Q point stable.
1. stabilization techniques
2. compensation techniques
In first, resistor biasing circuits are used which allow I
B
to vary so as to keep I
C
relatively
constant with variations in |
dc
, I
CO
and V
BE
.
In second, temperature sensitive devices such as diodes, transistors are used which
provide compensating voltages and currents to maintain the operating point constant.
To compare different biasing circuits, stability factor S is defined as the rate of change
of collector current with respect to the I
CO
, keeping |
dc
and V
CE
constant
S = c I
C
/ c I
CO

If S is large, then circuit is thermally instable. S cannot be less than unity. The other
stability factors are, c I
C
/ c |
dc
and c I
C
/ c V
BE
. The bias circuit, which provide stability
with I
CO
, also show stability even if | and V
BE
changes.
I
C
= |
dc
I
B
+ (I + |
dc
) I
CO

Differentiating with respect to I
C
,

In fixed bias circuit, I
B
& I
C
are independent. Therefore and S = 1 + |
dc
. If
|
dc
=100, S = 101, which means I
C
increases 101 times as fast as I
CO
. Such a large
change definitely operate the transistor in saturation.




Emitter Feedback Bias:
Fig. 1, shows the emitter feedback bias circuit. In this circuit, the voltage across resistor
R
E
is used to offset the changes in |
dc
. If |
dc
increases, the collector current increases.
This increases the emitter voltage which decrease the voltage across base resistor and
reduces base current. The reduced base current result in less collector current, which
partially offsets the original increase in |
dc
. The feedback term is used because output
current ( I
C
) produces a change in input current ( I
B
). R
E
is common in input and output
circuits.

Fig. 1
In this case

Since I
E
= I
C
+ I
B


Therefore,

In this case, S is less compared to fixed bias circuit. Thus the stability of the Q point is
better.
Further,

If I
C
is to be made insensitive to
dc
than

R
E
cannot be made large enough to swamp out the effects of
dc
without saturating the
transistor.
Collector Feedback Bias:
In this case, the base resistor is returned back to collector as shown in fig. 2. If
temperature increases.
dc
increases. This produces more collectors current. As I
C

increases, collector emitter voltage decreases. It means less voltage across R
B
and
causes a decrease in base current this decreasing I
C
, and compensating the effect of
|
dc
.

Fig. 2
In this circuit, the voltage equation is given by

Circuit is stiff sensitive to changes in
dc
. The advantage is only two resistors are used.
Then,

Therefore,

It is better as compared to fixed bias circuit.
Further,

Circuit is still sensitive to changes in
dc
. The advantage is only two resistors are used.
Voltage Divider Bias:
If the load resistance R
C
is very small, e.g. in a transformer coupled circuit, then there is
no improvement in stabilization in the collector to base bias circuit over fixed bias circuit.
A circuit which can be used even if there is no dc resistance in series with the collector,
is the voltage divider bias or self bias. fig. 3.
The current in the resistance R
E
in the emitter lead causes a voltage drop which is in the
direction to reverse bias the emitter junction. Since this junction must be forward biased,
the base voltage is obtained from the supply through R
1
, R
2
network. If R
b
= R
1
|| R
2

equivalent resistance is very very small, then V
BE
voltage is independent of I
CO
and c
I
C
/ c I
CO
0. For best stability R
1
& R
2
must be kept small.

Fig. 3
If I
C
tends to increase, because of I
CO
, then the current in R
C
increases, hence base
current is decreased because of more reverse biasing and it reduces I
C
.
To analysis this circuit, the base circuit is replaced by its thevenin's equivalent as shown
in fig. 4.

Fig. 4



Thevenin's voltage is

R
b
is the effective resistance seen back from the base terminal.

If V
BE
is considered to be independent of I
C
, then


The smaller the value of R
b
, the better is the stabilization but S cannot be reduced be
unity.
Hence I
C
always increases more than I
CO
. If R
b
is reduced, then current drawn from the
supply increases. Also if R
E
is increased then to operate at same Q-point, the
magnitude of V
CC
must be increased. In both the cases the power loss increased and
reduced q.
In order to avoid the loss of ac signal because of the feedback caused by R
E
, this
resistance is often by passed by a large capacitance (> 10 F) so that its reactance at
the frequency under consideration is very small.





Emitter Bias:
Fig. 5, shown the emitter bias circuit. The circuit gets this name because the negative
supply V
EE
is used to forward bias the emitter junction through resistor R
E
. V
CC
still
reverse biases collector junction. This also gives the same stability as voltage divider
circuit but it is used only if split supply is available.

Fig. 5
In this circuit, the voltage equation is given by




Field Effect Transistor:
The field effect transistor is a semiconductor device, which depends for its operation on
the control of current by an electric field. There are two of field effect transistors:
1. JFET (Junction Field Effect Transistor)
2. MOSFET (Metal Oxide Semiconductor Field Effect Transistor)
The FET has several advantages over conventional transistor.
1. In a conventional transistor, the operation depends upon the flow of
majority and minority carriers. That is why it is called bipolar transistor. In
FET the operation depends upon the flow of majority carriers only. It is
called unipolar device.
2. The input to conventional transistor amplifier involves a forward biased PN
junction with its inherently low dynamic impedance. The input to FET
involves a reverse biased PN junction hence the high input impedance of
the order of M-ohm.
3. It is less noisy than a bipolar transistor.
4. It exhibits no offset voltage at zero drain current.
5. It has thermal stability.
6. It is relatively immune to radiation.
The main disadvantage is its relatively small gain bandwidth product in comparison with
conventional transistor.
Operation of FET:
Consider a sample bar of N-type semiconductor. This is called N-channel and it is
electrically equivalent to a resistance as shown in fig. 1.

Fig. 1
Ohmic contacts are then added on each side of the channel to bring the external
connection. Thus if a voltage is applied across the bar, the current flows through the
channel.
The terminal from where the majority carriers (electrons) enter the channel is called
source designated by S. The terminal through which majority carriers leaves the
channel is called drain and designated by D. For an N-channel device, electrons are the
majority carriers. Hence the circuit behaves like a dc voltage V
DS
applied across a
resistance R
DS
. The resulting current is the drain current I
D
. If V
DS
increases, I
D

increases proportionally.
Now on both sides of the n-type bar heavily doped regions of p-type impurity have been
formed by any method for creating pn junction. These impurity regions are called gates
(gate1 and gate2) as shown in fig. 2.
Both the gates are internally connected and
they are grounded yielding zero gate source
voltage (V
GS
=0). The word gate is used
because the potential applied between gate
and source controls the channel width and
hence the current.
As with all PN junctions, a depletion region is
formed on the two sides of the reverse
biased PN junction. The current carriers have
diffused across the junction, leaving only
uncovered positive ions on the n side and
negative ions on the p side. The depletion
region width increases with the magnitude of
reverse bias. The conductivity of this channel
is normally zero because of the unavailability
of current carriers.
The potential at any point along the channel
depends on the distance of that point from
the drain, points close to the drain are at a
higher positive potential, relative to ground,
then points close to the source. Both
depletion regions are therefore subject to
greater reverse voltage near the drain.
Therefore the depletion region width
increases as we move towards drain. The
flow of electrons from source to drain is now
restricted to the narrow channel between the
no conducting depletion regions. The width of
this channel determines the resistance
between drain and source.



Consider now the behavior of drain current I
D
vs drain source voltage V
DS
. The gate source voltage is
zero therefore V
GS
= 0. Suppose that V
DS
is gradually linearly increased linearly from 0V. I
D
also increases.
Since the channel behaves as a semiconductor
resistance, therefore it follows ohm's law. The
region is called ohmic region, with increasing
current, the ohmic voltage drop between the
source and the channel region reverse biased
the junction, the conducting portion of the
channel begins to constrict and I
D
begins to
level off until a specific value of V
DS
is reached,
called the pinch of voltage V
P
.
At this point further increase in V
DS
do not
produce corresponding increase in I
D
. Instead,
as V
DS
increases, both depletion regions extend
further into the channel, resulting in a no more
cross section, and hence a higher channel
resistance. Thus even though, there is more
voltage, the resistance is also greater and the
current remains relatively constant. This is
called pinch off or saturation region. The current
in this region is maximum current that FET can
produce and designated by I
DSS
. (Drain to
source current with gate shorted).

Fig. 3
As with all pn junctions, when the reverse voltage exceeds a certain level, avalanche breakdown of pn
junction occurs and I
D
rises very rapidly as shown in fig. 3.
Consider now an N-channel JFET with a reverse gate source voltage as shown in fig. 4.


Fig. 4

Fig. 5
The additional reverse bias, pinch off will occur for smaller values of | V
DS
|, and the maximum drain
current will be smaller. A family of curves for different values of V
GS
(negative) is shown in fig. 5.
Suppose that V
GS
= 0 and that due of V
DS
at a specific point along the channel is +5V with respect to
ground. Therefore reverse voltage across either p-n junction is now 5V. If V
GS
is decreased from 0 to 1V
the net reverse bias near the point is 5 - (-1) = 6V. Thus for any fixed value of V
DS
, the channel width
decreases as V
GS
is made more negative.
Thus I
D
value changes correspondingly. When the gate voltage is negative enough, the depletion layers
touch each other and the conducting channel pinches off (disappears). In this case the drain current is cut
off. The gate voltage that produces cut off is symbolized V
GS
(off) . It is same as pinch off voltage.
Since the gate source junction is a reverse biased silicon diode, only a very small reverse current flows
through it. Ideally gate current is zero. As a result, all the free electrons from the source go to the drain
i.e. I
D
= I
S
. Because the gate draws almost negligible reverse current the input resistance is very high 10's
or 100's of M ohm. Therefore where high input impedance is required, JFET is preferred over BJT. The
disadvantage is less control over output current i.e. FET takes larger changes in input voltage to produce
changes in output current. For this reason, JFET has less voltage gain than a bipolar amplifier.


Transductance Curves:
The transductance curve of a JFET is a graph of output current (I
D
) vs input voltage
(V
GS
) as shown in fig. 1.

Fig. 1
By reading the value of I
D
and V
GS
for a particular value of V
DS
, the transductance curve
can be plotted. The transductance curve is a part of parabola. It has an equation of

Data sheet provides only I
DSS
and V
GS
(off) value. Using these values the transductance
curve can be plotted.

Biasing the FET:
The FET can be biased as an amplifier. Consider the common source drain
characteristic of a JFET. For linear amplification, Q point must be selected somewhere
in the saturation region. Q point is selected on the basis of ac performance i.e. gain,
frequency response, noise, power, current and voltage ratings.


Self Bias:
Fig. 4, shows a self bias circuit another way to bias
a FET. Only a drain supply is used and no gate
supply. The idea is to use the voltage across R
S
to
produce the gate source reverse voltage.
This is a form of a local feedback similar to that
used with bipolar transistors. If drain current
increases, the voltage drop across R
S
increases
because the I
D
R
S
increases. This increases the
gate source reverse voltage which makes the
channel narrow and reduces the drain current. The
overall effect is to partially offset the original
increase in drain current. Similarly, if I
D
decreases,
drop across R
S
decreases, hence reverse bias
decreases and I
D
increases.

Fig. 4
Since the gate source junction is reverse biased, negligible gate current flows
through R
G
and so the gate voltage with respect to ground is zero.
V
G
= 0;
The source to ground voltage equals the product of the drain current and the source
resistance.
V
S
= I
D
R
S
.
The gate source voltage is the difference between the gate voltage and the source
voltage.
V
GS
= V
G
V
S
= 0 I
D
R
S

V
GS
= -I
D
R
S
.
This means that the gate source voltage equals the negative of the voltage across
the source resistor. The greater the drain current, the more negative the gate source
voltage becomes.
Rearranging the equation:
I
D
= -V
GS
/ R
S

The graph of this equation is called self base line a shown in Fig. 5.

Fig. 5






Gate Bias:
Fig. 2, shows a simple gate bias circuit.

Fig. 2
Separate V
GS
supply is used to set up Q point. This is the worst way to select Q point. The reason
is that there is considerable variation between the maximum and minimum values of FET
parameters e.g.
I
DSS
V
GS
(off)
Minimum 4mA -2V
Maximum 13mA -8V
This implies that the minimum and maximum transductance curves are displaced as
shown in fig. 3.
Gate bias applies a fixed voltage to the
gate. This fixed voltage results in a Q point
that is highly sensitive to the particular JFET
used. For instance, if V
GS
= -1V the Q point
may very from Q
1
to Q
2
depending upon the
JFET parameter is use.
At Q
1
, I
D
= 0.016 (1 - (1/8))
2
= 12.3 mA
At Q
2
, I
D
= 0.004 (1-(1/2))
2
= 1 mA.
The variation in drain current is very large.


Voltage Divider Bias :
The biasing circuit based on single power supply is shown in fig. 1. This is similar to the
voltage divider bias used with a bipolar transistor.

Fig. 1
The Thevenin voltage V
TH
applied to the gate is

The Thevenin resistance is given as

The gate current is assumed to be negligible. V
TH
is the dc voltage from gate to ground.

The drain current ID is given by

and the dc voltage from the drain to ground is V
D
= V
DD
I
D
R
D
.
If V
TH
is large enough to swamp out V
GS
the drain current is approximately constant for
any JFET as shown in fig. 2.



Current Source Bias:
This is another way to produce solid Q point. The aim is to produce a drain current that
is independent of V
GS
. Voltage divider bias and self bias attempt to do this by swamping
out of variations in V
GS
.
Using two power supplies:
The current source bias can be used to make I
D
constant fig. 4.

Fig. 4
The bipolar transistor is emitter biased; its collector current is given by
I
C
= (V
EE
V
BE
) / R
E
.
Because the bipolar transistor acts like a current source, it forces the drain current to
equal the bipolar collector current.
I
D
= I
C

Since I
C
is constant, both Q points have the same value of drain current. The current
source effectively wipes out the influence of V
GS
. Although V
GS
is different for each Q
point, it no longer influences the value of drain current.
Using One power supply:
When only a positive supply is available, the circuit
shown in fig. 5, can be used to set up a constant
drain current.
In this case, the bipolar transistor is voltage divider
biased. Assuming a stiff voltage divider, the emitter and
collector currents are constant for all bipolar transistors.
This forces the FET drain current equal the bipolar
collector current.


Fig. 5
Transductance:
The transductance of a FET is defined as

Because the changes in I
D
and V
GS
are
equivalent to ac current and voltage. This
equation can be written as


Fig. 6
The unit of g
m
is mho or siemems.
Typical value of g
m
is 2000 m A / V.
The value of g
m
can be obtained from the transductance curve as shown in fig. 6.
If A and B points are considered, than a change in V
GS
produces a change in I
D
. The
ratio of I
D
and V
GS
is the value of g
m
between A and B points. If C and D points are
considered, then same change in V
GS
produces more change in I
D
. Therefore, g
m
value
is higher. In a nutshell, g
m
tells us how much control gate voltage has over drain current.
Higher the value of g
m
, the more effective is gate voltage in controlling gate current. The
second parameter r
d
is the drain resistance.



FET as Amplifier:
Fig. 2, shows a common source amplifier.

Fig. 2
When a small ac signal is coupled into the gate it produces variations in gate source
voltage. This produces a sinusoidal drain current. Since an ac current flows through the
drain resistor. An amplified ac voltage is obtained at the output. An increase in gate
source voltage produces more drain current, which means that the drain voltage is
decreasing. Since the positive half cycle of input voltage produces the negative half
cycle of output voltage, we get phase inversion in a CS amplifier.
The ac equivalent circuit is shown in fig. 3.


Fig. 3
The ac output voltage is
v
out
= - g
m
v
gS
R
D

Negative sign means phase inversion. Because the ac source is directly connected
between the gate source terminals therefore ac input voltage equals
V
in
= V
gs

The voltage gain is given by

The further simplified model of the amplifieris shown in fig. 4.

Fig. 4
Z
in
is the input impedance. At low frequencies, this is parallel combination of R
1
|| R
2
||
R
GS
. Since R
GS
is very large, it is parallel combination of R
1
& R
2
. A V
in
is output voltage
and R
D
is the output impedance.

FET as amplifier
Because of nonlinear transductance curve, a JFET distorts large signals, as shown in
fig. 5.
Given a sinusoidal input voltage, we get a non-sinusoidal output current in which
positive half cycle is elongated and negative cycle is compressed. This type of distortion
is called Square law distortion because the transductance curve is parabolic.



Fig. 5 Fig. 6
This distortion is undesirable for an amplifier. One way to minimize this is to keep the
signal small. In that case a part of the curve is used and operation is approximately
linear. Some times swamping resistor is used to minimize distortion and gain constant.
Now the source is no longer ac ground as shown in fig. 6.
The drain current through r
S
produces an ac voltage between the source and ground. If
r
S
is large enough the local feedback can swamp out the non-linearity of the curve. Then
the voltage gain approaches an ideal value of R
D
/ r
S
.
Since R
GS
approaches infinity therefore, all the drain current flows through r
S
producing
a voltage drop of g
m
V
gS
r
S
. The ac equivalent circuit is shown in fig. 7.

Fig. 7

The voltage gain reduces but voltage gain is less effective by change in g
m
. r
S
must be
greater than 1 / g
m
only then





Small Signal CE Amplifiers:
CE amplifiers are very popular to amplify the small signal ac. After a transistor has been
biased with a Q point near the middle of a dc load line, ac source can be coupled to the
base. This produces fluctuations in the base current and hence in the collector current
of the same shape and frequency. The output will be enlarged sine wave of same
frequency.
The amplifier is called linear if it does not change the wave shape of the signal. As long
as the input signal is small, the transistor will use only a small part of the load line and
the operation will be linear.
On the other hand, if the input signal is too large. The fluctuations along the load line will
drive the transistor into either saturation or cut off. This clips the peaks of the input and
the amplifier is no longer linear.
The CE amplifier configuration is shown in fig. 1.

Fig. 1
The coupling capacitor (C
C
) passes an ac signal from one point to another. At the same
time it does not allow the dc to pass through it. Hence it is also called blocking
capacitor.

Fig. 2
For example in fig. 2, the ac voltage at point A is transmitted to point B. For this series
reactance X
C
should be very small compared to series resistance R
S
. The circuit to the
left of A may be a source and a series resistor or may be the Thevenin equivalent of a
complex circuit. Similarly R
L
may be the load resistance or equivalent resistance of a
complex network. The current in the loop is given by

As frequency increases, decreases, and current increases until it reaches to
its maximum value v
in
/ R. Therefore the capacitor couples the signal properly from A to
B when X
C
<< R. The size of the coupling capacitor depends upon the lowest frequency
to be coupled. Normally, for lowest frequency X
C
s 0.1R is taken as design rule.
The coupling capacitor acts like a switch, which is open to dc and shorted for ac.
The bypass capacitor C
b
is similar to a coupling capacitor, except that it couples an
ungrounded point to a grounded point. The C
b
capacitor looks like a short to an ac
signal and therefore emitter is said ac grounded. A bypass capacitor does not disturb
the dc voltage at emitter because it looks open to dc current. As a design rule X
Cb
s
0.1R
E
at lowest frequency.
Analysis of CE amplifier:
In a transistor amplifier, the dc source sets up quiescent current and voltages. The ac
source then produces fluctuations in these current and voltages. The simplest way to
analyze this circuit is to split the analysis in two parts: dc analysis and ac analysis. One
can use superposition theorem for analysis .


AC & DC Equivalent Circuits:
For dc equivalent circuit, reduce all ac voltage sources to zero and open all ac current
sources and open all capacitors. With this reduced circuit shown in fig. 3 dc current and
voltages can be calculated.

Fig. 3
For ac equivalent circuits reduce dc voltage sources to zero and open current sources
and short all capacitors. This circuit is used to calculate ac currents and voltage as
shown in fig. 4.

Fig. 4
The total current in any branch is the sum of dc and ac currents through that branch.
The total voltage across any branch is the sum of the dc voltage and ac voltage across
that branch.

Phase Inversion:
Because of the fluctuation is base current; collector current and collector voltage also
swings above and below the quiescent voltage. The ac output voltage is inverted with
respect to the ac input voltage, meaning it is 180
o
out of phase with input.
During the positive half cycle base current increase, causing the collector current to
increase. This produces a large voltage drop across the collector resistor; therefore, the
voltage output decreases and negative half cycle of output voltage is obtained.
Conversely, on the negative half cycle of input voltage less collector current flows and
the voltage drop across the collector resistor decreases, and hence collector voltage
increases we get the positive half cycle of output voltage as shown in fig. 5.

Fig. 5





AC Load line:
Consider the dc equivalent circuit fig. 1.

Fig. 1
Assuming I
C
= I
C
(approx), the output circuit voltage equation can be written as

The slop of the d.c load line is .
When considering the ac equivalent circuit, the output impedance becomes R
C
|| R
L

which is less than (R
C
+R
E
).
In the absence of ac signal, this load line passes through Q point. Therefore ac load line
is a line of slope (-1 / ( R
C
|| R
L
) ) passing through Q point. Therefore, the output voltage
fluctuations will now be corresponding to ac load line as shown in fig. 2. Under this
condition, Q-point is not in the middle of load line, therefore Q-point is selected slightly
upward, means slightly shifted to saturation side.

Fig. 2
Voltage gain:
To find the voltage gain, consider an unloaded CE amplifier. The ac equivalent circuit is
shown in fig. 3. The transistor can be replaced by its collector equivalent model i.e. a
current source and emitter diode which offers ac resistance r'
e
.

Fig. 3
The input voltage appears directly across the emitter diode.
Therefore emitter current i
e
= V
in
/ r'
e
.
Since, collector current approximately equals emitter current and i
C
= i
e
and v
out
= - i
e
R
C

(The minus sign is used here to indicate phase inversion)
Further v
out
= - (V
in
R
C
) / r'
e

Therefore voltage gain A = v
out
/ v
in
= -R
C
/ r'
e

The ac source driving an amplifier has to supply alternating current to the amplifier. The
input impedance of an amplifier determines how much current the amplifier takes from
the ac source.
In a normal frequency range of an amplifier, where all capacitors look like ac shorts and
other reactance are negligible, the ac input impedance is defined as
z
in
= v
in
/ i
in

Where v
in
, i
in
are peak to peak values or rms values
The impedance looking directly into the base is symbolized z
in (base)
and is given by
Z
in(base)
= v
in
/ i
b
,
Since,v
in
= i
e
r'
e

~ |
i
| r'
e

z
in (base)
= | r'
e
.
From the ac equivalent circuit, the input impedance z
in
is the parallel combination of R
1
,
R
2
and | r'
e
.
Z
in
= R
1
|| R
2
|| | r'
e

The Thevenin voltage appearing at the output is
v
out
= A v
in

The Thevenin impedance is the parallel combination of R
C
and the internal impedance
of the current source. The collector current source is an ideal source, therefore it has an
infinite internal impedance.
z
out
= R
C
.
The simplified ac equivalent circuit is shown in fig. 4.

Fig. 4
Common Collector Amplifier:
If a high impedance source is connected to low impedance amplifier then most of the
signal is dropped across the internal impedance of the source. To avoid this problem
common collector amplifier is used in between source and CE amplifier. It increases the
input impedence of the CE amplifier without significant change in input voltage.
Fig. 1, shows a common collector (CC) amplifier. Since there is no resistance in
collector circuit, therefore collector is ac grounded. It is also called grounded collector
amplifier. When input source drives the base, output appears across emitter resistor. A
CC amplifier is like a heavily swamped CE amplifier with a collector resistor shorted and
output taken across emitter resistor.
v
out
= v
in
- v
BE


Fig. 1
Therefore, this circuit is also called emitter follower, because V
BE
is very small. As v
in

increases, v
out
increases.
If v
in
is 2V, v
out
= 1.3V
If v
in
is 3V, v
out
= 2.3V.
Since v
out
follows exactly the v
in
therefore, there is no phase inversion between input
and output.
The output circuit voltage equation is given by
V
CE
= V
CC
I
E
R
E

Since I
E
~ I
C

I
C
= (V
CC
V
CE
) / R
E

This is the equation of dc load line. The dc load line is shown in Fig. 1.
Voltage gain:
Fig. 2, shows an emitter follower driven by a small ac voltage. The input is applied at
the base of transistor and output is taken across the emitter resistor. Fig. 3, shows the
ac equivalent circuit of the amplifier. The emitter is replaced by ac resistance r'
e
.



Fig. 2 Fig. 3
The ac output voltage is given by
v
out
= R
E
i
e

and, v
in
= i
e
(R
E
+ r'
e
)
Therefore, A = R
E
/ ( R
E
+r'
e
)
Since r'
e
<< R
E

A ~ 1.
Therefore, it is a unity gain amplifier. The practical
emitter follower circuit is shown in Fig. 4.

Fig. 4
The ac source (v
S
) with a series resistance R
S
drives the transistor base. Because of
the biasing resistor and input impedance of the base, some of the ac signal is lost
across the source resistor. The ac equivalent circuit is shown in Fig. 5.

Fig. 5





The input impedance at the base is given by

The total input impedance of an emitter follower includes biasing resistors in parallel
with input impedance of the base.
z
in
= R
1
|| R
2
|| | (r'
e
+ R
E
)
Since | R
E
is very large as compared to R
1
and R
2
.
Thus, z
in
R
1
|| R
2

Therefore input impedance is very high.
Applying Thevenin's theorem to the base circuit of Fig. 5, it becomes a source v
in
and a
series resistance (R
1
|| R
2
|| R
S
) as shown in Fig. 6.

Fig. 6



Cascade Amplifier:
To increases the voltage gain of the amplifier, multiple amplifier are connects in
cascade. The output of one amplifier is the input to another stage. In this way the overall
voltage gain can be increased, when number of amplifier stages are used in succession
it is called a multistage amplifier or cascade amplifier. The load on the first amplifier is
the input resistance of the second amplifier. The various stages need not have the
same voltage and current gain. In practice, the earlier stages are often voltage
amplifiers and the last one or two stages are current amplifiers. The voltage amplifier
stages assure that the current stages have the proper input swing. The amount of gain
in a stage is determined by the load on the amplifier stage, which is governed by the
input resistance to the next stage. Therefore, in designing or analyzing multistage
amplifier, we start at the output and proceed toward the input.



A n-stage amplifier can be represented by the block diagram as shown in fig. 3.

Fig. 3
In fig. 3, the overall voltage gain is the product of the voltage gain of each stage. That
is, the overall voltage gain is ABC.
To represent the gain of the cascade amplifier, the voltage gains are represents in dB.
The two power levels of input and output of an amplifier are compared on a logarithmic
scale rather than linear scale. The number of bels by which the output power P
2

exceeds the input power P
1
is defined as


Because of dB scale the gain can be directly added when a number of stages are
cascaded.
Types of Coupling:
In a multistage amplifier the output of one stage makes the input of the next stage.
Normally a network is used between two stages so that a minimum loss of voltage
occurs when the signal passes through this network to the next stage. Also the dc
voltage at the output of one stage should not be permitted to go to the input of the next.
Otherwise, the biasing of the next stage are disturbed.
The three couplings generally used are.
1. RC coupling
2. Impedance coupling
3. Transformer coupling.
1.RC coupling:
Fig. 4 shows RC coupling the most commonly used method of coupling from one stage
to the next. An ac source with a source resistance R S drives the input of an amplifier.
The grounded emitter stage amplifies the signal, which is then coupled to next CE stage
the signal is further amplified to get larger output.
In this case the signal developed across the collector resistor of each stage is coupled
into the base of the next stage. The cascaded stages amplify the signal and the overall
gain equals the product of the individual gains.

Fig. 4
The coupling capacitors pass ac but block dc Because of this the stages are isolated as
for as dc is concerned. This is necessary to avoid shifting of Q-points. The drawback of
this approach is the lower frequency limit imposed by the coupling capacitor.
The bypass capacitors are needed because they bypass the emitters to ground. Without
them, the voltage gain of each stage would be lost. These bypass capacitors also place
a lower limit on the frequency response. As the frequency keeps decreasing, a point is
reached at which capacitors no longer look like a.c. shorts. At this frequency the voltage
gain starts to decrease because of the local feedback and the overall gain of the
amplifier drops significantly. These amplifiers are suitable for frequencies above 10 Hz.
Frequency curve of an RC coupled amplifier:
A practical amplifier circuit is meant to raise the voltage level of the input signal. This
signal may be obtained from anywhere e.g. radio or TV receiver circuit. Such a signal is
not of a single frequency. But it consists of a band of frequencies, e.g. from 20 Hz to 20
KHz. If the loudspeakers are to reproduce the sound faithfully, the amplifier used must
amplify all the frequency components of signal by same amount. If it does not do so, the
output of the loudspeaker will not be the exact replica of the original sound. When this
happen then it means distortion has been introduced by the amplifier. Consider an RC
coupled amplifier circuit shown in fig. 1.



Fig. 1 Fig. 2
Fig. 2, shows frequency response curve of a RC coupled amplifier. The curve is usually
plotted on a semilog graph paper with frequency range on logarithmic scale so that
large frequency range can be accommodated. The gain is constant for a limited band of
frequencies. This range is called mid-frequency band and gain is called mid band gain.
A
VM
. On both sides of the mid frequency range, the gain decreases. For very low and
very high frequencies the gain is almost zero.
In mid band frequency range, the coupling capacitors and bypass capacitors are as
good as short circuits. But when the frequency is low. These capacitors can no longer
be replaced by the short circuit approximation.

First consider coupling capacitor. The ac equivalent is shown in fig. 3, assuming
capacitors are offering some impedance. In mid-frequency band, the capacitors are ac
shorted so the input voltage appears directly across |r'
e
but at low frequency the X
C
is
significant and some voltage drops across X
C
. The input v
in
at the base decreases. Thus
decreasing output voltage. The lower the frequency the more will be X
C
and lesser will
be the output voltage.

Fig. 3
Similarly at low frequency, output capacitor reactance also increases. The voltage
across R
L
also reduces because some voltage drop takes place across X
C
. Thus output
voltage reduces.
The X
C
reactance not only reduces the gain but also change the phase between input
and output. It would not be exactly 180
o
but decided by the reactance. At zero
frequency, the capacitors are open circuited therefore output voltage reduces to zero.
The other component due to which gain decreases at
low frequencies is the bypass capacitor. The
function of this capacitor is to bypass ac and blocks
dc The impedence of this capacitor in mid frequency
band is very low as compared to R
E
so it behaves
like ac short but as the frequency decrease the X
CE

becomes more and no longer behaves like ac short.
Now the emitter is not ac grounded. The ac emitter
current i.e. divides into two parts i
1
and i
2
, as shown
in fig. 4. A current i
1
passes through R
E
and rest of
the current passes through C. Due to ac current i
1
in
R
E
, an ac voltage is developed i
1
* R
E
. With the
polarity marked at an instant. Thus the effective V
L

voltage is given by
V
be
= V
s
R
E
.

Frequency Response of Amplifier
Thus the effective voltage input is reduced.
The output also reduces. The lower the
frequency, the lesser will be the gain. This
reduction in gain is due to negative feedback.
As the frequency of the input signal
increases, again the gain of the amplifier
reduces. Firstly the | of the transistor
decreases at higher frequency. Thus
reducing the voltage gain of the amplifier at
higher frequencies as shown in fig. 5.
The other factor responsible for the reduction
in gain at higher frequencies is the presence
of various capacitors as shown in fig. 6. They
are not physically connected but inherently
present with the device.
Fig. Fig. 5
The capacitor C
bc
between the
base and the collector connects
the output with the input.
Because of this, negative
feedback takes place in the
circuit and the gain decreases.
This feedback effect is more,
when C
bc
provides a path for
higher frequency ac currents
The capacitance C
be
offers a
low input impedance at higher
frequency thus reduces the
effective input signal and so the
gain falls. Similarly, C
ce

provides a shunting effect at
high frequencies in the output
side and reduces gain of the
amplifier.
Besides these junction
capacitances there are wiring
capacitance C
W1
and C
W2
.
These reactance are very small
but at high frequencies they
become 5 to 20 p.f. For a
multistage amplifier, the effect
of the capacitances C
ce
,C
W1
and
C
W2
can be represented by
single shunt capacitance.
C
S
= C
W1
+ C
W2
+C
ce
.
At higher frequency, the
capacitor C
S
offers low input
impedance and thus reduces the
output.

Fig. 6
Bandwidth of an amplifier:
The gain is constant over a frequency range. The frequencies at which the gain
reduces to 70.7% of the maximum gain are known as cut off frequencies, upper cut off
and lower cut off frequency. fig. 7, shows these two frequences. The difference of
these two frequencies is called Band width (BW) of an amplifier.
BW = f
2
f
1
.

Fig. 7
At f
1
and f
2
, the voltage gain becomes 0.707 Am(1 / \ 2). The output voltage reduces to
1 / \ 2 of maximum output voltage. Since the power is proportional to voltage square,
the output power at these frequencies becomes half of maximum power. The gain on
dB scale is given by
20 log
10
(V
2
/ V
1
) = 10 log 10 (V
2
/ V
1
)
2
= 3 dB.
20 log
10
(V
2
/ V
1
) = 20 log
10
(0.707) =10 log
10
(1 / \ 2)
2
= 10 log
10
(1 / 2) = -3 dB.
If the difference in gain is more than 3 dB, then it can be detected by human. If it is less
than 3 dB it cannot be detected
Small signal low frequency transistor Models:
All the transistor amplifiers are two port networks having two voltages and two currents.
The positive directions of voltages and currents are shown in fig. 1.

Fig. 1
Out of four quantities two are independent and two are dependent. If the input current i
1

and output voltage v
2
are taken independent then other two quantities i
2
and v
1
can be
expressed in terms of i
1
and V
2
.

The equations can be written as

where h
11
, h
12
, h
21
and h
22
are called h-parameters.

= h
i
= input impedance with output short circuit to ac.

=h
r
= fraction of output voltage at input with input open circuited or reverse voltage gain
with input open circuited to ac (dimensions).

= h
f
= negative of current gain with output short circuited to ac.
The current entering the load is negative of I
2
. This is also known as forward short
circuit current gain.

= h
o
= output admittance with input open circuited to ac.
If these parameters are specified for a particular configuration, then suffixes e,b or c are
also included, e.g. h
fe
,h
ib
are h parameters of common emitter and common collector
amplifiers
Using two equations the generalized model of the amplifier can be drawn as shown in
fig. 2.

Fig. 2
The hybrid model for a transistor amplifier can be derived as follow:
Let us consider CE configuration as show in fig. 3. The variables, i
B
, i
C
,v
C
, and v
B

represent total instantaneous currents and voltages i
B
and v
C
can be taken as
independent variables and v
B
, I
C
as dependent variables.

Fig. 3
v
B
= f
1
(i
B
,v
C
)
I
C
= f
2
( i
B
, v
C
).
Using Taylor 's series expression, and neglecting higher order terms we obtain.

The partial derivatives are taken keeping the collector voltage or base current constant.
The v
B
, v
C
, i
B
, i
C
represent the small signal (incremental) base and collector
current and voltage and can be represented as v
b
,i
b
,v
C
,i
C
.

The model for CE configuration is shown in fig. 4.

Fig. 4
Determination of h - parameters:
To determine the four h-parameters of transister amplifier, input and output
characteristic are used. Input characteristic depicts the relationship between input
voltage and input current with output voltage as parameter. The output characteristic
depicts the relationship between output voltage and output current with input current as
parameter. Fig. 5, shows the output characterisitcs of CE amplifier.


Fig. 5
The current increments are taken around the quiescent point Q which corresponds to i
B

= I
B
and to the collector voltage V
CE
= V
C


The value of h
oe
at the quiescent operating point is given by the slope of the output
characteristic at the operating point (i.e. slope of tangent AB).

h
ie
is the slope of the appropriate input on fig. 6, at the operating point (slope of tangent
EF at Q).


Fig. 6
A vertical line on the input characteristic represents constant base current. The
parameter hre can be obtained from the ratio (V
B2
V
B1
) and (V
C2
V
C1
) for at Q.
Typical CE h-parametersof transistor 2N1573 are given below:
h
ie
= 1000 ohm.
h
re
= 2.5 * 10 4
h
fe
= 50
h
oe
= 25 A / V
Analysis of a transistor amplifier using h-parameters:
To form a transistor amplifier it is only necessary to connect an external load and signal
source as indicated in fig. 1 and to bias the transistor properly.

Fig. 1
Consider the two-port network of CE amplifier. R
S
is the source resistance and Z
L
is the
load impedence h-parameters are assumed to be constant over the operating range.
The ac equivalent circuit is shown in fig. 2. (Phasor notations are used assuming
sinusoidal voltage input). The quantities of interest are the current gain, input
impedence, voltage gain, and output impedence.

Fig. 2
Current gain:
For the transistor amplifier stage, A
i
is defined as the ratio of output to input currents.

Input Impedence:
The impedence looking into the amplifier input terminals ( 1,1' ) is the input impedence
Z
i


Voltage gain:
The ratio of output voltage to input voltage gives the gain of the transistors.

Output Admittance:
It is defined as

A
v
is the voltage gain for an ideal voltage source (R
v
= 0).
Consider input source to be a current source I
S
in parallel with a resistance R
S
as shown
in fig. 3.

Fig. 3
In this case, overall current gain A
IS
is defined as

To analyze multistage amplifier the h-parameters of the transistor used are obtained
from manufacture data sheet. The manufacture data sheet usually provides h-
parameter in CE configuration. These parameters may be converted into CC and CB
values. For example fig. 4 h
rc
in terms of CE parameter can be obtained as follows.

Fig. 4
For CE transistor configuaration
V
be
= h
ie
I
b
+ h
re
V
ce

I
c
= h
fe
I
b
+ h
oe
V
ce

The circuit can be redrawn like CC transistor configuration as shown in fig. 5.
V
bc
= h
ie
I
b
+ h
rc
V
ec

I
c
= h
fe
I
b
+ h
oe
V
ec



To analyze multistage amplifier the h-parameters of the transistor used are obtained
from manufacture data sheet. The manufacture data sheet usually provides h-
parameter in CE configuration. These parameters may be converted into CC and CB
values. For example fig. 4 h
rc
in terms of CE parameter can be obtained as follows.

Fig. 4
For CE transistor configuaration
V
be
= h
ie
I
b
+ h
re
V
ce

I
c
= h
fe
I
b
+ h
oe
V
ce

The circuit can be redrawn like CC transistor configuration as shown in fig. 5.
V
bc
= h
ie
I
b
+ h
rc
V
ec

I
c
= h
fe
I
b
+ h
oe
V
ec



To analyze multistage amplifier the h-parameters of the transistor used are obtained
from manufacture data sheet. The manufacture data sheet usually provides h-
parameter in CE configuration. These parameters may be converted into CC and CB
values. For example fig. 4 h
rc
in terms of CE parameter can be obtained as follows.

Fig. 4
For CE transistor configuaration
V
be
= h
ie
I
b
+ h
re
V
ce

I
c
= h
fe
I
b
+ h
oe
V
ce

The circuit can be redrawn like CC transistor configuration as shown in fig. 5.
V
bc
= h
ie
I
b
+ h
rc
V
ec

I
c
= h
fe
I
b
+ h
oe
V
ec



Power amplifier
The amplifiers in multistage amplifier near the load end in almost all-electronic system employ
large signal amplifiers (Power amplifiers) and the purpose of these amplifiers is to obtain power
again.
Consider the case of radio receiver, the purpose of a radio receiver is to produce the
transmitted programmes with sufficient loudness. Since the radio signal received at the
receiver output is of very low power, therefore, power amplifiers are used to put
sufficient power into the signal. But these amplifier need large voltage input.
Therefore, it is necessary to amplify the magnitude of input signal by means of small
amplifiers to a level that is sufficient to drive the power amplifier stages.
In multistage amplifier, the emphasis is on power gain in amplifier near the load. In
these amplifies, the collector currents are much larger because the load resistances are
small (i.e impedence of loud speaker is 3.2 ohm).
A power amplifier draws a large amount of dc power form dc source and convert it into
signal power. Thus, a power amplifier does not truly amplify the signal power but
converts the dc power into signal power.



DC and AC load lines:
Consider a CE amplifier as shown in fig. 1.

Fig. 1
The dc equivalent circuit gives the dc load line as shown in fig. 2.

Fig. 2
Q is the operative point. I
CQ
and V
CEQ
are quiescent current and voltage. The ac
equivalent circuit is shown in fig. 3.

Fig. 3
This circuit produces ac load line. When no signal is present, the transistor operates at the Q
point shown in fig. 4.

Fig. 4
When a signal is present, operating point swings along the ac load line rather than dc
load line. The saturation and cut off points on the ac load line are different from those on
the dc load line.

During the positive half cycle of ac source, voltage, the collector voltage swing from the
Q-point towards saturation. On the negative cycle, the collector voltage swings from Q-
point towards cutoff. For a large signal clipping can occur on either side or both sides.
The maximum positive swing from the Q-point is
V
CEQ
+ I
CQ
r
C
V
CEQ
= I
CQ
r
C
.
The maximum negative swing from the Q-point is
0 V
CEQ
= - V
CEQ
.
The ac output compliance (maximum peak to peak unclipped voltage) is given by the
smaller of these two approximate values:
PP = 2 I
CQ
r
C

or PP = 2 V
CEQ
.







Darlington Amplifier:
It consists of two emitter followers in cascaded mode as shown in fig. 1. The overall
gain is close to unity. The main advantage of Darlington amplifier is very large increase
in input impedence and an equal decrease in output impedance .

Fig. 1
DC Analysis:
The first transistor has one V
BE
drop and second transistor has second V
BE
drop. The
voltage divider produces V
TH
to the input base. The dc emitter current of the second
stage is
I
E2
= (V
TH
2 v
BE
) / (R
E
)
The dc emitter current of the first stage that is the base current of second stage is given
by
I
E1
~ I
E2
/ |
2

If r'
e(2)
is neglected then input impedance of second stage is
Z
in (2)
= |
2
R
E

This is the impedance seen by the first transistor. If r'
e(1)
is also neglected then the input
impedance of 1 becomes.
Z
in (1)
= |
1
|
2
R
E

which is extremely high because of the products of two betas, so the approximate input
impedance of Darlington amplifier is
Z
in
= R
1
|| R
2

Output impedance:
The Thevenin impedance at the input is given by
R
TH
= R
S
|| R
1
|| R
2

Similar to single stage common collector amplifier, the output impedance of the two
stages z
out(1)
and z
out(2)
are given by.

Therefore, t he output impedance of the amplifier is very small.
Basic MESFET Models
- GaAs MESFETs are widely used in both analog as well as digital applications,
with their microwave performance challenging that of HFETs, and their IC
integration scale rapidly approaching 100,000 transistors per chip and beyond.
- With thin, highly doped channels and low parasitic resistances, GaAs MESFETs
can obtain high currents and transconductances.

Fig. 6.2 Schematic representation of a MESFET.
- The gate electrode is deposited directly on the semiconductor and forms a
Schottky barrier contact with the conducting channel underneath, between the
source and drain ohmic contacts.
- The gate bias modulates the depletion region under the gate and, thus,
modulates the effective width of the neutral channel and thus the current flow
between source and drain.
- Note: the carriers under motion in the channel do not come under close proximity
of the interface due to the depletion region and, thus, the problems related to
interface traps are largely avoided.
- Also, since the forward voltage that can be applied to the gate is limited by the
built-in potential of the Schottky barrier, hence, it is a drawback when the device
is operated in enhancement (normally off) logic, however, this limitation is less
severe for low power circuits operating with a low power supply voltage.
- Historically, MESFETs were discussed in early days in terms of the Shockley
model, where carrier velocity saturation effect was neglected, and it was
assumed that current saturation at high drain-source bias took place as a result
of the channel getting pinched-off at the drain side of the channel.
- This model may be applicable for devices having very long channel lengths,
however, gives a poor description of modern day devices having gate lengths of
the order of 1 m or less.
- A deeper insight into MESFET device physics can be obtained from a detailed
two-dimensional Monte Carlo simulation, however, simple analytical of semi-
analytical models based on the device physics are still required for circuit
simulators.
The Shockley Model
- Consider first the gate region of a MESFET (intrinsic device) with a uniform
channel doping , a channel thickness d, and a built-in voltage for the gate
contact.
- With a channel potential V(x) (relative to the intrinsic source) and an intrinsic
gate-source voltage , the depletion width can be expressed (using the
gradual channel approximation [GCA]) as



where is the dielectric permittivity of the semiconductor and is the built-in
voltage of the source-channel junction.
- The threshold voltage corresponds to the gate-source voltage at which the
depletion width at zero drain-source bias (V = 0) equals the channel width, or, in
terms of Eq.(6.1)



where is referred to as the pinch-off voltage, and for a uniformly doped
channel, is given by





Oscillators:
An oscillator may be described as a source of alternating voltage. It is different than amplifier.
An amplifier delivers an output signal whose waveform corresponds to the input signal but
whose power level is higher. The additional power content in the output signal is supplied by
the DC power source used to bias the active device.
The amplifier can therefore be described as an energy converter, it accepts energy from the
DC power supply and converts it to energy at the signal frequency. The process of energy
conversion is controlled by the input signal, Thus if there is no input signal, no energy
conversion takes place and there is no output signal.
The oscillator, on the other hand, requires no external signal to initiate or maintain the
energy conversion process. Instead an output signals is produced as long as source of DC
power is connected. Fig. 1, shows the block diagram of an amplifier and an oscillator.

Fig. 1
Oscillators may be classified in terms of their output waveform, frequency range,
components, or circuit configuration.
If the output waveform is sinusoidal, it is called harmonic oscillator otherwise it is called
relaxation oscillator, which include square, triangular and saw tooth waveforms.
Oscillators employ both active and passive components. The active components provide
energy conversion mechanism. Typical active devices are transistor, FET etc.
Passive components normally determine the frequency of oscillation. They also influence
stability, which is a measure of the change in output frequency (drift) with time, temperature
or other factors. Passive devices may include resistors, inductors, capacitors, transformers,
and resonant crystals.
Capacitors used in oscillators circuits should be of high quality. Because of low losses and
excellent stability, silver mica or ceramic capacitors are generally preferred.
An elementary sinusoidal oscillator is shown in fig. 2. The inductor and capacitors are
reactive elements i.e. they are capable of storing energy. The capacitor stores energy in its
electric field.Whenever there is voltage across its plates,and the inductor stores energy in its
magnetic field whenever current flows through it. Both C and L are assumed to be loss less.
Energy can be introduced into the circuit by charging the capacitor with a voltage V as
shown in fig. 2. As long as the switch S is open, C cannot discharge and so i=0 and V=0.

Fig. 2
Now S is closed at t = t
o
, This means V rises from 0 to V, Just before closing inductor
current was zero and inductor current cannot be changed instantaneously. Current
increases from zero value sinusoidally and is given by

The capacitor losses its charge and energy is simply transferred from capacitor to inductor
magnetic field. The total energy is still same. At t = t
1
, all the charge has been removed from
the capacitor plates and voltage reduces to zero and at current reaches to its maximum
value. The current for t> t
1
charges C in the opposite direction and current decreases. Thus
LC oscillation takes places. Both voltage and current are sinusoidal though no sinusoidal
input was applied. The frequency of oscillation is


The circuit discussed is not a practical oscillator because even if loss less components were
available, one could not extract energy with out introducing an equivalent resistance. This would
result in damped oscillations as shown in fig. 3.

Fig. 3
These oscillations decay to zero as soon as the energy in the tank is consumed. If we remove too
much power from the circuit, the energy may be completely consumed before the first cycle of
oscillations can take place yielding the over damped response.
It is possible to supply energy to the tank to make up for all losses (coil losses plus energy
removed), thereby maintaining oscillations of constant amplitude.
Since energy lost may be related to a positive resistance, it follows that the circuit would gain
energy if an equivalent negative resistance were available. The negative resistance, supplies
whatever energy the circuit lose due to positive resistance. Certain devices exhibit negative
resistance characteristics, an increasing current for a decreasing voltage. The energy supplied by
the negative resistance to the circuit, actually comes from DC source that is necessary to bias the
device in its negative resistance region.
Another technique for producing oscillation is to use positive feedback considers an amplifier with
an input signal vin and output vO as shown in fig. 4.

Fig. 4
The amplifier is inverting amplifier and may be transistorized, or FET or OPAMP. The output is
180 out of phase with input signal vO= -A vin.(A is negative)
Now a feedback circuit is added. The output voltage is fed to the feed back circuit. The output of
the feedback circuit is again 180 phase shifted and also gets attenuated. Thus the output from
the feedback network is in phase with input signal vin and it can also be made equal to input
signal.
If this is so, Vf can be connected directly and externally applied signal can be removed and the
circuit will continue to generate an output signal. The amplifier still has an input but the input is
derived from the output amplifier. The output essentially feeds on itself and is continuously
regenerated. This is positive feedback. The over all amplification from vin to vf is 1 and the total
phase shift is zero. Thus the loop gain A is equal to unity.

When this criterion is satisfied then the closed loop gain is infinite. i.e. an output is produced
without any external input.
vO = A verror
= A (v in + v f )
= A (vin + vO)
or (1-A )vO = A vin
or
When A = 1, vO / vin=
The criterion A = 1 is satisfied only at one frequency.This is known as backhausen criterion.

The frequency at which a sinusoidal oscillator will operate is the frequency for which the total
phase shift introduced, as the signal proceeds form the input terminals, through the amplifier and
feed back network and back again to the input is precisely zero or an integral multiple of 2p. Thus
the frequency of oscillation is determined by the condition that the loop phase shift is zero.
Oscillation will not be sustained, if at the oscillator frequency, A <1 or A >1. Fig. 5, show the
output for two different contions A < 1 and A >1.

Fig. 5
If A is less than unity then A vin is less than vin, and the output signal will die out, when the
externally applied source is removed. If A>1 then A b vinis greater than vin and the output
voltage builds up gradually. If A = 1, only then output voltage is sine wave under steady state
conditions.
In a practical oscillator, it is not necessary to supply a signal to start the oscillations. Instead,
oscillations are self-starting and begin as soon as power is applied. This is possible because of
electrical noise present in all passive components.
Therefore, as soon as the power is applied, there is already some energy in the circuit at fo, the
frequency for which the circuit is designed to oscillate. This energy is very small and is mixed with
all the other frequency components also present, but it is there. Only at this frequency the loop
gain is slightly greater than unity and the loop phase shift is zero. At all other frequency the
Barkhausen criterion is not satisfied. The magnitude of the frequency component fo is made
slightly higher each time it goes around the loop. Soon the fo component is much larger than all
other components and ultimately its amplitude is limited by the circuits own non-lineareties
(reduction of gain at high current levels, saturation or cut off). Thus the loop gain reduces to unity
and steady stage is reached. If it does not, then the clipping may occur.
Practically, A is made slightly greater than unity. So that due to disturbance the output does not
change but if A = 1 and due to some reasons if A decreases slightly than the oscillation may die
out and oscillator stop functioning. In conclusion, all practical oscillations involve:
- An active device to supply loop gain or negative resistance.
- A frequency selective network to determine the frequency of oscillation.
- Some type of non-linearity to limit amplitude of oscillations.
Example - 1
The gain of certain amplifier as a function of frequency is A (j) = -16 x 106 / j. A feedback path
connected around it has (j ) = 103 / (20 x 103 + j )2. Will the system oscillate? If so, at what
frequency ?
Solution:
The loop gain is
To determine, if the system will oscillate, we will first determine the frequency, if any, at which
the phase angle of equals to 0 or a multiple of 360. Using phasor algebra, we have

This expression will equal -360 if ,

Thus, the phase shift around the loop is -360 at = 2000 rad/s. We must now check to see if the
gain magnitude |A | = 1 at = 2 x 103. The gain magnitude is

Substituting = 2 x 103, we find

Thus, the Barkhausen criterion is satisfied at = 2 x 103 rad/s and oscillation occurs at that
frequency (2 x 103 / 2 = 318 .3 Hz).





Transistor Phase Shift Oscillator:
At low frequencies (around 100 kHz or less), resistors and capacitors are usually employed to
determine the frequency of oscillation. Fig. 1 shows transistorized phase shift oscillator circuit
employing RC network. If the phase shift through the common emitter amplifier is 180, then the
oscillation may occur at the frequency where the RC network produces an additional 180 phase
shift.
Since a transistor is used as the active element, the output across R of the feedback network is
shunted by the relatively low input resistance of the transistor, because input diode is a forward
biased diode

Fig. 1
Hence, instead of employing voltage series feedback, voltage shunt feedback is used for a
transistor phase shift oscillator. The load resistance RL is also connected via coupling capacitor.
The equivalent circuit using h-parameter is shown in fig. 2.

Fig. 2
For the circuit, the load resistance RL may be lumped with RC and the effective load resistance
becomes R'L(= RC || RL). The two h-parameters of the CE transistor amplifier, hoe and hre are
neglected.
The capacitor C offers some impedance at the frequency of oscillation and, therefore, it is kept as
it is, while the coupling capacitor behaves like ac short. The input resistance of the transistor is
Rihie. Therefore the resistance R3 is selected such that R=R3+Ri=R3+hie. This choice makes the
three R C selections alike and simplifies the calculation. The effect of biasing resistor R1 , R2, &
REon the circuit operation is neglected.
Since this is a voltage shunt feedback, therefore instead of finding VR /VO, we should find the
current gain of the feedback loop.

The simplified equivalent circuit is shown in fig. 3.

Fig. 3
Applying KVL,

Since I3 and Ib must be in phase to satisfy Barkhausen criterion, therefore

Also initially I3 > Ib, therefore, for oscillation to start,

Therefore, the two conditions must be satisfied for oscillation to start and sustain.

The Wien Bridge oscillator

The Wien Bridge oscillator is a standard oscillator circuit for low to moderate frequencies, in the
range 5Hz to about 1MHz. It is mainly used in audio frequency generators.
The Wien Bridge oscillator uses a feedback circuit
called a lead lag network as shown in fig. 1.
At very low frequencies, the series capacitor looks
open to the input signal and there is no output
signal. At very high frequencies the shunt capacitor
looks shorted, and there is no output. In between
these extremes, the output voltage reaches a
maximum value. The frequency at which the output
is maximized is called the resonant frequency. At

this frequency, the feedback fraction reaches a
maximum value of 1/3.
At very low frequencies, the phase angle is positive,
and the circuit acts like a lead network. On the other
hand, at very high frequencies, the phase angle is
negative, and the circuit acts like a lag network. In
between, there is a resonant frequency f
r
at which
the phase angle equals 0.
The output of the lag lead network is
Fig. 1

The gain of the feedback circuit is given by

The phase angle between Vout and Vinis given by

These equations shows that maximum value of gain occurs at XC = R, and phase angle also
becomes 0. This represents the resonant frequency of load lag network. Fig. 2, shows the gain
and phase vs frequency.


Fig. 2

Tuned Oscillator:
A variety of oscillator circuits can be built using LC tuned circuits. A general form of tuned oscillator circuit is
shown in fig. 1. It is assumed that the active device used in the oscillator has very high input resistance such as
FET, or an operational amplifier.


Fig. 1 Fig. 2
Fig. 2 shows linear equivalent circuit of fig. 1 using an amplifier with an open circuit gain Av and
output resistance RO. It is clear from the topology of the circuit that it is voltage series feedback
type circuit.
The loop gain of the circuit A can be obtained by considering the circuit to be a feedback
amplifier with output taken from terminals 2 and 3 and with input terminals 1 and 3. The load
impedance ZL consists of Z2 in parallel with the series combination of Z1 and Z3. The gain of the
the amplifier without feedback will be given by

The feedback circuit gain is given by

Therefore, the loop gain is given by

If the impedances are pure reactances (either inductive or capacitive), then Z1 = jX1, Z2= jX2 and
Z3= jX3. Then

For the loop gain to be real (zero phase shift around the loop),
X1 + X2 + X3 = 0
and
Therefore, the circuit will oscillate at the resonant frequency of the series combination of X1, X2
and X3. Since A must be positive and at leat unity in magnitude, then X1 and X2 must have the
same sign (Av is positive).In other words, they must be the same kind of reactance, either both
inductive or both capacitive.


The Colpitts Oscillator:
Wein bridge oscillator is not suited to high frequencies (above 1MHz). The main problem is the
phase shift through the amplifier.
The alternative is an LC oscillator, a circuit that can be used for frequencies between 1MHz and
500MHz. The frequency range is beyond the frequency limit of most OPAMPs. With an amplifier
and LC tank circuit, we can feedback a signal with the right amplitude and phase is feedback to
sustain oscillations. Fig. 3, shows the circuit of colpitts oscillator.



Fig. 3 Fig. 4
The voltage divider bias sets up a quiescent operating point. The circuit then has a low frequency
voltage gain of rc / r'e where rc is the ac resistance seen by the selector. Because of the base and
collector lag networks, the high frequency voltage gain is less then rc / r'e.
Fig. 4, shows a simplified ac equivalent circuit. The circulating or loop current in the tank flows
through C1 in series with C2. The voltage output equals the voltage across C1. The feedback
voltage vf appears across C2. This feedback voltage drives the base and sustains the oscillations
developed across the tank circuit provided there is enough voltage gain at the oscillation
frequency. Since the emitter is at ac ground the circuit is a CE connection.
Most LC oscillators use tank circuit with a Q greater than 10. The Q of the feedback circuit is given
by

Because of this, the approximate resonant frequency is

This is accurate and better than 1% when Q is greater than 1%. The capacitance C is the equivalent
capacitance the circulation current passes through. In the Colpitts tank the circulating current
flows through C1 in series with C2.
Therefore C = C1 C2 / (C1 +C2)
The required starting condition for any oscillator is A > 1 at the resonant frequency or A > 1/ .
The voltage gain A in the expression is the gain at the oscillation frequency. The feedback gain is
given by
= vf / vout XC1 / XC2
Because same current flow through C1 and C2, therefore
= C1/ C2; A > 1/ v; A> C1 / C2
This is a crude approximation because it ignores the impedance looking into the base. An exact
analysis would take the base impedance into account because it is in parallel with C2 .
With small , the value of A is only slightly larger than 1/. and the operation is approximately
close A. When the power is switched on, the oscillations build up, and the signal swings over more
and more of ac load line. With this increased signal swing, the operation changes from small signal
to large signal. As this happen, the voltage gain decreases slightly. With light feedback the value
of A can decreases to 1 without excessive clapping.
With heavy feedback, the large feedback signal drives the base into saturation and cut off. This
charges capacitor C3 producing negative dc clamping at the base and changing the operation
from class A to class C. The negative damping automatically adjusts the value of A to 1.

Example - 1
Design a Colpitts oscillator that will oscillate at 100 kHz.
Solution:
Let us choose R1 = Rf = 5 k and C = 0.001 F. From the frequency expression,

The quality factor (Q) of the LC circuit is given by:









Hartley Oscillator:
Fig. 5, shows Hartley oscillator when the LC tank is resonant, the circulating current flows through
L1 in series with L2. Thus, the equivalent inductance is L = L1 + L2.

Fig. 5
In the oscillator, the feedback voltage is developed by the inductive voltage divider, L1 & L2. Since
the output voltage appears across L1 and the feedback voltage across L2, the feedback fraction is
= V / Vout = XL2 / XL1 = L2 / L1
As usual, the loading effect of the base is ignored. For oscillations to start, the voltage gain must
be greater than 1/ . The frequency of oscillation is given by

Similarly, an opamp based Hartley oscillator circuit is shown in fig. 6.

Fig. 6

Crystal Oscillator:
Some crystals found in nature exhibit the piezoelectric effect i.e. when an ac voltage is applied
across them, they vibrate at the frequency of the applied voltage. Conversely, if they are
mechanically pressed, they generate an ac voltage. The main substances that produce this
piezoelectric effect are Quartz, Rochelle salts, and Tourmaline.
Rochelle salts have greatest piezoelectric activity, for a given ac voltage, they vibrate more than
quartz or tourmaline. Mechanically, they are the weakest they break easily. They are used in
microphones, phonograph pickups, headsets and loudspeakers.
Tourmaline shows the least piezoelectric activity but is a strongest of the three. It is also the most
expensive and used at very high frequencies.
Quartz is a compromise between the piezoelectric activity of Rochelle salts and the strength of
tourmaline. It is inexpensive and easily available in nature. It is most widely used for RF oscillators
and filters.
The natural shape of a quartz crystal is a hexagonal prism with pyramids at the ends. To get a
useable crystal out of this it is sliced in a rectangular slap form of thickness t. The number of slabs
we can get from a natural crystal depends on the size of the slabs and the angle of cut.

Fig. 1
For use in electronic circuits, the slab is mounted between two metal plates, as shown in fig. 1. In
this circuit the amount of crystal vibration depends upon the frequency of applied voltage. By
changing the frequency, one can find resonant frequencies at which the crystal vibrations reach a
maximum. Since the energy for the vibrations must be supplied by the ac source, the ac current is
maximized at each resonant frequency. Most of the time, the crystal is cut and mounted to
vibrate best at one of its resonant frequencies, usually the fundamental or lowest frequency.
Higher resonant frequencies, called overtones, are almost exact multiplies of the fundamental
frequency e.g. a crystal with a fundamental frequency of 1 MHz has a overtones of 2 MHz, 3 MHz
and so on. The formula for the fundamental frequency of a crystal is
f = K / t.
where K is a constant that depends on the cut and other factors, t is the thickness of crystal, f is
inversely proportional to thickness t. The thinner the crystal, the more fragile it becomes and the
more likely it is to break because of vibrations. Quartz crystals may have fundamental frequency
up to 10 MHz. To get higher frequencies, a crystal is mounted to vibrate on overtones; we can
reach frequencies up to 100 MHz.

When the mounted crystal is not vibrating, it is equivalent to a capacitance Cm, because it has
two metal plates separated by dielectric, Cm is known as mounting capacitance.

Fig. 2
When the crystal is vibrating, it acts like a tuned circuit. Fig. 2, shows the ac equivalent circuit of a
crystal vibrating at or near its fundamental frequency. Typical values are L is henrys, C in fractions
of a Pico farad, R in hundreds of ohms and Cm in Pico farads
Ls = 3Hz, Cs = 0.05 pf, Rs = 2K, Cm = 10 pf.
The Q of the circuit is very very high. Compared with L-C tank circuit. For the given values, Q
comes out to be 3000. Because of very high Q, a crystal leads to oscillators with very stable
frequency values.
The series resonant frequency fS of a crystal is the sonant frequency of the LCR branch. At this
frequency, the branch current reaches a maximum value because Ls resonant with CS.

Above fS, the crystal behaves inductively. The parallel resonant frequency is the frequency at
which the circulating or loop current reaches a maximum value. Since this loop current must flow
through the series combination of CS and Cm, the equivalent Cloop is

Since Cloop > CS, therefore, fp > fS.
Since C
m
> C
S
, therefore, C
m
|| C
S
is slightly lesser
than C
S
. Therefore f
P
is slightly greater than f
S
.
Because of the other circuit capacitances that
appear across C
m
the actual frequency will lie
between f
S
and f
P
. f
S
and f
P
are the upper and lower
limits of frequency. The impedance of the crystal
oscillator can be plotted as a function of frequency
as shown in fig. 3.
At frequency f
S
, the circuit behaves like
resistive circuit. At f
P
the impedance reaches to
maximum, beyond f
P
, the circuit is highly
capacitive.
The frequency of an oscillator tends to change
slightly with time. The drift is produced by
temperature, aging and other causes. In a
crystal oscillator the frequency drift with time is
very small, typically less than 1 part in 10
6
per
day. They can be used in electronic
wristwatches. If the drift is 1 part in 10
10
, a
clock with this drift will take 30 years to gain or
lose 1 sec.

Fig. 3
Crystals can be manufactured with values of fs as low as 10 kHz; at these frequencies the crystal is
relatively thick. On the high frequency side, fs can be as high as 1- MHz; here the crystal is very
thin.
The temperature coefficient of crystals is usually small and can be made zero. When extreme
temperature stability is required, the crystal may be housed in an oven to maintain it at a
constant temperature. The high Q of the crystal also contributes to the relatively drift free
oscillation of crystal oscillators.



Example - 1
The parameters of the equivalent circuit of a crystal are given below:
L = 0.4 H, CS = 0.06 pF, R = 5 k, Cm = 1.0 pF.
Determine the series and parallel resonant frequencies of the crystal.
Solution:
With reference to fig. 2, the admittance of the crystal Y is given by

where,

and
The resonant frequencies are obtained by putting B = 0. Thus,

Consider the term CS R2 / LS = CS R / [L R]. In a crystal, the time constant (L / R) is very much
greater than CS R. Thus the ratio is very much less than 1. For the values given, this ratio is of the
order of10-6. Neglecting this term in comparison with 2, we get two roots as

where, s and p are the series and parallel resonant frequencies respectively. Substituting the
values, we get
s = 6.45 M Hz. and p = 6.64 MHz

Phase Shift Oscillator:


Phase Shift Oscillator
The circuit is drawn to show clearly the amplifier and feedback network. The circuit consists of
a common source FET amplifier followed by a three section R-C phase shift network. The
amplifier stage is self-biased with a capacitor bypassed source resistor R
s
and a drain bias
resistance R
D
. The output of the last section is supplied back to the gate. If the loading of the
phase-shift network on the amplifier can be assumed to be negligible, a phase shift of 180
between the amplified output voltage V
out
and the input voltage V
in
at the gate is produced by the
amplifier itself. The three-section R-C phase shift network produces an additional phase shift,
which is a function of frequency and equals 180 at some frequency of operation. At this
frequency the total phase shift from the gate around the circuit and back to gate will be exactly
zero. This particular frequency will be the one at which the circuit will oscillate provided that the
magnitude of the amplification is sufficiently large. In a FET phase-shift oscillator voltage series
feedback [that is, feedback voltage proportional to the output voltage V
out
and supplied in series
with the input signal at the gate is used.
The frequency of the oscillator output depends upon the values of capacitors C and resistors R
used in the phase shift network. Using basic RC circuit analysis technique, it can be shown that
the network phase shift is 180 when
X
c
= 6 R or 1 / 2fc = 6 R or f = 1 / / 2 R c 6
The frequency can be adjusted over a wide range if variable capacitors are used.As well as phase
shifting, the R-C network attenuates the amplifier output. Network analysis shows that when the
necessary phase shift of 180 is obtained, this network attenuates the output voltage by a factor
of 1/29. This means that the amplifier must have a voltage gain of 29 or more. When the
amplifier voltage gain is 29 and feedback factor of R-C network, = 1/29 then the loop gain is
A = 1, the amplifier phase shift of 180 combined with the network phase shift of + 180 gives
a loop phase shift of zero. Both of these conditions are necessary to satisfy the Barkhausen
criteria. If the amplifier gain is much greater than 29, the oscillator output waveform is likely to
be distorted. When the gain is slightly greater than 29, the output is usually a reasonably pure
sinusoidal.
The advantages and disadvantages of phase shift oscillators are given below :
Advantages.
- obtained by using R and C of large values. It is cheap and simple circuit as it contains
resistors and capacitors (not bulky and expensive high-value inductors).
- It provides good frequency stability.
- The phase shift oscillator circuit is much simpler than the Wien bridge oscillator circuit
because it does not need negative feedback and the stabilization arrangements.
- The output is sinusoidal that is quite distortion free.
- They have a wide frequency range (from a few Hz to several hundred kHz).
- They are particularly suitable for low frequencies, say of the order of 1 Hz, as these
frequencies can be easily
Disadvantages.
- The output is small. It is due to smaller feedback.
- It is difficult for the circuit to start oscillations as the feedback is usually small.
- The frequency stability is not as good as that of Wien bridge oscillator.
- It needs high voltage (12 V) battery so as to develop sufficiently large feedback voltage.


Applications.
FET phase-shift oscillator is used for generating signals over a wide frequency range. The
frequency may be varied from a few Hz to 200 Hz by employing one set of resistors with three
capacitors ganged together to vary over a capacitance range in the 1 : 10 ratio. Similarly the
frequency ranges of 200 Hz to 2 kHz, 2 kHz to 20 kHz and 20 kHz to 200 kHz can be obtained
by using other sets of resistors.
Astable multivibrator:

In an astable multivibrator both the states remains unstable.
As the supply is given Q
2
and Q
1
turns on.one of the transistor conducts more than other due to
slightly difference in current gain.let Q
1
CONDUCTS MORE THAN Q
2.
collector current of Q
1
will
more than I
c1
.
Collector potential of Q
1
,
Vc
2
=v
cc
-I
c2
.R
3
Due to increased voltage drop V
c1
falls rapidly.it is applied to base of Q
2.
so potential of base of
Q1 falls.
Therefore V
c2
rises .incresed Vc2 is applied to base of Q1.hence Q1 goes to saturation and Q2
goes to cutoff.
Under this condition:
V
0
=V
C1
(HIGH)
After this stage capacitor C
1
starts charging through R
2.
. when voltage across C
1
becomes more
than cut in voltage, the transistor Q
2
starts conducting and V
c2
falls.
Ultimately the Q
2
is in saturation

and Q
1
is in cutoff.
Hence V
0
= V
C2
=V
CC
- I
C2
R
2




Thanks