Unit-01/Lecture-09

Logic and Shift micro-operations

Shift rnicrooperations are used for serial transfer of data. They are also used in conjunction
with arithmetic, logic, and other data-processing operations. The contents of a register can
be shifted to the left or the right. At the same time that the bits are shifted, the first flip-flop
receives its binary information from the serial input. During a shift-left operation the serial
input transfers a bit into the rightmost position. During a shift-right operation the serial input
transfers a bit into the leftmost position. The information transferred through the serial input
determines the type of shift. There are three types of shifts: logical, circular, and arithmetic.

Logical shift: A logical shift is one that transfers 0 through the serial input. We will adopt
the symbols shl and shr for logical shift-left and shift-right rnicrooperations. For example:

R1 ← shl R1

R2 ← shr R2

are two rnicrooperations that specify a 1-bit shift to the left of the content of register R 1 and
a 1-bit shift to the right of the content of register R2. The register symbol must be the same
on both sides of the arrow. The bit transferred to the end position through the serial input is
assumed to be 0 during a logical shift.

The circular shift (also known as a rotate operation) circulates the bits of the register
around the two ends without loss of information. This is accomplished by connecting the
serial output of the shift register to its serial input. We will use the symbols c il and cir for the
circular shift left and right, respectively. The symbolic notation for the shift rnicrooperations
is shown in Table 4-7.
An arithmetic shift is a rnicrooperation that shifts a signed binary number to the left or
right. An arithmetic shift-left multiplies a signed binary number by 2. An arithmetic shift-
right divides the number by 2. Arithmetic shifts must leave the sign bit unchanged because
the sign of the number remains the same

when it is multiplied or divided by 2. The leftmost bit in a register holds the sign bit, and the
remaining bits hold the number. The sign bit is 0 for positive and 1 for negative. Negative
numbers are in 2's complement form. Figure 4-11 shows a typical register of n bits. Bit
Rn- 1 in the leftmost position holds the sign bit. R n-2 is the most significant bit of the number
and Ro is the least significant bit. The arithmetic shift-right leaves the sign bit unchanged
and shifts the number (including the sign bit) to the right. Thus R n-1 remains the same, Rn-
2 receives the bit from Rn-1 and so on for the other bits in the register. The bit in R o is lost.

The arithmetic shift-left inserts a 0 into R 0 and shifts all other bits to the left. The initial bit
of Rn-1 is lost and replaced by the bit from R n-2. A sign reversal occurs if the bit in R n-
1 changes in value after the shift. This happens if the multiplication by 2 causes an overflow.

An overflow occurs after an arithmetic shift left if initially, before the shift, R n-1 is not equal
to Rn-2. An overflow flip-flop Vs can be used to detect an arithmetic shift-left overflow.

Vs = Rn-1 + Rn-2

If Vs = 0, there is no overflow, but if V s = I, there is an overflow and a sign reversal after the
shift. Vs must be transferred into the overflow flip-flop with the same clock pulse that shifts
the register.

Hardware implementation
A possible choice for a shift unit would be a bidirectional shift register with parallel load
(see Fig. 2-9). Information can be transferred to the register in parallel and then shifted to
the right or left. In this type of configuration, a clock pulse is needed for loading the data
into the register, and another pulse is needed to initiate the shift. In a processor unit with
many registers it is more efficient to implement the shift operation with a combinational
circuit. In this way the content of a register that has to be shifted is first placed onto a
common bus whose output is connected to the combinational shifter, and the shifted number
is then loaded back into the register. This requires only one clock pulse for loading the
shifted value into the register.

shifter:

A combinational circuit shifter can be constructed with multiplexers as shown in Fig. 4-12.
The 4-bit shifter has four data inputs, A0 through A3 and four data outputs, H0 through
H3. There are two serial inputs, one for shift left (IL) and the other for shift right (h).
When the selection input S = 0, the input data are shifted right (down in the diagram). When
S = 1, the input data are shifted left (up in the diagram). The function table in Fig. 4-12 shows
which input goes to each output after the shift. A shifter with n data inputs and outputs
requires n multiplexers. The two serial inputs can be controlled by another multiplexer to
provide the three possible types of shifts.