If I Have 7 Metal Layers in Physical Design Flow, Which Metal Layers Are Used For Clock Routing - Quora

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7/16/22, 3:08 PM (1) If I have 7 metal layers in Physical Design Flow, which metal layers are used for

ayers are used for clock routing? - Quora

cal Design Engineer at Cadence Design Systems (company) (2017–present)Updated 1y

Related How are metal layers used in power planning in physical design?
Hello there are different types of metal layers are available in design. Depending on the width(or
pitch) of the metal layers the metal layer definition are defined .

1. Base layers below Metal 1 or Metal 0


2. Lower metals like M0, M1 and M2(M3)are the layers used for designing the std cells,
in Physical Design we use them as a power routing as well signal routing purposes and
These layers are also called as DPT layers. (only in lower nodes>16nm)
3. The upper layers are used for routing purpose’s(power+signal+clock).
4. For example : Between Top layers (6,7,8…)and DPT layers (1,2,[3]) we leave some
layers only for signal and clock routing (4,5..). Between each layer via are dropped
from one to another.
5. After certain layers we will not route (signal routing) the design.The above layers are
totally used for power.(IR drop +EM are the two things we consider for power grid).
6. The number of layers is depending on the design and foundry. The layer stack
definition defines the layers information.

The lower metals possess higher resistance and the higher(top) metal layers Retain a lower
resistance.

The reason for this is

(R=rho*L/A)

The resistance is depending on the following factors

R=Resistance in ohms

Rho=Resistivity In ohms

L=Length in m

A=cross sectional area m^2

Hope this information is useful…

Happy learning…cheers..!

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