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TPS25221
SLVSDT3D – JANUARY 2018 – REVISED DECEMBER 2019
TPS25221 2.5-V to 5.5-V, 2-A Continuous Current Limited Switch

1 Features 3 Description
•
1 2.5-V to 5.5-V VOPERATING The TPS25221 is intended for applications where
heavy capacitive loads and short circuits may be
• Pin-to-Pin with TPS2553 encountered. The programmable current-limit
• 2-A ICONT_MAX threshold maybe set between 275 mA and 2.7 A
• 0.275-A to 2.7-A Adjustable ILIMIT (±6.5% at 1.7 A) (typical) using an external resistor. ILIMIT accuracy as
• 70-mΩ (typical) RON tight as ±6% can be achieved at the higher current-
limit settings. Power-switch rise and fall times are
• 1.5-µs Short Circuit Response controlled to minimize current surges during turn on
• 8-ms Fault Reporting Deglitch and turn off.
• Reverse Current Blocking (when disabled) When a load attempts to draw current exceeding the
• Built-In Soft Start programmed ILIMIT the internal FET enters constant
• UL 60950 and UL 62368 Recognition current mode in order to keep ILOAD at or below ILIMIT.
The FAULT output will assert low during over-current
• 15-kV ESD Protection per IEC 61000-4-2 (with conditions after the built in de-glitch time.
external capacitance)
Device Information(1)
2 Applications PART NUMBER PACKAGE BODY SIZE (NOM)
• USB Ports/Hubs, Laptops, Desktops SOT-23 (6) 2.90 mm x 1.60 mm
TPS25221
• HDTV WSON (6) 2.00 mm x 2.00 mm
• Set Top Boxes (1) For all available packages, see the orderable addendum at
the end of the data sheet.
• Optical Socket Protection
Simplified Schematic
5-V USB 0.1 µF USB Data USB

Input IN OUT Port
RFAULT 120 µF
20 NŸ
ILIM
Fault Signal FAULT RILIM USB requirement only*
20 NŸ
Control Signal EN
GND
Thermal Pad
*USB requirement that downstream facing ports are bypassed with at

least 120 µF per hub.
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
TPS25221
SLVSDT3D – JANUARY 2018 – REVISED DECEMBER 2019 www.ti.com
Table of Contents
1 Features .................................................................. 1 10 Application and Implementation........................ 14
2 Applications ........................................................... 1 10.1 Application Information.......................................... 14
3 Description ............................................................. 1 10.2 Typical Applications .............................................. 15
4 Revision History..................................................... 2 11 Power Supply Recommendations ..................... 21
5 Device Comparison Table..................................... 3 11.1 Self-Powered and Bus-Powered Hubs ................. 21
11.2 Low-Power Bus-Powered and High-Power Bus-
6 Pin Configuration and Functions ......................... 3
Powered Functions .................................................. 21
7 Specifications......................................................... 4 11.3 Power Dissipation and Junction Temperature ...... 21
7.1 Absolute Maximum Ratings ...................................... 4
12 Layout................................................................... 23
7.2 ESD Ratings ............................................................ 4
12.1 Layout Guidelines ................................................. 23
7.3 Recommended Operating Conditions....................... 4
12.2 Layout Example .................................................... 23
7.4 Thermal Information .................................................. 4
13 Device and Documentation Support ................. 24
7.5 Electrical Characteristics........................................... 5
13.1 Device Support .................................................... 24
7.6 Typical Characteristics .............................................. 7
13.2 Documentation Support ....................................... 24
8 Parameter Measurement Information ................ 10
13.3 Receiving Notification of Documentation Updates 24
9 Detailed Description ............................................ 11 13.4 Community Resources.......................................... 24
9.1 Overview ................................................................. 11 13.5 Trademarks ........................................................... 24
9.2 Functional Block Diagram ....................................... 11 13.6 Electrostatic Discharge Caution ............................ 24
9.3 Feature Description................................................. 12 13.7 Glossary ................................................................ 24
9.4 Device Functional Modes........................................ 13
14 Mechanical, Packaging, and Orderable
9.5 Programming........................................................... 13 Information ........................................................... 24
4 Revision History
Changes from Revision C (May 2019) to Revision D Page
• Removed content from the Programming the Current-Limit Threshold section ................................................................... 13
Changes from Revision B (November 2018) to Revision C Page
• Changed the Storage temperature From: TBD to: MIN = –65°C MAX = 150°C in the Absolute Maximum Ratings ............ 4
Changes from Revision A (May 2018) to Revision B Page
• Deleted pending from the Features list items ........................................................................................................................ 1
Changes from Original (January 2018) to Revision A Page
• Released to Production ......................................................................................................................................................... 1
2 Submit Documentation Feedback Copyright © 2018–2019, Texas Instruments Incorporated
Product Folder Links: TPS25221

TPS25221
www.ti.com SLVSDT3D – JANUARY 2018 – REVISED DECEMBER 2019
5 Device Comparison Table

MAX
OUTPUT
OPERATING ENABLE CURRENT LIMIT LATCH OFF Package BASE PART NUMBER
DISCHARGE
CURRENT
2 N High Adjustable N SOT-23 (6) TPS25221DBV
2 N High Adjustable N WSON (6) TPS25221DRV
6 Pin Configuration and Functions
DBV PACKAGE DRV PACKAGE

SOT-23 6-Pin WSON 6-Pin
Top View Top View
OUT 1 6 IN
IN 1 6 OUT
GND 2 5 ILIM Thermal

ILIM 2 5 GND
Pad
EN 3 4 FAULT
FAULT 3 4 EN
Not to scale
Not to scale
Pin Functions
PIN
I/O DESCRIPTION
NAME SOT-23 WSON
Input voltage and power switch drain; connect a 0.1 μF or greater
IN 1 6 I
ceramic capacitor from IN to GND close to IC
GND 2 5 -- Ground connection
EN 3 4 I Enable input, logic high/low turns on power switch
Active-low open-drain output, asserted during over-current, or over-
FAULT 4 3 O
temperature conditions
ILIM 5 2 O External resistor used to set current limit threshold
OUT 6 1 O Power switch output, connect to load
Internally connected to GND; used to heat-sink the part to the circuit
Thermal Pad -- PAD --
board traces. Connect thermal pad to GND pin externally.
Copyright © 2018–2019, Texas Instruments Incorporated Submit Documentation Feedback 3

TPS25221
7 Specifications
7.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) (1)
MIN MAX UNIT
Voltage range on IN, OUT, EN, FAULT,ILIM –0.3 6
V
Voltage range from IN to OUT –6 6
Continuous FAULT sink current 0 25 mA
ILIM source current 0 1 mA
Maximum junction temperature, Tj Internally Limited
Storage temperature, Tstg –65 150 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
7.2 ESD Ratings

VALUE UNIT
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001 (1) ±2000 V
Charged-device model (CDM), per JEDEC specification JESD22-C101
±500 V
V(ESD) Electrostatic discharge or ANSI/ESDA/JEDEC JS-002 (2)
IEC 61000-4-2 contact discharge (3) ±8000 V
IEC 61000-4-2 air-gap discharge (3) ±15000 V
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
(3) Surges per EN61000-4-2. 1999 applied to output terminals of EVM. These are passing tests levels, not failure threshold.
7.3 Recommended Operating Conditions

Voltages are respect to GND (unless otherwise noted)
MIN NOM MAX UNIT
VIN Supply voltage IN 2.5 5.5 V
VEN Input voltage EN 0 5.5 V
VIH High-level input voltage EN 1.7 V
VIL Low-level input voltage EN 0.66 V
ICON Output continuous current OUT 0 2 A
RILIM Current-limit threshold resistor range (nominal 1%) from ILIM to GND 20 210 kΩ
I/FAULT Sink current into FAULT FAULT 0 10 mA
TJ Operating junction temperature –40 125 °C
7.4 Thermal Information

TPS25221
THERMAL METRIC (1) DBV (SOT-23) DRV (WSON) UNIT
6-PIN 6-PIN
RθJA Junction-to-ambient thermal resistance 193.2 83 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 127.1 100.5 °C/W
RθJB Junction-to-board thermal resistance 65.6 46.5 °C/W
ψJT Junction-to-top characterization parameter 49.0 8.7 °C/W
ψJB Junction-to-board characterization parameter 65.3 46.4 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance -- 24.4 °C/W
(1) Proper thermal design is required to ensure TJ <125°C for best long term reliability. This is particularly important at higher currents, see
the Semiconductor and IC Package Thermal Metrics application report.

TPS25221
7.5 Electrical Characteristics

over recommended operating conditions, VEN = VIN, RFAULT = 10 kΩ (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
POWER SWITCH
DBV package, TJ = 25°C 70 80
Static drain-source on-state DBV package, –40°C ≤TJ ≤125°C 110
rDS(on) mΩ
resistance DRV package, TJ = 25°C 70 92
DRV package, –40°C ≤TJ ≤125°C 122
VIN = 5.5 V 0.55 0.95
r Rise time, output
VIN = 2.5 V CL = 1 µF, RL = 100 Ω, 0.35 0.62
ms
VIN = 5.5 V (see Figure 1) 0.24 0.3
tf Fall time, output
VIN = 2.5 V 0.22 0.28
ENABLE INPUT EN OR EN
Enable pin turn on/off
0.8 1.6 V
threshold
IEN Input current VEN = 0 V or 5.5 V -0.5 0 0.5 µA
ton Turnon time CL = 1 µF, RL = 100 Ω, (see Figure 2 ) 3 ms
toff Turnoff time CL = 1 µF, RL = 100 Ω, (see Figure 2) 0.7 ms
CURRENT LIMIT
TJ = 25°C 2585 2720 2850
RILIM = 20 kΩ
–40°C ≤TJ ≤125°C 2560 2880
Current-limit threshold TJ = 25°C 1710 1820 1930
RILIM = 30 kΩ
(Maximum DC output current –40°C ≤TJ ≤125°C 1700 1945
IOS IOUT delivered to load) and mA
Short-circuit current, OUT TJ = 25°C 630 690 755
RILIM = 80 kΩ
connected to GND –40°C ≤TJ ≤125°C 610 790
TJ = 25°C 220 275 330
RILIM = 210 kΩ
–40°C ≤TJ ≤125°C 210 370
Response time to short
tIOS VIN = 5 V (see Figure 4) 1.5 µs
circuit
SUPPLY CURRENT
Supply current, switch
ISD VIN = 5.5 V, No load on OUT, VEN = 0 V,RILIM = 20 kΩ 0.02 0.5 µA
disable
Supply current, switch
ISE VIN = 5.5 V, No load on OUT ,RILIM = 20 kΩ 75 90 µA
enable
UNDERVOLTAGE LOCKOUT
UVLO Low-level input voltage, IN VIN rising 2.37 2.47 V
Hysteresis, IN TJ = 25 °C 45 mV
FAULT FLAG
VOL Output low voltage, FAULT I/FAULT = 1 mA 180 mV
Off-state leakage V/FAULT = 5.5 V 0.5 µA
FAULT deglitch FAULT assertion or de-assertion due to overcurrent condition 6 8 12 ms
THERMAL SHUTDOWN
Thermal shutdown threshold 165 °C
Thermal shutdown threshold
145 °C
in current-limit
Hysteresis 20 °C

TPS25221
90%
tr tf
VOUT
10%
Figure 1. Power-On and Off Timing
VEN 50% 50%

ton
90% toff
VOUT
10%
Figure 2. Enable Timing, Active High Enable
VEN 50% 50%

toff
ton 90%
VOUT
10%
Figure 3. Enable Timing, Active Low Enable
IOS
IOUT
tIOS
Figure 4. Output Short Circuit Parameters

TPS25221
7.6 Typical Characteristics

See Figure 21 for reference schematic
VIN = 5 V, RILIM = 20 kΩ, ROUT = 5 Ω VIN = 5 V, RILIM = 20 kΩ, ROUT = 5 Ω
Figure 5. Turnon Delay and Rise Time Figure 6. Turnoff Delay and Fall Time
VIN = 5 V, RILIM = 20 kΩ, ROUT = 0 Ω VIN = 5 V, RILIM = 20 kΩ
Figure 7. Device Enabled into Short-Circuit Figure 8. Full-Load to Short-Circuit Transient Response
VIN = 5 V, RILIM = 20 kΩ VIN = 5 V, RILIM = 20 kΩ
Figure 9. Short-Circuit to Full-Load Recovery Response Figure 10. No-Load to Short-Circuit Transient Response

TPS25221
Typical Characteristics (continued)

VIN = 5 V, RILIM = 20 kΩ VIN = 5 V, RILIM = 20 kΩ
Figure 11. Short-Circuit to No-Load Recovery Response Figure 12. No Load to 1-Ω Transient Response
2.4
2.39
UVLO - Undervoltage Lockout (V)
2.38
2.37
2.36
2.35
2.34
2.33
2.32
2.31 UVLO Rising
UVLO Falling
2.3
-50 0 50 100 150
TJ - Junction Temperature (qC) UVLO
RILIM = 20 kΩ
VIN = 5 V, RILIM = 20 kΩ
Figure 14. UVLO – Undervoltage Lockout – V
Figure 13. 1-Ω to No Load Transient Response
0.04 90
IIN - Supply Current, Output Disabled (PA)
IIN - Supply Current, Output Enabled (PA)
80
0.035
70
0.03 60
50
0.025
40
0.02 30
20
0.015 2.5 V
2.5 V 10 5V
5.5 V 5.5 V
0.01 0
-50 0 50 100 150 -50 0 50 100 150
TJ - Junction Temperature (qC) D007
TJ - Junction Temperature (°C) D008
RILIM = 20 kΩ RILIM = 20 kΩ
Figure 15. IIN – Supply Current, Output Disabled – µA Figure 16. IIN – Supply Current, Output Enabled – µA

TPS25221
Typical Characteristics (continued)

Static Drain-Source On-state Resistance (m:)

20 150
18
125
Current Limit Response (Ps)
16
14
100
12
10 75
8
50
6
4 25
DBV package
2 DRV package
0
0
-50 0 50 100 150
0 1.5 3 4.5 6
TJ - Junction Temperature (qC)
Peak Current (A) D006
D004
VIN = 5 V, RILIM = 20 kΩ, TA = 25°C

Figure 18. On-Resistance Vs. Junction Temperature
Figure 17. Current Limit Response – µs
3 0.35
IDS - Static Drain-Source Current (A)
IDS - Static Drain-Source Current (A) 0.3

2.5
0.25
2
0.2
1.5
0.15
1
0.1
0.5 TA = 40qC TA = 40qC

TA = 25qC 0.05 TA = 25qC
TA = 125qC TA = 125qC
0 0
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45
VIN - VOUT (V/div) Curr
VIN - VOUT (V/div) D006
VIN = 5.5 V, RILIM = 20 kΩ VIN = 5.5 V, RILIM = 210 kΩ
Figure 19. Switch Current Vs. Drain-Source Voltage Across Figure 20. Switch Current Vs. Drain-Source Voltage Across
Switch Switch

TPS25221
8 Parameter Measurement Information
Figure 21. Typical Characteristics Reference Schematic
OUT
RL CL
Figure 22. Output Rise / Fall Test Load
Decreasing
Load Resistance
VOUT
Decreasing
Load Resistance
IOUT
IOS
Figure 23. Output Voltage vs Current-Limit Threshold

TPS25221
9 Detailed Description
9.1 Overview
The TPS25221 is current-limited, power-distribution switch using N-channel MOSFETs for applications where
short circuits or heavy capacitive loads are encountered. The TPS25221 allows the user to program the current
limit threshold between 275 mA to 2.7A (typical) through an external resistor.
This device incorporates an internal charge pump and the gate drive circuitry necessary to drive the N-channel
MOSFET. The charge pump supplies power to the driver circuit and provides the necessary voltage to pull the
gate of the MOSFET above the source. The charge pump operates from input voltages as low as 2.5 V and
requires little supply current. The driver controls the gate voltage of the power switch. The driver incorporates
circuitry that controls the rise and fall times of the output voltage to limit large current and voltage surges and
provides built-in soft-start functionality.
The TPS25221 limits the output current to the current-limit threshold IOS during an over-current or short-circuit
event by reducing the charge pump voltage driving the N-channel MOSFET and operating it in the saturation
region. The result of limiting the output current to IOS reduces the output voltage at OUT because N-channel
MOSFET is no longer fully enhanced (see Figure 22).
9.2 Functional Block Diagram
IN CS OUT
Curren t
Sen se
Charge
Pump
Driver Curren t
EN Limit
FAULT
UVLO
GND
Thermal
Sen se 8-ms
Deglitch
ILIM

TPS25221
9.3 Feature Description

9.3.1 Over-current Conditions
The TPS25221 responds to over-current conditions by limiting output current to IOS as show in Figure 24. When
an overload condition occurs, the device maintains a constant output current and the output voltage reduces
accordingly. Two possible overload conditions can occur.
1. The first condition is when a short circuit or overload is present when the device is powered-up or enabled.
The short circuit and overload holds the output near zero potential with respect to ground and the TPS25221
ramps the output current to IOS. The TPS25221 limits the current to IOS until the overload condition is
removed or the device begins to thermal cycle.
2. The second condition is when a short circuit, partial short circuit, or transient overload occurs when the
device is on and the internal NFET is fully enhanced. The device responds to the over-current condition by
turning off the NFET within the time limit specified by tIOS (see Figure 4). The current-sense amplifier is over-
driven during this time and momentarily disables the internal N-channel MOSFET. The current-sense
amplifier then recovers and ramps the output current to IOS. Similar to the previous case, the TPS25221
limits the current to IOS until the overload condition is removed or the device begins to thermal cycle.
The TPS25221 thermal cycles if an overload condition is present long enough to activate thermal limiting in any
of the above cases. Thermal limiting turns off the internal NFET and starts when the junction temperature
exceeds 145°C (typical). The device remains off until the junction temperature cools 20°C (typical) and then
restarts.
9.3.2 Fault Response

The FAULT open-drain output is asserted (active low) during an over-current or over-temperature condition. The
TPS25221 asserts the FAULT signal until the fault condition is removed and the device resumes normal
operation. The TPS25221 is designed to eliminate nuisance FAULT reporting by using an internal 8 ms deglitch
delay when reporting a fault. This ensures that FAULT is not accidentally asserted due to normal transient
conditions, such as starting into a heavy capacitive load. The deglitch circuitry delays asserting and de-asserting
current limit induce FAULT reports. The FAULT signal is not deglitched when the MOSFET is disabled due to an
over-temperature condition, but is deglitched after the device has cooled and begins to turn on. This
unidirectional deglitch prevents FAULT oscillation during an over-temperature event.
9.3.3 Undervoltage Lockout (UVLO)

The undervoltage lockout (UVLO) circuit disables the power switch until the input voltage reaches the UVLO turn-
on threshold. Built-in hysteresis prevents unwanted on/off cycling due to input voltage droop during turn on.
9.3.4 Enable, (EN)

The logic enable controls the power switch and device supply current. The supply current is reduced to less than
0.5 μA.
The TPS25221 is active high logic, when a logic low is present on EN, the part is disabled. A logic high input on
EN enables the driver, control circuits, and power switch. The enable input is compatible with both TTL and
CMOS logic levels.
9.3.5 Thermal Sense

The TPS25221 has self-protection features using two independent thermal-sensing circuits that monitor the
operating temperature of the power switch and disable operation if the temperature exceeds the Over
Temperature Shutdown Threshold (OTSD). The TPS25221 device operates in constant-current mode during
overload conditions, which increases the voltage drop across power-switch. Power dissipation in the package is
proportional to the voltage drop across the power switch, which increases the junction temperature during an
over-current condition. The first thermal sensor turns off the power switch when the die temperature exceeds
145°C (typical) and the part is in current limit. Hysteresis is built into the thermal sensor, and the switch turns on
after the device has cooled approximately 20°C (typical). The TPS25221 continues to cycle off and on until the
fault condition is removed.
The ambient thermal sensor turns off the power-switch when the junction temperature exceeds 165°C (typical) in
non-current limit condition. The part will turn the switch back on once the junction temperature has cooled
approximately 20°C (typical).

TPS25221
Feature Description (continued)

The open-drain fault reporting output FAULT is asserted (active low) immediately during an over-temperature
shutdown condition.
9.4 Device Functional Modes

Table 1. Protection Function Table
EVENT CONDITION ACTION
The device outputs IOS x RLOAD until thermal shutdown. The
fault indicator asserts when the over-current condition
Overload on OUT ILOAD > IOS
persists for more 8 ms, the fault does not de-assert until
over-current is removed and persists for 8 ms.
The device immediately shuts off the internal power switch
and the fault indicator asserts immediately when the junction
temperature exceeds 165°C (typical). The device has a
Overheating TJ > 165 C
thermal hysteresis of 20°C (typical). The fault indicator de-
asserts when the junction temperature falls below 145°C
(typical).
The device immediately shuts off the internal current-limited
Undervoltage on IN VIN < 2.37 V
switch.
9.5 Programming
9.5.1 Programming the Current-Limit Threshold

The over-current threshold is user programmable through an external resistor. The TPS25221 uses an internal
regulation loop to provide a regulated voltage on the ILIM pin. The current-limit threshold is proportional to the
current sourced out of ILIM. The recommended 1% resistor range for RILIM is 20 kΩ ≤ RILIM ≤ 210 kΩ to ensure
stability of the internal regulation loop. Many applications require that the minimum current limit is above a certain
current level or that the maximum current limit is below a certain current level, so it is important to consider the
tolerance of the over-current threshold when selecting a value for RILIM. The following equations and Figure 24
can be used to calculate the resulting over-current threshold for a given external resistor value (RILIM). Figure 24
includes current-limit tolerance due to variations caused by temperature and process. However, the equations do
not account for tolerance due to external resistor variation, so it is important to account for this tolerance when
selecting RILIM. The traces routing the RILIM resistor to the TPS25221 must be as short as possible to reduce
parasitic effects on the current-limit accuracy.
RILIM can be selected to provide a current-limit threshold that occurs: 1) above a minimum load current or 2)
below a maximum load current.
To design above a minimum current-limit threshold, find the intersection of RILIM and the maximum desired load
current on the IOS(min) curve and choose a value of RILIM below this value. Programming the current limit above a
minimum threshold is important to ensure start-up into full load or heavy capacitive loads. The resulting
maximum current-limit threshold is the intersection of the selected value of RILIM and the IOS(max) curve.
To design below a maximum current-limit threshold, find the intersection of RILIM and the maximum desired load
current on the IOS(max) curve and choose a value of RILIM above this value. Programming the current limit below a
maximum threshold is important to avoid current limiting upstream power supplies, causing the input voltage bus
to droop. The resulting minimum current-limit threshold is the intersection of the selected value of RILIM and the
IOS(min) curve.
Current-Limit Threshold Equation (IOS):
52640V
IOSmax (mA) =
RILIM0.97kW
55960V
IOSnom (mA) =
RILIM1.004kW
56850V
IOSmin (mA) =
RILIM1.033kW
where:
20 kΩ ≤ RILIM ≤ 210 kΩ. (1)

TPS25221
Programming (continued)
3000
2800 IOS(max)
2600 IOS(nom)
2400 IOS(min)
Current Limit Threshold-mA 2200
2000
1800
1600
1400
1200
1000
800
600
400
200
0
20 40 60 80 100 120 140 160 180 200 220 235
RILIM-Current Limit Resistor-K: Curr
Figure 24. Current-Limit Threshold vs Current-Limit Resistor (RILIM)
10 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
10.1 Application Information
10.1.1 Constant-Current
During normal operation, the TPS25221 load current is less than the current-limit threshold and the device is not
limiting current. During normal operation the N-channel MOSFET is fully enhanced, and VOUT = VIN - (IOUT x
rDS(on)). The voltage drop across the MOSFET is relatively small compared to VIN, and VOUT is approximately
equal to VIN.
The TPS25221 limits current to the programmed current-limit threshold, set by RILIM, reducing gate drive to the
internal NFET, which increases Rds(on) and reduces load current. This allows the device to effectively regulate
the current to the current-limit threshold. Increasing the resistance of the MOSFET means that the voltage drop
across the device is no longer negligible (VIN ≠ VOUT), and VOUT decreases. The amount that VOUT decreases is
proportional to the magnitude of the overload condition. The expected VOUT can be calculated by:
IOS × RLOAD
where:
IOS is the current-limit threshold and RLOAD is the magnitude of the overload condition. (2)
For example, if IOS is programmed to 1 A and a 1 Ω overload condition is applied, the resulting VOUT is 1 V.
While in current limit the power dissipation in the package can raise the die temperature above the thermal
shutdown threshold (145°C typical), and the device turns off until the die temperature decreases by the
hysteresis of the thermal shutdown circuit (20°C typical). The device then turns on and continues to thermal cycle
until the overload condition is removed.

TPS25221
10.2 Typical Applications

10.2.1 Two-Level Current-Limit Circuit
Some applications require different current-limit thresholds depending on external system conditions. Figure 25
shows an implementation for an externally controlled, two-level current-limit circuit. The current-limit threshold is
set by the total resistance from ILIM to GND (see the Programming the Current-Limit Threshold section). A logic-
level input enables or disables MOSFET Q1 and changes the current-limit threshold by modifying the total
resistance from ILIM to GND. Additional MOSFET and resistor combinations can be used in parallel to Q1/R2 to
increase the number of additional current-limit levels.
NOTE
ILIM must never be driven directly with an external signal.
Input 0.1 mF Output

IN OUT
RFAULT RLOAD
CLOAD
100 kW R1
210 kW
ILIM
Fault Signal FAULT R2
22.1 kW
Control Signal EN GND
Thermal Pad Q1 Current Limit

2N7002 Control Signal
Copyright © 2018, Texas Instruments Incorporated
Figure 25. Two-Level Current-Limit Circuit
10.2.1.1 Design Requirements

For this example, use the parameters shown in Table 2.
Table 2. Design Requirements

PARAMETER VALUE
Input voltage 5V
Output voltage 5V
Above a minimum current limit 1000 mA
Below a maximum current limit 500 mA
10.2.1.2 Detailed Design Procedures
10.2.1.2.1 Designing Above a Minimum Current Limit

Some applications require that current limiting cannot occur below a certain threshold. For this example, assume
that 1 A must be delivered to the load so that the minimum desired current-limit threshold is 1000 mA. Use the
IOS equations and Figure 24 to select RILIM.

TPS25221
IOSmin (mA) = 1000mA

56850V
IOSmin (mA) =
RILIM1.033kW
1
æ 56850V ÷ö1.033
RILIM (kW) = ççç ÷÷
çèI
OSminmA ÷ø
RILIM (kW) = 50kW (3)
Select the closest 1% resistor less than the calculated value: RILIM = 49.9 kΩ. This sets the minimum current-limit
threshold at 1 A . Use the IOS equations, Figure 24, and the previously calculated value for RILIM to calculate the
maximum resulting current-limit threshold.
RILIM (kW) = 49.9kW
52640V
IOSmax (mA) =
RILIM0.97kW
52640V
IOSmax (mA) =
49.90.97kW
IOSmax (mA) = 1186mA (4)
The resulting maximum current-limit threshold is 1186 mA with a 49.9 kΩ resistor.
10.2.1.2.2 Designing Below a Maximum Current Limit

Some applications require that current limiting must occur below a certain threshold. For this example, assume
that the desired upper current-limit threshold must be below 500 mA to protect an up-stream power supply. Use
the IOS equations and Figure 24 to select RILIM.
IOSmax (mA) = 500mA
52640V
IOSmax (mA) =
RILIM0.97kW
1
æ 52640V ÷ö0.97
RILIM (kW) = ççç ÷÷
çèI
OSmaxmA ÷ø
RILIM (kW) = 121.6kW (5)
Select the closest 1% resistor greater than the calculated value: RILIM = 124 kΩ. This sets the maximum current-
limit threshold at 500 mA . Use the IOS equations, Figure 24, and the previously calculated value for RILIM to
calculate the minimum resulting current-limit threshold.
RILIM (kW) = 124kW
56850V
IOSmin (mA) =
RILIM1.033kW
56850V
IOSmin (mA) =
1241.033kW
IOSmin (mA) = 391mA (6)
The resulting minimum current-limit threshold is 391 mA with a 124 kΩ resistor.
10.2.1.2.3 Accounting for Resistor Tolerance

The previous sections described the selection of RILIM given certain application requirements and the importance
of understanding the current-limit threshold tolerance. The analysis focused only on TPS25221 performance and
assumed an exact resistor value. However, resistors sold in quantity are not exact and are bounded by an upper
and lower tolerance centered around a nominal resistance. The additional RILIM resistance tolerance directly
affects the current-limit threshold accuracy at a system level. The following table shows a process that accounts

TPS25221
for worst-case resistor tolerance assuming 1% resistor values. Step one follows the selection process outlined in
the application examples above. Step two determines the upper and lower resistance bounds of the selected
resistor. Step three uses the upper and lower resistor bounds in the IOS equations to calculate the threshold
limits. It is important to use tighter tolerance resistors, for example, 0.5% or 0.1%, when precision current limiting
is desired.
Table 3. Common RILIM Resistor Selections

DESIRED RESISTOR TOLERANCE ACTUAL LIMITS
NOMINAL IDEAL CLOSEST
CURRENT RESISTOR 1% RESISTOR
LIMIT (kΩ) (kΩ) 1% LOW (kΩ) 1% HIGH (kΩ) IOS(min) (mA) IOS(nom) (mA) IOS(max) (mA)
(mA)
275 199.2 200 198 202 236 274 312
400 137.2 137 135.6 138.4 349 401 450
500 109.8 110 108.9 111.1 438 499 556
600 91.6 90.9 90.0 91.8 533 605 669
700 78.6 78.7 77.9 79.5 619 699 770
800 68.8 68.1 67.4 68.8 719 808 886
900 61.2 61.9 61.3 62.5 793 889 972
1000 55.1 54.9 54.4 55.4 898 1003 1092
1200 45.9 46.4 45.9 46.9 1068 1188 1285
1400 39.4 39.2 38.8 39.6 1272 1407 1514
1600 34.5 34.8 34.5 35.1 1438 1585 1699
1800 30.7 30.9 30.6 31.2 1626 1786 1907
2000 27.6 27.4 27.1 27.7 1841 2015 2143
2200 25.1 24.9 24.7 25.1 2032 2219 2351
2400 23.0 23.2 23.0 23.4 2186 2382 2518
2600 21.3 21.5 21.3 21.7 2365 2571 2711
2700 20.5 20.5 20.3 20.7 2484 2697 2839
10.2.1.2.4 Input and Output Capacitance

Input and output capacitance improves the performance of the device; the actual capacitance must be optimized
for the particular application. For all applications, TI recommends placing a 0.1 µF or greater ceramic bypass
capacitor between IN and GND as close to the device as possible for local noise de-coupling. This precaution
reduces ringing on the input due to power-supply transients. Additional input capacitance may be needed on the
input to reduce voltage overshoot from exceeding the absolute maximum voltage of the device during heavy
transient conditions. This is especially important during bench testing when long, inductive cables are used to
connect the evaluation board to the bench power-supply.
TI recommends placing a high-value electrolytic capacitor on the output pin when large transient currents are
expected on the output.

TPS25221
10.2.1.3 Application Curve
VIN = 5 V, RILIM = 20 kΩ, ROUT = 5 Ω
Figure 26. Turnon Delay and Rise Time
10.2.2 Auto-Retry Functionality

Some applications require that an over-current condition disables the part momentarily during a fault condition
and re-enables after a pre-set time. This auto-retry functionality can be implemented with an external resistor and
capacitor. During a fault condition, FAULT pulls low disabling the part. The part is disabled when EN is pulled
low, and FAULT goes high impedance allowing CRETRY to begin charging. The part re-enables when the voltage
on EN reaches the turn-on threshold, and the auto-retry time is determined by the resistor-capacitor time
constant. The device continues to cycle in this manner until the fault condition is removed.
0.1 mF TPS25221
Input Output
IN OUT
RFAULT RLOAD
100 kW CLOAD
ILIM
FAULT RILIM
20 kW
EN GND
CRETRY
0.1 mF Thermal Pad
Figure 27. Auto-Retry Functionality
Some applications require auto-retry functionality and the ability to enable or disable with an external logic signal.
Figure 28 shows how an external logic signal can drive EN through RFAULT and maintain auto-retry functionality.
The resistor-capacitor time constant determines the auto-retry time-out period.

TPS25221
TPS25221
Input 0.1 mF
Output
IN OUT
RLOAD
CLOAD
External Logic ILIM

RFAULT RILIM
Signal & Driver FAULT
100 kW 20 kW
EN GND
CRETRY
0.1 mF Thermal Pad
Figure 28. Auto-Retry Functionality With External EN Signal
10.2.2.1 Design Requirements (added)


PARAMETER VALUE
Input voltage 5V
Output voltage 5V
Above a minimum current limit 1000 mA
Below a maximum current limit 500 mA
10.2.2.2 Detailed Design Procedure

Refer to Programming the Current-Limit Threshold section for the current limit setting. For auto-retry functionality,
once FAULT asserted, EN pull low, TPS25221 is disabled, FAULT des-asserted, CRETRY is slowly charged to EN
logic high through RFAULT, then enable, after deglitch time, FAULT asserted again. In the event of an overload,
TPS25221 cycles and has output average current. ON-time with output current is decided by FAULT deglitch
time. OFF-time without output current is decided by RFAULT x CRETRY constant time to EN logic high and ton time.
Therefore, set the RFAULT × CRETRY to get the desired output average current during overload.

TPS25221
10.2.3 Typical Application as USB Power Switch

TPS25221
5V USB 0.1 mF USB Data USB
Input IN OUT Port
RFAULT
100 kW
120 mF
ILIM RILIM
Fault Signal FAULT
20 kW USB requirement only*
Control Signal EN GND
*USB requirement that downstream
Thermal Pad facing ports are bypassed with at least
120 mF per hub
Figure 29. Typical Application as USB Power Switch
10.2.3.1 Design Requirements


PARAMETER VALUE
Input voltage 5V
Output voltage 5V
Current 1200 mA
10.2.3.1.1 USB Power-Distribution Requirements

USB can be implemented in several ways regardless of the type of USB device being developed. Several power-
distribution features must be implemented.
• Self Powered Hub (SPH) must:
– Current limit downstream ports
– Report over-current conditions
• Bus Powered Hub (BPH) must:
– Enable or disable power to downstream ports
– Power up at <100 mA
– Limit inrush current (<44 Ω and 10 µF)
• Functions must:
– Limit inrush currents
– Power up at <100 mA
The feature set of the TPS25221 meets each of these requirements. The integrated current limiting and over-
current reporting is required by self-powered hubs. The logic-level enable and controlled rise times meet the
need of both input and output ports on bus-powered hubs and the input ports for bus-powered functions.
10.2.3.2 Detailed Design Procedure
10.2.3.2.1 Universal Serial Bus (USB) Power-Distribution Requirements

One application for this device is for current limiting in universal serial bus (USB) applications. The original USB
interface was a 12-Mbps or 1.5-Mbps, multiplexed serial bus designed for low-to-medium bandwidth PC
peripherals (for example, keyboards, printers, scanners, and mice). As the demand for more bandwidth
increased, the USB 2.0 standard was introduced increasing the maximum data rate to 480 Mbps. The four-wire
USB interface is conceived for dynamic attach-detach (hot plug-unplug) of peripherals. Two lines are provided for
differential data, and two lines are provided for 5-V power distribution.

TPS25221
USB data is a 3.3-V level signal, but power is distributed at 5 V to allow for voltage drops in cases where power
is distributed through more than one hub across long cables. Each function must provide its own regulated 3.3 V
from the 5-V input or its own internal power supply. The USB specification classifies two different classes of
devices depending on its maximum current draw. A device classified as low-power can draw up to 100 mA as
defined by the standard. A device classified as high-power can draw up to 500 mA. It is important that the
minimum current-limit threshold of the current-limiting power-switch exceed the maximum current-limit draw of
the intended application. The latest USB standard must always be referenced when considering the current-limit
threshold
The USB specification defines two types of devices as hubs and functions. A USB hub is a device that contains
multiple ports for different USB devices to connect and can be self-powered (SPH) or bus-powered (BPH). A
function is a USB device that is able to transmit or receive data or control information over the bus. A USB
function can be embedded in a USB hub. A USB function can be one of three types included in the list below.
• Low-power, bus-powered function
• High-power, bus-powered function
• Self-powered function
SPHs and BPHs distribute data and power to downstream functions. The TPS25221 has higher current capability
than required for a single USB port allowing it to power multiple downstream ports.
11 Power Supply Recommendations
11.1 Self-Powered and Bus-Powered Hubs

A SPH has a local power supply that powers embedded functions and downstream ports. This power supply
must provide between 4.75 V to 5.25 V to downstream facing devices under full-load and no-load conditions.
SPHs are required to have current-limit protection and must report over-current conditions to the USB controller.
Typical SPHs are desktop PCs, monitors, printers, and stand-alone hubs.
A BPH obtains all power from an upstream port and often contains an embedded function. It must power up with
less than 100 mA. The BPH usually has one embedded function, and power is always available to the controller
of the hub. If the embedded function and hub require more than 100 mA on power up, keep the power to the
embedded function off until enumeration is completed. This can be accomplished by removing power or by
shutting off the clock to the embedded function. Power-switching the embedded function is not necessary if the
aggregate power draw for the function and controller is less than 100 mA. The total current drawn by the bus-
powered device is the sum of the current to the controller, the embedded function, and the downstream ports,
and it is limited to 500 mA from an upstream port.
11.2 Low-Power Bus-Powered and High-Power Bus-Powered Functions

Both low-power and high-power bus-powered functions obtain all power from upstream ports. Low-power
functions always draw less than 100 mA; high-power functions must draw less than 100 mA at power up and can
draw up to 500 mA after enumeration. If the load of the function is more than the parallel combination of 44 Ω
and 10 µF at power up, the device must implement inrush current limiting.
11.3 Power Dissipation and Junction Temperature

The low ON-resistance of the N-channel MOSFET allows small surface-mount packages to pass large currents.
It is required design practice to determine power dissipation and junction temperature. The below analysis gives
an approximation for calculating junction temperature based on the power dissipation in the package. However, it
is important to note that thermal analysis is strongly dependent on additional system level factors. Such factors
include air flow, board layout, copper thickness and surface area, and proximity to other devices dissipating
power. Good thermal design practice must include all system level factors in addition to individual component
analysis.
Begin by determining the rDS(on) of the N-channel MOSFET relative to the input voltage and operating
temperature. As an initial estimate, use the highest operating ambient temperature expected and read rDS(on)
from the typical characteristics graph. Using this value, the power dissipation can be calculated using Equation 7:

TPS25221
Power Dissipation and Junction Temperature (continued)

PD = rDS(on) × IOUT 2
where
• PD = Total power dissipation (W)
• rDS(on) = Power switch on-resistance (Ω)
• IOUT = Maximum current-limit threshold (A)
• This step calculates the total power dissipation of the N-channel MOSFET. (7)
Finally, calculate the junction temperature:
TJ = PD × θJA + TA
where
• TA = Ambient temperature (°C)
• θJA = Thermal resistance (°C/W)
• PD = Total power dissipation (W) (8)
Compare the calculated junction temperature with the initial estimate. If they are not within a few degrees, repeat
the calculation using the refined rDS(on) from the previous calculation as the new estimate. Two or three iterations
are generally sufficient to achieve the desired result. The final junction temperature is highly dependent on
thermal resistance θJA, and thermal resistance is highly dependent on the individual package and board layout.
The table provides example thermal resistances for specific packages and board layouts.

TPS25221
12 Layout
12.1 Layout Guidelines

• TI recommends placing the 100-nF bypass capacitor near the IN and GND pins, and make the connections
using a low-inductance trace.
• TI recommends placing a high-value electrolytic capacitor and a 100-nF bypass capacitor on the output pin
when large transient currents are expected on the output.
• The traces routing the RILIM resistor to the device must be as short as possible to reduce parasitic effects on
the current limit accuracy.
• The thermal pad must be directly connected to PCB ground plane using wide and short copper trace.
12.2 Layout Example
IN 1 6 OUT
GND 2 5 ILIM
EN 3 4 FAULT
Figure 30. TPS25221DBV Board Layout
IN 6 1 OUT
GND 5 2 ILIM
EN 4 3 FAULT
Figure 31. TPS25221DRV Board Layout

TPS25221
13 Device and Documentation Support
13.1 Device Support

13.1.1 Third-Party Products Disclaimer
TI'S PUBLICATION OF INFORMATION REGARDING THIRD-PARTY PRODUCTS OR SERVICES DOES NOT
CONSTITUTE AN ENDORSEMENT REGARDING THE SUITABILITY OF SUCH PRODUCTS OR SERVICES
OR A WARRANTY, REPRESENTATION OR ENDORSEMENT OF SUCH PRODUCTS OR SERVICES, EITHER
ALONE OR IN COMBINATION WITH ANY TI PRODUCT OR SERVICE.
13.2 Documentation Support

13.2.1 Related Documentation
For related documentation see the following:
• TPS25221 Evaluation Module User's Guide (SLVUBD1)
13.3 Receiving Notification of Documentation Updates

To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper
right corner, click on Alert me to register and receive a weekly digest of any product information that has
changed. For change details, review the revision history included in any revised document.
13.4 Community Resources

TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight
from the experts. Search existing answers or ask your own question to get the quick design help you need.
Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do
not necessarily reflect TI's views; see TI's Terms of Use.
13.5 Trademarks
E2E is a trademark of Texas Instruments.
13.6 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
13.7 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
14 Mechanical, Packaging, and Orderable Information

The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.

PACKAGE OPTION ADDENDUM
www.ti.com 10-Dec-2020
PACKAGING INFORMATION
Orderable Device Status Package Type Package Pins Package Eco Plan Lead finish/ MSL Peak Temp Op Temp (°C) Device Marking Samples
(1) Drawing Qty (2) Ball material (3) (4/5)
(6)
TPS25221DBVR ACTIVE SOT-23 DBV 6 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 1B4F
TPS25221DBVT ACTIVE SOT-23 DBV 6 250 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 1B4F
TPS25221DRVR ACTIVE WSON DRV 6 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 1C7H
TPS25221DRVT ACTIVE WSON DRV 6 250 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 1C7H
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com 10-Dec-2020
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com 2-Sep-2023
TAPE AND REEL INFORMATION
REEL DIMENSIONS TAPE DIMENSIONS

K0 P1
B0 W
Reel
Diameter
Cavity A0
A0 Dimension designed to accommodate the component width
B0 Dimension designed to accommodate the component length
K0 Dimension designed to accommodate the component thickness
W Overall width of the carrier tape
P1 Pitch between successive cavity centers
Reel Width (W1)

QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE
Sprocket Holes
Q1 Q2 Q1 Q2
Q3 Q4 Q3 Q4 User Direction of Feed
Pocket Quadrants
*All dimensions are nominal

Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1
Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
TPS25221DBVR SOT-23 DBV 6 3000 180.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3
TPS25221DBVT SOT-23 DBV 6 250 180.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3
TPS25221DRVR WSON DRV 6 3000 180.0 8.4 2.3 2.3 1.15 4.0 8.0 Q2
TPS25221DRVT WSON DRV 6 250 180.0 8.4 2.3 2.3 1.15 4.0 8.0 Q2
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com 2-Sep-2023
TAPE AND REEL BOX DIMENSIONS
Width (mm)
H
W
*All dimensions are nominal

Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
TPS25221DBVR SOT-23 DBV 6 3000 210.0 185.0 35.0
TPS25221DBVT SOT-23 DBV 6 250 210.0 185.0 35.0
TPS25221DRVR WSON DRV 6 3000 210.0 185.0 35.0
TPS25221DRVT WSON DRV 6 250 210.0 185.0 35.0
Pack Materials-Page 2
PACKAGE OUTLINE
DBV0006A SCALE 4.000
SOT-23 - 1.45 mm max height
SMALL OUTLINE TRANSISTOR
3.0 C
2.6
1.75 0.1 C
B A
1.45
PIN 1
INDEX AREA
1
6
2X 0.95
3.05
2.75
1.9 5
2
4
3
0.50
6X
0.25
0.15
0.2 C A B (1.1) TYP
0.00
1.45 MAX
0 -10
0.25
GAGE PLANE 0.22
TYP 0 -10
0.08
8
TYP 0.6
0 TYP SEATING PLANE
0.3
0 -10
-10 -10
ALTERNATIVE PACKAGE SINGULATION VIEW
4214840/D 09/2023
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. Body dimensions do not include mold flash or protrusion. Mold flash and protrusion shall not exceed 0.25 per side.
4. Leads 1,2,3 may be wider than leads 4,5,6 for package orientation.
5. Refernce JEDEC MO-178.
www.ti.com
EXAMPLE BOARD LAYOUT
DBV0006A SOT-23 - 1.45 mm max height
PKG
6X (1.1)
1
6X (0.6)
6
SYMM
2 5
2X (0.95)
3 4
(R0.05) TYP (2.6)
LAND PATTERN EXAMPLE

EXPOSED METAL SHOWN
SCALE:15X
SOLDER MASK
SOLDER MASK METAL METAL UNDER OPENING
OPENING SOLDER MASK
EXPOSED METAL EXPOSED METAL
0.07 MAX 0.07 MIN

ARROUND ARROUND
NON SOLDER MASK SOLDER MASK

DEFINED DEFINED
(PREFERRED)
SOLDER MASK DETAILS
4214840/D 09/2023
NOTES: (continued)
6. Publication IPC-7351 may have alternate designs.

7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
www.ti.com
EXAMPLE STENCIL DESIGN
DBV0006A SOT-23 - 1.45 mm max height
PKG
6X (1.1)
1
6X (0.6)
6
SYMM
2 5
2X(0.95)
3 4
(R0.05) TYP
(2.6)
SOLDER PASTE EXAMPLE

BASED ON 0.125 mm THICK STENCIL
SCALE:15X
4214840/D 09/2023
NOTES: (continued)
8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
9. Board assembly site may have different recommendations for stencil design.
www.ti.com
GENERIC PACKAGE VIEW
DRV 6 WSON - 0.8 mm max height
PLASTIC SMALL OUTLINE - NO LEAD
Images above are just a representation of the package family, actual package may vary.
Refer to the product data sheet for package details.
4206925/F
PACKAGE OUTLINE
DRV0006A SCALE 5.500
WSON - 0.8 mm max height
2.1 A
B
1.9
PIN 1 INDEX AREA

2.1
1.9
0.8
0.7 C
SEATING PLANE
0.08 C
(0.2) TYP
1 0.1 0.05
EXPOSED 0.00
THERMAL PAD
3
4
2X
7
1.3 1.6 0.1
6
1
4X 0.65
0.35
6X
PIN 1 ID 0.3 0.25
6X
(OPTIONAL) 0.2 0.1 C A B
0.05 C
4222173/B 04/2018
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. The package thermal pad must be soldered to the printed circuit board for thermal and mechanical performance.
www.ti.com
EXAMPLE BOARD LAYOUT
DRV0006A WSON - 0.8 mm max height
6X (0.45)
(1)
1 7
6X (0.3) 6
SYMM (1.6)
(1.1)
4X (0.65)
4
3
(R0.05) TYP SYMM
( 0.2) VIA
TYP (1.95)
LAND PATTERN EXAMPLE

SCALE:25X
0.07 MAX 0.07 MIN

ALL AROUND ALL AROUND
SOLDER MASK METAL METAL UNDER SOLDER MASK

OPENING SOLDER MASK OPENING
NON SOLDER MASK
DEFINED SOLDER MASK
(PREFERRED) DEFINED
SOLDER MASK DETAILS
4222173/B 04/2018
NOTES: (continued)
4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature
number SLUA271 (www.ti.com/lit/slua271).
5. Vias are optional depending on application, refer to device data sheet. If some or all are implemented, recommended via locations are shown.
www.ti.com
EXAMPLE STENCIL DESIGN
DRV0006A WSON - 0.8 mm max height
SYMM
6X (0.45)
METAL
1 7
6X (0.3) 6
(0.45)
SYMM
4X (0.65)
(0.7)
4
3
(R0.05) TYP
(1)
(1.95)
SOLDER PASTE EXAMPLE

BASED ON 0.125 mm THICK STENCIL
EXPOSED PAD #7
88% PRINTED SOLDER COVERAGE BY AREA UNDER PACKAGE
SCALE:30X
4222173/B 04/2018
NOTES: (continued)
6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
www.ti.com
IMPORTANT NOTICE AND DISCLAIMER
TI PROVIDES TECHNICAL AND RELIABILITY DATA (INCLUDING DATA SHEETS), DESIGN RESOURCES (INCLUDING REFERENCE
DESIGNS), APPLICATION OR OTHER DESIGN ADVICE, WEB TOOLS, SAFETY INFORMATION, AND OTHER RESOURCES “AS IS”
AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS AND IMPLIED, INCLUDING WITHOUT LIMITATION ANY
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Product Order Technical Tools & Support &

Folder Now Documents Software Community

TPS25221 2.5-V to 5.5-V, 2-A Continuous Current Limited Switch

5-V USB 0.1 µF USB Data USB

*USB requirement that downstream facing ports are bypassed with at

Changes from Revision B (November 2018) to Revision C Page

Changes from Revision A (May 2018) to Revision B Page

• Deleted pending from the Features list items ........................................................................................................................ 1

Changes from Original (January 2018) to Revision A Page

• Released to Production ......................................................................................................................................................... 1

2 Submit Documentation Feedback Copyright © 2018–2019, Texas Instruments Incorporated

Product Folder Links: TPS25221

5 Device Comparison Table

6 Pin Configuration and Functions

DBV PACKAGE DRV PACKAGE

GND 2 5 ILIM Thermal

Copyright © 2018–2019, Texas Instruments Incorporated Submit Documentation Feedback 3

7.2 ESD Ratings

7.3 Recommended Operating Conditions

7.4 Thermal Information

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Product Folder Links: TPS25221

7.5 Electrical Characteristics

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VEN 50% 50%

Figure 2. Enable Timing, Active High Enable

VEN 50% 50%

Figure 3. Enable Timing, Active Low Enable

Figure 4. Output Short Circuit Parameters

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Product Folder Links: TPS25221

7.6 Typical Characteristics

VIN = 5 V, RILIM = 20 kΩ, ROUT = 5 Ω VIN = 5 V, RILIM = 20 kΩ, ROUT = 5 Ω

VIN = 5 V, RILIM = 20 kΩ, ROUT = 0 Ω VIN = 5 V, RILIM = 20 kΩ

VIN = 5 V, RILIM = 20 kΩ VIN = 5 V, RILIM = 20 kΩ

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Typical Characteristics (continued)

VIN = 5 V, RILIM = 20 kΩ VIN = 5 V, RILIM = 20 kΩ

IIN - Supply Current, Output Enabled (PA)

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Typical Characteristics (continued)

Static Drain-Source On-state Resistance (m:)

VIN = 5 V, RILIM = 20 kΩ, TA = 25°C

IDS - Static Drain-Source Current (A) 0.3

0.5 TA = 40qC TA = 40qC

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8 Parameter Measurement Information

Figure 21. Typical Characteristics Reference Schematic

Figure 22. Output Rise / Fall Test Load

Figure 23. Output Voltage vs Current-Limit Threshold

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9.2 Functional Block Diagram

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9.3 Feature Description

9.3.2 Fault Response

9.3.3 Undervoltage Lockout (UVLO)

9.3.4 Enable, (EN)

9.3.5 Thermal Sense