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LC102 "RUTO Z* CIRCUIT DESCRIPTION & ANALYZER NOTES

The LC1@2 “Auto Z" Meter Capacitor-—Inductor Analyzer is the only

microprocessor controlled instrument in the service industry that is
dedicated to finding defective capacitors and inductors reliably, accurately,
and automatically. It has the ability to completely analyze the cordition of
capacitors and coils with only the push of a button. Other instruments check
‘capacitors for value only, but that is only half of ‘the picture. Capacitors
also tend to get -leaky,- develop dielectric absorption, or develop ESR which
. other testers cannot measure. Coils.can develop a single-shorted turn
- thereby chang ing its quali ty (@) chara cteri stics , but not chan ge ‘in value
appreciably. The LC3@2 “Auto Z° will test all of these parameters. fnother
advantage of the LC1i9@2 is the fact that this ‘unit is portable. It can be
_ Powered by battery and will turn itself off after approximately 15 minutes
after its last reading.

* POWER SUPPLIES | See mee ce : o

- " ‘Leoking ‘at the. block diagram, we “wil begin by describing the poner Ta
supplies. The LC192 contains two power supplies: one is. the aain supply
which generates. the needed. voltage for the microprocessor and measuring
circuitry and the other is a variable 1 to 1@08 volt ieakdge supply. These
two power supplies are located on the 3020 board. The LCiG2 can be powered
‘by: a-BY 234 batt ery, or, a PA@S 1 powe r adap ter, . 6r both . ‘Whe n the. PA2ZS i is
connected, its, out put ‘is fed-to the 14.5 volt regulator section. This
regulator section’ performs.two functions. It reduces and regulates the
PA2ZSI's 18 volt output and also- ‘charges the battery when installed. The
Pul se ‘Wid th. Mod ula tor , tra nsf orm er, .and rec tif ier sec tio n of the rain sup ply
“converts the 12- 14. 5 volt s del ive red from the bat ter y er powe r. ada pto r ta
multiple voltag e out put s. The powe r sup pli es’ out put s ares +18 vol ts, +12
volts, +5 volts, and -5 volts.

The Leakage Supply produces’ the voltage for the capacitor leakane test.
The cutput of the leaka ge suppl y is contr olled by the micr opro cess or via ‘two °
digital-to-analog ‘converters. This supply aperates by converting the le
“volts received’ from. the main supply to°2 lower or higher. value as: ‘control led
by the Pulse Width Modulator. The 12 valts is. amplified by a 1:3 furrs ratic
transformer and then rectified and filtered. A portion of this output
voltage, determined by the D/A converters, is sampled, peak detected, and
compared to a reference voltage. When the sampled portion is equal ta the
reference, the supply is stable and its output will remain constant. The
- leakage supply aiso incorporates an active load -which has several purpeses.
First, switching supplies must be properly loaded in. order for then.te
opera te corre ctly. The activ e load provi des a const ant 208 uA drain to lead
the supply at all times. Second, the active load is used to reduce overshoot
of the output during turn on. When the output reaches its full selected
voltage, the active load temporarily increases the supply load thus slowing
a safe means
-

the. fast rise in outpu t valta ge. ‘Last, the activ e load provi des
of discharging the filters once the supply is turned off. If this feature
was not incorporated, a dangerous voltage would remain on the filter
Capacitors, thus creating a'shock hazard not anly to the technician working
on the unit, but also to the technician using the unit.

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MICROPROCESSOR
The Main board (2000 board) contains the circuitry for performing all of
the tests to effectively test capacitors and inductors. The heart of this
board is the microprocessor.

It, with its software held in the EPROM, controls the extensive array of
memory mapped 1/0. The microprocessor also determines al] automatic goad/bad
indicators and performs any calculations needed for these indicators or any
other calculated display outputs.

_ Looking at the block diagram, we can see. that the microprocessor is

connected to every section of the LC1@e main: board . through either its: control...
' bus or data bus. The microprocessor, ‘operating at 6 MHz, receives its
instructions, ‘or program, from the EPROM. The Address Latch holds the
address information used by the EPROM and also Control ard Data 1/0.

CO Co -
“CAPACITANCE ©
The LCig2 measures. capacitance by the formula C=(i x “ati /dv. During the
test, a known current (1) -is applied toa capacitor. - While this current is
chargi ng the: ‘cap acit or, | the. time ‘it take s ‘be pass . -bet ween .: ‘two vol tag e ‘poi nts
ahete® 6°

. is: measured. This’ tine is then converted directly toa measurement of

eapacitance.

Alt hou gh ther e: are: ‘twe lve. ‘sof twar e rang es - for dis pla yin g Cap aci tan ce,
only four hardware ‘ranges, exist... A full 12 ranges: are accomplished by. using
“the. hardware ranges to cover. wider capacitances arid adjusting the display’
accordingly. . The. table shown below tells which hardware ranges are used with
each software. range.

SOFTWARE RANGE. HARDWARE RANGE CURRENT MODE TRIP LEVELS

. IpF-199. S9pF Q@ -. 8Q@2uF 3.3 uA Cont inuous -Sv-3. Sv
ZOOpF-1999eF em He, eo oo
~@@2uF-.@199uF- .@02uF - 2uF-. ~ 330 uA " "
| . 2uF -.1999uF "" sO " " .
-2uF>= 1:999uUF MS Det,
2uF -19.99uF - 2uF ~ 2000uF = 62 mA . i
2duF -199. 9uF . " . " eo, "
2@@uF -1999uF " a " sO
2000uF~19990uF 200QuF- OF 416 mQ " lv-1. 75v
ZO0@0-1999@0uF Ho " "
"OF - 1.999F i 416 mA Pulsed " ,
_ o 7 + GQ mA _
@F ~ 20F | ” ALG mA so -"
. " 62 mA " “

TABLE 1. . ,

‘The capacitance measuring sequence begins with. the largest current

Source selected. If the capacitor is smaller than the particular hardware
range is capable of measuring, the microprocessor down ranges and selects the
‘next lower hardware range until either the lowest range is reached or a valid
capacitance reading is-taken, If, while in the first range, the LC102
encounters a large capacitor that does nat read within a specific amour of -

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time,
or a large capacitor with high ESR is seen, the unit assumes that the
Capacitor is a large cap ().2F) and enters a mode where the capacitor is
pulsed with the 60 mA and 416 #A current source. The reason that the
Capacitor is pulsed is so the ESR usually found within large capacitors and
the internal resistance of the LC1@2 circuitry will not effect the
Capacitance readings as the upper trip limit is set at a low 1.75 volts. The
upper trip level is tested only during the time that: the 6@ mA and 416 mA
source is off. (Pulsed mode)

The different trip levels used in the capacitance test are shewn in
Table 2.. There is also a .25 volt lower trip level used during the discharge
cycles, oF the top two. hardware ranges.. ,

Because the testing of large value, double layer capacitors takes longer
that the testing of standard capacitors, a “thinking bar" indicator has beer
incorporated into the double layer test to signify its operation and inform
the user as to the operation: of the test. When the ‘Capacitance value: button.
is pressed and the unit determines that a‘ double. layer capaciter is being
tested, the “2000". display turns to the thifhking bars, The bar's cont inue. to.
scroll ‘across the display as the ‘test. progresses. ‘Two seconds between bar
movement indicates that the unit is in the discharge mode and ene sécond
between bar movement indicates that the Capacitor is charging. Once a
reading’. is displayed,. the units holds that. reading,. giving no ‘futher. updates. —
- Note that this ‘readirig hold only takes place after a double. layer’ capacitor
has been. read. — : .

. DIELECTRIC ABSORPTION.
When the LC1ia2 first. enters ‘the D/A test, it checks to” see if the. oo
Capacitor under test has: a charge on it. If it does; the unit will enter a
“wait” mode. and discharge the capacitor through a low resistance discharoe ot
FET. It will discharge the capacitor for -two seconds and test it again, only ©
oa

cont inuing on with the D/A test if the Capacitor has been fully discharged.

Once the capacitor is. discharged, ‘the unit enters the: actual B/A test.
- For two seconds, a 416 mA current. source is turned on and the capacitor iss
charged. The voltage applied to the Capacitor at this time is limited ta 3
volts to avoid damaging any low.voeltage. capacitors. After . :the two second”
charge time, the supply is turned off and ‘a discharge FET is turnec on. The.
Capacitor is discharged for two seconds and then released to a high-
impedence. After 2/3 of a serond from. the release of the a discharae FET,
.neasurement of the voltage on the capacitor is taken. This voltage is then
converted to a percentage by the microprocessor and displayed as Dieiectric
Absorption. ir percentage.: .

CAPACITOR LEAKAGE
In order to effectively measure leakage current through a capacitor, the
volfaqe across the device must be kept constant and ro voltage should be
developed across the measuring circuitry. Also, if the measuring circuitry
ranges, there can be no effect seen by the capacitor because of this ranging.
By utilizing a current-to-voltage converter, the ground. lead or ground return
is constantly kept at ground potential. The I/V Converter used in the LC1@2
has four automatically selected ranges and produces an output voltage
relative to its input current or in this case, the leakage current af the
-Capacitor. The .four ranges with their respective current capabilities ere’
listed below. : .

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RANGE CURRENT RANGE

1 ® - 19.99uA
2 20uA-199. 9uA
3 ' -20@uA-1. 99mA
4 2mA-19.99mA

TABLE 2

_. ESR BLOCK | Le | | -
The circuitry for: ‘ESR ‘measurement will be ‘explained iv block diagram oO
form at this time. First-of all, what is ESR? ESR (Equivalent Series
Resistance) is the inherent characteristic of a capacitor to have a certain
anount of resistance in series with its capacitance qualities. Tf ESR
- becomes ° iarge enough, thé’ capacitor. becomes” in essence, an. “open“- capacitcr.
The voltage ‘developed across’ a capacitor’ with no ESR when it i¢ charged,
rises ina straight line because a constant current generator is used,” The
_formuba : ‘for the charge ramp | ‘is 'dv -= (1/0) (at). Dn a capacitor. ‘ith ESR, “the-
“ charge ‘current. must first overcome any internal resistance. _ Because ‘voltage
across a resistance. changes instantly, the charge curve will be a ‘straight -
vertical line on the waveforms. After. the resistance ‘is overcome and. the
o ‘capacitance takes effect,. a normal charge ramp - results, ‘The formula for this
os ranp is dv =. (1/€) dt) + IR, where R is the ESR... ESR” is measured ive the’
| first. instant _Oof.a ‘charge ramp. . mod

amma t ees
Tame Teme
CAPACITOR Witu No ESR. CAPACITOR ~WitTe ESR
A

bv = @Y(a) | a dv =CEY(&) + =R
am ome

FIGURE 1

The current for charging the capacitor—-under-test is derived fram one of

three constant current generators. The generator that will be selected-is
determined by the microprocessor Just. as the microprocessor controls the

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timing of the entire circuit. First the 1@uS Pulse Generator is triggered.
This generator then controls the current that is used to charge the
Capacitor-under-test. This capacitor is charged for 10uS. Immediately,
after the charge cycle begins, a pulse generated by the .SuS Pulse Generator
-allows the Sample and: Hold circuit to measure the voltage developed across
the tested capacitor during the first .SuS of the charge cycle. At the end
of the i@uS charge period, the selected current generater turns off and a
transistor in the discharge circuit is turned on. The Capacitor-under-test .
is then discharged and a new charge and ‘discharge cycle is ready to begin. |
After the Sample and Hold circuit has measured and held and ESR voitape
reading, it is then passed on to the A/D converter. The adjusted ESR voltage
is then read directly as ESR. in ohms. 7 SO
INDUCTANCE BLOCK , a . .
Inductance measurements. are made by supplying a constantly increasing
current (ie..current ramp) through the coil under test and sampling the peak
’ DC current “across the coil: The constantly varying current causes a reverse °
EMF across the coil, ‘according’ to the defining equation for inductance E = L
di/dt.. _ Therefore, by changing the. constant di/dt for the-different ranges,
- the reverse EMF is direct ly proportional to the ‘inductance. ‘However, when
the current reaches its peak value, there is: also an IR: component in the ,
voltage that. is seen across. the (coil... ‘ .

- . . We then. hold the peak DC current: across the coil and Wieasure this IR.
component. The. voltage across. the coil. is supplied to two. peak detectors by
omeans of the -inductance: buffer, 1C28. The Inductance Peak. Detector measures.
and holds. the voitage pulse across the coil. during the time that the. current
is increasing. ‘This voltage. has a peak value Of. L di/dt. + TR, ‘@here I is the.
_ peak current and R.is the resistance of ‘the coil. “Now this peak current is
'. held for a time, during which the Resistance Peak Detector stores the IR drap
- across the coil. These two stored voltages are then subtracted by the
‘difference Amp IC2@8, so that we are left with only the L di/dt voltage, -which
is then measured by the A/D converter and microprocessor. We will look at
this circuit in more detail wher we get inte the schematic. 7 ot

"RINGER BLOCK
0
Im the LE10e ringer. Gireuit, a ‘pulse, triggered: by the. microprocessor
and formed by TRI7 and. TRI8, is fed to the coil under test, The ringine
“signal from the coil is détected, converted into TTL pulses, and finally
counted by the microprocessor. Impedance matching is not selected tanualiy,
but instead, the microprocessor sequentially scans through four impedance
matching Capacitors and displays only the highest ringing value. All of the ©
guess work of ‘which . impedance match is to be used Ais removed . by allowing the
microprocessor - -to make the decision.

The level at which the LCI te quits counting rings is determined by the
selection of the front panel component type switches. At least ore of the
lower three component types must be selected ar an Error 1 will result. With
Coils or Switching Transformers selected, the LC10@2 counts al! of the ringing
pulses received from the coil. . When the. Yokes and Flybacks camponent type is
selected, only the tep 75% of the received ringing pulses are counted. The
ringer counting circuitry cuts off at the 25% leve}.

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FRONT PANEL AND DISPLAY BLOCK

The LCi2 front panel board provides two very important functions. It
allows information and contro] to be entered into the unit and displays
processed information for user interpretation. Input to the LC102 is
accomplished on a 8x5 membrane keyboard. . This keyboard is scanned by. the
microprocessor.

There are two LCD displays on the front panel of the LC102. One is a 6
digit and is used for displaying entered value and all test values’ and |
results. The other is-a 4 digit and is used to constantly display the
voltage that is entered for the leakage supply. ‘The two displays can be
tested by accessing a display test routine. This routine is called by . moa
holding the On/Battery test ‘and - pressing the CLR button at the’ Game “tine.

There are . also 9 LED's, ‘which are used to “indicate ‘Component type
selection, and two flashing LED's. One is used to warn the user when )25
volts has: been: entered ‘into the leakage supply. The. other flashing “LED is-
_. used,.in ‘Conjunction with .a: ‘buzzer, to warn the user of possible shock hazard
should the. test lead fuse ever blow. ce

CIRCUIT DESCRIPTION |
| POWER, SUPPLIES | 7 So,
Now, turning. to. the schematic of the ‘Power Supply Board, | let’s discuss
‘in detail the’ Circuitry associated with the two power suplies used . in the
{Ci@2e. The PAZS1 Power Adaptor is connected to the terminal marked AC..
Here, the 18 volts delivered by the power adaptor: is passed through CR2S and
additionally filtered by C14' and C16..° The 14:5 volt regulator is compesed of
ICS, and LM317T Adustable Regulator and its associated contra) ‘resistors.
R40 is adjusted fora reguiator output of 14.5 volts. CR16 and R45 make up
the battery charging section which will charge the BY224 when installed.
Also note that at the AC input, there is a line syne generator made up of
TRI, TR1@, and several bias resistors. The circuit tells the microprocessor
when the AC Power Adaptor is connected: and. whether or not to incerporate-
the
auto of f function. The main power switch FET (TRIS) is used to pass the
battery and/or power adaptor voltage ta. the Switching ‘section of the main’
supply. A FET is used here. to alYow nat only. standard on/off. control by SH,
but also microprocessor controlled auto. off capabilities. © The battery
voltage is passed through CR18, a 3 amp Schottky diode for low forward
voltage drop, and the AC Power Adapter voltage is passed through CRi7.

A Pulse Width Modulator (I1C4) is the central control of the main |

Switching power supply. The supply operates as follows: Current pulses are
generated in Te by.the switching of TRI3 and TR14-as dictated by the output
of IC4, pin 10. Voltage is ther, developed across Té’s secondary and is
rectified and filtered. The positive voltage is rectified by CR23 and
filtered by C26 and C28. The negative voltage is in turn rectified by CRe4,
filtered by C25 and C27, and requlated to -S volts by IC?. The positive
voltage is fed back to Pin 1 of IC4, a non-inverting input of an internal
Op-amp comparator. At Pin 14, there exists an accurate S volt refererce.
This reference, passed through R56 is fed into the inverting input of the
internal op-amp. RSQ and C31 provide feedback for stable aperation. The
Pulse Width Madulator does just as its name implies; it controls the width af
the pulses that are generated in Te's primary. When the pulse width is wide,

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a larger voltage is developed across TzZts output thus creating a larger

rectified DC voltage. When'the pulse width is narrow, just the cpposite
happens. A narrow pulse width produces a lower voltage output on T2's
secondary. The output pulse width of IC4 is then automatically adjusted
until the 5 volts that is fed back from the rectified secondary output equals
that of the internal 5 volt reference. Once the output has settled to 5
volts, the pulse width will] remain corstant, changing only for variances in
load current, which must be. compensated for to maintain a stable and accurate
output voltane. The circuit runs at a frequency of around 27 KHz as is
determined by C2Q.and RS1. There is also a reference voltage at Pin 4,
-labeled as dead time. This reference Voltage determines the naximum duty
cycle that the output pulses can achieve. If the duty cycle would: become too —
“figh: Cie... not enough off. time) the transformer (12). would become saturated.
Minimum dead time prevents this from happening. Looking to the switched side
of T2 (the primary winding) we see that this "flyback" voltage is also
rectified and filtered by CR21 and C21. The voltage developed at this paint
is used to supply the. 18: volt regulator and also ‘to keep the main seitch FET
turned on as the voltaoe: across the gate. must be kept. higher than the valtage
present at its source. Zener diode CR2Q limits the amount, of voitage at this”
point to 15. volts above the. norsial 12 volt ‘supply: line. This not only keeps | ,
the voltage from runriing too high for the filter capacitors and 18 volt
regulator, but also protects TR14 from transients developed across the
‘ primary of T2 by dumping the. energy back onto the 12 volt line. TR11 is
normally held on by ‘the microprocessor which in turn keeps TRi2 turned of f.-
When ‘the auto off sequence begins, © the microprocessor allows TRi1 to turn off.
thus allowing TR12 to turn on. Now that the voltage which is normally: kept.
_ TRIS, the main switch FET turned on, .is removed, the switch tures off and
removes froma the power supply and Le1e2 circuitry.

Using 11 to 13 volts to produce an Gut put that if capable of 1 te 120@.

volts at 6 Watts, the leakage supply incorporates much of the same technology
that is used in the main supply. Here, a Pulse Width Modulator (IC)
controls and regulates the output voltage via a closed loop feedback system.
The start of the ‘loop is a flyback switching transformer and associated
switching circuitry.- When IC3 switches from @ to 12 volts, a charge is
dumped into TR4, thus turning it'on. This in turn causes the current to flow
in the “primary. of Tt and..creates.a magnetic. field. When IC3)s output drops *
back to @ volts, TR2 is turned» an which in‘turn pulls the Charge out of TR4,
thus turning it off. TR3 is used to aid in the turn off of TR4 for faster
and more reliable switching. action. When. TR4 turns off, current stops
flowing in the primary of T1 and the magnetic field collapses. This action
induces current in T1%s secondary. The eutput of T1 is then rectified by CR&
and CRO and. then filtered by. C19, C11, Ci3, C32, and L1. The rectifyina and
filtering section is balanced by R27, R28, R29, R3Q@, and R31.

Out put voltage selection is achieved by selecting a reference current

via Digital-to-Analog Converter on the main board. The D/A Converters are
microprocessor controlled and will be discussed later. Sy setting a .
reference current at the D/A control pin, it takes a certain cutput voltage. "
‘ta produce a> corresponding current through R32@ and R33 that will offset the
teference current and end up with a respective reference voltage. The D/A
outputs and IC2 are protected against excessive valtage by CR1i2, CR1I4, and
CR1S.

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The reference voltage, located at the D/A control pin, 15 buffered by

IC’b and summed with a calibrated reference voltage buffered by IC2a. This
calibrated reference voltage is adjusted by R69 and is set during power
supply calibration. The summed voltage, located at Pin 8 of ICI is peak
detected to keep any ripple and/or noise on the supply output below the
selected output voltage. The peak detector voltage is then referred to as
the conditioned output reference voltage.
Pin 14 of IC3 produces a stable and accurate 5 volt reference. This
reference passed through R1@ and CR4, is compared to the output voltage
reference. If the output reference voltage is lower than the reference
voltage, IC3 increases the pulse width which in turn increases the output
voltage. When the reference voltages are equal, IC3 lowers: the pulse width|
' and continues to adjust it in order to keep-the out put ‘voltage constant.

The leakage supply is initially turned an and off by a control line from
the microprocessor. When S volts is applied to the base of TR1, through R1S
TRI conducts thus lowering the voltage’ ‘at Pin 16 of IC3..- This volfage is”
ther below the voltage on Pin 15 and the supply. begins’ to turn aon and come up”
. to voltage. When the microprocessor control line goes to grourd, TR1 turns
off allowing Piri 16 to rise to 12 volts ard thus turning off the out put of
-IC3. Another thing that ‘happens during turnoff is that TR& turns on ard
discharges the output filters through the active load, which will be
described dater.

While the supply. is initially turning on, the out put voltage is rising
at a’ fairly fast rate. Just as the output-reaches full voltage, TR7 is.
momentarily turned on to slow-the output voltage rise by. drawing 33 times the.
normal current through ‘the active load. This keeps the output voltage from -
overshooting the entéred. voltage. - The control of this operation comes from
[Cla after comparing the output reference voltage ard a value Just. above the -
main reference voltage. °

The active load is a very important part of the leakage supply. First,
in order for a switching supply to operate. correctly, it must have’ some
afaount of load:'or its output. The active ‘load used here keeps a constant
load of about 2@@uA on the power supply, . no matter what the output voltage is
set to. The attive load also. keeps the -supply fram overshgot ing -and::
discharges the filter capacitors when it is ‘shut’ offF as ‘ment ioned before. |

The active load operates as follows; Five volts is fed to the gate of
TRE via R22. This voltage turns the FET (TR&) an, which in turn develaps a
voltage across the 19@K source resistor (R24). This voltage is around é
_ volts, which equates to a 2009uR load (2ev/1@@K = 2@@uA). Because there is a
balanced condition between the voltage on the scurce and the.gate veoliage,
any change in output valtage will] reflect in.a carresponding change in FET
resistance to keep the voltage across R@4 constant.

As the voltage on the drain of TR2 rises, the source will follow because
the.FET is turned on via R23. The voltage at. the source of TR@ is limited to
o

approximately 400 volts by CR6 and CR7. This distributes the high voltage
betweer the twe discharge FETs.

The discharge lead (R25) and the overshoot load (R26) are selected via
TR8 and TR7 respectively. The reason that the heavier loads work is that TRE
will turn cn as hard as necessary to develop a balanced voltage across the

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“load“ resistors R24, R2S, or R26: whichever is selected.

The supply is current limited by the circuit consisting of TR1, Rei, and
R35. When the voltage drop across R35 becomes greater than .& volts, TR2
begins to conduct and raises Pin 3 of IC3. When this feedback pin is pulled
high, the Pulse Width Modulator decreases the pulse width and in turn limits
the output voltage.

CAPACITANCE CIRCUIT DESCRIPTION

To measure capacitance the LC1@2 uses 1 of 4 current sources and applies
this constant current to a capacitor; measuring the time it takes for the .
voltage to pass between two. predetermined points. The lowest two current
sources are simple transistor switches, applying ‘5 volts to a calibrated -
resistor network. . Here, 5 volts charges the capacitor: under ‘test through
1.52 Meg +/-S@K (RSS & ROG) adjustable resistance for the 3. 3uA current
source and through. a 15.2K +/-5@ ohm (R59 & REQ) adjustable resistance for
the 338uA current source. The 6@mA is controlled by IC22,. Pin 14,. and
incorporates IC41, a LM317T voltage requlator, as an adjustable current
‘source. The 6Q@mA fron IC41 is passed to the capacitor under test by CReS
thru CR3@. © The 416mA source . funtions as more than a ‘current source. First,-
-it uses as its’ current source driver, a LM317T (1024) voltage regulator and
is adjusted. by R81. Its primary turn on signal’ is derived at ICe3, Pin 1.
IC4 and CR31° limit the maximum voltage that the A16mA: current source can
achieve toa 3 volts.. Two more sections of: IC23 are used not only to Gontrol
the current source, Sut also to force the voltage .at the ‘current: source's)
output ‘to follow the voltage present on the-leads (ie. «track the output).
This is done to keep the internal capacitance of CR1I4 from affecting.
. Capacitance readings. During the pulse test . for Double Layer. capacitors, - the
SV limit is. removed from the 417mA source and the pulse voltage: Limit is
allowed go as high aS approximately & volts. This is done to help overcome
the ESR associated with these types of capacitors.

The upper and lower ‘voltage trip points are determined by the voltage on.
Pins 5 &-9 of ICZ7, a LM319 high speed comparator. -The lower trip point, Pin
3S of IC27, is normally held at. 1V by resistor: divider network R161 & R76. |
When TFR48 is turned on by the microprocessor, the lower trip level becomes
er) cand. wher - TR4L- is turned . on; ‘the trip level: becomes. .2SVe- “Only TR4A. or|
TR41 is on at one tine, never both. :.On Pin 9 of IC27;. the upper 3.5V trip
level resides. This voltage is set by R74 & R164, and wher TRIG is turned on .
by the “F" latch, the upper trip level is lowered to 1.75 volts. R71i is used.
ta calibrate this voltage.

During the charging of the CUT, IC27. serves as a window comparator,

allowing 6MHz to pass through 1/4 of IC25, only during the time that the
voltage across the capacitor is between the two “windcw" voltages. This 6MHz
is passed during this time, through IC@25 &@ 1C13 to IC31, where it is divided
down for the input to the microprecessor, T1. The input pulses counted at T1
_and left over in IC31 are used for the capacitance calculations. During the |
time between ranges, TRIS, as controlied by the microprocessor, discharges
the CUT.

D/A CIRCUIT DESCRIPTION

The 416mQ current source is the same as that used in the capacitance
measuring section. During the initial phase of the test, 416mA is passed
_ through relay L9 to the test leads ard on to the CUT. After the two second

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charge tine, relay L9 releases and relay Li engages. Discharge FET TRA8 is
turned on and the capacitor discharges far 2 seconds. TRS is then turned off
arid Li is released. After 2/3 of a second, the voltage on the cap is
measured via a high impedance buffer, I1C33. R33, adjusting the offset of
IC33, is used to calibrate the D/A readings. The output of the D/A: input
buffer is fed to the A/D converter IC14, via the A/D input selector, ICIS.

LeAKacE CIRCUIT
' Part of the leakage measuring system is the leakage power supply which
has been. previously covered. Aut, part of the. leakage supply which was. not
covered is the digital-to-analog converter which sets’ up a reference current
that the supply uses to determine what the output voltage will be. When a
valid voltage is entered via the front panel keyboard IEEE, the LC1a2
microprocessor Calculates what code must be sent ta the D/A converter. This
Code is latched by IC35 for the MSB and IC37 for the LSB. -In: order to cover
_ the full range of 1 to.999.9 volts in .1 volt increments, two D/A converters |
‘. must be used. Two D/A converters give a resolution of. 16 bits. The MSB D/A
‘converter's maximum output current is .Sma and it is trimmed ‘by’ Rea. The
LSB D/Q corverter’s output current is 2uA and it is trimmed by R262. These
‘pots are adjusted. during the leakage. supply voltage calibration.. The two:D/R.
converters are combined by tying their autputs together. Ss

| ‘When measuring leakage current, one of | four: automatically: selected

ranges are used to set the gain ‘of the’ current—-to-voltage converter ‘made up.
of IC43 and its associated circuitry. Wher the leakage: button is pressed,
the microprocessor starts the current voltage converter in the highest range.
‘by engaging LS 2nd connécting the 10 obra resistor (RI7L) into the feedback
loop. Also, the output of IC4&4 is connected to the A/D converter (IC14) via _
the A/D input selector (ICIS). If the microprocessor reads too low of an
input for that range, it will range down until the reading is vatid or the
bottom range is reached. As the unit ranges downward, it will sequentialy
select R172 (188 ohm), Ri77 (1.1K), and then only Ri78 (18H) for the lowest-
range. Also, during the leakage test, “L4& is engaged which diverts the return —
current from ground to the 1/V converter. ’ “4

The following table shows ‘which ‘vesistors and relays are used for ‘each
particular ranges:

RANGE RELAY ENGAGED RESISTOR USED _ CURREN

RANT
GE
1, Highest LS . Ri71, R178. 2mA-28mA
a. 16 ° | R172, R178 =. 2ABuA-1. GuA
3. LT . _R177, R178 20uA-199uA
4&. Lowest ; None R178 - @uA-19.9uA

TABLE 3
Troubleshooting hint: If the unit reads several mA with no load connected
and can not be calibrated out, L4 may be fused.

ESR CIRCUIT DESCRIPTION ;

During the ESR test, L1 is energized and any signal sent to or received
from the leads is passed via this relay. At the start of the ESR test, the
microprocessor sets Pin S af I[C@i, a 4@66 bilateral] switen, high and stores
any initial voltage on the capaciter in C8 Pin S of IC@i drops low and a

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selected current source is turned on for a period of about 10uS. “F4" is

aiso set high when a ramp is turned on. At this time, a 1uS pulse, generated
by C1®, R30, and IC&@ is sent to Pin 6 of IC2@i to sample the voltage
developed across the CUT at the instant the current is applied. This voltage
is then held in C12. Normally, the 1uS sample and hold pulse is delayed -1uS
by R165 and Ci1, but when the highest range is used (28@-2Kohm) the sample
and hold pulse is delayed SuS to sample further into the ramp. This
additional delay, switched in by TR42, is incorporated because of the
rounding of the leading edge of the current pulse due to internal capacitance
and the high impedance of the generatar.
After the resistance value has been stored, the D/A voltage value,
-stored in C8, is subtracted and the final ESR value ‘is sent ‘to the A/D
converter (1014) via A/D input’ select, ‘IC1S.

Under the control of the ii croprocessor, the three ESR ranges are
sequentially stepped through, highest to Lowest range. In between ranges,
TRE is turned on to discharge the. Cur. | 7
-INDUCTANCE
The LC1¢2 ‘measures inductance ' by. applying a “current. ramp to the coil -.
under test, as described in the inductance circuit block diagran ‘description.
The current ramp-is generated by ICe6, C32, and one of the resistor networks
selected. by IC16, an analog multiplier. - ‘The ramp ‘speed is’ determined by the
‘resistor network value selected by the microprocessor... When ICY ‘selects’ one.. |
-of its. seven inputs, capacitor C32 begins. to charge. As the voltage at Pin 6
of IC26 rises, it charges C32 aid raises the ‘Voltage on Pin 2. Because Pin 2
is being pulled toward —-5 volts, it opposes the current ‘coming from C3e. The
“rise of the. voltage. is then a linear’ ramp whose speed is’ determined. by how
“hard Pin 2 of IC 26 is being pulled toward -S volts and counteract ing the
rise of voltage caused by the Charging C32. Knowing how this circuit: .
operates,. we can tell that R104 and R1@5 will produce the strongest current
and opposition to C3¢, thus producing the steepest ramp. R111 and R117 being
the highest resistance value will produce less. opposition ta C32 ard -
consequent ially, the slowest and. most gradual ramp.

The selected ramp located.on Pin 6 of I€@6 is then fed to selected

; voltage-to-current converters: via IC17,- another 4051 “analog multiplier. The-
. selection of IC16 and IC7 is always identical ta’ divert the current voltage
ramp to its current voltage-to-current converter. Both are microprocessor
controlled. When the tap of the ramp is detected by comparator LM3@6 (iCes),
two things happen. IC30, Pin 4 goes high and turns the range off. Also, at
this time, IC32 is ciocked producing a logic high on Pin 13 and low on Pin
1c. The inductance sample and hold is then turned off, leaving the
_ inductance sanple stared in C37. 1C39, Pin 3 goes high after a short de: ay
set by R14@ and C35, resistance af the cail is then sampled and held in C35.
ICe8d subtracts the resistance from the inductance value and sends the
corrected inductance value to the A/D converter via the analog data selector,
IC15.

Also, note that the output of ICza, Pin 7 is divided down by R152 and
RIS4 and sent to the A/D converter. This point is used by the microprocessor
to test if a high resistance across the leads exists, thus indicating an open
e£oil.

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During the inductance test, LA is energized and the microprocessor

sequences through the ranges (Range G to Range A) until a value reading is
taken or range A, the lowest range, is reached. Fiqure 2 shows the waveforns
across various points in the inductance measuring current.

Ole
eS
2 6 ame EO
‘
I-20, Prt
t--Con)
CanTaAoU

: - |

1.2.0
- Pin 13
R~- Berec Teoh
Ly
CON TROL
food
|

FIGURE 2

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RINGER CIRCUIT DESCRIPTION

After the “Inductor Ringer” button on the front panel of the LC1I@é@ is
pressed, (coils, yokes & flybacks or switching transformers must be
selected), the microprocessor latch E4 is temporarily dropped from a high to
a low state. This in turn causes TRI? £ TRIB to conduct and send a § volt
pulse through CRi6 and on the test coil via energized L190. The returned
pulses from the ringing coil are buffered by TRIS & TR2B. The buffered ring
signal is then squared by TRee. R95 is calibrated to bias TR22 into
conduction. For the 25% cutoff level, R91, switched in by the tsicroprocessor
via TR21, is set so TR@2Z will count only the upper 75% of the ircoaing ring
Signal. The squared ringing signal passes through 1/4 of IC2 and 1/4 of C13
and on to IC31, a HEF4040 binary counter. . This counter stores the value. of
ringing pulses and is then enptied into the microprocessor t imer/counter
input pin, Ti.

Ruto ranging ts accomplished. by sequentially selecting the impedance

matching capacitors C26, C#7, and. C28; storing the ring value; and displaying
the highest value received. The impedance matching capacitors are seitched
by TR24, TR2S, and TR26; and are under microprocessor control via the "F"
jatch,

FRONT PANEL CIRCUIT. mo

The front pane} ‘board is connected to-the main ‘board. with a 26 conductor _
ribbon cable. .The front panel” menibrane. switches are then connected ta the
_ front panel board via a separate flex cable. The keyboard is scanned by the
microprocessor. Scanning is done by sequentially outputing a low to each
column on the keyboard via a latch eon the main board (1040). During each
column output, an input buffer. on the: main board (ICS) tests the. rows of the
keyboard to see. if any have: been pulled low. A low would indicate that a “key
has been pressed. The microprocessor also sends a pulse to the latch inputs
of I1C4 and ICS. This, in turn, latches the respective coaponent type LED on.

The two LED displays receive their data from DB7 of the wicroprocessor.
The main display and the voltage display each have their own clock which is’
used to put the data into the particular display latch. ‘ICG produces the .
backplane for the LCDs and also flashes the warning, LED wher instructed | to do
. $0 ‘by the microprocessor.

" PROTECTION CIRCUIT

In order to protect the user from possible shock hazard, the LC182
incorporates a circuit to detect a blown test lead fuse and warn the user
should such a condition ever exist. This circuit operates by passing & volts
to the test.lead (after the fuse) through CR42, CR43, and Re18. If the fuse
is good, the 8 volts will be dropped through R218 and approximately @ valts
will be delivered to pin 3 of IC48. However, should the fuse be bicwn, the 8
volts will no longer be shunted through R34 and R35 to ground, but will
remain and be delivered to IC46, thus tripping the comparator and setting off
the warning system. The warning system consists of a front panel LED and a .
buzzer which is pulsed. Should the )2S5 volt LED be flashing at the time when
the fuse blows, that LED's flashing will stop as soon as the fuse warning LED
begins to flash.

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