Al-Imam Mohammad Ibn Saud Islamic University

College of Computer and Information Sciences

Computer Science Department
CS 125: Digital Design
2nd Semester 2022/2023

Chapter#04

Basic Organization and Design

Part 1: Computer Instruction Code
 Textbook: Chapter 4
Overview

• Part 1 - Computer Instruction Code

• Instruction Codes
• Computer Registers
• Computer Instructions
• Timing and Control
• Part 2 – Instruction Execution
• Instruction Cycle
• Memory Reference Instructions
• Input-Output and Interrupt
• Complete Computer Description
• Design of Basic Computer
• Design of Accumulator Logic 2
Introduction

• Every different processor type has its own design (different

registers, buses, micro-operations, machine instructions, etc)
• Modern processor is a very complex device. It contains

• Many registers

• Multiple arithmetic units, for both integer and floating

point calculations
• The ability to pipeline several consecutive instructions to
speed execution

3
Introduction

• However, to understand how processors work, we will start

with a simplified processor model.
• This is similar to what real processors were like ~25 years ago

• M. Morris Mano introduces a simple processor model he calls

the Basic Computer
• We will use this to introduce processor organization and the
relationship of the RTL model to the higher level computer
processor

4
The Basic Computer

• The Basic Computer has two CPU RAM

components, 0
• a processor and
• a memory

• The memory has 4096 15 0

words in it. 4096 = 212, so it
takes 12 bits to select a word
in memory
4095
• Each word is 16 bits long

5
Instruction Codes
• Program: A sequence of (machine) instructions
• (Machine) Instruction: A group of bits that tell the computer to
perform a specific operation (a sequence of micro-operations)
• The instructions of a program, along with any needed data are
stored in memory
• The CPU reads the next instruction from memory and
placed it in an Instruction Register (IR)
• Control circuitry in control unit then translates the
instruction into the sequence of micro-operations necessary
to implement it.
• There are many variations for arranging binary code of
instructions.
• Each computer has its own particular instruction code
format. 6
Instruction Codes

• An instruction code is a group of bit that instruct the computer

to perform a specific operation
• It is usually divided into 2 parts: operation code and operand

1. Operation code (Opcode) :

• Operation code of an instruction is a group of bits that define the
operations such as add, subtract, shift…
• The number of bits required for the operation code depend on the
total number of operations available in the computer
• The operation code must consists of at least n bits if there is 2n (or
less) possible operations

7
Instruction Codes

• The relation between the computer operation and micro-

operation
• An operation is a part of instruction stored in computer
memory, it is a binary code that tells the computer to preform a
specific operation.

• The control unit received the instruction from the memory and
interpret the operation code bits. It then issues a sequence of
control signals to initiate the right microoperations necessary
for the operation.

8
Instruction Codes

2. Operand (address)
• The operation part of instruction code is performed on some
data stored in memory or register.
• The operand part of an instruction specifies the location of this
data (address).
• It must also specify the location where the result must be
stored.
• Memory words can be specified in instruction codes by their
address.
• Processor registers can be specified by assigning to the
instruction another binary code of k bits that specify one of the
registers.

9
Instruction Codes
Stored Program Organization:
• Instructions are stored in one section of memory and data in the another.
• In the Basic Computer, since the memory contains 4096 (212) words we
needs 12 bits to specify which memory address this instruction will use.

The operation is performed

with the memory operand and
the content of AC

• In the Basic Computer, bit 15 of the instruction specifies the addressing

mode (0: direct addressing, 1: indirect addressing)
15 14 12 11 0
leaves 3 bits for the
Instruction Format I Opcode Address
instruction’s opcode
Addressing mode 10
Addressing Modes
• The address field of an instruction can represent either

• Direct address: The second part of instruction code

specifies (the address of the operand)
• Indirect address: The address bits of instruction code is (the
address of memory in which the address of the operand is
found)

• Effective Address (EA)

• Address where an operand is physically located

11
Addressing Modes

12
Basic Computer Registers

• A processor has many registers to hold instructions, addresses,

data (The basic computer has eight registers)
• The processor has a register, the Program Counter (PC) that holds
the memory address of the next instruction to get.
• Since the memory in the Basic Computer only has 4096 = 212
locations, the PC only needs 12 bits
• In a direct or indirect addressing, the processor needs to keep track
of what locations in memory it is addressing. The Address Register
(AR) is used for this.
• The AR is a 12 bit register in the Basic Computer
• When an operand is found, using either direct or indirect
addressing, it is placed in the Data Register (DR). The processor
then uses this value as data for its operation.
13
Basic Computer Registers

• The Basic Computer has a single general purpose register the

Accumulator (AC).
• e.g. load AC with the contents of a specific memory location;
store the contents of AC into a specified memory location
• Often a processor will need a scratch register to store intermediate
results or other temporary data; in the Basic Computer this is the
Temporary Register (TR)
• The Basic Computer uses a very simple model of input/output
(I/O) operations
• The Input Register (INPR) holds an 8 bit character gotten from an
input device
• The Output Register (OUTR) holds an 8 bit character to be send to
an output device
14
Basic Computer Registers
List of Basic Computer Registers

15
Basic Computer Registers

Registers in the Basic Computer

11 0
PC
Memory
11 0 4096 words
AR 16 bits per word
1 0
5
IR
CPU

1 0 15 0
5
TR DR
16
15
Common Bus System

• The basic computer has eight registers, a memory unit, and

a control unit.

• Paths must be provided to transfer information from one

register to another and between memory and registers

• A more efficient scheme for transferring information in a

system with many registers is to use a common bus.

17
Common Bus System s0 s1 s2
Bus
Memory Unit
7
4096x16 Address
WRITE READ
AR 1
LD INR CLR
PC 2
LD INR CLR
DR 3
LD
INR CLR
E
ALU AC 4
LD INR CLR
INPR
IR 5
LD
TR 6
LD INR CLR
OUTR
Clock
LD

16-bit common bus 18

Common Bus System L : Load
I:
Increment
C : Clear
Rea INPR
Memo d
ry Wri
Address E AL
te U
4096x
16 AC

L I L I L
C C
L IC DR IR L I C

PC TR

AR OUTR L

L I
C
7 1 2 3 5 6

4
S0 S1 S2
16-bit
19
Common Bus
Common Bus System
• Three control lines, S2, S1, and S0 control which register the
bus selects as its input

S2 S1 S0 Register
0 0 0 x
0 0 1 AR
0 1 0 PC
0 1 1 DR
1 0 0 AC
1 0 1 IR
1 1 0 TR
1 1 1 Memory

• Either one of the registers will have its load signal activated,
or the memory will have its write signal activated
• Will determine where the data from the bus gets
loaded 20
Common Bus System

• The 12-bit registers, AR and PC, have 0’s loaded onto the bus
in the high order 4 bit positions

12 least significant bits

12 bits

• The 8-bit registers OUTR and INPR communicate with a low

order 8 bits on the bus

21
Basic Computer Instructions
Three Instruction Code Formats:
Memory-Reference Instructions (OP-Code = 000 ~ 110)

15 14 12 11 0
I Op-Code Address

Register-Reference Instructions (OP-Code = 111, leftmost= 0)

15 12 11
0 operation
0 1 1 1 Register

Input-Output Instructions (OP-Code =111, leftmost = 1)

15 12 11 0
1 1 1 1 I/O operation
22
 Basic Computer Instructions
Hex
Code Symbol Descriptio
AN I = 0 8xx
0xx And memory n word to
Memory-Reference Instructions D xI = 1x AC Add memory word
AD 1xx 9xx to AC Load memory
(OP-Code = 000 ~ 110) D x x word to AC
I=0 : 0xxx ~ 6xxx, I=1: LDA 2xx Axx Store content of AC in
8xxx ~Exxx STA x x memory Branch
3xx Bxx unconditionally
BU
CLA x 780x Branch
Clear and Save return
Register-Reference Instructions NCLE 4xx0 Cxx address Increment and skip
AC
BSA x 740x if zeroE
Clear
(OP-Code = 111, I = 0) ISZ
CM 5xx0 Dxx Complement AC
A x 720x Complement E
7xxx (7800 ~ 7001) CM 6xx0 Exx Circulate right AC and
E x 710x E Circulate left AC
0
CIR and E Increment AC
708
CIL Skip next instruction if AC
0
INC positive Skip next instruction if
704
Input-Output Instructions SPA 0 AC negative Skip next
SNA 702 instruction if AC zero Skip
(OP-Code =111, I = 1) INP F80
0 next instruction
Input if AC
character to E is 0
SZA
OU 0 Halt computer
Output character from
Fxxx(F800 ~ F040) T
701
F40 AC Skip on input flag
0
SZE
SKI 0
700 Skip on output
SK 8
F20 flag Interrupt On
HL
OT 700
0 Interrupt Off
ION 4
F10 23
Instruction Set Completeness

• A computer should have a set of instructions so that the user

can construct machine language programs to evaluate any
function that is known to be computable Q
• Instruction Types
• Transfer Instructions: Data transfers between the main memory
and the processor registers
• LDA, STA
• Functional Instructions: Arithmetic, logic, and shift instructions
• ADD, CMA, INC, CIR, CIL, AND, CLA
• Control Instructions: Program sequencing and control
• BUN, BSA, ISZ
• Input/Output Instructions: Input and output
• INP, OUT
24
Control Unit
• Control unit (CU) of a processor translates from machine
instructions to the control signals for the microoperations
that implement them
• Control units are implemented in one of two ways:
• Hardwired Control
• CU is implemented with sequential and combinational
circuits to generate the control signals
• Microprogrammed Control
• A control memory on the processor contains micro-
programs that activate the necessary control signals

• We will consider a hardwired implementation of the control

unit for the Basic Computer
25
Timing and Control
Control unit of
Basic Computer

26
Timing Signals

• Generated by 4-bit sequence

T0 T1 T2 T3 T4 T0
counter and 4x16 decoder Clock

• The SC can be incremented or T0

cleared. T1

• Example: T0, T1, T2, T3, T4, T2

T3
T0, T1, . . .
T4
• Assume: At time T4, SC is
D3
cleared to 0 if decoder output
CLR

D3 is active. SC

• D3T4: SC ← 0
27