$

Hello world, 284x!{uni}[WEI]

svn: (Feb 20 2019 13:46:52)
flash_type = 2, secure_type = 2
b8062204=0
Auth Key is Ready![go kb]KRRRROOOONNRNNURRU"U#U$

U-Boot 2012.07-branches/SQY/2831_Hikeen_1222_SVN9254/bootcode-svn14933 (Feb 20 2019

- 13:47:42) r-

[ENV] Writing to Factory...

factory_tarsize = 0x331200
[FAC] factory_save: MMC
[FAC] Save to eMMC (blk#:0x12000, buf:0x23900000, len:0x331400)
[FAC] Save to eMMC (seq#:0x19b, pp:1)
done
Factory Address:0x2000000, Size:0x800000!
Factory Read Only Address:0x1800000, Size:0x400000!

anel_filename NULL>>>>>>>>>>
==== James panel000 env_panel_set_default line:293 file=env_panel.c
panel_select=<NULL>Panel: SD_panel_VESA_VFLIP.h
logbuf fifo[0] [buffer=1ca0e000], [size=10000]
logbuf fifo[1] [buffer=1ca1e000], [size=2000]
logbuf fifo[2] [buffer=1ca20000], [size=10000]
logbuf fifo[3] [buffer=1ca30000], [size=10000]
logbuf fifo[4] [buffer=1ca40000], [size=10000]
logbuf fifo[5] [buffer=1ca50000], [size=20000]
logbuf fifo[6] [buffer=1ca70000], [size=10000]
SCPU2: BISR hold remap
SCPU2: BISR ok 0
In: serial
Out: serial
Err: serial
Net: r8168: REALTEK RTL8168 @0x18016000
panel_init_1st 0529_1022
Hit Esc or Tab key to enter console mode or rescue linux: 0 (Re)start USB...
USB0: ----------- ehci_hcd_init -----------
#@# ehci_hcd_init(404) ehci mac0
----------- usb2_clk_setting_off -----------
----------- usb2_clk_setting_on -----------
----------- snps_reset_release -----------
----------- internal_ldo_on -----------
[ehci], info, #@# usb2_phy_setting(308) +++ for usbphy setting 20170420
[ehci], dbg, set_usb2_phy, port 1 phy_reg 0xe0 set 0xf get 0xf
[ehci], dbg, set_usb2_phy, port 2 phy_reg 0xe0 set 0xf get 0xf
Disp HTotal=1559, Htotal 4x alignment=1559
[ehci], dbg, set_usb2_phy, port 1 phy_reg 0xe1 set 0x18 get 0x18
den_h_start=96, den_h_end=1462
[ehci], dbg, set_usb2_phy, port 2 phy_reg 0xe1 set 0x18 get 0x18
[uzu] dvtotal(b8028504 = 325)
[ehci], dbg, set_usb2_phy, port 1 phy_reg 0xe2 set 0x4d get 0x4d
[uzu] dhtotal(b8028508 = 6170617)
[ehci], dbg, set_usb2_phy, port 2 phy_reg 0xe2 set 0x4d get 0x4d
[uzu] dh den start(b8028518 = 6005b6)
[ehci], dbg, set_usb2_phy, port 1 phy_reg 0xe3 set 0xcd get 0xcd
[uzu] dv den start(b802851c = 130313)
[ehci], dbg, set_usb2_phy, port 2 phy_reg 0xe3 set 0xcd get 0xcd
[uzu] uzudtg control (b8028500 = 80000051)
[ehci], dbg, set_usb2_phy, port 1 phy_reg 0xe5 set 0x63 get 0x63
[memc] dvtotal(b8028604 = 325)
[ehci], dbg, set_usb2_phy, port 2 phy_reg 0xe5 set 0x63 get 0x63
[memc] dhtotal(b8028608 = 6170617)
[ehci], dbg, set_usb2_phy, port 1 phy_reg 0xf4 set 0xdb get 0xdb
[memc] dh den start(b802861c = 6005b6)
[ehci], dbg, set_usb2_phy, port 2 phy_reg 0xf4 set 0xdb get 0xdb
[memc] dv den start(b8028618 = 130313)
[ehci], dbg, set_usb2_phy, port 1 phy_reg 0xe6 set 0x53 get 0x53
[memc] uzudtg control (b8028100 = 50000)
[ehci], dbg, set_usb2_phy, port 2 phy_reg 0xe6 set 0x53 get 0x53
###### SFG_SFG_CTRL_0_reg : 0 ########
[ehci], dbg, set_usb2_phy, port 1 phy_reg 0xf4 set 0x9b get 0x9b
###### 1. 0xB802D9B8 : 0 ########
[ehci], dbg, set_usb2_phy, port 2 phy_reg 0xf4 set 0x9b get 0x9b
##### drvif_clock_set_dclk : 75400000 ###########
[ehci], dbg, set_usb2_phy, port 1 phy_reg 0xe4 set 0x6c get 0x6c

After Mapping (ulFreq:603200000) (div:8)======

[ehci], dbg, set_usb2_phy, port 2 phy_reg 0xe4 set 0x6c get 0x6c
dclk_Temp:670222
[ehci], dbg, set_usb2_phy, port 1 phy_reg 0xe7 set 0x81 get 0x81
nMCode:67, f_code:45
[ehci], dbg, set_usb2_phy, port 2 phy_reg 0xe7 set 0x81 get 0x81
Panel: ulFreq:603200000, nDPLL:0, Mcode:67, Ncode:3, offset:0
[ehci], dbg, set_usb2_phy, port 1 phy_reg 0xf4 set 0xbb get 0xbb

#### 0xb8000208[7e]
[ehci], dbg, set_usb2_phy, port 1 phy_reg 0xe0 set 0x23 get 0x23

#### [drvif_clock_set_dtg_uzu_div]
[ehci], dbg, set_usb2_phy, port 1 phy_reg 0xe0 set 0x27 get 0x27

#### 0xb8000208[400007e]
[ehci], dbg, set_usb2_phy, port 2 phy_reg 0xf4 set 0xbb get 0xbb

#### [drvif_clock_set_dtg_memc_div]
[ehci], dbg, set_usb2_phy, port 2 phy_reg 0xe0 set 0x23 get 0x23
=== Panel Type : 0 ===
[ehci], dbg, set_usb2_phy, port 2 phy_reg 0xe0 set 0x27 get 0x27
====284x panel_lvds_tx =====
[ehci], dbg, set_usb2_phy, port 1 phy_reg 0xf4 set 0x9b get 0x9b
=== Panel Index : 0 ===
[ehci], dbg, set_usb2_phy, port 2 phy_reg 0xf4 set 0x9b get 0x9b
[ehci], dbg, set_usb2_phy, port 1 phy_reg 0xe4 set 0x7c get 0x7c
[ehci], dbg, set_usb2_phy, port 2 phy_reg 0xe4 set 0x7c get 0x7c
[ehci], dbg, set_usb2_phy, port 1 phy_reg 0xe7 set 0x41 get 0x41
[ehci], dbg, set_usb2_phy, port 2 phy_reg 0xe7 set 0x41 get 0x41
[ehci], dbg, set_usb2_phy, port 1 phy_reg 0xe6 set 0x1 get 0x1
[ehci], dbg, set_usb2_phy, port 2 phy_reg 0xe6 set 0x1 get 0x1
[ehci], dbg, set_usb2_phy, port 1 phy_reg 0xf0 set 0xfc get 0xfc
[ehci], dbg, set_usb2_phy, port 2 phy_reg 0xf0 set 0xfc get 0xfc
[ehci], dbg, set_usb2_phy, port 1 phy_reg 0xf1 set 0x88 get 0x88
[ehci], dbg, set_usb2_phy, port 2 phy_reg 0xf1 set 0x88 get 0x88
[ehci], dbg, set_usb2_phy, port 1 phy_reg 0xf2 set 0x0 get 0x0
[ehci], dbg, set_usb2_phy, port 2 phy_reg 0xf2 set 0x0 get 0x0
[ehci], dbg, set_usb2_phy, port 1 phy_reg 0xf3 set 0x31 get 0x31
[ehci], dbg, set_usb2_phy, port 2 phy_reg 0xf3 set 0x31 get 0x31
[ehci], dbg, set_usb2_phy, port 1 phy_reg 0xf5 set 0x15 get 0x15
[ehci], dbg, set_usb2_phy, port 2 phy_reg 0xf5 set 0x15 get 0x15
[ehci], dbg, set_usb2_phy, port 1 phy_reg 0xf6 set 0x1 get 0x1
[ehci], dbg, set_usb2_phy, port 2 phy_reg 0xf6 set 0x1 get 0x1
[ehci], dbg, set_usb2_phy, port 1 phy_reg 0xf7 set 0xa get 0xa
[ehci], dbg, set_usb2_phy, port 2 phy_reg 0xf7 set 0xa get 0xa
[ehci], dbg, set_usb2_phy, port 1 phy_reg 0xf4 set 0xbb get 0xbb
[ehci], dbg, set_usb2_phy, port 1 phy_reg 0xe1 set 0x70 get 0x70
[ehci], dbg, set_usb2_phy, port 2 phy_reg 0xf4 set 0xbb get 0xbb
[ehci], dbg, set_usb2_phy, port 2 phy_reg 0xe1 set 0x70 get 0x70
[ehci], dbg, set_usb2_phy, port 1 phy_reg 0xe2 set 0x0 get 0x0
[ehci], dbg, set_usb2_phy, port 2 phy_reg 0xe2 set 0x0 get 0x0
[ehci], dbg, set_usb2_phy, port 1 phy_reg 0xe3 set 0x12 get 0x12
[ehci], dbg, set_usb2_phy, port 2 phy_reg 0xe3 set 0x12 get 0x12
[ehci], dbg, set_usb2_phy, port 1 phy_reg 0xe4 set 0x0 get 0x0
[ehci], dbg, set_usb2_phy, port 2 phy_reg 0xe4 set 0x0 get 0x0
[ehci], dbg, set_usb2_phy, port 1 phy_reg 0xe5 set 0xf get 0xf
[ehci], dbg, set_usb2_phy, port 2 phy_reg 0xe5 set 0xf get 0xf
[ehci], dbg, set_usb2_phy, port 1 phy_reg 0xe6 set 0x58 get 0x58
[ehci], dbg, set_usb2_phy, port 2 phy_reg 0xe6 set 0x58 get 0x58
[ehci], dbg, set_usb2_phy, port 1 phy_reg 0xe7 set 0xe3 get 0xe3
[ehci], dbg, set_usb2_phy, port 2 phy_reg 0xe7 set 0xe3 get 0xe3
[ehci], dbg, set_usb2_phy, port 1 phy_reg 0xf4 set 0xdb get 0xdb
[ehci], dbg, set_usb2_phy, port 2 phy_reg 0xf4 set 0xdb get 0xdb
[ehci], dbg, set_usb2_phy, port 1 phy_reg 0xe0 set 0xa8 get 0xa8
[ehci], dbg, set_usb2_phy, port 2 phy_reg 0xe0 set 0xa8 get 0xa8
[ehci], dbg, set_usb2_phy, port 1 phy_reg 0xe1 set 0x11 get 0x11
[ehci], dbg, set_usb2_phy, port 2 phy_reg 0xe1 set 0x11 get 0x11
[ehci], dbg, set_usb2_phy, port 1 phy_reg 0xe2 set 0xe3 get 0xe3
[ehci], dbg, set_usb2_phy, port 2 phy_reg 0xe2 set 0xe3 get 0xe3
[ehci], dbg, set_usb2_phy, port 1 phy_reg 0xe3 set 0xb8 get 0xb8
[ehci], dbg, set_usb2_phy, port 2 phy_reg 0xe3 set 0xb8 get 0xb8
[ehci], dbg, set_usb2_phy, port 1 phy_reg 0xe4 set 0x15 get 0x15
[ehci], dbg, set_usb2_phy, port 2 phy_reg 0xe4 set 0x15 get 0x15
[ehci], dbg, set_usb2_phy, port 1 phy_reg 0xe5 set 0x81 get 0x81
[ehci], dbg, set_usb2_phy, port 2 phy_reg 0xe5 set 0x81 get 0x81
[ehci], dbg, set_usb2_phy, port 1 phy_reg 0xf4 set 0x9b get 0x9b
[ehci], dbg, set_usb2_phy, port 2 phy_reg 0xf4 set 0x9b get 0x9b
[ehci], info, #@# usb2_phy_setting(310) ---
----------- ehci_usb_mac_init -----------
USB EHCI 1.00
scanning bus 0 for devices... 1 USB Device(s) found
USB1: ----------- ehci_hcd_init -----------
#@# ehci_hcd_init(404) ehci mac1
[ehci], info, #@# usb2_ex_phy_setting(315) +++ for usbphy setting 20170420
----------- _usb2_ex_load_phy_setting -----------
[ehci], dbg, set_usb2_ex_phy, port 1 phy_reg 0xe0 set 0xf get 0xf
[ehci], dbg, set_usb2_ex_phy, port 1 phy_reg 0xe1 set 0x18 get 0x18
[ehci], dbg, set_usb2_ex_phy, port 1 phy_reg 0xe2 set 0x4d get 0x4d
[ehci], dbg, set_usb2_ex_phy, port 1 phy_reg 0xe3 set 0xcd get 0xcd
[ehci], dbg, set_usb2_ex_phy, port 1 phy_reg 0xe5 set 0x63 get 0x63
[ehci], dbg, set_usb2_ex_phy, port 1 phy_reg 0xf4 set 0xdb get 0xdb
[ehci], warn, set_usb2_ex_phy, port 1 phy_reg 0xe6 set 0x53 get 0x58 <---- not
matched
[ehci], dbg, set_usb2_ex_phy, port 1 phy_reg 0xf4 set 0x9b get 0x9b
[ehci], dbg, set_usb2_ex_phy, port 1 phy_reg 0xe4 set 0x6c get 0x6c
[ehci], dbg, set_usb2_ex_phy, port 1 phy_reg 0xe7 set 0x81 get 0x81
[ehci], dbg, set_usb2_ex_phy, port 1 phy_reg 0xf4 set 0xbb get 0xbb
[ehci], dbg, set_usb2_ex_phy, port 1 phy_reg 0xe0 set 0x23 get 0x23
[ehci], dbg, set_usb2_ex_phy, port 1 phy_reg 0xe0 set 0x27 get 0x27
[ehci], dbg, set_usb2_ex_phy, port 1 phy_reg 0xf4 set 0x9b get 0x9b
[ehci], dbg, set_usb2_ex_phy, port 1 phy_reg 0xe4 set 0x7c get 0x7c
[ehci], dbg, set_usb2_ex_phy, port 1 phy_reg 0xe7 set 0x41 get 0x41
[ehci], dbg, set_usb2_ex_phy, port 1 phy_reg 0xe6 set 0x1 get 0x1
[ehci], dbg, set_usb2_ex_phy, port 1 phy_reg 0xf0 set 0xfc get 0xfc
[ehci], dbg, set_usb2_ex_phy, port 1 phy_reg 0xf1 set 0x88 get 0x88
[ehci], dbg, set_usb2_ex_phy, port 1 phy_reg 0xf2 set 0x0 get 0x0
[ehci], dbg, set_usb2_ex_phy, port 1 phy_reg 0xf3 set 0x31 get 0x31
[ehci], dbg, set_usb2_ex_phy, port 1 phy_reg 0xf5 set 0x15 get 0x15
[ehci], dbg, set_usb2_ex_phy, port 1 phy_reg 0xf6 set 0x1 get 0x1
[ehci], dbg, set_usb2_ex_phy, port 1 phy_reg 0xf7 set 0xa get 0xa
[ehci], dbg, set_usb2_ex_phy, port 1 phy_reg 0xf4 set 0xbb get 0xbb
[ehci], dbg, set_usb2_ex_phy, port 1 phy_reg 0xe1 set 0x70 get 0x70
[ehci], dbg, set_usb2_ex_phy, port 1 phy_reg 0xe2 set 0x0 get 0x0
[ehci], dbg, set_usb2_ex_phy, port 1 phy_reg 0xe3 set 0x12 get 0x12
[ehci], dbg, set_usb2_ex_phy, port 1 phy_reg 0xe4 set 0x0 get 0x0
[ehci], dbg, set_usb2_ex_phy, port 1 phy_reg 0xe5 set 0xf get 0xf
[ehci], dbg, set_usb2_ex_phy, port 1 phy_reg 0xe6 set 0x58 get 0x58
[ehci], dbg, set_usb2_ex_phy, port 1 phy_reg 0xe7 set 0xe3 get 0xe3
[ehci], dbg, set_usb2_ex_phy, port 1 phy_reg 0xf4 set 0xdb get 0xdb
[ehci], warn, set_usb2_ex_phy, port 1 phy_reg 0xe0 set 0xa8 get 0x27 <---- not
matched
[ehci], warn, set_usb2_ex_phy, port 1 phy_reg 0xe1 set 0x11 get 0x70 <---- not
matched
[ehci], warn, set_usb2_ex_phy, port 1 phy_reg 0xe2 set 0xe3 get 0x0 <---- not
matched
[ehci], warn, set_usb2_ex_phy, port 1 phy_reg 0xe3 set 0xb8 get 0x12 <---- not
matched
[ehci], warn, set_usb2_ex_phy, port 1 phy_reg 0xe4 set 0x15 get 0x0 <---- not
matched
[ehci], warn, set_usb2_ex_phy, port 1 phy_reg 0xe5 set 0x81 get 0xf <---- not
matched
[ehci], dbg, set_usb2_ex_phy, port 1 phy_reg 0xf4 set 0x9b get 0x9b
[ehci], info, #@# usb2_ex_phy_setting(317) ---
----------- ehci_usb_mac_init -----------
USB EHCI 1.00
scanning bus 1 for devices... 2 USB Device(s) found
scanning usb for storage devices... 0 Storage Device(s) found
1: Hub, USB Revision 2.0
- u-boot EHCI Host Controller
- Class: Hub
- PacketSize: 64 Configurations: 1
- Vendor: 0x0000 Product 0x0000 Version 1.0
Configuration: 1
- Interfaces: 1 Self Powered 0mA
Interface: 0
- Alternate Setting 0, Endpoints: 1
- Class Hub
- Endpoint 1 In Interrupt MaxPacket 8 Interval 255ms

2: Hub, USB Revision 2.0

- u-boot EHCI Host Controller
- Class: Hub
- PacketSize: 64 Configurations: 1
- Vendor: 0x0000 Product 0x0000 Version 1.0
Configuration: 1
- Interfaces: 1 Self Powered 0mA
Interface: 0
- Alternate Setting 0, Endpoints: 1
 - Class Hub
- Endpoint 1 In Interrupt MaxPacket 8 Interval 255ms

3: , USB Revision 2.10

- Realtek 802.11n WLAN Adapter 00e04c000001
- Class:
- PacketSize: 64 Configurations: 1
- Vendor: 0x0bda Product 0xb720 Version 2.0
Configuration: 1
- Interfaces: 3 Self Powered Remote Wakeup 500mA
Interface: 0
- Alternate Setting 0, Endpoints: 3
- Class
- String: "Bluetooth Radio"
- Endpoint 1 In Interrupt MaxPacket 16 Interval 4ms
- Endpoint 2 Out Bulk MaxPacket 512
- Endpoint 2 In Bulk MaxPacket 512
Interface: 1
- Alternate Setting 0, Endpoints: 2
- Class
- String: "Bluetooth Radio"
- Endpoint 3 Out Isochronous MaxPacket 0
- Endpoint 3 In Isochronous MaxPacket 0
- Endpoint 3 Out Isochronous MaxPacket 9
- Endpoint 3 In Isochronous MaxPacket 9
- Endpoint 3 Out Isochronous MaxPacket 17
- Endpoint 3 In Isochronous MaxPacket 17
- Endpoint 3 Out Isochronous MaxPacket 25
- Endpoint 3 In Isochronous MaxPacket 25
- Endpoint 3 Out Isochronous MaxPacket 33
- Endpoint 3 In Isochronous MaxPacket 33
- Endpoint 3 Out Isochronous MaxPacket 49
- Endpoint 3 In Isochronous MaxPacket 49
Interface: 2
- Alternate Setting 0, Endpoints: 6
- Class Vendor specific
- String: "802.11n WLAN Adapter"
- Endpoint 4 In Bulk MaxPacket 512
- Endpoint 5 Out Bulk MaxPacket 512
- Endpoint 6 Out Bulk MaxPacket 512
- Endpoint 7 In Interrupt MaxPacket 64 Interval 3ms
- Endpoint 8 Out Bulk MaxPacket 512
- Endpoint 9 Out Bulk MaxPacket 512

** Invalid boot device **

[WARN] check_usb_into_factory_mode:read install.img failed. (No such file)
stopping USB..
----------- usb2_clk_setting_off -----------
----------- usb2_clk_setting_off -----------

====== boot_ac_on=1 ======

(Re)start USB...
USB0: ----------- ehci_hcd_init -----------
#@# ehci_hcd_init(404) ehci mac0
----------- usb2_clk_setting_off -----------
----------- usb2_clk_setting_on -----------
----------- snps_reset_release -----------
----------- internal_ldo_on -----------
[ehci], info, #@# usb2_phy_setting(308) +++ for usbphy setting 20170420
[ehci], dbg, set_usb2_phy, port 1 phy_reg 0xe0 set 0xf get 0xf
[ehci], dbg, set_usb2_phy, port 2 phy_reg 0xe0 set 0xf get 0xf
[ehci], dbg, set_usb2_phy, port 1 phy_reg 0xe1 set 0x18 get 0x18
[ehci], dbg, set_usb2_phy, port 2 phy_reg 0xe1 set 0x18 get 0x18
[ehci], dbg, set_usb2_phy, port 1 phy_reg 0xe2 set 0x4d get 0x4d
[ehci], dbg, set_usb2_phy, port 2 phy_reg 0xe2 set 0x4d get 0x4d
[ehci], dbg, set_usb2_phy, port 1 phy_reg 0xe3 set 0xcd get 0xcd
[ehci], dbg, set_usb2_phy, port 2 phy_reg 0xe3 set 0xcd get 0xcd
[ehci], dbg, set_usb2_phy, port 1 phy_reg 0xe5 set 0x63 get 0x63
[ehci], dbg, set_usb2_phy, port 2 phy_reg 0xe5 set 0x63 get 0x63
[ehci], dbg, set_usb2_phy, port 1 phy_reg 0xf4 set 0xdb get 0xdb
[ehci], dbg, set_usb2_phy, port 2 phy_reg 0xf4 set 0xdb get 0xdb
[ehci], dbg, set_usb2_phy, port 1 phy_reg 0xe6 set 0x53 get 0x53
[ehci], dbg, set_usb2_phy, port 2 phy_reg 0xe6 set 0x53 get 0x53
[ehci], dbg, set_usb2_phy, port 1 phy_reg 0xf4 set 0x9b get 0x9b
[ehci], dbg, set_usb2_phy, port 2 phy_reg 0xf4 set 0x9b get 0x9b
[ehci], dbg, set_usb2_phy, port 1 phy_reg 0xe4 set 0x6c get 0x6c
[ehci], dbg, set_usb2_phy, port 2 phy_reg 0xe4 set 0x6c get 0x6c
[ehci], dbg, set_usb2_phy, port 1 phy_reg 0xe7 set 0x81 get 0x81
[ehci], dbg, set_usb2_phy, port 2 phy_reg 0xe7 set 0x81 get 0x81
[ehci], dbg, set_usb2_phy, port 1 phy_reg 0xf4 set 0xbb get 0xbb
[ehci], dbg, set_usb2_phy, port 1 phy_reg 0xe0 set 0x23 get 0x23
[ehci], dbg, set_usb2_phy, port 1 phy_reg 0xe0 set 0x27 get 0x27
[ehci], dbg, set_usb2_phy, port 2 phy_reg 0xf4 set 0xbb get 0xbb
[ehci], dbg, set_usb2_phy, port 2 phy_reg 0xe0 set 0x23 get 0x23
[ehci], dbg, set_usb2_phy, port 2 phy_reg 0xe0 set 0x27 get 0x27
[ehci], dbg, set_usb2_phy, port 1 phy_reg 0xf4 set 0x9b get 0x9b
[ehci], dbg, set_usb2_phy, port 2 phy_reg 0xf4 set 0x9b get 0x9b
[ehci], dbg, set_usb2_phy, port 1 phy_reg 0xe4 set 0x7c get 0x7c
[ehci], dbg, set_usb2_phy, port 2 phy_reg 0xe4 set 0x7c get 0x7c
[ehci], dbg, set_usb2_phy, port 1 phy_reg 0xe7 set 0x41 get 0x41
[ehci], dbg, set_usb2_phy, port 2 phy_reg 0xe7 set 0x41 get 0x41
[ehci], dbg, set_usb2_phy, port 1 phy_reg 0xe6 set 0x1 get 0x1
[ehci], dbg, set_usb2_phy, port 2 phy_reg 0xe6 set 0x1 get 0x1
[ehci], dbg, set_usb2_phy, port 1 phy_reg 0xf0 set 0xfc get 0xfc
[ehci], dbg, set_usb2_phy, port 2 phy_reg 0xf0 set 0xfc get 0xfc
[ehci], dbg, set_usb2_phy, port 1 phy_reg 0xf1 set 0x88 get 0x88
[ehci], dbg, set_usb2_phy, port 2 phy_reg 0xf1 set 0x88 get 0x88
[ehci], dbg, set_usb2_phy, port 1 phy_reg 0xf2 set 0x0 get 0x0
[ehci], dbg, set_usb2_phy, port 2 phy_reg 0xf2 set 0x0 get 0x0
[ehci], dbg, set_usb2_phy, port 1 phy_reg 0xf3 set 0x31 get 0x31
[ehci], dbg, set_usb2_phy, port 2 phy_reg 0xf3 set 0x31 get 0x31
[ehci], dbg, set_usb2_phy, port 1 phy_reg 0xf5 set 0x15 get 0x15
[ehci], dbg, set_usb2_phy, port 2 phy_reg 0xf5 set 0x15 get 0x15
[ehci], dbg, set_usb2_phy, port 1 phy_reg 0xf6 set 0x1 get 0x1
[ehci], dbg, set_usb2_phy, port 2 phy_reg 0xf6 set 0x1 get 0x1
[ehci], dbg, set_usb2_phy, port 1 phy_reg 0xf7 set 0xa get 0xa
[ehci], dbg, set_usb2_phy, port 2 phy_reg 0xf7 set 0xa get 0xa
[ehci], dbg, set_usb2_phy, port 1 phy_reg 0xf4 set 0xbb get 0xbb
[ehci], dbg, set_usb2_phy, port 1 phy_reg 0xe1 set 0x70 get 0x70
[ehci], dbg, set_usb2_phy, port 2 phy_reg 0xf4 set 0xbb get 0xbb
[ehci], dbg, set_usb2_phy, port 2 phy_reg 0xe1 set 0x70 get 0x70
[ehci], dbg, set_usb2_phy, port 1 phy_reg 0xe2 set 0x0 get 0x0
[ehci], dbg, set_usb2_phy, port 2 phy_reg 0xe2 set 0x0 get 0x0
[ehci], dbg, set_usb2_phy, port 1 phy_reg 0xe3 set 0x12 get 0x12
[ehci], dbg, set_usb2_phy, port 2 phy_reg 0xe3 set 0x12 get 0x12
[ehci], dbg, set_usb2_phy, port 1 phy_reg 0xe4 set 0x0 get 0x0
[ehci], dbg, set_usb2_phy, port 2 phy_reg 0xe4 set 0x0 get 0x0
[ehci], dbg, set_usb2_phy, port 1 phy_reg 0xe5 set 0xf get 0xf
[ehci], dbg, set_usb2_phy, port 2 phy_reg 0xe5 set 0xf get 0xf
[ehci], dbg, set_usb2_phy, port 1 phy_reg 0xe6 set 0x58 get 0x58
[ehci], dbg, set_usb2_phy, port 2 phy_reg 0xe6 set 0x58 get 0x58
[ehci], dbg, set_usb2_phy, port 1 phy_reg 0xe7 set 0xe3 get 0xe3
[ehci], dbg, set_usb2_phy, port 2 phy_reg 0xe7 set 0xe3 get 0xe3
[ehci], dbg, set_usb2_phy, port 1 phy_reg 0xf4 set 0xdb get 0xdb
[ehci], dbg, set_usb2_phy, port 2 phy_reg 0xf4 set 0xdb get 0xdb
[ehci], dbg, set_usb2_phy, port 1 phy_reg 0xe0 set 0xa8 get 0xa8
[ehci], dbg, set_usb2_phy, port 2 phy_reg 0xe0 set 0xa8 get 0xa8
[ehci], dbg, set_usb2_phy, port 1 phy_reg 0xe1 set 0x11 get 0x11
[ehci], dbg, set_usb2_phy, port 2 phy_reg 0xe1 set 0x11 get 0x11
[ehci], dbg, set_usb2_phy, port 1 phy_reg 0xe2 set 0xe3 get 0xe3
[ehci], dbg, set_usb2_phy, port 2 phy_reg 0xe2 set 0xe3 get 0xe3
[ehci], dbg, set_usb2_phy, port 1 phy_reg 0xe3 set 0xb8 get 0xb8
[ehci], dbg, set_usb2_phy, port 2 phy_reg 0xe3 set 0xb8 get 0xb8
[ehci], dbg, set_usb2_phy, port 1 phy_reg 0xe4 set 0x15 get 0x15
[ehci], dbg, set_usb2_phy, port 2 phy_reg 0xe4 set 0x15 get 0x15
[ehci], dbg, set_usb2_phy, port 1 phy_reg 0xe5 set 0x81 get 0x81
[ehci], dbg, set_usb2_phy, port 2 phy_reg 0xe5 set 0x81 get 0x81
[ehci], dbg, set_usb2_phy, port 1 phy_reg 0xf4 set 0x9b get 0x9b
[ehci], dbg, set_usb2_phy, port 2 phy_reg 0xf4 set 0x9b get 0x9b
[ehci], info, #@# usb2_phy_setting(310) ---
----------- ehci_usb_mac_init -----------
USB EHCI 1.00
scanning bus 0 for devices... 1 USB Device(s) found
USB1: ----------- ehci_hcd_init -----------
#@# ehci_hcd_init(404) ehci mac1
[ehci], info, #@# usb2_ex_phy_setting(315) +++ for usbphy setting 20170420
----------- _usb2_ex_load_phy_setting -----------
[ehci], dbg, set_usb2_ex_phy, port 1 phy_reg 0xe0 set 0xf get 0xf
[ehci], dbg, set_usb2_ex_phy, port 1 phy_reg 0xe1 set 0x18 get 0x18
[ehci], dbg, set_usb2_ex_phy, port 1 phy_reg 0xe2 set 0x4d get 0x4d
[ehci], dbg, set_usb2_ex_phy, port 1 phy_reg 0xe3 set 0xcd get 0xcd
[ehci], dbg, set_usb2_ex_phy, port 1 phy_reg 0xe5 set 0x63 get 0x63
[ehci], dbg, set_usb2_ex_phy, port 1 phy_reg 0xf4 set 0xdb get 0xdb
[ehci], warn, set_usb2_ex_phy, port 1 phy_reg 0xe6 set 0x53 get 0x58 <---- not
matched
[ehci], dbg, set_usb2_ex_phy, port 1 phy_reg 0xf4 set 0x9b get 0x9b
[ehci], dbg, set_usb2_ex_phy, port 1 phy_reg 0xe4 set 0x6c get 0x6c
[ehci], dbg, set_usb2_ex_phy, port 1 phy_reg 0xe7 set 0x81 get 0x81
[ehci], dbg, set_usb2_ex_phy, port 1 phy_reg 0xf4 set 0xbb get 0xbb
[ehci], dbg, set_usb2_ex_phy, port 1 phy_reg 0xe0 set 0x23 get 0x23
[ehci], dbg, set_usb2_ex_phy, port 1 phy_reg 0xe0 set 0x27 get 0x27
[ehci], dbg, set_usb2_ex_phy, port 1 phy_reg 0xf4 set 0x9b get 0x9b
[ehci], dbg, set_usb2_ex_phy, port 1 phy_reg 0xe4 set 0x7c get 0x7c
[ehci], dbg, set_usb2_ex_phy, port 1 phy_reg 0xe7 set 0x41 get 0x41
[ehci], dbg, set_usb2_ex_phy, port 1 phy_reg 0xe6 set 0x1 get 0x1
[ehci], dbg, set_usb2_ex_phy, port 1 phy_reg 0xf0 set 0xfc get 0xfc
[ehci], dbg, set_usb2_ex_phy, port 1 phy_reg 0xf1 set 0x88 get 0x88
[ehci], dbg, set_usb2_ex_phy, port 1 phy_reg 0xf2 set 0x0 get 0x0
[ehci], dbg, set_usb2_ex_phy, port 1 phy_reg 0xf3 set 0x31 get 0x31
[ehci], dbg, set_usb2_ex_phy, port 1 phy_reg 0xf5 set 0x15 get 0x15
[ehci], dbg, set_usb2_ex_phy, port 1 phy_reg 0xf6 set 0x1 get 0x1
[ehci], dbg, set_usb2_ex_phy, port 1 phy_reg 0xf7 set 0xa get 0xa
[ehci], dbg, set_usb2_ex_phy, port 1 phy_reg 0xf4 set 0xbb get 0xbb
[ehci], dbg, set_usb2_ex_phy, port 1 phy_reg 0xe1 set 0x70 get 0x70
[ehci], dbg, set_usb2_ex_phy, port 1 phy_reg 0xe2 set 0x0 get 0x0
[ehci], dbg, set_usb2_ex_phy, port 1 phy_reg 0xe3 set 0x12 get 0x12
[ehci], dbg, set_usb2_ex_phy, port 1 phy_reg 0xe4 set 0x0 get 0x0
[ehci], dbg, set_usb2_ex_phy, port 1 phy_reg 0xe5 set 0xf get 0xf
[ehci], dbg, set_usb2_ex_phy, port 1 phy_reg 0xe6 set 0x58 get 0x58
[ehci], dbg, set_usb2_ex_phy, port 1 phy_reg 0xe7 set 0xe3 get 0xe3
[ehci], dbg, set_usb2_ex_phy, port 1 phy_reg 0xf4 set 0xdb get 0xdb
[ehci], warn, set_usb2_ex_phy, port 1 phy_reg 0xe0 set 0xa8 get 0x27 <---- not
matched
[ehci], warn, set_usb2_ex_phy, port 1 phy_reg 0xe1 set 0x11 get 0x70 <---- not
matched
[ehci], warn, set_usb2_ex_phy, port 1 phy_reg 0xe2 set 0xe3 get 0x0 <---- not
matched
[ehci], warn, set_usb2_ex_phy, port 1 phy_reg 0xe3 set 0xb8 get 0x12 <---- not
matched
[ehci], warn, set_usb2_ex_phy, port 1 phy_reg 0xe4 set 0x15 get 0x0 <---- not
matched
[ehci], warn, set_usb2_ex_phy, port 1 phy_reg 0xe5 set 0x81 get 0xf <---- not
matched
[ehci], dbg, set_usb2_ex_phy, port 1 phy_reg 0xf4 set 0x9b get 0x9b
[ehci], info, #@# usb2_ex_phy_setting(317) ---
----------- ehci_usb_mac_init -----------
USB EHCI 1.00
scanning bus 1 for devices... 2 USB Device(s) found
scanning usb for storage devices... 0 Storage Device(s) found
1: Hub, USB Revision 2.0
- u-boot EHCI Host Controller
- Class: Hub
- PacketSize: 64 Configurations: 1
- Vendor: 0x0000 Product 0x0000 Version 1.0
Configuration: 1
- Interfaces: 1 Self Powered 0mA
Interface: 0
- Alternate Setting 0, Endpoints: 1
- Class Hub
- Endpoint 1 In Interrupt MaxPacket 8 Interval 255ms

2: Hub, USB Revision 2.0

- u-boot EHCI Host Controller
- Class: Hub
- PacketSize: 64 Configurations: 1
- Vendor: 0x0000 Product 0x0000 Version 1.0
Configuration: 1
- Interfaces: 1 Self Powered 0mA
Interface: 0
- Alternate Setting 0, Endpoints: 1
- Class Hub
- Endpoint 1 In Interrupt MaxPacket 8 Interval 255ms

3: , USB Revision 2.10

- Realtek 802.11n WLAN Adapter 00e04c000001
- Class:
- PacketSize: 64 Configurations: 1
- Vendor: 0x0bda Product 0xb720 Version 2.0
Configuration: 1
- Interfaces: 3 Self Powered Remote Wakeup 500mA
Interface: 0
- Alternate Setting 0, Endpoints: 3
- Class
- String: "Bluetooth Radio"
- Endpoint 1 In Interrupt MaxPacket 16 Interval 4ms
 - Endpoint 2 Out Bulk MaxPacket 512
- Endpoint 2 In Bulk MaxPacket 512
Interface: 1
- Alternate Setting 0, Endpoints: 2
- Class
- String: "Bluetooth Radio"
- Endpoint 3 Out Isochronous MaxPacket 0
- Endpoint 3 In Isochronous MaxPacket 0
- Endpoint 3 Out Isochronous MaxPacket 9
- Endpoint 3 In Isochronous MaxPacket 9
- Endpoint 3 Out Isochronous MaxPacket 17
- Endpoint 3 In Isochronous MaxPacket 17
- Endpoint 3 Out Isochronous MaxPacket 25
- Endpoint 3 In Isochronous MaxPacket 25
- Endpoint 3 Out Isochronous MaxPacket 33
- Endpoint 3 In Isochronous MaxPacket 33
- Endpoint 3 Out Isochronous MaxPacket 49
- Endpoint 3 In Isochronous MaxPacket 49
Interface: 2
- Alternate Setting 0, Endpoints: 6
- Class Vendor specific
- String: "802.11n WLAN Adapter"
- Endpoint 4 In Bulk MaxPacket 512
- Endpoint 5 Out Bulk MaxPacket 512
- Endpoint 6 Out Bulk MaxPacket 512
- Endpoint 7 In Interrupt MaxPacket 64 Interval 3ms
- Endpoint 8 Out Bulk MaxPacket 512
- Endpoint 9 Out Bulk MaxPacket 512

----------- usb2_clk_setting_off -----------

----------- usb2_clk_setting_off -----------
(Re)start USB...
USB0: ----------- ehci_hcd_init -----------
#@# ehci_hcd_init(404) ehci mac0
----------- usb2_clk_setting_off -----------
----------- usb2_clk_setting_on -----------
----------- snps_reset_release -----------
----------- internal_ldo_on -----------
[ehci], info, #@# usb2_phy_setting(308) +++ for usbphy setting 20170420
[ehci], dbg, set_usb2_phy, port 1 phy_reg 0xe0 set 0xf get 0xf
[ehci], dbg, set_usb2_phy, port 2 phy_reg 0xe0 set 0xf get 0xf
[ehci], dbg, set_usb2_phy, port 1 phy_reg 0xe1 set 0x18 get 0x18
[ehci], dbg, set_usb2_phy, port 2 phy_reg 0xe1 set 0x18 get 0x18
[ehci], dbg, set_usb2_phy, port 1 phy_reg 0xe2 set 0x4d get 0x4d
[ehci], dbg, set_usb2_phy, port 2 phy_reg 0xe2 set 0x4d get 0x4d
[ehci], dbg, set_usb2_phy, port 1 phy_reg 0xe3 set 0xcd get 0xcd
[ehci], dbg, set_usb2_phy, port 2 phy_reg 0xe3 set 0xcd get 0xcd
[ehci], dbg, set_usb2_phy, port 1 phy_reg 0xe5 set 0x63 get 0x63
[ehci], dbg, set_usb2_phy, port 2 phy_reg 0xe5 set 0x63 get 0x63
[ehci], dbg, set_usb2_phy, port 1 phy_reg 0xf4 set 0xdb get 0xdb
[ehci], dbg, set_usb2_phy, port 2 phy_reg 0xf4 set 0xdb get 0xdb
[ehci], dbg, set_usb2_phy, port 1 phy_reg 0xe6 set 0x53 get 0x53
[ehci], dbg, set_usb2_phy, port 2 phy_reg 0xe6 set 0x53 get 0x53
[ehci], dbg, set_usb2_phy, port 1 phy_reg 0xf4 set 0x9b get 0x9b
[ehci], dbg, set_usb2_phy, port 2 phy_reg 0xf4 set 0x9b get 0x9b
[ehci], dbg, set_usb2_phy, port 1 phy_reg 0xe4 set 0x6c get 0x6c
[ehci], dbg, set_usb2_phy, port 2 phy_reg 0xe4 set 0x6c get 0x6c
[ehci], dbg, set_usb2_phy, port 1 phy_reg 0xe7 set 0x81 get 0x81
[ehci], dbg, set_usb2_phy, port 2 phy_reg 0xe7 set 0x81 get 0x81
[ehci], dbg, set_usb2_phy, port 1 phy_reg 0xf4 set 0xbb get 0xbb
[ehci], dbg, set_usb2_phy, port 1 phy_reg 0xe0 set 0x23 get 0x23
[ehci], dbg, set_usb2_phy, port 1 phy_reg 0xe0 set 0x27 get 0x27
[ehci], dbg, set_usb2_phy, port 2 phy_reg 0xf4 set 0xbb get 0xbb
[ehci], dbg, set_usb2_phy, port 2 phy_reg 0xe0 set 0x23 get 0x23
[ehci], dbg, set_usb2_phy, port 2 phy_reg 0xe0 set 0x27 get 0x27
[ehci], dbg, set_usb2_phy, port 1 phy_reg 0xf4 set 0x9b get 0x9b
[ehci], dbg, set_usb2_phy, port 2 phy_reg 0xf4 set 0x9b get 0x9b
[ehci], dbg, set_usb2_phy, port 1 phy_reg 0xe4 set 0x7c get 0x7c
[ehci], dbg, set_usb2_phy, port 2 phy_reg 0xe4 set 0x7c get 0x7c
[ehci], dbg, set_usb2_phy, port 1 phy_reg 0xe7 set 0x41 get 0x41
[ehci], dbg, set_usb2_phy, port 2 phy_reg 0xe7 set 0x41 get 0x41
[ehci], dbg, set_usb2_phy, port 1 phy_reg 0xe6 set 0x1 get 0x1
[ehci], dbg, set_usb2_phy, port 2 phy_reg 0xe6 set 0x1 get 0x1
[ehci], dbg, set_usb2_phy, port 1 phy_reg 0xf0 set 0xfc get 0xfc
[ehci], dbg, set_usb2_phy, port 2 phy_reg 0xf0 set 0xfc get 0xfc
[ehci], dbg, set_usb2_phy, port 1 phy_reg 0xf1 set 0x88 get 0x88
[ehci], dbg, set_usb2_phy, port 2 phy_reg 0xf1 set 0x88 get 0x88
[ehci], dbg, set_usb2_phy, port 1 phy_reg 0xf2 set 0x0 get 0x0
[ehci], dbg, set_usb2_phy, port 2 phy_reg 0xf2 set 0x0 get 0x0
[ehci], dbg, set_usb2_phy, port 1 phy_reg 0xf3 set 0x31 get 0x31
[ehci], dbg, set_usb2_phy, port 2 phy_reg 0xf3 set 0x31 get 0x31
[ehci], dbg, set_usb2_phy, port 1 phy_reg 0xf5 set 0x15 get 0x15
[ehci], dbg, set_usb2_phy, port 2 phy_reg 0xf5 set 0x15 get 0x15
[ehci], dbg, set_usb2_phy, port 1 phy_reg 0xf6 set 0x1 get 0x1
[ehci], dbg, set_usb2_phy, port 2 phy_reg 0xf6 set 0x1 get 0x1
[ehci], dbg, set_usb2_phy, port 1 phy_reg 0xf7 set 0xa get 0xa
[ehci], dbg, set_usb2_phy, port 2 phy_reg 0xf7 set 0xa get 0xa
[ehci], dbg, set_usb2_phy, port 1 phy_reg 0xf4 set 0xbb get 0xbb
[ehci], dbg, set_usb2_phy, port 1 phy_reg 0xe1 set 0x70 get 0x70
[ehci], dbg, set_usb2_phy, port 2 phy_reg 0xf4 set 0xbb get 0xbb
[ehci], dbg, set_usb2_phy, port 2 phy_reg 0xe1 set 0x70 get 0x70
[ehci], dbg, set_usb2_phy, port 1 phy_reg 0xe2 set 0x0 get 0x0
[ehci], dbg, set_usb2_phy, port 2 phy_reg 0xe2 set 0x0 get 0x0
[ehci], dbg, set_usb2_phy, port 1 phy_reg 0xe3 set 0x12 get 0x12
[ehci], dbg, set_usb2_phy, port 2 phy_reg 0xe3 set 0x12 get 0x12
[ehci], dbg, set_usb2_phy, port 1 phy_reg 0xe4 set 0x0 get 0x0
[ehci], dbg, set_usb2_phy, port 2 phy_reg 0xe4 set 0x0 get 0x0
[ehci], dbg, set_usb2_phy, port 1 phy_reg 0xe5 set 0xf get 0xf
[ehci], dbg, set_usb2_phy, port 2 phy_reg 0xe5 set 0xf get 0xf
[ehci], dbg, set_usb2_phy, port 1 phy_reg 0xe6 set 0x58 get 0x58
[ehci], dbg, set_usb2_phy, port 2 phy_reg 0xe6 set 0x58 get 0x58
[ehci], dbg, set_usb2_phy, port 1 phy_reg 0xe7 set 0xe3 get 0xe3
[ehci], dbg, set_usb2_phy, port 2 phy_reg 0xe7 set 0xe3 get 0xe3
[ehci], dbg, set_usb2_phy, port 1 phy_reg 0xf4 set 0xdb get 0xdb
[ehci], dbg, set_usb2_phy, port 2 phy_reg 0xf4 set 0xdb get 0xdb
[ehci], dbg, set_usb2_phy, port 1 phy_reg 0xe0 set 0xa8 get 0xa8
[ehci], dbg, set_usb2_phy, port 2 phy_reg 0xe0 set 0xa8 get 0xa8
[ehci], dbg, set_usb2_phy, port 1 phy_reg 0xe1 set 0x11 get 0x11
[ehci], dbg, set_usb2_phy, port 2 phy_reg 0xe1 set 0x11 get 0x11
[ehci], dbg, set_usb2_phy, port 1 phy_reg 0xe2 set 0xe3 get 0xe3
[ehci], dbg, set_usb2_phy, port 2 phy_reg 0xe2 set 0xe3 get 0xe3
[ehci], dbg, set_usb2_phy, port 1 phy_reg 0xe3 set 0xb8 get 0xb8
[ehci], dbg, set_usb2_phy, port 2 phy_reg 0xe3 set 0xb8 get 0xb8
[ehci], dbg, set_usb2_phy, port 1 phy_reg 0xe4 set 0x15 get 0x15
[ehci], dbg, set_usb2_phy, port 2 phy_reg 0xe4 set 0x15 get 0x15
[ehci], dbg, set_usb2_phy, port 1 phy_reg 0xe5 set 0x81 get 0x81
[ehci], dbg, set_usb2_phy, port 2 phy_reg 0xe5 set 0x81 get 0x81
[ehci], dbg, set_usb2_phy, port 1 phy_reg 0xf4 set 0x9b get 0x9b
[ehci], dbg, set_usb2_phy, port 2 phy_reg 0xf4 set 0x9b get 0x9b
[ehci], info, #@# usb2_phy_setting(310) ---
----------- ehci_usb_mac_init -----------
USB EHCI 1.00
scanning bus 0 for devices... 1 USB Device(s) found
USB1: ----------- ehci_hcd_init -----------
#@# ehci_hcd_init(404) ehci mac1
[ehci], info, #@# usb2_ex_phy_setting(315) +++ for usbphy setting 20170420
----------- _usb2_ex_load_phy_setting -----------
[ehci], dbg, set_usb2_ex_phy, port 1 phy_reg 0xe0 set 0xf get 0xf
[ehci], dbg, set_usb2_ex_phy, port 1 phy_reg 0xe1 set 0x18 get 0x18
[ehci], dbg, set_usb2_ex_phy, port 1 phy_reg 0xe2 set 0x4d get 0x4d
[ehci], dbg, set_usb2_ex_phy, port 1 phy_reg 0xe3 set 0xcd get 0xcd
[ehci], dbg, set_usb2_ex_phy, port 1 phy_reg 0xe5 set 0x63 get 0x63
[ehci], dbg, set_usb2_ex_phy, port 1 phy_reg 0xf4 set 0xdb get 0xdb
[ehci], warn, set_usb2_ex_phy, port 1 phy_reg 0xe6 set 0x53 get 0x58 <---- not
matched
[ehci], dbg, set_usb2_ex_phy, port 1 phy_reg 0xf4 set 0x9b get 0x9b
[ehci], dbg, set_usb2_ex_phy, port 1 phy_reg 0xe4 set 0x6c get 0x6c
[ehci], dbg, set_usb2_ex_phy, port 1 phy_reg 0xe7 set 0x81 get 0x81
[ehci], dbg, set_usb2_ex_phy, port 1 phy_reg 0xf4 set 0xbb get 0xbb
[ehci], dbg, set_usb2_ex_phy, port 1 phy_reg 0xe0 set 0x23 get 0x23
[ehci], dbg, set_usb2_ex_phy, port 1 phy_reg 0xe0 set 0x27 get 0x27
[ehci], dbg, set_usb2_ex_phy, port 1 phy_reg 0xf4 set 0x9b get 0x9b
[ehci], dbg, set_usb2_ex_phy, port 1 phy_reg 0xe4 set 0x7c get 0x7c
[ehci], dbg, set_usb2_ex_phy, port 1 phy_reg 0xe7 set 0x41 get 0x41
[ehci], dbg, set_usb2_ex_phy, port 1 phy_reg 0xe6 set 0x1 get 0x1
[ehci], dbg, set_usb2_ex_phy, port 1 phy_reg 0xf0 set 0xfc get 0xfc
[ehci], dbg, set_usb2_ex_phy, port 1 phy_reg 0xf1 set 0x88 get 0x88
[ehci], dbg, set_usb2_ex_phy, port 1 phy_reg 0xf2 set 0x0 get 0x0
[ehci], dbg, set_usb2_ex_phy, port 1 phy_reg 0xf3 set 0x31 get 0x31
[ehci], dbg, set_usb2_ex_phy, port 1 phy_reg 0xf5 set 0x15 get 0x15
[ehci], dbg, set_usb2_ex_phy, port 1 phy_reg 0xf6 set 0x1 get 0x1
[ehci], dbg, set_usb2_ex_phy, port 1 phy_reg 0xf7 set 0xa get 0xa
[ehci], dbg, set_usb2_ex_phy, port 1 phy_reg 0xf4 set 0xbb get 0xbb
[ehci], dbg, set_usb2_ex_phy, port 1 phy_reg 0xe1 set 0x70 get 0x70
[ehci], dbg, set_usb2_ex_phy, port 1 phy_reg 0xe2 set 0x0 get 0x0
[ehci], dbg, set_usb2_ex_phy, port 1 phy_reg 0xe3 set 0x12 get 0x12
[ehci], dbg, set_usb2_ex_phy, port 1 phy_reg 0xe4 set 0x0 get 0x0
[ehci], dbg, set_usb2_ex_phy, port 1 phy_reg 0xe5 set 0xf get 0xf
[ehci], dbg, set_usb2_ex_phy, port 1 phy_reg 0xe6 set 0x58 get 0x58
[ehci], dbg, set_usb2_ex_phy, port 1 phy_reg 0xe7 set 0xe3 get 0xe3
[ehci], dbg, set_usb2_ex_phy, port 1 phy_reg 0xf4 set 0xdb get 0xdb
[ehci], warn, set_usb2_ex_phy, port 1 phy_reg 0xe0 set 0xa8 get 0x27 <---- not
matched
[ehci], warn, set_usb2_ex_phy, port 1 phy_reg 0xe1 set 0x11 get 0x70 <---- not
matched
[ehci], warn, set_usb2_ex_phy, port 1 phy_reg 0xe2 set 0xe3 get 0x0 <---- not
matched
[ehci], warn, set_usb2_ex_phy, port 1 phy_reg 0xe3 set 0xb8 get 0x12 <---- not
matched
[ehci], warn, set_usb2_ex_phy, port 1 phy_reg 0xe4 set 0x15 get 0x0 <---- not
matched
[ehci], warn, set_usb2_ex_phy, port 1 phy_reg 0xe5 set 0x81 get 0xf <---- not
matched
[ehci], dbg, set_usb2_ex_phy, port 1 phy_reg 0xf4 set 0x9b get 0x9b
[ehci], info, #@# usb2_ex_phy_setting(317) ---
----------- ehci_usb_mac_init -----------
USB EHCI 1.00
scanning bus 1 for devices... 2 USB Device(s) found
scanning usb for storage devices... 0 Storage Device(s) found
1: Hub, USB Revision 2.0
- u-boot EHCI Host Controller
- Class: Hub
- PacketSize: 64 Configurations: 1
- Vendor: 0x0000 Product 0x0000 Version 1.0
Configuration: 1
- Interfaces: 1 Self Powered 0mA
Interface: 0
- Alternate Setting 0, Endpoints: 1
- Class Hub
- Endpoint 1 In Interrupt MaxPacket 8 Interval 255ms

2: Hub, USB Revision 2.0

- u-boot EHCI Host Controller
- Class: Hub
- PacketSize: 64 Configurations: 1
- Vendor: 0x0000 Product 0x0000 Version 1.0
Configuration: 1
- Interfaces: 1 Self Powered 0mA
Interface: 0
- Alternate Setting 0, Endpoints: 1
- Class Hub
- Endpoint 1 In Interrupt MaxPacket 8 Interval 255ms

3: , USB Revision 2.10

- Realtek 802.11n WLAN Adapter 00e04c000001
- Class:
- PacketSize: 64 Configurations: 1
- Vendor: 0x0bda Product 0xb720 Version 2.0
Configuration: 1
- Interfaces: 3 Self Powered Remote Wakeup 500mA
Interface: 0
- Alternate Setting 0, Endpoints: 3
- Class
- String: "Bluetooth Radio"
- Endpoint 1 In Interrupt MaxPacket 16 Interval 4ms
- Endpoint 2 Out Bulk MaxPacket 512
- Endpoint 2 In Bulk MaxPacket 512
Interface: 1
- Alternate Setting 0, Endpoints: 2
- Class
- String: "Bluetooth Radio"
- Endpoint 3 Out Isochronous MaxPacket 0
- Endpoint 3 In Isochronous MaxPacket 0
- Endpoint 3 Out Isochronous MaxPacket 9
- Endpoint 3 In Isochronous MaxPacket 9
- Endpoint 3 Out Isochronous MaxPacket 17
- Endpoint 3 In Isochronous MaxPacket 17
- Endpoint 3 Out Isochronous MaxPacket 25
- Endpoint 3 In Isochronous MaxPacket 25
- Endpoint 3 Out Isochronous MaxPacket 33
- Endpoint 3 In Isochronous MaxPacket 33
- Endpoint 3 Out Isochronous MaxPacket 49
- Endpoint 3 In Isochronous MaxPacket 49
Interface: 2
- Alternate Setting 0, Endpoints: 6
- Class Vendor specific
 - String: "802.11n WLAN Adapter"
- Endpoint 4 In Bulk MaxPacket 512
- Endpoint 5 Out Bulk MaxPacket 512
- Endpoint 6 Out Bulk MaxPacket 512
- Endpoint 7 In Interrupt MaxPacket 64 Interval 3ms
- Endpoint 8 Out Bulk MaxPacket 512
- Endpoint 9 Out Bulk MaxPacket 512

** Invalid boot device **

ac_on_update_mac_address
ac_on_update_CI_key:2733
cikey.bin exist! No need CI key again!
ac_on_update_hdcp_key:2612
Error: reading boot sector
first_HDCP:
reading hdcpwrited.used
Error: reading boot sector
hdcp_file_name=HDCP/
reading HDCP/
Error: reading boot sector
read HDCP file fail
ac_on_update_hdcp_key22:2672
Error: reading boot sector
first_HDCP:
reading hdcp2writed.used
Error: reading boot sector
hdcp_file_name=HDCP2/
reading HDCP2/
Error: reading boot sector
read HDCP2 file fail
stopping USB..
----------- usb2_clk_setting_off -----------
----------- usb2_clk_setting_off -----------

Core IDDQ = 50 mA
IDDQ / High VID, and Core IDDQ= 50
Start Boot Setup ...
s_cmdline(0) = ""
s_cmdline(0) = ""
s_cmdline(0) = ""
FW Table to 0x0e900000, size=0x00000800 (0x0e900800)
FW Table fr 0x03800000, fw count: 50
[OK] fw_entry[0] offset = 0x8000 length = 0x1712100 (paddings = 0x1c00000) act_size
= 0 part_num = 0
[OK] fw_entry[1] offset = 0x1c08000 length = 0x21bf30 (paddings = 0x500000)
act_size = 0 part_num = 0
[OK] fw_entry[2] offset = 0x2108000 length = 0x3509b0 (paddings = 0x600000)
act_size = 0 part_num = 0
[OK] fw_entry[3] offset = 0x2708000 length = 0x58ca8 (paddings = 0xc00000) act_size
= 0 part_num = 0
[OK] fw_entry[4] offset = 0x3308000 length = 0x2a3000 (paddings = 0x2a3000)
act_size = 0 part_num = 0
Normal boot fw follow...
Linux Kernel:
FW Image to 0x00108000, size=0x01712100 (0x0181a100)
FW Image fr 0x03808000 (non-lzma)
Audio FW 1:
 FW Image to 0xdeaddead, size=0x0021bf30 (0xdecf9ddd)
FW Image fr 0x05408000 (non-lzma)
Enter standby, skip this entry
Video FW 1:
FW Image to 0xdeaddead, size=0x003509b0 (0xdee2e85d)
FW Image fr 0x05908000 (non-lzma)
Enter standby, skip this entry
TEE FW target_addr = 0x16008000
KCPU FW:
(skip)
show raw video raw file ddr 0x84f00000 len 0x302a00
FW Image to 0x84f00000, size=0x002a3000 (0x851a3000)
FW Image fr 0x06b08000 (non-lzma)
Enter standby, skip this entry
======================================================
the first 32-byte encrypted data(base=0x0b000000)
000 : c0 c2 58 bb d8 b1 1a cf fc 6d 23 4f 02 d4 d7 b7
010 : b4 80 c4 9a d6 77 24 4c 3f 92 79 0e 1f 45 84 9d
======================================================
the first 32-byte decrypted data(base=0x00108000)
000 : b0 4f 10 ee 01 5c 04 e2 01 0c 55 e3 04 00 00 0a
010 : 03 40 04 e2 00 00 54 e3 16 00 00 0a 01 00 54 e3
sw sha256 ret 0

==== IO_Set(PIN_AMP_MUTE, 0); $

Hello world, 284x!{uni}[WEI]
svn: (Feb 20 2019 13:46:52)
flash_type = 2, secure_type = 2
b8062204=0
Auth Key is Ready![go kb]KRRRROOOONNRNRUNRU"U#U$

U-Boot 2012.07-branches/SQY/2831_Hikeen_1222_SVN9254/bootcode-svn14933 (Feb 20 2019

- 13:47:42) r-

Mac Address use 7c:82:74:35:7e:df in factory_ro

[ENV] Writing to Factory...
factory_tarsize = 0x331200
[FAC] factory_save: MMC
[FAC] Save to eMMC (blk#:0x10000, buf:0x23900000, len:0x331400)
[FAC] Save to eMMC (seq#:0x19c, pp:0)
done
Factory Address:0x2000000, Size:0x800000!
Factory Read Only Address:0x1800000, Size:0x400000!

anel_filename NULL>>>>>>>>>>
==== James panel000 env_panel_set_default line:293 file=env_panel.c
panel_select=<NULL>Panel: SD_panel_VESA_VFLIP.h
logbuf fifo[0] [buffer=1ca0e000], [size=10000]
logbuf fifo[1] [buffer=1ca1e000], [size=2000]
logbuf fifo[2] [buffer=1ca20000], [size=10000]
logbuf fifo[3] [buffer=1ca30000], [size=10000]
logbuf fifo[4] [buffer=1ca40000], [size=10000]
logbuf fifo[5] [buffer=1ca50000], [size=20000]
logbuf fifo[6] [buffer=1ca70000], [size=10000]
SCPU2: BISR hold remap
SCPU2: BISR ok 0
In: serial
Out: serial
Err: serial
Net: r8168: REALTEK RTL8168 @0x18016000
panel_init_1st 0529_1022
Hit Esc or Tab key to enter console mode or rescue linux: 0
Core IDDQ = 50 mA
IDDQ / High VID, and Core IDDQ= 50
Start Boot Setup ...
s_cmdline(0) = ""
s_cmdline(0) = ""
s_cmdline(0) = ""
FW Table to 0x0e900000, size=0x00000800 (0x0e900800)
FW Table fr 0x03800000, fw count: 50
[OK] fw_entry[0] offset = 0x8000 length = 0x1712100 (paddings = 0x1c00000) act_size
= 0 part_num = 0
[OK] fw_entry[1] offset = 0x1c08000 length = 0x21bf30 (paddings = 0x500000)
act_size = 0 part_num = 0
[OK] fw_entry[2] offset = 0x2108000 length = 0x3509b0 (paddings = 0x600000)
act_size = 0 part_num = 0
Disp HTotal=1559, Htotal 4x alignment=1559
[OK] fw_entry[3] offset = 0x2708000 length = 0x58ca8 (paddings = 0xc00000) act_size
= 0 part_num = 0
den_h_start=96, den_h_end=1462
[OK] fw_entry[4] offset = 0x3308000 length = 0x2a3000 (paddings = 0x2a3000)
act_size = 0 part_num = 0
[uzu] dvtotal(b8028504 = 325)
Normal boot fw follow...
[uzu] dhtotal(b8028508 = 6170617)
Linux Kernel:
[uzu] dh den start(b8028518 = 6005b6)
FW Image to 0x00108000, size=0x01712100 (0x0181a100)
[uzu] dv den start(b802851c = 130313)
FW Image fr 0x03808000 (non-lzma)
[uzu] uzudtg control (b8028500 = 80000051)
Audio FW 1:
[memc] dvtotal(b8028604 = 325)
FW Image to 0x9a500000, size=0x0021bf30 (0x9a71bf30)
[memc] dhtotal(b8028608 = 6170617)
FW Image fr 0x05408000 (non-lzma)
[memc] dh den start(b802861c = 6005b6)
[memc] dv den start(b8028618 = 130313)
[memc] uzudtg control (b8028100 = 50000)
###### SFG_SFG_CTRL_0_reg : 0 ########
###### 1. 0xB802D9B8 : 0 ########
##### drvif_clock_set_dclk : 75400000 ###########

After Mapping (ulFreq:603200000) (div:8)======

dclk_Temp:670222
nMCode:67, f_code:45
Panel: ulFreq:603200000, nDPLL:0, Mcode:67, Ncode:3, offset:0

#### 0xb8000208[7e]

#### [drvif_clock_set_dtg_uzu_div]

#### 0xb8000208[400007e]

#### [drvif_clock_set_dtg_memc_div]
=== Panel Type : 0 ===
====284x panel_lvds_tx =====
=== Panel Index : 0 ===
======================================================
panel_init_2nd
the first 32-byte encrypted data(base=0x0b000000)
pwm_freq_hz = 25000
000 :rtk_hw_get_divider M_best:0 N_best:3 freq:25000 totalcnt:269 duty_max:255
e5M = 0x0
e1N = 0x3
db reg 0x1801bc88=0x80000003
64 reg 0x1801bc8c=0x10d010d
73 reg 0x1801bc84=0x60000000
b3 4c 47 7a 1f 3d e1 b6 2e 9b 44
010 : d0 59 86 0b 68 30 96 73 66 80 f5 38 4e 71 30 fe
======================================================
the first 32-byte decrypted data(base=0x1a500000)
000 : 10 00 00 63 00 00 00 00 10 00 00 61 00 00 00 00
010 : 5f 5f 67 68 73 65 6e 64 5f 62 73 73 9a 73 25 ea
sw sha256 ret 0
Video FW 1:
FW Image to 0x9a900000, size=0x003509b0 (0x9ac509b0)
FW Image fr 0x05908000 (non-lzma)
======================================================
@@@[panel.c][1064][setPanel_sequence] (0xb8061930) = 0x00000000
the first 32-byte encrypted data(base=0x0b000000)
rtc wakeup: isRtcWakeUp=0
000 : 62 54 d4 0f 8a 20 cf ba aa ab c6 a6 2b 4b d8 39
010 : 8d 24 08 f5 81 f2 c3 19 a5 ea 7c 9f 87 f6 9f 40
======================================================
the first 32-byte decrypted data(base=0x1a900000)
000 : 10 00 00 63 00 00 00 00 10 00 00 61 00 00 00 00
010 : 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
sw sha256 ret 0
TEE FW target_addr = 0x16008000
KCPU FW:
(skip)
show raw video raw file ddr 0x84f00000 len 0x302a00
FW Image to 0x84f00000, size=0x002a3000 (0x851a3000)
FW Image fr 0x06b08000 (non-lzma)
GDMA: init with addr =051a3000
GDMA_init_module, 1st onlineProgDone=0x4f
GDMA_init_module, 1st passed
GDMA_init_module, 2nd onlineProgDone=0x4f
GDMA_init_module, 2nd passed
GDMA module_init finish
Hold HW semaphore
Await bypass unmute
ACPU1: BISR testing ....
ACPU1 BISR status: ok
Release HW semaphore
A1go [ADSP] bf [SB2_INSTAT] = 0x00000000
[ADSP] af [SB2_INSTAT] = 0x00000000
[ADSP]
[ADSP] -------------------
[ADSP] Audio Version = 1011824 (mac5p)
[ADSP] SHA-1: da3db7a
[ADSP] Common Version = 1000850
[ADSP] SHA-1: 273a907
[ADSP] Binary src compiled at Aug 3 2018 14:01:40
[ADSP] Note = SQA_DailyBuild
[ADSP] -------------------
HDMI Raw Enable: MPG AC3 DTS MPEG2 AAC DDP WMAPRO MLP

SPDIF Raw Enable: MPG AC3 DTS MPEG2 AAC DDP WMAPRO MLP
[ADSP] __imem_text_start = 0x9a650000, size = 3904
[ADSP] [BOOT_AIO] shared-mem = 0xa0001030
[ADSP] [BOOT_AIO] magic_num = 0x24520000
[ADSP] [BOOT_AIO] version_code = 0x00000004
ADSP] [BOOT_AIO] PASHSo!l d mHagWi cs_enmuamphboerr e=
1 E0nxab2l45e2 0V0C0P0U
[
0AVwait DVSCPPU]1 :[B OBOITS_RA tIOe]s[t1i]n g 0..x0.0.0
0050V
[APDUS1P B] I[SBRO OsTt_aAtuIsO]:[ 2ok]
0Rxe0le0a0s0e0 0H00W
]s[eAmDaSPp]h o[rBeO aOgTa_AiInO
V1go [3] 0x00000048
[E[ArDiScP]][F [WB]O dOiTs_Ap_IOi]n[itS ] cWlaosren inirg!q BeonaobtCleod e
0x'2on0f0i00g0 we9on
t be apply
[ADSP] [BOOT_AIO][PATH] get info from bootcode!
[ADSP] [BOOT_AIO][PATH] src_sel_headphone = 0x00000001
[ADSP] [BOOT_AIO][PATH] src_sel_aio1 = 0x00000001
[ADSP] [BOOT_AIO][PATH] src_sel_aio2 = 0x00000f40
[ADSP] [BOOT_AIO][POW] use default setting( 0x000003fc)!
[ADSP] [BOOT_AIO][DVC] use default setting!
[ADSP] [BOOT_AIO][DAC] dac0 source = 0x00000003
[ADSP] [BOOT_AIO][DAC] dac1 source = 0x00000003
[ADSP] af:mt 0x0000003f
[ADSP] af:mt 0x0000003f
[ADSP] af:mt 0x0000003f
[ADSP] af:mt 0x0000003f
[ADSP] af:mt 0x0000003f
[ADSP] [WARNING] There is no AIO2 in mac5p, skip aio2 depop1
[ADSP] DAC0 pcm source=3
[ADSP] DAC1 pcm source=3
[ADSP] [AIO][SPDIFO_0] reg= 0xc1800000
[ADSP] [AIO][SPDIFO_0] reg= 0x02800000
[ADSP] [SPDIF] NOISE_PROTECTION, disable SPDIF output
[ADSP] [AIO][SPDIFO_1] reg= 0xc1800000
[ADSP] [AIO][SPDIFO_1] reg= 0x02800000
[ADSP] af:umt 0x0000003f
[ADSP] [ao_Init] ver_magic
[ADSP] [AIO] SPDIF0-O: TS_AF_DVC
[ADSP] [AIO] SPDIF1-O: TS_AF_DVC
[ADSP] [AIO] I2S-O : PB_AF_AVC2
[ADSP] [AIO] DAC0 : PB_AF_AVC2
[ADSP] [AIO] DAC1 : PB_AF_AVC2
[ADSP] [PowerOnMusic] No Power On Music
======================================================
the first 32-byte encrypted data(base=0x0b000000)
000 : c0 c2 58 bb d8 b1 1a cf fc 6d 23 4f 02 d4 d7 b7
010 : b4 80 c4 9a d6 77 24 4c 3f 92 79 0e 1f 45 84 9d
======================================================
the first 32-byte decrypted data(base=0x00108000)
000 : b0 4f 10 ee 01 5c 04 e2 01 0c 55 e3 04 00 00 0a
010 : 03 40 04 e2 00 00 54 e3 16 00 00 0a 01 00 54 e3
sw sha256 ret 0
==== IO_Set(PIN_AMP_MUTE, 0); $