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Lab 10

The document describes a circuit designed to display a repeating heartbeat pattern on a four-digit seven-segment display at 72 Hz. The circuit uses a new clock module to generate a clock signal at the target frequency from the main clock input. A heartbeat module then uses this clock to toggle the segment display between two patterns and multiplex the digit enable lines to show the animation on the four digits. The code provided implements this design and its operation is verified on a prototyping board.

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Muazam Malik
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29 views2 pages

Lab 10

The document describes a circuit designed to display a repeating heartbeat pattern on a four-digit seven-segment display at 72 Hz. The circuit uses a new clock module to generate a clock signal at the target frequency from the main clock input. A heartbeat module then uses this clock to toggle the segment display between two patterns and multiplex the digit enable lines to show the animation on the four digits. The code provided implements this design and its operation is verified on a prototyping board.

Uploaded by

Muazam Malik
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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Lab title:

We want to create a "heartbeat" for the prototyping board. It repeats the simple
pattern in the four-digit seven-segment display, at a rate of 72 Hz. Design the
circuit and verify its operation on the prototyping board.

Code:

module heartbeat( ctrl<=0;


input clk, end always@*
output [6:0]sseg, begin case(ctrl)
output [3:0]en 0:
); Begin
wire clk_out; en=4'b1011;
new_clk one(clk,clk_out); sseg=7'b1111001;
heartbeats end
two(clk_out,sseg,en); 1:
endmodule Begin
//New Clock module en=4'b1101;
module new_clk( sseg=7'b1001111;
input clk, end
output reg new_clk 2:
); begin
reg [19:0]counter; en=4'b1011;
always@(posedge clk) sseg=7'b1001111;
begin end
counter<=counter+1; 3:
if(counter==694445) begin
begin en=4'b1101;
new_clk<=~new_clk; sseg=7'b1111001;
counter <= 0; end
end 4:
end begin
endmodule en=4'b0111;
//heart beat module sseg=7'b1001111;
module heartbeats( end
input clk, default :
output reg [6:0] sseg, begin en=4'b1110;
output reg [3:0] en sseg=7'b1111001;
); end
reg [3:0]ctrl; endcase
always@(posedge clk) end
begin ctrl<= ctrl+1; endmodule
if(ctrl == 6)
Results:

Conclusion:
From this lab, we have created a pattern of a heartbeat as shown in the results.

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