12

9 The table shows assembly language instructions for a processor which has one general purpose
register, the Accumulator (ACC) and an index register (IX).

Instruction
Explanation

Op code Operand

LDD <address> Direct addressing. Load the contents of the given address to ACC.

LDX <address> Indexed addressing. Form the address from <address> + the contents of the
index register. Copy the contents of this calculated address to ACC.
STO <address> Store contents of ACC at the given address.

ADD <address> Add the contents of the given address to ACC.

INC <register> Add 1 to the contents of the register (ACC or IX).

DEC <register> Subtract 1 from the contents of the register (ACC or IX).

CMP <address> Compare contents of ACC with contents of <address>.

JPE <address> Following a compare instruction, jump to <address> if the compare was True.

JPN <address> Following a compare instruction, jump to <address> if the compare was
False.
JMP <address> Jump to the given address.

OUT Output to screen the character whose ASCII value is stored in ACC.

END Return control to the operating system.

(a) The diagram shows the current contents of a section of main memory and the index register:

60 0011 0010
61 0101 1101
62 0000 0100
63 1111 1001
64 0101 0101
65 1101 1111
66 0000 1101
67 0100 1101
68 0100 0101
69 0100 0011
...
1000 0110 1001

Index register: 0 0 0 0 1 0 0 0

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(i) Show the contents of the Accumulator after the execution of the instruction:

LDX 60

Accumulator:

Show how you obtained your answer.

...........................................................................................................................................

...........................................................................................................................................

...........................................................................................................................................

.......................................................................................................................................[2]

(ii) Show the contents of the index register after the execution of the instruction:

DEC IX

Index register:
[1]

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 14

(b) Complete the trace table on the opposite page for the following assembly language program.

50 LDD 100

51 ADD 102

52 STO 103

53 LDX 100

54 ADD 100

55 CMP 101

56 JPE 58

57 JPN 59

58 OUT

59 INC IX

60 LDX 98

61 ADD 101

62 OUT

63 END

...

100 20

101 100

102 1

103 0

IX (Index Register) 1

Selected values from the ASCII character set:

ASCII Code 118 119 120 121 122 123 124 125
Character v w x y z { | }

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Trace table:

Memory address
Instruction Working ACC IX OUTPUT
address space 100 101 102 103

20 100 1 0 1

50

51

52

53

54

55

[7]

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 Page 9 Mark Scheme Syllabus Paper
Cambridge International AS/A Level – May/June 2016 9608 11

9 (a) (i) One mark for the contents of the accumulator and one mark for the reason. [2]

Accumulator contents: 0100 0101

Reason:

Address is 60
Contents of the index register is 8
And 60 + 8 = 68 in denary gives the address
The contents of which is 0100 0101 in binary.

(ii) 0000 0111 [1]

© Cambridge International Examinations 2016

Page 10 Mark Scheme Syllabus Paper
Cambridge International AS/A Level – May/June 2016 9608 11

(b)

Memory address
Instruction Working OUTPUT
IX
address space ACC
100 101 102 103

20 100 1 0 1

50 20

51 21

52 21

53 100

54 120

55

56

57

59 2

60 20

61 120

62 'x'

63

One mark for each shaded block. [7]

• Contents of the Accumulator in first 2 lines (instruction addresses 50 and 51)

• Updating address 103 (instruction 52)
• Loading the Accumulator and addition (instructions 53 and 54)
• Not executing instruction 58
• Incrementing the index register (instruction 59)
• Loading the Accumulator and addition (instructions 60 and 61)
• Correct output of 'x' (instruction 62)

© Cambridge International Examinations 2016

 8

5 The following table shows part of the instruction set for a processor. The processor has one
general purpose register, the Accumulator (ACC), and an Index Register (IX).

Instruction
Op code Op code Explanation
Operand
(mnemonic) (binary)
Direct addressing. Load the contents of
LDD <address> 0001 0011 the location at the given address to the
Accumulator (ACC).
Indirect addressing. The address to be used is
LDI <address> 0001 0100 at the given address. Load the contents of this
second address to ACC.
Indexed addressing. Form the address from
<address> + the contents of the Index
LDX <address> 0001 0101
Register. Copy the contents of this calculated
address to ACC.
Immediate addressing. Load the denary
LDM #n 0001 0010
number n to ACC.
Immediate addressing. Load denary number n
LDR #n 0001 0110
to the Index Register (IX).
Store the contents of ACC at the given
STO <address> 0000 0111
address.

The following diagram shows the contents of a section of main memory and the Index Register (IX).

(a) Show the contents of the Accumulator (ACC) after each instruction is executed.

IX 0 0 0 0 0 1 1 0

(i) LDD 355

Main
ACC .................................................. [1] memory
Address contents
(ii) LDM #355
350
ACC .................................................. [1] 351 86

(iii) LDX 351 352

353
ACC .................................................. [1]
354
(iv) LDI 355 355 351
ACC .................................................. [1] 356
357 22
358

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(b) Each machine code instruction is encoded as 16 bits (8-bit op code followed by an 8-bit
operand).

Write the machine code for these instructions:

LDM #67

LDX #7

[3]

(c) Computer scientists often write binary representations in hexadecimal.

(i) Write the hexadecimal representation for the following instruction.

0 0 0 1 0 1 0 0 0 1 0 1 1 1 1 0

.......................................................................................................................................[2]

(ii) A second instruction has been written in hexadecimal as:

16 4D

Write the assembly language for this instruction with the operand in denary.

.......................................................................................................................................[2]

© UCLES 2017 9608/12/M/J/17 [Turn over

9608/12 Cambridge International AS/A Level – Mark Scheme May/June 2017
PUBLISHED

Question Answer Marks

5(a)(iv) 86 1

5(b) Op code Operand 3

0 0 0 1 0 0 1 0 0 1 0 0 0 0 1 1

0 0 0 1 0 1 0 1 0 0 0 0 0 1 1 1

Both correct op codes 1

Operand 0100 0011 1
Operand 0000 0111 1

5(c)(i) 14 5E 2

14 1
5E 1

5(c)(ii) LDR #77 2

LDR 1
#77 1

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 6

(c) An assembly language program can contain both macros and directives.

(i) Explain what is meant by these terms.

Macro ................................................................................................................................

...........................................................................................................................................

...........................................................................................................................................

Directive ............................................................................................................................

...........................................................................................................................................

...........................................................................................................................................
[3]

(ii) Give an example of the use of a directive.

...........................................................................................................................................

.......................................................................................................................................[1]

(d) The following table shows part of the instruction set for a processor. The processor has one
general purpose register, the Accumulator (ACC), and an Index Register (IX).

Instruction
Op code Explanation
Operand
(mnemonic)
Direct addressing. Load the contents of the given address
LDD <address>
to ACC.
Relative addressing. Move to the address n locations from
LDV #n the address of the current instruction. Load the contents of
this address to ACC.
STO <address> Store the contents of ACC at the given address.
INC Increment the contents of ACC.
Output the character corresponding to the ASCII character
OUTCH
code in ACC.
Following a compare instruction, jump to <address> if the
JPE <address>
compare was True.
JMP <address> Jump to the given address.
CMP #n Compare the contents of ACC with number n.

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Complete the trace table for the following assembly language program.

Label Instruction
StartProg: LDV #Offset
CMP Value
ASCII code table (selected codes only)
JPE EndProg
<Space> 2 A B Y
OUTCH
32 50 65 66 89
LDD Offset
INC
STO Offset
JMP StartProg
EndProg: END
Offset: 10
50
65
89
32
Value: 32

Trace table:

ACC Offset OUTPUT

10
50 2
10

[5]

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(e) The program given in part (d) is to be translated using a two-pass assembler. The program
has been copied here for you.
Label Instruction
StartProg: LDV #Offset
CMP Value
JPE EndProg
OUTCH
LDD Offset
INC
STO Offset
JMP StartProg
EndProg: END
Offset: 10
50
65
89
32
Value: 32

On the first pass, the assembly process adds entries to a symbol table.

The following symbol table shows the first five entries, part way through the first pass.

The circular labels show the order in which the assembler made the entries to the symbol
table.

Complete the symbol table. Use circular labels to show the order in which the assembler
makes the entries.

Symbol table

Symbolic address Relative address

StartProg 1 0 2

Offset 3 UNKNOWN 4

Value 5

[6]

© UCLES 2017 9608/12/O/N/17

 9608/12 Cambridge International AS/A Level – Mark Scheme October/November
PUBLISHED 2017

4(c)(i) 1 Mark per bullet 3

Maximum 2 for Macro
Maximum 2 for Directive
Maximum 3 in total

Macro
• A group of instructions given a name // subroutine
• A group of instructions that need to be executed several times within the same
program
• The statements are written once and called using the name whenever they need
to be executed
• Macro code is inserted into the source file at each place it is called
• By example

Directive
• An instruction that directs the assembler to do something
• A directive is not a program instruction
• It is information for the assembler
• By example

4(c)(ii) 1 Mark for a suitable example 1

For example: State the start address for the program //tell the assembler to set aside
space for variables // include an external file etc.

Question Answer Marks

4(d) Mark as shown 5

ACC Offset OUTPUT

10
50 2
10
11 11 1 Mark for these two values, as first instructions
65 1 Mark for this value, in any row
A 1 Mark for this value, in any row
11 1 Mark for this value, after 65, nothing in between
12 12 1 Mark for the rest
89 Y
12
13 13
32

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 9608/12 Cambridge International AS/A Level – Mark Scheme October/November
PUBLISHED 2017

Question Answer Marks

4(e) Mark as follows: 6

Table entries:
1 Mark per bullet, max 4
• EndProg
• 2 × Unknown
• 9
• 14
• 8

Numbering:
1 Mark per bullet, max 2

• Relative address of Value is numbered 6

• Number given for EndProg is next number in sequence to relative address of
Value
• All numbers correct – award 2 marks

7 9

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