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2023 15:22 Number System in Digital Electronics Tutorial - Javatpoint

Number System
In a digital system, the system can understand only the optional number system. In these
systems, digits symbols are used to represent different values, depending on the index from
which it settled in the number system.

In simple terms, for representing the information, we use the number system in the digital
system.

The digit value in the number system is calculated using:

1. The digit

2. The index, where the digit is present in the number.

3. Finally, the base numbers, the total number of digits available in the number system.

Note: When the number system represents a digit from 0 - 9, the base of the number will be
10.

Types of Number System

In the digital computer, there are various types of number systems used for representing
information.

1. Binary Number System

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2. Decimal Number System

3. Hexadecimal Number System

4. Octal Number System

Binary Number System

Generally, a binary number system is used in the digital computers. In this number system, it
carries only two digits, either 0 or 1. There are two types of electronic pulses present in a binary
number system. The first one is the absence of an electronic pulse representing '0'and second
one is the presence of electronic pulse representing '1'. Each digit is known as a bit. A four-bit
collection (1101) is known as a nibble, and a collection of eight bits (11001010) is known as a
byte. The location of a digit in a binary number represents a specific power of the base (2) of
the number system.

Characteristics:

1. It holds only two values, i.e., either 0 or 1.

2. It is also known as the base 2 number system.

3. The position of a digit represents the 0 power of the base(2). Example: 20

4. The position of the last digit represents the x power of the base(2). Example: 2x, where x
represents the last position, i.e., 1

Examples:

(10100)2, (11011)2, (11001)2, (000101)2, (011010)2.

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Decimal Number System

The decimal numbers are used in our day to day life. The decimal number system contains ten
digits from 0 to 9(base 10). Here, the successive place value or position, left to the decimal
point holds units, tens, hundreds, thousands, and so on.

The position in the decimal number system specifies the power of the base (10). The 0 is the
minimum value of the digit, and 9 is the maximum value of the digit. For example, the decimal
number 2541 consist of the digit 1 in the unit position, 4 in the tens position, 5 in the hundreds
position, and 2 in the thousand positions and the value will be written as:

(2×1000) + (5×100) + (4×10) + (1×1)

(2×103) + (5×102) + (4×101) + (1×100)
2000 + 500 + 40 + 1
2541

Octal Number System

The octal number system has base 8(means it has only eight digits from 0 to 7). There are only
eight possible digit values to represent a number. With the help of only three bits, an octal
number is represented. Each set of bits has a distinct value between 0 and 7.

Below, we have described certain characteristics of the octal number system:

Characteristics:

1. An octal number system carries eight digits starting from 0, 1, 2, 3, 4, 5, 6, and 7.

2. It is also known as the base 8 number system.

3. The position of a digit represents the 0 power of the base(8). Example: 80

4. The position of the last digit represents the x power of the base(8). Example: 8x, where x
represents the last position, i.e., 1

Number Octal Number

0 000

1 001

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2 010

3 011

4 100

5 101

6 110

7 111

Examples:

(273)8, (5644)8, (0.5365)8, (1123)8, (1223)8.

Hexadecimal Number System

It is another technique to represent the number in the digital system called the hexadecimal
number system. The number system has a base of 16 means there are total 16 symbols(0, 1, 2,
3, 4, 5, 6, 7, 8, 9, A, B, C, D, E, F) used for representing a number. The single-bit representation
of decimal values10, 11, 12, 13, 14, and 15 are represented by A, B, C, D, E, and F. Only 4 bits are
required for representing a number in a hexadecimal number. Each set of bits has a distinct
value between 0 and 15. There are the following characteristics of the octal number system:

Characteristics:

1. It has ten digits from 0 to 9 and 6 letters from A to F.

2. The letters from A to F defines numbers from 10 to 15.

3. It is also known as the base 16number system.

4. In hexadecimal number, the position of a digit represents the 0 power of the base(16).
Example: 160

5. In hexadecimal number, the position of the last digit represents the x power of the
base(16). Example: 16x, where x represents the last position, i.e., 1

Binary Number Hexadecimal Number

0000 0

0001 1

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0010 2

0011 3

0100 4

0101 5

0110 6

0111 7

1000 8

1001 9

1010 A

1011 B

1100 C

1101 D

1110 E

1111 F

Examples:

(FAC2)16, (564)16, (0ABD5)16, (1123)16, (11F3)16.

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Number Base Conversion

In our previous section, we learned different types of number systems such as binary, decimal,
octal, and hexadecimal. In this part of the tutorial, we will learn how we can change a number
from one number system to another number system.

As, we have four types of number systems so each one can be converted into the remaining
three systems. There are the following conversions possible in Number System

1. Binary to other Number Systems.

2. Decimal to other Number Systems.

3. Octal to other Number Systems.

4. Hexadecimal to other Number Systems.

Binary to other Number Systems

There are three conversions possible for binary number, i.e., binary to decimal, binary to octal,
and binary to hexadecimal. The conversion process of a binary number to decimal differs from
the remaining others. Let's take a detailed discussion on Binary Number System conversion.

Binary to Decimal Conversion

The process of converting binary to decimal is quite simple. The process starts from multiplying
the bits of binary number with its corresponding positional weights. And lastly, we add all those
products.
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Let's take an example to understand how the conversion is done from binary to decimal.

Example 1: (10110.001)2

We multiplied each bit of (10110.001)2 with its respective positional weight, and last we add the
products of all the bits with its weight.

(10110.001)2=(1×24)+(0×23)+(1×22)+(1×21)+(0×20)+

(0×2-1)+(0×2-2)+(1×2-3)
(10110.001)2=(1×16)+(0×8)+(1×4)+(1×2)+(0×1)+
(0×1⁄2)+(0×1⁄4)+(1×1⁄8)
(10110.001)2=16+0+4+2+0+0+0+0.125
(10110.001)2=(22.125 )10

Binary to Octal Conversion

The base numbers of binary and octal are 2 and 8, respectively. In a binary number, the pair of
three bits is equal to one octal digit. There are only two steps to convert a binary number into
an octal number which are as follows:

1. In the first step, we have to make the pairs of three bits on both sides of the binary
point. If there will be one or two bits left in a pair of three bits pair, we add the required
number of zeros on extreme sides.

2. In the second step, we write the octal digits corresponding to each pair.

Example 1: (111110101011.0011)2

1. Firstly, we make pairs of three bits on both sides of the binary point.

111 110 101 011.001 1

On the right side of the binary point, the last pair has only one bit. To make it a complete pair
of three bits, we added two zeros on the extreme side.

111 110 101 011.001 100

2. Then, we wrote the octal digits, which correspond to each pair.

(111110101011.0011)2=(7653.14)8

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Binary to Hexadecimal Conversion

The base numbers of binary and hexadecimal are 2 and 16, respectively. In a binary number,
the pair of four bits is equal to one hexadecimal digit. There are also only two steps to convert
a binary number into a hexadecimal number which are as follows:

1. In the first step, we have to make the pairs of four bits on both sides of the binary point.
If there will be one, two, or three bits left in a pair of four bits pair, we add the required
number of zeros on extreme sides.

2. In the second step, we write the hexadecimal digits corresponding to each pair.

Example 1: (10110101011.0011)2

1. Firstly, we make pairs of four bits on both sides of the binary point.

111 1010 1011.0011

On the left side of the binary point, the first pair has three bits. To make it a complete pair of
four bits, add one zero on the extreme side.

0111 1010 1011.0011

2. Then, we write the hexadecimal digits, which correspond to each pair.

(011110101011.0011)2=(7AB.3)16

Decimal to other Number System

The decimal number can be an integer or floating-point integer. When the decimal number is a
floating-point integer, then we convert both part (integer and fractional) of the decimal
number in the isolated form(individually). There are the following steps that are used to convert
the decimal number into a similar number of any base 'r'.

1. In the first step, we perform the division operation on integer and successive part with
base 'r'. We will list down all the remainders till the quotient is zero. Then we find out the
remainders in reverse order for getting the integer part of the equivalent number of base
'r'. In this, the least and most significant digits are denoted by the first and the last
remainders.

2. In the next step, the multiplication operation is done with base 'r' of the fractional and
successive fraction. The carries are noted until the result is zero or when the required
number of the equivalent digit is obtained. For getting the fractional part of the
equivalent number of base 'r', the normal sequence of carrying is considered.

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Decimal to Binary Conversion

For converting decimal to binary, there are two steps required to perform, which are as follows:

1. In the first step, we perform the division operation on the integer and the successive
quotient with the base of binary(2).

2. Next, we perform the multiplication on the integer and the successive quotient with the
base of binary(2).

Example 1: (152.25)10

Step 1:

Divide the number 152 and its successive quotients with base 2.

Operation Quotient Remainder

152/2 76 0 (LSB)

76/2 38 0

38/2 19 0

19/2 9 1

9/2 4 1

4/2 2 0

2/2 1 0

1/2 0 1(MSB)

(152)10=(10011000)2

Step 2:

Now, perform the multiplication of 0.27 and successive fraction with base 2.

Operation Result carry

0.25×2 0.50 0

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0.50×2 0 1

(0.25)10=(.01)2

Decimal to Octal Conversion

For converting decimal to octal, there are two steps required to perform, which are as follows:

1. In the first step, we perform the division operation on the integer and the successive
quotient with the base of octal(8).
2. Next, we perform the multiplication on the integer and the successive quotient with the
base of octal(8).

Example 1: (152.25)10

Step 1:

Divide the number 152 and its successive quotients with base 8.

Operation Quotient Remainder

152/8 19 0

19/8 2 3

2/8 0 2

(152)10=(230)8

Step 2:

Now perform the multiplication of 0.25 and successive fraction with base 8.

Operation Result carry

0.25×8 0 2

(0.25)10=(2)8

So, the octal number of the decimal number 152.25 is 230.2

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Decimal to hexadecimal conversion

For converting decimal to hexadecimal, there are two steps required to perform, which are as
follows:

1. In the first step, we perform the division operation on the integer and the successive
quotient with the base of hexadecimal (16).

2. Next, we perform the multiplication on the integer and the successive quotient with the
base of hexadecimal (16).

Example 1: (152.25)10

Step 1:

Divide the number 152 and its successive quotients with base 8.

Operation Quotient Remainder

152/16 9 8

9/16 0 9

(152)10=(98)16

Step 2:

Now perform the multiplication of 0.25 and successive fraction with base 16.

Operation Result carry

0.25×16 0 4

(0.25)10=(4)16

So, the hexadecimal number of the decimal number 152.25 is 230.4.

Octal to other Number System

Like binary and decimal, the octal number can also be converted into other number systems.
The process of converting octal to decimal differs from the remaining one. Let's start
understanding how conversion is done.

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Octal to Decimal Conversion

The process of converting octal to decimal is the same as binary to decimal. The process starts
from multiplying the digits of octal numbers with its corresponding positional weights. And
lastly, we add all those products.

Let's take an example to understand how the conversion is done from octal to decimal.

Example 1: (152.25)8

Step 1:

We multiply each digit of 152.25 with its respective positional weight, and last we add the
products of all the bits with its weight.

(152.25)8=(1×82)+(5×81)+(2×80)+(2×8-1)+(5×8-2)
(152.25)8=64+40+2+(2×1⁄8)+(5×1⁄64)
(152.25)8=64+40+2+0.25+0.078125
(152.25)8=106.328125

So, the decimal number of the octal number 152.25 is 106.328125

Octal to Binary Conversion

The process of converting octal to binary is the reverse process of binary to octal. We write the
three bits binary code of each octal number digit.

Example 1: (152.25)8

We write the three-bit binary digit for 1, 5, 2, and 5.

(152.25)8=(001101010.010101)2

So, the binary number of the octal number 152.25 is (001101010.010101)2

Octal to hexadecimal conversion

For converting octal to hexadecimal, there are two steps required to perform, which are as
follows:

1. In the first step, we will find the binary equivalent of number 25.

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2. Next, we have to make the pairs of four bits on both sides of the binary point. If there
will be one, two, or three bits left in a pair of four bits pair, we add the required number
of zeros on extreme sides and write the hexadecimal digits corresponding to each pair.

Example 1: (152.25)8

Step 1:

We write the three-bit binary digit for 1, 5, 2, and 5.

(152.25)8=(001101010.010101)2

So, the binary number of the octal number 152.25 is (001101010.010101)2

Step 2:

1. Now, we make pairs of four bits on both sides of the binary point.

0 0110 1010.0101 01

On the left side of the binary point, the first pair has only one digit, and on the right side, the
last pair has only two-digit. To make them complete pairs of four bits, add zeros on extreme
sides.

0000 0110 1010.0101 0100

2. Now, we write the hexadecimal digits, which correspond to each pair.

(0000 0110 1010.0101 0100)2=(6A.54)16

Hexa-decimal to other Number System

Like binary, decimal, and octal, hexadecimal numbers can also be converted into other number
systems. The process of converting hexadecimal to decimal differs from the remaining one.
Let's start understanding how conversion is done.

Hexa-decimal to Decimal Conversion

The process of converting hexadecimal to decimal is the same as binary to decimal. The
process starts from multiplying the digits of hexadecimal numbers with its corresponding
positional weights. And lastly, we add all those products.

Let's take an example to understand how the conversion is done from hexadecimal to decimal.

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Example 1: (152A.25)16

Step 1:

We multiply each digit of 152A.25 with its respective positional weight, and last we add the
products of all the bits with its weight.

(152A.25)16=(1×163)+(5×162)+(2×161)+(A×160)+(2×16-1)+(5×16-2)

(152A.25)16=(1×4096)+(5×256)+(2×16)+(10×1)+(2×16-1)+(5×16-2)
(152A.25)16=4096+1280+32+10+(2×1⁄16)+(5×1⁄256)
(152A.25)16=5418+0.125+0.125
(152A.25)16=5418.14453125

So, the decimal number of the hexadecimal number 152A.25 is 5418.14453125

Hexadecimal to Binary Conversion

The process of converting hexadecimal to binary is the reverse process of binary to

hexadecimal. We write the four bits binary code of each hexadecimal number digit.

Example 1: (152A.25)16

We write the four-bit binary digit for 1, 5, A, 2, and 5.

(152A.25)16=(0001 0101 0010 1010.0010 0101)2

So, the binary number of the hexadecimal number 152.25 is (1010100101010.00100101)2

Hexadecimal to Octal Conversion

For converting hexadecimal to octal, there are two steps required to perform, which are as
follows:

1. In the first step, we will find the binary equivalent of the hexadecimal number.

2. Next, we have to make the pairs of three bits on both sides of the binary point. If there
will be one or two bits left in a pair of three bits pair, we add the required number of
zeros on extreme sides and write the octal digits corresponding to each pair.

Example 1: (152A.25)16

Step 1:

We write the four-bit binary digit for 1, 5, 2, A, and 5.

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(152A.25)16=(0001 0101 0010 1010.0010 0101)2

So, the binary number of hexadecimal number 152A.25 is (0011010101010.010101)2

Step 2:

3. Then, we make pairs of three bits on both sides of the binary point.

001 010 100 101 010.001 001 010

4. Then, we write the octal digit, which corresponds to each pair.

(001010100101010.001001010)2=(12452.112)8

So, the octal number of the hexadecimal number 152A.25 is 12452.112

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8.11.2023 15:23 Gray Code in Digital Electronics Tutorial - Javatpoint

Gray Code
The Gray Code is a sequence of binary number systems, which is also known as reflected
binary code. The reason for calling this code as reflected binary code is the first N/2 values
compared with those of the last N/2 values in reverse order. In this code, two consecutive
values are differed by one bit of binary digits. Gray codes are used in the general sequence of
hardware-generated binary numbers. These numbers cause ambiguities or errors when the
transition from one number to its successive is done. This code simply solves this problem by
changing only one bit when the transition is between numbers is done.

The gray code is a very light weighted code because it doesn't depend on the value of the digit
specified by the position. This code is also called a cyclic variable code as the transition of one
value to its successive value carries a change of one bit only.

How to generate Gray code?

The prefix and reflect method are recursively used to generate the Gray code of a number. For
generating gray code:

1. We find the number of bits required to represent a number.

2. Next, we find the code for 0, i.e., 0000, which is the same as binary.

3. Now, we take the previous code, i.e., 0000, and change the most significant bit of it.

4. We perform this process reclusively until all the codes are not uniquely identified.

5. If by changing the most significant bit, we find the same code obtained previously, then
the second most significant bit will be changed, and so on.

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Process of generating Gray Code

Gray Code Table

Decimal Number Binary Number Gray Code

0 0000 0000

1 0001 0001

2 0010 0011

3 0011 0010

4 0100 0110

5 0101 0111

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6 0110 0101

7 0111 0100

8 1000 1100

9 1001 1101

10 1010 1111

11 1011 1110

12 1100 1010

13 1101 1011

14 1110 1001

15 1111 1000

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8.11.2023 15:23 Excess-3 Code in Digital Electronics Tutorial - Javatpoint

Excess-3 Code
The excess-3 code is also treated as XS-3 code. The excess-3 code is a non-weighted and self-
complementary BCD code used to represent the decimal numbers. This code has a biased
representation. This code plays an important role in arithmetic operations because it resolves
deficiencies encountered when we use the 8421 BCD code for adding two decimal digits whose
sum is greater than 9. The Excess-3 code uses a special type of algorithm, which differs from
the binary positional number system or normal non-biased BCD.

We can easily get an excess-3 code of a decimal number by simply adding 3 to each decimal
digit. And then we write the 4-bit binary number for each digit of the decimal number. We can
find the excess-3 code of the given binary number by using the following steps:

1. We find the decimal number of the given binary number.

2. Then we add 3 in each digit of the decimal number.

3. Now, we find the binary code of each digit of the newly generated decimal number.

We can also add 0011 in each 4-bit BCD code of the decimal number for getting excess-3 code.

The Excess-3 code for the decimal number is as follows:

Decimal Digit BCD Code Excess-3 Code

0 0000 0011

1 0001 0100

2 0010 0101

3 0011 0110

4 0100 0111

5 0101 1000

6 0110 1001

7 0111 1010

8 1000 1011

9 1001 1100

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In excess-3 code, the codes 1111 and 0000 are never used for any decimal digit. Let's take
some examples of Excess-3 code.

Example 1: Decimal number 31

1. We find the BCD code of each digit of the decimal number.

Digit BCD

3 0011

1 0001

2) Then, we add 0011 in both of the BCD code.

Decimal BCD Excess-3

3 0011+0011 0110

1 0001+0011 0100

3. So, the excess-3 code of the decimal number 31 is 0110 0100

Example 2: Decimal number 81.61

1. We find the BCD code of each digit of the decimal number.

Digit BCD

8 1000

1 0001

6 0110

1 0001

2) Then, we add 0011 in both of the BCD code.

Decimal BCD Excess-3

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8 1000+0011 1011

1 0001+0011 0100

6 0110+0011 1001

3) So, the excess-3 code of the decimal number 81.61 is 1011 0100.1001 0100

Self-complementary property

A self-complementary binary code is a code which is always complimented in itself. By

replacing the bit 0 to 1 and 1 to 0 of a number, we find the 1's complement of the number. The
sum of the 1'st complement and the binary number of a decimal is equal to the binary number
of decimal 9.

Note: if we perform the 1's complement of excess-3 of a decimal number, it will be equal to
the excess-3 code of the 9's complement of that decimal number.

For example: If we perform 1's complement of the excess-3 code 1000(decimal 5),
complement value will be 0111, which is the excess-3 code of 9's complement of 5, i.e., 4(0111).

Why use Excess-3 code?

There are the following advantages of excess-3 code which make it required to use:

1. These codes are self-complementary.

2. These codes use biased representation.

3. The excess-3 code has no limitation, so that it considerably simplifies arithmetic

operations.

4. The codes 0000 and 1111 can cause a fault in the transmission line. The excess-3 code
doesn't use these codes and gives an advantage for memory organization.

5. These codes are usually unweighted binary decimal codes.

6. This code has a vital role in arithmetic operations. It is because it resolves deficiencies
which are encountered when we use the 8421 BCD code for adding two decimal digits
whose sum is greater than 9.

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1's complement
In number representation techniques, the binary number system is the most used
representation technique in digital electronics. The complement is used for representing the
negative decimal number in binary form. Different types of complement are possible of the
binary number, but 1's and 2's complements are mostly used for binary numbers. We can find
the 1's complement of the binary number by simply inverting the given number. For example,
1's complement of binary number 1011001 is 0100110. We can find the 2's complement of the
binary number by changing each bit(0 to 1 and 1 to 0) and adding 1 to the least significant bit.
For example, 2's complement of binary number 1011001 is (0100110)+1=0100111.

For finding 1's complement of the binary number, we can implement the logic circuit also by
using NOT gate. We use NOT gate for each bit of the binary number. So, if we want to
implement the logic circuit for 5-bit 1's complement, five NOT gates will be used.

Example 1: 11010.1101

For finding 1's complement of the given number, change all 0's to 1 and all 1's to 0. So the 1's
complement of the number 11010.1101 comes out 00101.0010.

Example 2: 100110.1001

For finding 1's complement of the given number, change all 0's to 1 and all 1's to 0. So, the 1's
complement of the number 100110.1001 comes out 011001.0110.

1's Complement Table

Binary Number 1's Complement

0000 1111

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0001 1110

0010 1101

0011 1100

0100 1011

0101 1010

0110 1001

0111 1000

1000 0111

1001 0110

1010 0101

1011 0100

1100 0011

1101 0010

1110 0001

1111 0000

Use of 1's complement

1's complement plays an important role in representing the signed binary numbers. The main
use of 1's complement is to represent a signed binary number. Apart from this, it is also used to
perform various arithmetic operations such as addition and subtraction.

In signed binary number representation, we can represent both positive and negative numbers.
For representing the positive numbers, there is nothing to do. But for representing negative
numbers, we have to use 1's complement technique. For representing the negative number, we
first have to represent it with a positive sign, and then we find the 1's complement of it.

Let's take an example of a positive and negative number and see how these numbers are
represented.

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Example 1: +6 and -6

The number +6 is represented as same as the binary number. For representing both numbers,
we will take the 5-bit register.

So the +6 is represented in the 5-bit register as 0 0110.

The -6 is represented in the 5-bit register in the following way:

1. +6=0 0110

2. Find the 1's complement of the number 0 0110, i.e., 1 1001. Here, MSB denotes that a
number is a negative number.

Here, MSB refers to Most Significant Bit, and LSB denotes the Least Significant Bit.

Example 2: +120 and -120

The number +120 is represented as same as the binary number. For representing both
numbers, take the 8-bit register.

So the +120 is represented in the 8-bit register as 0 1111000.

The -120 is represented in the 8-bit register in the following way:

1. +120=0 1111000

2. Now, find the 1's complement of the number 0 1111000, i.e., 1 0000111. Here, the MSB
denotes the number is the negative number.

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8.11.2023 15:35 2's Complement in Digital Electronics - Javatpoint

2's complement
Just like 1's complement, 2's complement is also used to represent the signed binary numbers.
For finding 2's complement of the binary number, we will first find the 1's complement of the
binary number and then add 1 to the least significant bit of it.

For example, if we want to calculate the 2's complement of the number 1011001, then firstly,
we find the 1's complement of the number that is 0100110 and add 1 to the LSB. So, by adding
1 to the LSB, the number will be (0100110)+1=0100111. We can also create the logic circuit
using OR, AND, and NOT gates. The logic circuit for finding 2's complement of the 5-bit binary
number is as follows:

Example 1: 110100

For finding 2's complement of the given number, change all 0's to 1 and all 1's to 0. So the 1's
complement of the number 110100 is 001011. Now add 1 to the LSB of this number, i.e.,
(001011)+1=001100.

Example 2: 100110

For finding 1's complement of the given number, change all 0's to 1 and all 1's to 0. So, the 1's
complement of the number 100110 is 011001. Now add one the LSB of this number, i.e.,
(011001)+1=011010.

2's Complement Table

Binary Number 1's Complement 2's complement

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0000 1111 0000

0001 1110 1111

0010 1101 1110

0011 1100 1101

0100 1011 1100

0101 1010 1011

0110 1001 1010

0111 1000 1001

1000 0111 1000

1001 0110 0111

1010 0101 0110

1011 0100 0101

1100 0011 0100

1101 0010 0011

1110 0001 0010

1111 0000 0001

Use of 2's complement

2's complement is used for representing signed numbers and performing arithmetic operations
such as subtraction, addition, etc. The positive number is simply represented as a magnitude
form. So there is nothing to do for representing positive numbers. But if we represent the
negative number, then we have to choose either 1's complement or 2's complement technique.
The 1's complement is an ambiguous technique, and 2's complement is an unambiguous
technique. Let's see an example to understand how we can calculate the 2's complement in
signed binary number representation.

Example 1: +6 and -6

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The number +6 is represented as same as the binary number. For representing both numbers,
take the 5-bit register.

So the +6 is represented in the 5-bit register as 0 0110.

The -6 is represented in the 5-bit register in the following way:

1. +6=0 0110

2. Now, find the 1's complement of the number 0 0110, i.e. 1 1001.

3. Now, add 1 to its LSB. When we add 1 to the LSB of 11001, the newly generated number
comes out 11010. Here, the sign bit is one which means the number is the negative
number.

Example 2: +120 and -120

The number +120 is represented as same as the binary number. For representing both
numbers, take the 8-bit register.

So the +120 is represented in the 8-bit register as 0 1111000.

The -120 is represented in the 8-bit register in the following way:

1. +120=0 1111000
2. Now, find the 1's complement of the number 0 1111000, i.e. 1 0000111. Here, the MSB
denotes the number is the negative number.
3. Now, add 1 to its LSB. When we add 1 to the LSB of 1 0000111, the newly generated
number comes out 1 0001000. Here, the sign bit is one, which means the number is the
negative number.

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8.11.2023 15:36 9's and 10's Complement in Digital Electronics - Javatpoint

9's and 10's Complement

If the number is binary, then we use 1's complement and 2's complement. But in case, when the
number is a decimal number, we will use the 9's and 10's complement. The 10's complement is
obtained from the 9's complement of the number, and we can also find the 9's and 10's
complement using the r's and (r-1)'s complement formula.

9's Complement
The 9's complement is used to find the subtraction of the decimal numbers. The 9's
complement of a number is calculated by subtracting each digit of the number by 9. For
example, suppose we have a number 1423, and we want to find the 9's complement of the
number. For this, we subtract each digit of the number 1423 by 9. So, the 9's complement of
the number 1423 is 9999-1423= 8576.

Subtraction using 9's complement

With the help of the 9's complement, the process of subtraction is done in a much easier way.
Generally, we subtract the subtrahend from the minuend, but in a case when we perform
subtraction using 9's complement, there is no need to do the same.

For subtracting two numbers using 9's complement, we first have to find the 9's complement of
the subtrahend and then we will add this complement value with the minuend. There are two
possible cases when we subtract the numbers using 9's complement.

Case 1: When the subtrahend is smaller than the minuend.

For subtracting the smaller number from the larger number using 9's complement, we will find
the 9's complement of the subtrahend, and then we will add this complement value with the
minuend. By adding both these values, the result will come in the formation of carry. At last, we
will add this carry to the result obtained previously.

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Case 2: When the subtrahend is greater than the minuend.

In this case, when we add the complement value and the minuend, the result will not come in
the formation of carry. This indicates that the number is negative, and for finding the final
result, we need to find the 9's complement of the result.

10's Complement
The 10's complement is also used to find the subtraction of the decimal numbers. The 10's
complement of a number is calculated by subtracting each digit by 9 and then adding 1 to the
result. Simply, by adding 1 to its 9's complement we can get its 10's complement value. For
example, suppose we have a number 1423, and we want to find the 10's complement of the
number. For this, we find the 9's complement of the number 1423 that is 9999-1423= 8576,
and now we will add 1 to the result. So the 10's complement of the number 1423 is
8576+1=8577.

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Subtraction using 10's complement

For subtracting two numbers using 10's complement, we first have to find the 10's complement
of the subtrahend, and then we will add this complement value with the minuend. There are
two possible cases when we subtract the numbers using 10's complement.

Case 1: When the subtrahend is smaller than the minuend.

For subtracting the smaller number from the larger number using 10's complement, we will find
the 10's complement of the subtrahend and then we will add this complement value with the
minuend. By adding both these values, the result will come in the formation of carry. We ignore
this carry and the remaining digits will be the answer.

Case 2: When the subtrahend is greater than the minuend.

In this case, when we add the complement value and the minuend, the result will not come in
the formation of carry. This indicates that the number is negative and for finding the final
result, we need to find the 10's complement of the result obtained by adding complement
value of subtrahend and minuend.

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8.11.2023 15:36 Addition and Subtraction using 1's Complement in Digital Electronics - Javatpoint

Addition and Subtraction using 1's complement

In our previous section, we learned about different complements such as 1's complement, 2's
complement, 9's complement, and 10's complement, etc.. In this section, we will learn to
perform the arithmetic operations such as addition and subtraction using 1's complement. We
can perform addition and subtraction using 1's, 2's, 9's, and 10's complement.

Addition using 1's complement

There are three different cases possible when we add two binary numbers which are as follows:

Case 1: Addition of the positive number with a negative number when the positive
number has a greater magnitude.

Initially, calculate the 1's complement of the given negative number. Sum up with the given
positive number. If we get the end-around carry 1, it gets added to the LSB.

Example: 1101 and -1001

1. First, find the 1's complement of the negative number 1001. So, for finding 1's
complement, change all 0 to 1 and all 1 to 0. The 1's complement of the number 1001 is
0110.

2. Now, add both the numbers, i.e., 1101 and 0110;

1101+0110=1 0011

3. By adding both numbers, we get the end-around carry 1. We add this end around carry
to the LSB of 0011.
0011+1=0100

Case 2: Adding a positive value with a negative value in case the negative number has a
higher magnitude.

Initially, calculate the 1's complement of the negative value. Sum it with a positive number. In
this case, we did not get the end-around carry. So, take the 1's complement of the result to get
the final result.

Note: The resultant is a negative value.

Example: 1101 and -1110

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1. First find the 1's complement of the negative number 1110. So, for finding 1's
complement, we change all 0 to 1, and all 1 to 0. 1's complement of the number 1110 is
0001.

2. Now, add both the numbers, i.e., 1101 and 0001;

1101+0001= 1110

3. Now, find the 1's complement of the result 1110 that is the final result. So, the 1's
complement of the result 1110 is 0001, and we add a negative sign before the number
so that we can identify that it is a negative number.

Case 3: Addition of two negative numbers

In this case, first find the 1's complement of both the negative numbers, and then we add both
these complement numbers. In this case, we always get the end-around carry, which get added
to the LSB, and for getting the final result, we take the 1's complement of the result.

Note: The resultant is a negative value.

Example: -1101 and -1110 in five-bit register

1. Firstly find the 1's complement of the negative numbers 01101 and 01110. So, for finding
1's complement, we change all 0 to 1, and all 1 to 0. 1's complement of the number
01110 is 10001, and 01101 is 10010.

2. Now, we add both the complement numbers, i.e., 10001 and 10010;
10001+10010= 1 00011

3. By adding both numbers, we get the end-around carry 1. We add this end-around carry
to the LSB of 00011.
00011+1=00100

4. Now, find the 1's complement of the result 00100 that is the final answer. So, the 1's
complement of the result 00100 is 110111, and add a negative sign before the number
so that we can identify that it is a negative number.

Subtraction using 1's complement

These are the following steps to subtract two binary numbers using 1's complement

In the first step, find the 1's complement of the subtrahend.

Next, add the complement number with the minuend.

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If got a carry, add the carry to its LSB. Else take 1's complement of the result which will
be negative

Note: The subtrahend value always get subtracted from minuend.

Example 1: 10101 - 00111

We take 1's complement of subtrahend 00111, which comes out 11000. Now, sum them. So,

10101+11000 =1 01101.

In the above result, we get the carry bit 1, so add this to the LSB of a given result, i.e.,
01101+1=01110, which is the answer.

Example 2: 10101 - 10111

We take 1's complement of subtrahend 10111, which comes out 01000. Now, add both of the
numbers. So,

10101+01000 =11101.

In the above result, we didn't get the carry bit. So calculate the 1's complement of the result,
i.e., 00010, which is the negative number and the final answer.

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8.11.2023 15:36 Addition and Subtraction using 2's Complement in Digital Electronics - Javatpoint

Addition and Subtraction using 2's complement

In our previous section, we learned how we could perform arithmetic operations such as
addition and subtraction using 1's complement. In this section, we will learn to perform these
operations using 2's complement.

Addition using 2's complement

There are three different cases possible when we add two binary numbers using 2's
complement, which is as follows:

Case 1: Addition of the positive number with a negative number when the positive
number has a greater magnitude.

Initially find the 2's complement of the given negative number. Sum up with the given positive
number. If we get the end-around carry 1 then the number will be a positive number and the
carry bit will be discarded and remaining bits are the final result.

Example: 1101 and -1001

1. First, find the 2's complement of the negative number 1001. So, for finding 2's
complement, change all 0 to 1 and all 1 to 0 or find the 1's complement of the number
1001. The 1's complement of the number 1001 is 0110, and add 1 to the LSB of the
result 0110. So the 2's complement of number 1001 is 0110+1=0111

2. Add both the numbers, i.e., 1101 and 0111;

1101+0111=1 0100

3. By adding both numbers, we get the end-around carry 1. We discard the end-around
carry. So, the addition of both numbers is 0100.

Case 2: Adding of the positive value with a negative value when the negative number has
a higher magnitude.

Initially, add a positive value with the 2's complement value of the negative number. Here, no
end-around carry is found. So, we take the 2's complement of the result to get the final result.

Note: The resultant is a negative value.

Example: 1101 and -1110

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1. First, find the 2's complement of the negative number 1110. So, for finding 2's
complement, add 1 to the LSB of its 1's complement value 0001.
0001+1=0010

2. Add both the numbers, i.e., 1101 and 0010;

1101+0010= 1111

3. Find the 2's complement of the result 1110 that is the final result. So, the 2's
complement of the result 1110 is 0001, and add a negative sign before the number so
that we can identify that it is a negative number.

Case 3: Addition of two negative numbers

In this case, first, find the 2's complement of both the negative numbers, and then we will add
both these complement numbers. In this case, we will always get the end-around carry, which
will be added to the LSB, and forgetting the final result, we will take the2's complement of the
result.

Note: The resultant is a negative value.

Example: -1101 and -1110 in five-bit register

1. Firstly find the 2's complement of the negative numbers 01101 and 01110. So, for finding
2's complement, we add 1 to the LSB of the 1's complement of these numbers. 2's
complement of the number 01110 is 10010, and 01101 is 10011.

2. We add both the complement numbers, i.e., 10001 and 10010;

10010+10011= 1 00101

3. By adding both numbers, we get the end-around carry 1. This carry is discarded and the
final result is the 2.s complement of the result 00101. So, the 2's complement of the
result 00101 is 11011, and we add a negative sign before the number so that we can
identify that it is a negative number.

Subtraction using 2's complement

These are the following steps to subtract two binary numbers using 2's complement

In the first step, find the 2's complement of the subtrahend.

Add the complement number with the minuend.

If we get the carry by adding both the numbers, then we discard this carry and the result
is positive else take 2's complement of the result which will be negative.

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Example 1: 10101 - 00111

We take 2's complement of subtrahend 00111, which is 11001. Now, sum them. So,

10101+11001 =1 01110.

In the above result, we get the carry bit 1. So we discard this carry bit and remaining is the final
result and a positive number.

Example 2: 10101 - 10111

We take 2's complement of subtrahend 10111, which comes out 01001. Now, we add both of
the numbers. So,

10101+01001 =11110.

In the above result, we didn't get the carry bit. So calculate the 2's complement of the result,
i.e., 00010. It is the negative number and the final answer.

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8.11.2023 15:37 Boolean Algebra in Digital Electronics - Javatpoint

Boolean algebra
The logical symbol 0 and 1 are used for representing the digital input or output. The symbols
"1" and "0" can also be used for a permanently open and closed digital circuit. The digital
circuit can be made up of several logic gates. To perform the logical operation with minimum
logic gates, a set of rules were invented, known as the Laws of Boolean Algebra. These rules
are used to reduce the number of logic gates for performing logic operations.

The Boolean algebra is mainly used for simplifying and analyzing the complex Boolean
expression. It is also known as Binary algebra because we only use binary numbers in this.
George Boole developed the binary algebra in 1854.

Rules in Boolean algebra

1. Only two values(1 for high and 0 for low) are possible for the variable used in Boolean
algebra.

2. The overbar(-) is used for representing the complement variable. So, the complement of
variable C is represented as .

3. The plus(+) operator is used to represent the ORing of the variables.

4. The dot(.) operator is used to represent the ANDing of the variables.

Properties of Boolean algebra

These are the following properties of Boolean algebra:

Annulment Law

When the variable is AND with 0, it will give the result 0, and when the variable is OR with 1, it
will give the result 1, i.e.,

B.0 = 0

B+1 = 1

Identity Law

When the variable is AND with 1 and OR with 0, the variable remains the same, i.e.,

B.1 = B

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B+0 = B

Idempotent Law

When the variable is AND and OR with itself, the variable remains same or unchanged, i.e.,

B.B = B

B+B = B

Complement Law

When the variable is AND and OR with its complement, it will give the result 0 and 1
respectively.

B.B' = 0

B+B' = 1

Double Negation Law

This law states that, when the variable comes with two negations, the symbol gets removed and
the original variable is obtained.

((A)')' = A

Commutative Law

This law states that no matter in which order we use the variables. It means that the order of
variables doesn't matter in this law.

A.B = B.A

A+B = B+A

Associative Law

This law states that the operation can be performed in any order when the variables priority is
of same as '*' and '/'.

(A.B).C = A.(B.C)

(A+B)+C = A+(B+C)

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Distributive Law

This law allows us to open up of brackets. Simply, we can open the brackets in the Boolean
expressions.

A+(B.C) = (A+B).(A+C

A.(B+C) = (A.B)+(A.C)

Absorption Law

This law allows us for absorbing the similar variables.

B+(B.A) = B

B.(B+A) = B

De Morgan Law

The operation of an OR and AND logic circuit will remain same if we invert all the inputs,
change operators from AND to OR and OR to AND, and invert the output.

(A.B)' = A'+B'

(A+B)' = A'.B'

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8.11.2023 15:38 Boolean Functions in Digital Electronics - Javatpoint

Boolean Functions
The binary variables and logic operations are used in Boolean algebra. The algebraic expression
is known as Boolean Expression, is used to describe the Boolean Function. The Boolean
expression consists of the constant value 1 and 0, logical operation symbols, and binary
variables.

Example 1: F=xy' z+p

We defined the Boolean function F=xy' z+p in terms of four binary variables x, y, z, and p. This
function will be equal to 1 when x=1, y=0, z=1 or z=1.

Example 2:

The output Y is represented on the left side of the equation. So,

Apart from the algebraic expression, the Boolean function can also be described in terms of the
truth table. We can represent a function using multiple algebraic expressions. They are their
logically equivalents. But for every function, we have only one unique truth table.

In truth table representation, we represent all the possible combinations of inputs and their
result. We can convert the switching equations into truth tables.

Example: F(A,B,C,D)=A+BC'+D

The output will be high when A=1 or BC'=1 or D=1 or all are set to 1. The truth table of the
above example is given below. The 2n is the number of rows in the truth table. The n defines
the number of input variables. So the possible input combinations are 23=8.

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Methods of simplifying the Boolean function

There are two methods which are used for simplifying Boolean function. These functions are as
follows:

Karnaugh-map or K-map

De-Morgan's law is very helpful for manipulating logical expressions. The logic gates can also
realize the logical expression. The k-map method is used to reduce the logic gates for a
minimum possible value required for the realization of a logical expression. The K-map method
will be done in two different ways, which we will discuss later in the Simplification of Boolean
expression section.

NAND gates realization

Apart from the K-map, we can also use the NAND gate for simplifying the Boolean functions.
Let's see an example:

Example 1: F(A,B,C,D)=A' C'+ABCD'+B' C' D+BCD'+A'B'

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8.11.2023 15:38 Laws and Rules of Boolean algebra - Javatpoint

Laws and Rules of Boolean algebra

In simplification of the Boolean expression, the laws and rules of the Boolean algebra play an
important role. Before understanding these laws and rules of Boolean algebra, understand the
Boolean operations addition and multiplication concept.

Boolean Addition
The addition operation of Boolean algebra is similar to the OR operation. In digital circuits, the
OR operation is used to calculate the sum term, without using AND operation. A + B, A + B', A
+ B + C', and A' + B + + D' are some of the examples of 'sum term'. The value of the sum term
is true when one or more than one literals are true and false when all the literals are false.

Boolean Multiplication
The multiplication operation of Boolean algebra is similar to the AND operation. In digital
circuits, the AND operation calculates the product, without using OR operation. AB, AB, ABC,
and ABCD are some of the examples of the product term. The value of the product term is true
when all the literals are true and false when any one of the literal is false.

Laws of Boolean algebra

There are the following laws of Boolean algebra:

Commutative Law

This law states that no matter in which order we use the variables. It means that the order of
variables doesn't matter. In Boolean algebra, the OR and the addition operations are similar. In
the below diagram, the OR gate display that the order of the input variables does not matter at
all.

For two variables, the commutative law of addition is written as:

A+B = B+A

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For two variables, the commutative law of multiplication is written as:

A.B = B.A

Associative Law

This law states that the operation can be performed in any order when the variables priority is
same. As '*' and '/' have same priority. In the below diagram, the associative law is applied to
the 2-input OR gate.

For three variables, the associative law of addition is written as:

A + (B + C) = (A + B) + C

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For three variables, the associative law of multiplication is written as:

A(BC) = (AB)C

According to this law, no matter in what order the variables are grouped when ANDing more
than two variables. In the below diagram, the associative law is applied to 2-input AND gate.

Distributive Law:

According to this law, if we perform the OR operation of two or more variables and then
perform the AND operation of the result with a single variable, then the result will be similar to
performing the AND operation of that single variable with each two or more variable and then
perform the OR operation of that product. This law explains the process of factoring.

For three variables, the distributive law is written as:

A(B + C) = AB + AC

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8.11.2023 15:38 Laws and Rules of Boolean algebra - Javatpoint

Rules of Boolean algebra

There are the following rules of Boolean algebra, which are mostly used in manipulating and
simplifying Boolean expressions. These rules plays an important role in simplifying boolean
expressions.

1. A+0=A 7. A.A=A

2. A+1=1 8. A.A'=0

3. A.0=0 9. A''=A

4. A.1=A 10. A+AB=A

5. A+A=A 11. A+A'B=A+B

6. A+A'=1 12. (A+B)(A+C)=A+BC

Rule 1: A + 0 = A

Let's suppose; we have an input variable A whose value is either 0 or 1. When we perform OR
operation with 0, the result will be the same as the input variable. So, if the variable value is 1,
then the result will be 1, and if the variable value is 0, then the result will be 0.
Diagrammatically, this rule can be defined as:

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Rule 2: (A + 1) = 1

Let's suppose; we have an input variable A whose value is either 0 or 1. When we perform OR
operation with 1, the result will always be 1. So, if the variable value is either 1 or 0, then the
result will always be 1. Diagrammatically, this rule can be defined as:

Rule 3: (A.0) = 0

Let's suppose; we have an input variable A whose value is either 0 or 1. When we perform the
AND operation with 0, the result will always be 0. This rule states that an input variable ANDed
with 0 is equal to 0 always. Diagrammatically, this rule can be defined as:

Rule 4: (A.1) = A

Let's suppose; we have an input variable A whose value is either 0 or 1. When we perform the
AND operation with 1, the result will always be equal to the input variable. This rule states that
an input variable ANDed with 1 is equal to the input variable always. Diagrammatically, this rule
can be defined as:

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Rule 5: (A + A) = A

Let's suppose; we have an input variable A whose value is either 0 or 1. When we perform the
OR operation with the same variable, the result will always be equal to the input variable. This
rule states an input variable ORed with itself is equal to the input variable always.
Diagrammatically, this rule can be defined as:

Rule 6: (A + A') = 1

Let's suppose; we have an input variable A whose value is either 0 or 1. When we perform the
OR operation with the complement of that variable, the result will always be equal to 1. This
rule states that a variable ORed with its complement is equal to 1 always. Diagrammatically, this
rule can be defined as:

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Rule 7: (A.A) = A

Let's suppose; we have an input variable A whose value is either 0 or 1. When we perform the
AND operation with the same variable, the result will always be equal to that variable only. This
rule states that a variable ANDed with itself is equal to the input variable always.
Diagrammatically, this rule can be defined as:

Rule 8: (A.A') = 0

Let's suppose; we have an input variable A whose value is either 0 or 1. When we perform the
AND operation with the complement of that variable, the result will always be equal to 0. This
rule states that a variable ANDed with its complement is equal to 0 always. Diagrammatically,
this rule can be defined as:

Rule 9: A = (A')'

This rule states that if we perform the double complement of the variable, the result will be the
same as the original variable. So, when we perform the complement of variable A, then the
result will be A'. Further if we again perform the complement of A', we will get A, that is the
original variable.

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Rule 10: (A + AB) = A

We can prove this rule by using the rule 2, rule 4, and the distributive law as:

A + AB = A(1 + B) Factoring (distributive law)

A + AB = A.1 Rule 2: (1 + B)= 1
A + AB = A Rule 4: A .1 = A

Rule 11: A + AB = A + B

We can prove this rule by using the above rules as:

A + AB = (A + AB)+ AB Rule 10: A = A + AB

A+AB= (AA + AB)+ AB Rule 7: A = AA
A+AB=AA +AB +AA +AB Rule 8: adding AA = 0
A+AB= (A + A)(A + B) Factoring
A+AB= 1.(A + B) Rule 6: A + A = 1
A+AB=A + B Rule 4: drop the 1

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Rule 12: (A + B)(A + C) = A + BC

We can prove this rule by using the above rules as:

(A + B)(A + C)= AA + AC + AB + BC Distributive law

(A + B)(A + C)= A + AC + AB + BC Rule 7: AA = A
(A + B)(A + C)= A( 1 + C)+ AB + BC Rule 2: 1 + C = 1
(A + B)(A + C)= A.1 + AB + BC Factoring (distributive law)
(A + B)(A + C)= A(1 + B)+ BC Rule 2: 1 + B = 1
(A + B)(A + C)= A.1 + BC Rule 4: A .1 = A
(A + B)(A + C)= A + BC

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8.11.2023 15:39 Logic Gates in Digital Electronics - Javatpoint

Logic Gates
Logic gates play an important role in circuit design and digital systems. It is a building block of
a digital system and an electronic circuit that always have only one output. These gates can
have one input or more than one input, but most of the gates have two inputs. On the basis of
the relationship between the input and the output, these gates are named as AND gate, OR
gate, NOT gate, etc.

There are different types of gates which are as follows:

AND Gate
This gate works in the same way as the logical operator "and". The AND gate is a circuit that
performs the AND operation of the inputs. This gate has a minimum of 2 input values and an
output value.

Y=A AND B AND C AND D……N

Y=A.B.C.D……N
Y=ABCD……N

Logic Design

Truth Table

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OR Gate
This gate works in the same way as the logical operator "or". The OR gate is a circuit which
performs the OR operation of the inputs. This gate also has a minimum of 2 input values and
an output value.

Y=A OR B OR C OR D……N
Y=A+B+C+D……N

Logic Design

Truth Table

NOT Gate
The NOT gate is also called an inverter. This gate gives the inverse value of the input value as a
result. This gate has only one input and one output value.

Y=NOT A
Y=A'

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Logic Design

Truth Table

NAND Gate
The NAND gate is the combination of AND gate and NOT gate. This gate gives the same result
as a NOT-AND operation. This gate can have two or more than two input values and only one
output value.

Y=A NOT AND B NOT AND C NOT AND D……N

Y=A NAND B NAND C NAND D……N

Logic Design

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Truth Table

NOR Gate
The NOR gate is the combination of an OR gate and NOT gate. This gate gives the same result
as the NOT-OR operation. This gate can have two or more than two input values and only one
output value.

Y=A NOT OR B NOT OR C NOT OR D……N

Y=A NOR B NOR C NOR D……N

Logic Design

Truth Table

XOR Gate
The XOR gate is also known as the Ex-OR gate. The XOR gate is used in half and full adder and
subtractor. The exclusive-OR gate is sometimes called as EX-OR and X-OR gate. This gate can
have two or more than two input values and only one output value.

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Y=A XOR B XOR C XOR D……N

Y=A⨁B⨁C⨁D……N
Y=AB'+A'B

Logic Design

Truth Table

XNOR Gate
The XNOR gate is also known as the Ex-NOR gate. The XNOR gate is used in half and full adder
and subtractor. The exclusive-NOR gate is sometimes called as EX-NOR and X-NOR gate. This
gate can have two or more than two input values and only one output value.

Y=A XNOR B XNOR C XNOR D……N

Y=A⊖B⊖C⊖D……N
Y=A'B'+AB

Logic Design

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Truth Table

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8.11.2023 15:39 AND Gate in Digital Electronics - Javatpoint

AND Gate
The AND gate plays an important role in the digital logic circuit. The output state of the AND
gate will always be low when any of the inputs states is low. Simply, if any input value in the
AND gate is set to 0, then it will always return low output(0).

The logic or Boolean expression for the AND gate is the logical multiplication of inputs denoted
by a full stop or a single dot as

A.B=Y

The value of Y will be true when both the inputs A and B are set to true.

Types of Digital Logic AND Gate

The AND gate is classified into three types based on the input it takes. These are the following
types of AND gate:

The 2-input AND Gate

This is the simple formation of the AND gate. In this type of AND gate, there are only two input
values and an output value. There are 22=4 possible combinations of inputs. The truth table
and logic design are given below:

Logic Design

Truth Table

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The 3-input AND Gate

Unlike 2-input AND gate, the 3-input AND gate have three inputs. The Boolean expression of
the logic AND gate is defined as the binary operation dot(.). The AND gate can be cascaded
together to form any number of individual inputs. There are 23=8 possible combinations of
inputs. The truth table and logic design is given below:

Logic Design

Truth Table

The Multi-input AND Gate

In digital electronics, we can form n-input AND gate also. If there are n inputs, then (N/2)+1
AND gates will be used.

For example:

If we have 6 inputs A, B, C. D, E, F, then 4 AND gates are used in the logic design of 6-input
AND gate. There is the following expression of the 6-input AND gate:

Y=(A.B).(C.D).(E.F)

In simple words, it is expressed as:

Y=A AND B AND C AND D AND E AND F

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Logic Design

Truth Table

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8.11.2023 15:40 OR Gate in Digital Electronics - Javatpoint

OR Gate
The OR gate is a mostly used digital logic circuit. The output state of the OR gate will always be
low when both of the inputs states is low. Simply, if any input value in the OR gate is set to 1,
then it will always return high-level output(1).

The logic or Boolean expression for the OR gate is the logical addition of inputs denoted by
plus sign(+) as

A+B=Y

The value of Y will be true when one of the inputs is set to true.

Types of Digital Logic AND Gate

Just like AND gate, the OR gate is also classified into three types based on the input it takes.
These are the following types of OR gate:

The 2-input OR gate

This is the simple form of the OR gate. In this type of OR gate, there are only two input values
and an output value. There are 22=4 possible combinations of inputs. The truth table and logic
design are given below:

Logic Design

Truth Table

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The 3-input OR gate

Just like AND gate, the OR gate can also have any number of individual inputs. The Boolean
expression of the logical OR gate is defined as the binary operation plus(+). Like AND gate, OR
gate can also be cascaded together to form any number of individual inputs. There are 23=8
possible combinations of inputs. The truth table and logic design are given below:

Logic Design

Truth Table

The Multi-input OR Gate

The n-input OR gate can also be formed. If there are n inputs, then (N/2)+1 OR gates will be
used.

For example:

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If we have 6 inputs A, B, C. D, E, F, then 4 OR gates are used in the logic design of the 6-input
OR gate. There is the following expression of the 6-input OR gate:

Y=(A+B)+(C+D)+(E+F)

In simple words, it is expressed as:

Y=A OR B OR C OR D OR E OR F

Logic Design

Truth Table

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8.11.2023 15:40 NOT Gate in Digital Electronics - Javatpoint

NOT Gate
The NOT gate is the most basic logic gate of all other logic gates. NOT gate is also known as an
inverter or an inverting Buffer. NOT gate only has one input and one output. When the input
signal is "Low", the output signal is "High" and when the input signal is "High", the output is
"Low". The Boolean expression for the NOT gate is as follows:

A'=Y

When A is not true,then Y is true

The standard NOT gate is given a symbol that is shaped like a triangle with a circle at the end,
pointing to the right. This circle is known as an "invert bubble" and is used to represent the
logical operation of the NOT function in the NOT, NAND and NOR symbols in their output.

Logic Design

Truth Table

The complement value is generated by the NOT gate. The NOT gate is so-called because when
the input signal is 0, the output signal will NOT be 0, Similarly, when the input signal is 1, the
output signal will NOT be 1.

In the NOT gate, the bubble denotes the single inversion of the output signal. But this bubble
can also exist on the gate's input to indicate an active-less input. This reversal of the input
signal is not limited only to the NOT gate, but can also be used on any digital circuit or gate, as

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shown with the operation of inversion, whether it is at the input or output terminals. The
easiest way is to think of the bubble as an inverter.

Use of Active-low Input Bubble

Equivalent Gates
The NOT gate can also be formed with the help of the universal gates, i.e., NAND and NOR. For
this, we have to connect both the inputs together to a common input signal. The NOT gate
representation of NAND and NOR gate is as follows:

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8.11.2023 15:40 NAND Gate in Digital Electronics - Javatpoint

NAND Gate
The NAND gate is a special type of logic gate in the digital logic circuit. The NAND gate is the
universal gate. It means all the basic gates such as AND, OR, and NOT gate can be constructed
using a NAND gate. The NAND gate is the combination of the NOT-AND gate. The output state
of the NAND gate will be low only when all the inputs are high. Simply, this gate returns the
complement result of the AND gate.

The logic or Boolean expression for the NAND gate is the complement of logical multiplication
of inputs denoted by a full stop or a single dot as

(A.B)'=Y

The value of Y will be true when any one of the input is set to 0.

Types of Digital Logic AND Gate

The NAND gate is also classified into three types based on the input it takes. These are the
following types of AND gate:

The 2-input NAND Gate

This is the simple formation of the NAND gate. In this type of NAND gate, there are only two
input values and an output value. There are 22=4 possible combinations of inputs. The truth
table and logic design are given below:

Logic Design

Truth Table

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The 3-input NAND Gate

Unlike the 2-input NAND gate, the 3-input NAND gate has three inputs. The Boolean
expression of the logic NAND gate is defined as the binary operation dot(.). The NAND gate
can be cascaded together to form any number of individual inputs. There are 23=8 possible
combinations of inputs. The truth table and logic design are given below:

Logic Design

Truth Table

The Multi-input NAND Gate

Just like AND, NOT, and OR gate, we can also form n-input NAND gate. If the number of inputs
required is odd, any "unused" input can be held high by directly connecting it to the power
supply using high "suitable" pull-up resistors. There is the following expression of the 4-input
NAND gate:

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Y=((A.B).(C.D))'

In simple words, it is expressed as:

Y=A NAND B NAND C NAND D

Logic Design

Truth Table

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8.11.2023 15:40 NAND Gate in Digital Electronics - Javatpoint

AND gate using NAND gate

OR gate using NAND gate.

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NOT gate using NAND gate

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8.11.2023 15:40 NOR Gate in Digital Electronics - Javatpoint

NOR Gate
The NOR gate is also a universal gate. So, we can also form all the basic gates using the NOR
gate. The NOR gate is the combination of the NOT-OR gate. The output state of the NOR gate
will be high only when all of the inputs are low. Simply, this gate returns the complement result
of the OR gate.

The logical or Boolean expression for the NOR gate is the complement of logical multiplication
of inputs denoted by the plus sign as

(A+B)'=Y

The value of Y will be true when all of its inputs are set to 0.

Types of Digital Logic NOR Gate

The NOR gate is also classified into three types based on the input it takes. These are the
following types of NOR gate:

The 2-input NOR gate

Just like other gates, it is also a simple form of the NOR gate. In this type of NOR gate, there
are only two input values and an output value. There are 22=4 possible combinations of inputs.
The truth table and logic design are given below:

Logic Design

Truth Table

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The 3-input NOR gate

Unlike the 2-input N gate, the 3-input NOR gate has three inputs. The Boolean expression of
the logic NOR gate is defined as the binary operation addition (+). The NOR gate can be
cascaded together to form any number of individual inputs. There are 23=8 possible
combinations of inputs. The truth table and logic design are given below:

Logic Design

Truth Table

The Multi-input NOR Gate

Just like the NAND gate, we can also form the n-input NOR gate. If the number of inputs
required is odd, any "unused" input can be held low by directly connecting it to the power
supply using low "suitable" pull-up resistors. There is the following expression of the 4-input
NOR gate:

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Y=((A+B)+(C+D))'

In simple words, it is expressed as:

Y=A NOR B NOR C NOR D

Logic Design

Truth Table

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AND gate using NOR gate

OR gate using NOR gate

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NOT gate using NOR gate

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8.11.2023 15:41 XOR gate - Javatpoint

XOR gate
The XOR gate stands for the Exclusive-OR gate. This gate is a special type of gate used in
different types of computational circuits. Apart from the AND, OR, NOT, NAND, and NOR gate,
there are two special gates, i.e., Ex-OR and Ex-NOR. These gates are not basic gates in their
own and are constructed by combining with other logic gates. Their Boolean output function is
significant enough to be considered as a complete logic gate. The XOR and XNOR gates are the
hybrids gates.

The 2-input OR gate is also known as the Inclusive-OR gate because when both inputs A and B
are set to 1, the output comes out 1(high). In the Ex-OR function, the logic output "1" is
obtained only when either A="1" or B="1" but not both together at the same time. Simply, the
output of the XOR gate is high(1) only when both the inputs are different from each other.

The plus(+) sign within the circle is used as the Boolean expression of the XOR gate. So, the
symbol of the XOR gate is ⨁. This Ex-OR symbol also defines the "direct sum of sub-objects"
expression. These are the following types of Exclusive-OR gate:

2-input Ex-OR gate

This is a simple form of the hybrid gate XOR. In this type of XOR gate, there are only two input
values and an output value. There are 22=4 possible combinations of inputs. The output level is
high when both inputs are set to a different logic level. The Boolean expression of 2-input XOR
gate is as follows:

Y=(A⨁B)
Y=(A' B+AB')

The truth table and logic design are given below:

Logic Design

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Truth Table

Input Output

A B Y

0 0 0

0 1 1

1 0 1

1 1 0

The 3-input XOR Gate

Unlike the 2-input XOR gate, the 3-input XOR gate has three inputs. There are 23=8 possible
combinations of inputs. The Boolean expression of the logical Ex-OR gate is as follows:

Y=A⨁B⨁C
Y=A(BC)'+A' BC'+(AB)' C+ABC

The truth table and logic design are given below:

Logic Design

Truth Table

Input Output

A B C Y

0 0 0 0

0 0 1 1

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0 1 0 1

0 1 1 0

1 0 0 1

1 0 1 0

1 1 0 0

1 1 1 1

Ex-OR gate equivalent circuit

We can form the XOR or Ex-OR gate using gates such as AND, OR, and a universal gate NAND.
The main disadvantage of this implementation is that we need to use different types of gates
to form a single XOR gate. By using only the NAND gate, we can implement the Ex-OR gate
also. This is an easier way of producing Ex-OR gate functionality.

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Use of Ex-OR gate

The Ex-or gate plays an important role in constructing digital circuits that perform arithmetic
operations and calculations. Especially Adders and Half-Adders, as they can provide a "carry-
bit" function or as a controlled inverter, where one input passes the binary data, and the other
input is supplied with a control signal.

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8.11.2023 15:41 XNOR Gate - Javatpoint

XNOR Gate
The XNOR gate is the complement of the XOR gate. It is a hybrid gate. Simply, it is the
combination of the XOR gate and NOT gate. The output level of the XNOR gate is high only
when both of its inputs are the same, either 0 or 1. The symbol of the XNOR gate is the same as
XOR, only complement sign is added. Sometimes, the XNOR gate is also called the Equivalence
gate.

2-input Ex-NOR gate

It is a simple form of the hybrid gate XNOR. In this type of XNOR gate, there are only two input
values and an output value. There are 22=4 possible combinations of inputs. The output level is
high when both inputs are set to high(1). The Boolean expression of 2-input XNOR gate is as
follows:

Y=(A⨁B)'
Y=((AB)'+AB)

The truth table and logic design are given below:

Logic Design

Truth Table

Input Output

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A B Y

0 0 1

0 1 0

1 0 0

1 1 1

The 3-input XNOR Gate

Unlike the 2-input XNOR gate, the 3-input XNOR gate has three inputs. There are 23=8
possible combinations of inputs. The Boolean expression of the logical Ex-OR gate is as follows:

Y=(A⨁B⨁C)'
Y=(ABC)'+ABC'+AB'C+A'BC

The truth table and logic design are given below:

Logic Design

Truth Table

Input Output

A B C Y

0 0 0 1

0 0 1 0

0 1 0 0

0 1 1 1

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1 0 0 0

1 0 1 1

1 1 0 1

1 1 1 0

Ex-OR gate equivalent circuit

We can form the XNOR or Ex-NOR gate using the gates such as AND, OR, and NOT gate. The
main disadvantage of this implementation is that we use different types of gates to form a
single XNOR gate. By using the NAND gates only, we can implement the Ex-NOR gate also.
This is an easier way of producing Ex-NOR gate functionality.

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Use of Ex-OR gate

Ex-NOR gates are used mainly in electronic circuits that perform arithmetic operations
and data checking such as Adders, Subtractors or Parity Checkers, etc. As the Ex-NOR gate
gives an output of logic level "1," whenever its two inputs are equal, it can be used to
compare the magnitude of two binary digits or numbers and so Ex-NOR gates are used in
Digital Comparator circuits.

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8.11.2023 15:42 Minterm and Maxterm - Javatpoint

Minterm and Maxterm

There are two ways in which we can put the Boolean function. These ways are the minterm
canonical form and maxterm canonical form.

Literal
A Literal signifies the Boolean variables including their complements. Such as B is a boolean
variable and its complements are ~B or B', which are the literals.

Minterm
The product of all literals, either with complement or without complement, is known as
minterm.

Example

The minterm for the Boolean variables A and B is:

A.B
A.~B
~A.B

The complement variables ~A and ~B can also be written as A' and B' respectively. Thus, we
can write the minterm as:

A.B'
A'.B

Minterm from values

Using variable values, we can write the minterms as:

1. If the variable value is 1, we will take the variable without its complement.

2. If the variable value is 0, take its complement.

Example

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Let's assume that we have three Boolean variables A, B, and C having values

A=1
B=0
C=0

Now, we will take the complement of the variables B and C because these values are 0 and will
take A without complement. So, the minterm will be:

Minterm=A.B'C'

Let's take another example in which we have two variables B and C having the value

B=0
C=1

Minterm=B'C

Shorthand notation for minterm

We know that, when Boolean variables are in the form of minterm, the variables will appear in
the product. There are the following steps for getting the shorthand notation for minterm.

In the first step, we will write the term consisting of all the variables

Next, we will write 0 in place of all the complement variables such as ~A or A'.

We will write 1 in place of all the non-complement variables such as A or b.

Now, we will find the decimal number of the binary formed from the above steps.

In the end, we will write the decimal number as a subscript of letter m(minterm). Let's
take some example to understand the theory of shorthand notation

Example 1: Minterm = AB'

First, we will write the minterm:

Minterm = AB'

Now, we will write 0 in place of complement variable B'.

Minterm = A0

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We will write 1 in place of non-complement variable A.

Minterm = 10

The binary number of the minterm AB' is 10. The decimal point number of (10)2 is 2. So,
the shorthand notation of AB' is
Minterm = m2

Example 2: Minterm = AB'C'

First, we will write the minterm:

Minterm = AB'C'

Now, we will write 0 in place of complement variables B' and C'.

Minterm = A00

We will write 1 in place of non-complement variable A.

Minterm = 100

The binary number of the minterm AB'C' is 100. The decimal point number of (100)2 is 4.
So, the shorthand notation of AB'C' is
Minterm = m4

Maxterm
The sum of all literals, either with complement or without complement, is known as maxterm.

Example:

The maxterm for the Boolean variables A and B will be:

A+B
A+~B
~A+B

We know that the complement variables ~A and ~B can be written as A' and B' respectively. So,
the above maxterm can be written as

A+B'
A'+B

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Maxterm from values

Using the given variable values, we can write the maxterm as:

1. If the variable value is 1, then we will take the variable without a complement.

2. If the variable value is 0, take the complement of the variable.

Example

Let's assume that we have three Boolean variables A, B., and C having values

A=1
B=0
C=0

Now, we will take the complement of the variables B and C because these values are 0 and will
take A without complement. So, the maxterm will be:

Maxterm=A+B'+C'

Let's take another example in which we have two variables B and C having the value

B=0
C=1

Maxterm=B'+C

Shorthand notation for maxterm

We know that, when Boolean variables are in the form of maxterm, the variables will appear in
sum. The steps for the maxterm are same as minterm:

In the first step, we will write the term consisting of all the variables

Next, we will write 0 in place of all the complement variables such as ~A or A'.

We will write 1 in place of all the non-complement variables such as A or b.

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Now, we will find the decimal number of the binary formed from the above steps.

In the end, we will write the decimal number as a subscript of letter Here, M denotes
maxterm.

Let's take some example to understand the theory of shorthand notation

Example 1: Maxterm = A+B'

First, we will write the minterm:

Maxterm = A+B'

Now, we will write 0 in place of complement variable B'.

We will write 1 in place of non-complement variable A.

The binary number of the maxterm A+B' is 10. The decimal point number of (10)2 is 2.
So, the shorthand notation of A+B' is
Maxterm = M2

Example 2: Maxterm = A+B'+C'

First, we will write the maxterm:

Maxterm = A+B'+C'

Now, we will write 0 in place of complement variables B' and C'.

We will write 1 in place of non-complement variable A.

The binary number of the maxterm A+B'+C' is 100. The decimal point number of (100)2
is 4. So, the maxterm of A+B'+C' is m4.

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8.11.2023 15:42 Sum of product(SOP) - Javatpoint

Sum of product(SOP)
A canonical sum of products is a boolean expression that entirely consists of minterms. The
Boolean function F is defined on two variables X and Y. The X and Y are the inputs of the
boolean function F whose output is true when any one of the inputs is set to true. The truth
table for Boolean expression F is as follows:

Inputs Output

X Y F

0 0 0

0 1 1

1 0 1

1 1 1

In our previous section, we learned about how we can form the minterm from the variable's
value. Now, a column will be added for the minterm in the above table. The complement of the
variables is taken whose value is 0, and the variables whose value is 1 will remain the same.

Inputs Output Minterm

X Y F M

0 0 0 X'Y'

0 1 1 X'Y

1 0 1 XY'

1 1 1 XY

Now, we will add all the minterms for which the output is true to find the desired canonical
SOP(Sum of Product) expression.

F=X' Y+XY'+XY

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Converting Sum of Products (SOP) to shorthand notation

The process of converting SOP form to shorthand notation is the same as the process of
finding shorthand notation for minterms. There are the following steps to find the shorthand
notation of the given SOP expression.

Write the given SOP expression.

Find the shorthand notation of all the minterms.

Replace the minterms with their shorthand notations in the given expression.

Example: F = X'Y+XY'+XY

1. Firstly, we write the SOP expression:

F = X'Y+XY'+XY

2. Now, we find the shorthand notations of the minterms X'Y, XY', and XY.

X'Y = (01)2 = m1
XY' = (10)2 = m2
XY = (11)2 = m3

3. In the end, we replace all the minterms with their shorthand notations:

F=m1+m2+m3

Converting shorthand notation to SOP expression

The process of converting shorthand notation to SOP is the reverse process of converting SOP
expression to shorthand notation. Let's see an example to understand this conversion.

Example:

Let us assume that we have a boolean function F, which defined on two variables X and Y. The
minterms for the function F are expressed as shorthand notation is as follows:

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F=∑(1,2,3)

Now, from this expression, we will find the SOP expression. The Boolean function F has two
input variables X and y and the output of F=1 for m1, m2, and m3, i.e., 1st, 2nd, and 3rd
combinations. So,

F=∑(1,2,3)
F= m1 + m2 + m3
F= 01 + 10 + 11

Now, we replace zeros with either X' or Y' and ones with either X or Y. Simply, the complement
variable is used when the variable value is 1 otherwise the non-complement variable is used.

F = ∑(1,2,3)
F=01+10+11
F= A'B + AB' + AB

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8.11.2023 15:42 Product of Sum (POS) - Javatpoint

Product of Sum (POS)

A canonical product of sum is a boolean expression that entirely consists of maxterms. The
Boolean function F is defined on two variables X and Y. The X and Y are the inputs of the
boolean function F whose output is true when only one of the inputs is set to true. The truth
table for Boolean expression F is as follows:

Inputs Output

X Y F

0 0 0

0 1 1

1 0 1

1 1 0

In our minterm and maxterm section, we learned about how we can form the maxterm from
the variable's value. A column will be added for the maxterm in the above table. The
complement of the variables is taken whose value is 0, and the variables whose value is 1 will
remain the same.

Inputs Output Minterm

X Y F M

0 0 0 X'+Y'

0 1 1 X'+Y

1 0 1 X+Y'

1 1 1 X+Y

Now, we will multiply all the minterms for which the output is false to find the desired canonical
POS(Product of sum) expression.

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8.11.2023 15:42 Product of Sum (POS) - Javatpoint

F=(X'+Y').(X+Y)

Converting Product of Sum (POS) to shorthand notation

The process of converting POS form to shorthand notation is the same as the process of
finding shorthand notation for maxterms. There are the following steps used to find the
shorthand notation of the given POS expression.

Write the given POS expression.

Find the shorthand notation of all the maxterms.

Replace the minterms with their shorthand notations in the given expression.

Example: F = (X'+Y').(X+Y)

1. Firstly, we will write the POS expression:

F = (X'+Y').(X+Y)

2. Now, we will find the shorthand notations of the maxterms X'+Y' and X+Y.

X'+Y' = (00)2 = M0
X+Y = (11)2 = M3

3. In the end, we will replace all the minterms with their shorthand notations:

F=M0.M3

Converting shorthand notation to POS expression

The process of converting shorthand notation to POS is the reverse process of converting POS
expression to shorthand notation. Let's see an example to understand this conversion.

Example:

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Let us assume that we have a boolean function F, defined on two variables X and Y. The
maxterms for the function F are expressed as shorthand notation is as follows:

F=∏(1,2,3)

Now, from this expression, we find the POS expression. The Boolean function F has two input
variables X and Y and the output of F=0 for M1, M2, and M3, i.e., 1st, 2nd, and 3rd
combinations. So,

F=∏(1,2,3)
F= M1.M2.M3
F= 01.10.11

Next, we replace zeros with either X or Y and ones with either X' or Y'. Simply, if the value of the
variable is 1, then we take the complement of that variable, and if the value of the variable is 0,
then we take the variable "as is".

F = ∑(1,2,3)
F=01.10.11
F=(A+B').( A'+B).( A'+B')

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8.11.2023 15:43 Conversion between Canonical Forms - Javatpoint

Conversion between Canonical Forms

In our previous section, we learned about SOP(sum of product) and POS(product of sum)
expressions and calculated POS and SOP forms for different Boolean functions. In this section,
we will learn about how we can represent the POS form in the SOP form and SOP form in the
POS form.

For converting the canonical expressions, we have to change the symbols ∏, ∑. These symbols
are changed when we list out the index numbers of the equations. From the original form of
the equation, these indices numbers are excluded. The SOP and POS forms of the boolean
function are duals to each other.

There are the following steps using which we can easily convert the canonical forms of the
equations:

1. Change the operational symbols used in the equation, such as ∑, ∏.

2. Use the Duality's De-Morgan's principal to write the indexes of the terms that are not
presented in the given form of an equation or the index numbers of the Boolean
function.

Conversion of POS to SOP form

For getting the SOP form from the POS form, we have to change the symbol ∏ to ∑. After that,
we write the numeric indexes of missing variables of the given Boolean function.

There are the following steps to convert the POS function F = Π x, y, z (2, 3, 5) = x y' z' + x y' z +
x y z' into SOP form:

1. In the first step, we change the operational sign to Σ.

2. Next, we find the missing indexes of the terms, 000, 110, 001, 100, and 111.

3. Finally, we write the product form of the noted terms.

000 = x' * y' * z'

001 = x' * y' * z

100 = x * y' * z'

110 = x * y* z'
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8.11.2023 15:43 Conversion between Canonical Forms - Javatpoint

111 = x * y * z

So the SOP form is:

F = Σ x, y, z (0, 1, 4, 6, 7) = (x' * y' * z') + (x' * y' * z) + (x * y' * z') + (x * y* z') + (x * y * z)

Conversion of SOP form to POS form

For getting the POS form of the given SOP form expression, we will change the symbol ∏ to ∑.
After that, we will write the numeric indexes of the variables which are missing in the boolean
function.

There are the following steps used to convert the SOP function F = ∑ x, y, z (0, 2, 3, 5, 7) = x' y'
z' + z y' z' + x y' z + xyz' + xyz into POS:

In the first step, we change the operational sign to ∏.

We find the missing indexes of the terms, 001, 110, and 100.

We write the sum form of the noted terms.

001 = (x + y + z)

100 = (x + y' + z')

110 = (x + y' + z')

So, the POS form is:

F = Π x, y, z (1, 4, 6) = (x + y + z) * (x + y' + z') * (x + y' + z')

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8.11.2023 15:43 Conversion between Canonical Forms - Javatpoint

Conversion of SOP form to standard SOP form or Canonical

SOP form
For getting the standard SOP form of the given non-standard SOP form, we will add all the
variables in each product term which do not have all the variables. By using the Boolean
algebraic law, (x + x' = 0) and by following the below steps we can easily convert the normal
SOP function into standard SOP form.

Multiply each non-standard product term by the sum of its missing variable and its
complement.

Repeat step 1, until all resulting product terms contain all variables

For each missing variable in the function, the number of product terms doubles.

Example:

Convert the non standard SOP function F = AB + A C + B C

Sol:

F=AB+AC+BC
= A B (C + C') + A (B + B') C + (A + A') B C
= A B C + A B C' + A B C + A B' C + A B C + A' B C
= A B C + A B C' + A B' C + A' B C

So, the standard SOP form of non-standard form is F = A B C + A B C' + A B' C + A' B C

Conversion of POS form to standard POS form or Canonical

POS form
For getting the standard POS form of the given non-standard POS form, we will add all the
variables in each product term that do not have all the variables. By using the Boolean
algebraic law (x * x' = 0) and by following the below steps, we can easily convert the normal
POS function into a standard POS form.

By adding each non-standard sum term to the product of its missing variable and its
complement, which results in 2 sum terms

Applying Boolean algebraic law, x + y z = (x + y) * (x + z)

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By repeating step 1, until all resulting sum terms contain all variables

By these three steps, we can convert the POS function into a standard POS function.

Example:

F = (p' + q + r) * (q' + r + s') * (p + q' + r' + s)

1. Term (p' + q + r)

As we can see that the variable s or s' is missing in this term. So we add s*s' = 1 in this term.

(p' + q + r + s*s') = (p' + q + r + s) * (p' + q + r + s')

2. Term (q' + r + s')

Similarly, we add p*p' = 1 in this term for getting the term containing all the variables.

(q' + r + s' + p*p') = (p + q' + r + s') * (p' + q' + r + s')

3. Term (q' + r + s')

Now, there is no need to add anything because all the variables are contained in this term.

So, the standard POS form equation of the function is

F = (p' + q + r + s)* (p' + q + r + s')* (p + q' + r + s')* (p' + q' + r + s') * (p + q' + r' + s)

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8.11.2023 15:43 Karnaugh Map(K-Map) method - Javatpoint

Karnaugh Map(K-Map) method

The K-map is a systematic way of simplifying Boolean expressions. With the help of the K-map
method, we can find the simplest POS and SOP expression, which is known as the minimum
expression. The K-map provides a cookbook for simplification.

Just like the truth table, a K-map contains all the possible values of input variables and their
corresponding output values. However, in K-map, the values are stored in cells of the array. In
each cell, a binary value of each input variable is stored.

The K-map method is used for expressions containing 2, 3, 4, and 5 variables. For a higher
number of variables, there is another method used for simplification called the Quine-McClusky
method. In K-map, the number of cells is similar to the total number of variable input
combinations. For example, if the number of variables is three, the number of cells is 23=8, and
if the number of variables is four, the number of cells is 24. The K-map takes the SOP and POS
forms. The K-map grid is filled using 0's and 1's. The K-map is solved by making groups. There
are the following steps used to solve the expressions using K-map:

1. First, we find the K-map as per the number of variables.

2. Find the maxterm and minterm in the given expression.

3. Fill cells of K-map for SOP with 1 respective to the minterms.

4. Fill cells of the block for POS with 0 respective to the maxterm.

5. Next, we create rectangular groups that contain total terms in the power of two like 2, 4,
8, … and try to cover as many elements as we can in one group.

6. With the help of these groups, we find the product terms and sum them up for the SOP
form.

2 Variable K-map
There is a total of 4 variables in a 2-variable K-map. There are two variables in the 2-variable K-
map. The following figure shows the structure of the 2-variable K-map:

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In the above figure, there is only one possibility of grouping four adjacent minterms.

The possible combinations of grouping 2 adjacent minterms are {(m0, m1), (m2, m3), (m0,
m2) and (m1, m3)}.

3-variable K-map
The 3-variable K-map is represented as an array of eight cells. In this case, we used A, B, and C
for the variable. We can use any letter for the names of the variables. The binary values of
variables A and B are along the left side, and the values of C are across the top. The value of the
given cell is the binary values of A and B at left side in the same row combined with the value
of C at the top in the same column. For example, the cell in the upper left corner has a binary
value of 000, and the cell in the lower right corner has a binary value of 101.

The 4-Variable Karnaugh Map

The 4-variable K-map is represented as an array of 16 cells. Binary values of A and B are along
the left side, and the values of C and D are across the top. The value of the given cell is the
binary values of A and B at left side in the same row combined with the binary values of C and
D at the top in the same column. For example, the cell in the upper right corner has a binary
value of 0010, and the cell in the lower right corner has a binary value of 1010

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5-variable K-map
With the help of the 32- cell K-map, the boolean expression with 5 variables can be simplified.
For constructing a 5-variable K-map, we use two 4-variable K-maps. The cell adjacencies within
each of the 4- variable maps for the 5-variable map are similar to the 4- variable map.

A K-map for five variables (PQRST) can be constructed using two 4-variable maps. Each map
contains 16 cells with all combinations of variables Q, R, S, and T. One map is for P = 0, and the
other is for P = 1).

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8.11.2023 15:43 Karnaugh Map(K-Map) method - Javatpoint

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8.11.2023 15:43 Simplification of boolean expressions using Karnaugh Map - Javatpoint

Simplification of boolean expressions using

Karnaugh Map
As we know that K-map takes both SOP and POS forms. So, there are two possible solutions for
K-map, i.e., minterm and maxterm solution. Let's start and learn about how we can find the
minterm and maxterm solution of K-map.

Minterm Solution of K Map

There are the following steps to find the minterm solution or K-map:

Step 1:

Firstly, we define the given expression in its canonical form.

Step 2:

Next, we create the K-map by entering 1 to each product-term into the K-map cell and fill the
remaining cells with zeros.

Step 3:

Next, we form the groups by considering each one in the K-map.

Notice that each group should have the largest number of 'ones'. A group cannot contain an
empty cell or cell that contains 0.

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In a group, there is a total of 2n number of ones. Here, n=0, 1, 2, …n.

Example: 20=1, 21=2, 22=4, 23=8, or 24=16.

We group the number of ones in the decreasing order. First, we have to try to make the group
of eight, then for four, after that two and lastly for 1.

In horizontally or vertically manner, the groups of ones are formed in shape of rectangle and
square. We cannot perform the diagonal grouping in K-map.

The elements in one group can also be used in different groups only when the size of the
group is increased.

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The elements located at the edges of the table are considered to be adjacent. So, we can group
these elements.

We can consider the 'don't care condition' only when they aid in increasing the group-size.
Otherwise, 'don't care' elements are discarded.

Step 4:

In the next step, we find the boolean expression for each group. By looking at the common
variables in cell-labeling, we define the groups in terms of input variables. In the below
example, there is a total of two groups, i.e., group 1 and group 2, with two and one number of
'ones'.

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In the first group, the ones are present in the row for which the value of A is 0. Thus, they
contain the complement of variable A. Remaining two 'ones' are present in adjacent columns.
In these columns, only B term in common is the product term corresponding to the group as
A'B. Just like group 1, in group 2, the one's are present in a row for which the value of A is 1. So,
the corresponding variables of this column are B'C'. The overall product term of this group is
AB'C'.

Step 5:

Lastly, we find the boolean expression for the Output. To find the simplified boolean expression
in the SOP form, we combine the product-terms of all individual groups. So the simplified
expression of the above k-map is as follows:

A'+AB'C'

Let's take some examples of 2-variable, 3-variable, 4-variable, and 5-variable K-map examples.

Example 1: Y=A'B' + A'B+AB

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Simplified expression: Y=A'+B

Example 2: Y=A'B'C'+A' BC'+AB' C'+AB' C+ABC'+ABC

Simplified expression: Y=A+C'

Example 3: Y=A'B'C' D'+A' B' CD'+A' BCD'+A' BCD+AB' C' D'+ABCD'+ABCD

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Simplified expression: Y=BD+B'D'

Maxterm Solution of K-Map

To find the simplified maxterm solution using K-map is the same as to find for the minterm
solution. There are some minor changes in the maxterm solution, which are as follows:

1. We will populate the K-map by entering the value of 0 to each sum-term into the K-map
cell and fill the remaining cells with one's.

2. We will make the groups of 'zeros' not for 'ones'.

3. Now, we will define the boolean expressions for each group as sum-terms.

4. At last, to find the simplified boolean expression in the POS form, we will combine the
sum-terms of all individual groups.

Let's take some example of 2-variable, 3-variable, 4-variable and 5-variable K-map examples

Example 1: Y=(A'+B')+(A'+B)+(A+B)

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Simplified expression: A'B

Example 2: Y=(A + B + C') + (A + B' + C') + (A' + B' + C) + (A' + B' + C')

Simplified expression: Y=(A + C') .(A' + B')

Example 3: F(A,B,C,D)=π(3,5,7,8,10,11,12,13)

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8.11.2023 15:43 Simplification of boolean expressions using Karnaugh Map - Javatpoint

Simplified expression: Y=(A + C') .(A' + B')

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8.11.2023 15:44 De-Morgan's Theorem - Javatpoint

De-Morgan's Theorem
A famous mathematician DeMorgan invented the two most important theorems of boolean
algebra. The DeMorgan's theorems are used for mathematical verification of the equivalency of
the NOR and negative-AND gates and the negative-OR and NAND gates. These theorems play
an important role in solving various boolean algebra expressions. In the below table, the logical
operation for each combination of the input variable is defined.

Input variables Output Condition

A B AND NAND OR NOR

0 0 0 1 0 1

0 1 0 1 1 0

1 0 0 1 1 0

1 1 1 0 1 0

The rules of De-Morgan's theorem are produced from the Boolean expressions for OR, AND,
and NOT using two input variables x and y. The first theorem of Demorgan's says that if we
perform the AND operation of two input variables and then perform the NOT operation of the
result, the result will be the same as the OR operation of the complement of that variable. The
second theorem of DeMorgan says that if we perform the OR operation of two input variables
and then perform the NOT operation of the result, the result will be the same as the AND
operation of the complement of that variable.

De-Morgan's First Theorem

According to the first theorem, the complement result of the AND operation is equal to the OR
operation of the complement of that variable. Thus, it is equivalent to the NAND function and
is a negative-OR function proving that (A.B)' = A'+B' and we can show this using the following
table.

Inputs Output For Each Term

A B A.B (A.B)' A' B' A'A+B'

0 0 0 1 1 1 1

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8.11.2023 15:44 De-Morgan's Theorem - Javatpoint

0 1 0 1 1 0 1

1 0 0 1 0 1 1

1 1 1 0 0 0 0

De-Morgan's Second Theorem

According to the second theorem, the complement result of the OR operation is equal to the
AND operation of the complement of that variable. Thus, it is the equivalent of the NOR
function and is a negative-AND function proving that (A+B)' = A'.B' and we can show this using
the following truth table.

Inputs Output For Each Term

A B A+B (A+B)' A' B' A'.B'

0 0 0 1 1 1 1

0 1 1 0 1 0 0

1 0 1 0 0 1 0

1 1 1 0 0 0 0

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8.11.2023 15:44 De-Morgan's Theorem - Javatpoint

Let's take some examples in which we take some expressions and apply DeMorgan's theorems.

Example 1: (A.B.C)'

(A.B.C)'=A'+B'+C'

Example 2: (A+B+C)'

(A+B+C)'=A'.B'.C

Example 3: ((A+BC')'+D(E+F')')'

For applying the DeMorgan's theorem on this expression, we have to follow the following
expressions:

1) In complete expression, first, we find those terms on which we can apply the DeMorgan's
theorem and treat each term as a single variable.

So,

2) Next, we apply DeMorgan's first theorem. So,

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3) Next, we use rule number 9, i.e., (A=(A')') for canceling the double bars.

4) Next, we apply DeMorgan's second theorem. So,

5) Again apply rule number 9 to cancel the double bar

Now, this expression has no term in which we can apply any rule or theorem. So, this is the final
expression.

Example 3: (AB'.(A + C))'+ A'B.(A + B + C')'

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8.11.2023 15:44 De-Morgan's Theorem - Javatpoint

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8.11.2023 15:44 Don't Care Condition - Javatpoint

Don't Care Condition

The "Don't care" condition says that we can use the blank cells of a K-map to make a group of
the variables. To make a group of cells, we can use the "don't care" cells as either 0 or 1, and if
required, we can also ignore that cell. We mainly use the "don't care" cell to make a large group
of cells.

The cross(×) symbol is used to represent the "don't care" cell in K-map. This cross symbol
represents an invalid combination. The "don't care" in excess-3 code are 0000, 0001, 0010,
1101, 1110, and 1111 because they are invalid combinations. Apart from this, the 4-bit BCD to
Excess-3 code, the "don't care" are 1010, 1011, 1100, 1101, 1110, and 1111.
We can change the standard SOP function into a POS expression by making the "don't care"
terms the same as they are. The missing minterms of the POS form are written as maxterms of
the POS form. In the same way, we can change the standard POS function into an SOP
expression by making the "don't care" terms the same as they are. The missing maxterms of the
SOP form are written as minterm of the SOP form.

Example 1: Minimize f = m(1,5,6,12,13,14) + d(4) in SOP minimal form

Solution:

The k-map of the given function in the SOP form is as follows:

So, the minimized SOP form of the function is:

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f = BC' + BD' + A'C'D

Example 2: Minimize F(A,B,C,D) = m(0,1,2,3,4,5) + d(10,11,12,13,14,15) in SOP minimal

form

Solution:

The POS form of the given function is:

F(A,B,C,D) = M(6,7,8,9) + d(10,11,12,13,14,15)

The POS K-map for the given expression is:

So, the minimized POS form of the function is:

F = A'(B' + C')

Example-3:
Minimize the following function in SOP minimal form using K-Maps: F(A, B, C, D) = m(1,
2, 6, 7, 8, 13, 14, 15) + d(3, 5, 12)

Explanation:

The SOP K-map for the given expression is:

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8.11.2023 15:44 Don't Care Condition - Javatpoint

Therefore,

f = AC'D' + A'D + A'C + AB

Significance of "Don't Care" Conditions:

Don't Care conditions has the following significance with respect to the digital circuit design:

Simplification:

These conditions denote the set of inputs that never occurs for given digital circuits. Therefore,
to simplify the boolean output expressions, the 'don't care' are used.

Reduced Power Consumption:

The switching of the state is reduced when we group the terms long with "don't care". This
reduces the required memory space resulting in lower power consumption.

Lesser number of gates:

For reducing the number of gates that are used to implement the given expression,
simplification places an important role. So, the 'don't care' makes the logic design more
economical.

Prevention of Hazards:

In the digital system, the 'don't care' place an important role in hazards prevention.

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8.11.2023 15:44 Don't Care Condition - Javatpoint

States in Code Converters:

These also play an important role in code conversion. For example- In the design of a 4-bit
BCD-to-XS-3 code converter, the input combinations 1010, 1011, 1100, 1101, 1110, and 1111
are don't cares.

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8.11.2023 15:45 Binary to BCD code conversion - Javatpoint

Binary to BCD code conversion

BCD code plays an important role in digital circuits. The BCD stands for Binary Coded Decimal
Number. In BCD code, each digit of the decimal number is represented as its equivalent binary
number. So, the LSB and MSB of the decimal numbers are represented as its binary numbers.
There are the following steps to convert the binary number to BCD:

1. First, we will convert the binary number into decimal.

2. We will convert the decimal number into BCD.

Let's take an example to understand the process of converting a binary number into BCD

Example 1: (11110)2

1. First, convert the given binary number into a decimal number.

Binary Number: (11110)2

Finding Decimal Equivalent of the number:

Steps Binary Number Decimal Number

1) (11110)2 ((1 × 24) + (1 × 23) + (1 × 22) + (1 × 21) + (0 × 20))10

2) (11110)2 (16 + 8 + 4 + 2 + 0)10

3) (11110)2 (30)10

Decimal number of the Binary number (11110)2 is (30)10

2. Now, we convert the decimal to the BCD

We convert each digit of the decimal number into groups of the four-bit binary number.

Steps Decimal Number Conversion

Step 1 3010 (0011)2 (0000)2

Step 2 3010 (00110000)BCD

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Result:

(11110)2 = (00110000)BCD

Below is the table that contains the BCD code of the decimal and binary number.

Binary Code Decimal Number BCD Code

ABCD B4 :B3B2B1B0

0000 0 0:0000

0001 1 0:0001

0010 2 0:0010

0011 3 0:0011

0100 4 0:0100

0101 5 0:0101

0110 6 0:0110

0111 7 0:0111

1000 8 0:1000

1001 9 0:1001

1010 10 1:0000

1011 11 1:0001

1100 12 1:0010

1101 13 1:0011

1110 14 1:0100

1111 15 1:0101

In the above table, the most significant bit of the decimal number is represented by the bit B4,
and the least significant bits are represented by B3, B2, B1, and B0. From the above table, we
can express the SOP function for different bits of BCD code are as follows:
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The K-maps of the above SOP functions are as follows:

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BCD to Binary Conversion

The process of converting BCD code into Binary is opposite to the process of converting Binary
code into BCD. There are the following steps to convert the BCD code into Binary:

In the first step, we will convert the BCD number into a decimal by making the four-bit
groups and finding the equivalent decimal number for each group.

In the last step, we will convert a decimal number into Binary using the process of converting
decimal to binary number.

Example 1: (00101000)BCD

1) Convert BCD to Decimal

Make the groups of 4 digits and find the equivalent decimal number as:

Steps BCD Number Conversion

Step 1 (00101000)BCD (0010)2 (1000)2

Step 2 (00101000)BCD (2)10 (8)10

Step 3 (00101000)BCD (28)10

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The decimal number of the given BCD code is: (28)10

2. Convert Decimal to Binary

Use the long division method to convert the decimal number into a binary number as:

Steps Operation Result Remainder

1. 28 / 2 14 0

2. 14 / 2 7 0

3. 7/2 3 1

4. 3/2 1 1

5. 1/2 0 1

Arrange the remainders in the reverse order. So, the LSB of the binary number is the first
remainder, and the MSB of the binary number is the last remainder.

The binary number of the decimal number (18)10 is: (11100)2

Result:

(00101000)BCD = (11100)2

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8.11.2023 15:46 Binary to Gray code conversion - Javatpoint

Binary to Gray code conversion

The Binary to Gray code converter is a logical circuit that is used to convert the binary code into
its equivalent Gray code. By putting the MSB of 1 below the axis and the MSB of 1 above the
axis and reflecting the (n-1) bit code about an axis after 2n-1 rows, we can obtain the n-bit gray
code.

The 4-bit binary to gray code conversion table is as follows:

Decimal Number 4-bit Binary Code 4-bit Gray Code

ABCD G1 G2 G3 G4

0 0000 0000

1 0001 0001

2 0010 0011

3 0011 0010

4 0100 0110

5 0101 0111

6 0110 0101

7 0111 0100

8 1000 1100

9 1001 1101

10 1010 1111

11 1011 1110

12 1100 1010

13 1101 1011

14 1110 1001

15 1111 1000

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In 4-bit gray code, the 3-bit code is reflected against the axis drawn after the 24-1-1th =8th row.

How to Convert Binary to Gray Code

In the Gray code, the MSB will always be the same as the 1'st bit of the given binary
number.

In order to perform the 2nd bit of the gray code, we perform the exclusive-or (XOR) of
the 1'st and 2nd bit of the binary number. It means that if both the bits are different, the
result will be one else the result will be 0.

In order to get the 3rd bit of the gray code, we need to perform the exclusive-or (XOR) of
the 2nd and 3rd bit of the binary number. The process remains the same for the 4th bit of
the Gray code. Let's take an example to understand these steps.

Example

Suppose we have a binary number 01101, which we want to convert into Gray code. There are
the following steps which need to perform this conversion:

As we know that the 1st bit of the Gray code is the same as the MSB of the binary
number. In our example, the MSB is 0, so the MSB or 1st bit of the gray code is 0.

Next, we perform the XOR operation of the 1'st and the second binary number. The 1st
bit is 0, and the 2nd bit is 1. Both the bits are different, so the 2nd bit of the Gray code is
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1.

Now, we perform the XOR of the 2nd bit and 3rd bit of the binary number. The 2nd bit is
1, and the 3rd bit is also 1. These bits are the same, so the 3rd bit of the Gray code is 0.

Again perform the XOR operation of the 3rd and 4th bit of binary number. The 3rd bit is
1, and the 4th bit is 0. As these are different, the 4th bit of the Gray code is 1.

Lastly, perform the XOR of the 4th bit and 5th bit of the binary number. The 4th bit is 0,
and the 5th bit is 1. Both the bits are different, so that the 5th bit of the Gray code is 1.

The gray code of the binary number 01101 is 01011.

Gray to Binary Code Conversion

The Gray to Binary code converter is a logical circuit that is used to convert the gray code into
its equivalent binary code. There is the following circuit used to convert the Gray code to binary
number.

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Just like Binary to Gray code conversion; it is also a very simple process. There are the following
steps used to convert the Gray code into binary.

Just like binary to gray, in gray to binary, the 1st bit of the binary number is similar to the
MSB of the Gray code.

The 2nd bit of the binary number is the same as the 1st bit of the binary number when
the 2nd bit of the Gray code is 0; otherwise, the 2nd bit is altered bit of the 1st bit of
binary number. It means if the 1st bit of the binary is 1, then the 2nd bit is 0, and if it is 0,
then the 2nd bit be 1.

The 2nd step continues for all the bits of the binary number.

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Gray Code to Binary Conversion Example

Suppose we have the Gray code 01011, which we want to convert into a binary number. There
are the following steps which we need to perform for the conversion:

The 1'st bit of the binary number is the same as the MSB of the Gray code. The MSB of
the Gray code is 0, so the MSB of the binary number is 0.

Now, for the 2nd bit, we check the 2nd bit of the Gray code. The 2nd bit of the Gray code
is 1, so the 2nd bit of the binary number is one that is altered number of 1st

The next bit of the Gray code is 0; the 3rd bit is the same as the 2nd bit of the Gray code,
i.e., 1.

The 4th bit of the Gray code is 1; the 4th bit of the binary number is 0 that is the altered
number of the 3rd

The 5th bit of the Gray code is 1; the 5th bit of the binary number is 1; that is the altered
number of the 4th bit of the binary number.

So, the binary number of the Gray code 01011 is 01101.

The bits of 4-bit Gray code are considered as G4G3G2G1. Now from the conversion table,

The Karnaugh maps (K-maps) for G4, G3, G2, and G1 are as follows:

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8.11.2023 15:46 Binary to Excess-3 code conversion - Javatpoint

Binary to Excess-3 code conversion

The excess-3 code plays an important role in representing the decimal numbers. The Excess-3
code can also be represented as the XS-3 code. In Excess-3 code, each digit of the decimal
number is represented by adding 3 in each decimal digit. There are the following steps to
convert the binary number into Excess-3 code:

1. Convert the binary number into decimal.

2. Add 3 in each digit of the decimal number.

3. Find the binary code of each digit of the newly generated decimal number.

We can also add 0011 in each 4-bit BCD code of the decimal number for getting excess-3 code.

Let's take an example to understand the process of converting a binary number into Excess-3
code.

Example 1: Convert (11110)2 to Excess-3 using binary

1. First, convert the given binary number into a decimal number.

Binary Number: (11110)2

Finding Decimal Equivalent of the number:

Steps Binary Number Decimal Number

1) Hb (11110)2 ((1 × 24) + (1 × 23) + (1 × 22) + (1 × 21) + (0 × 20))10

2) (11110)2 (16 + 8 + 4 + 2 + 0)10

3) (11110)2 (30)10

Decimal number of the Binary number (11110)2 is (30)10

2. Now, we add 3 in each digit of the decimal number.

The decimal number is 30. Now, we will add 3 into the decimal number 30.

= 30+33
= 63

3. Now, we find the binary code of each digit of the decimal number 63.
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We write the binary code of each decimal digit in order to get Excess-3 code as:

Steps Decimal Number Conversion

Step 1 6310 (0110)2 (0011)2

Step 2 6310 (01100011)Excess-3

Result:

(11110)2 = (01100011)Excess-3

Below is the table that contains the excess-3 code of the decimal and BCD.

Decimal Digit BCD Code Excess-3 Code

ABCD B 3B 2B 1B 0

0 0000 0011

1 0001 0100

2 0010 0101

3 0011 0110

4 0100 0111

5 0101 1000

6 0110 1001

7 0111 1010

8 1000 1011

9 1001 1100

In the above table, the most significant bit of the decimal number is represented by the bit B3,
and the least significant bits are represented by B2, B1, and B0.

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8.11.2023 15:46 Binary to Excess-3 code conversion - Javatpoint

Excess-3 to Binary Conversion

The process of converting Excess-3 code into binary is opposite to the process of converting
Binary code into Excess-3. There are the following steps to convert the Excess-3 code into
binary:

In the first step, we will make the group of 4 bits and write the equivalent decimal
number from the Excess-3 table.

At last, we find the binary number of the decimal number using a decimal to binary
conversion.

Example 1: (01100011)Excess-3

1) Making groups of four bits and write their equivalent decimal number.

(01100011)Excess-3 = (0110 0011)Excess-3

From the Excess-3 table:

(0110)Excess-3 = (3)10

(0011)Excess-3 = (0)10

So, the decimal number of excess-3 code 01100011 is: (30)10

2) Find the binary number.

Now, find the binary number of the decimal number (30)10 using a decimal to binary
conversion as:

Divide the number 30 and its successive quotients with base 2.

Operation Quotient Remainder

30/2 15 0 (LSB)

15/2 7 1

7/2 3 1

3/2 1 1

1/2 0 1(MSB)

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8.11.2023 15:46 Binary to Excess-3 code conversion - Javatpoint

(30)10=(11110)2

So, the binary number of excess-3 code 01100011 is: (11110)2

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8.11.2023 15:47 BCD to Excess-3 conversion - Javatpoint

BCD to Excess-3 conversion

To understand the process of converting BCD to Excess-3, it is required to have knowledge of
Number System and Number Base Conversion.

The Excess-3 binary code is an example of a self-complementary BCD code. A self-

complementary binary code is a code which is always complimented in itself. By replacing the
bit 0 to 1 and 1 to 0 of a number, we find the 1's complement of the number. The sum of the
1'st complement and the binary number of a decimal is equal to the binary number of decimal
9.

The process of converting BCD to Excess-3 is quite simple from other conversions. The Excess-3
code can be calculated by adding 3, i.e., 0011 to each four-digit BCD code. Below is the truth
table for the conversion of BCD to Excess-3 code. In the below table, the variables A, B, C, and
D represent the bits of the binary numbers. The variable 'D' represents the LSB, and the variable
'A' represents the MSB. In the same way, the variables w, x, y, and z represent the bits of the
Excess-3 code. The variable 'z' represents the LSB, and the variable 'w' represents the MSB. The
'don't care conditions' is expressed by the variable 'X'.

Decimal Number BCD Code Excess-3 Code

A B C D W x y z

0 0 0 0 0 0 0 1 1

1 0 0 0 1 0 1 0 0

2 0 0 1 0 0 1 0 1

3 0 0 1 1 0 1 1 0

4 0 1 0 0 0 1 1 1

5 0 1 0 1 1 0 0 0

6 0 1 1 0 1 0 0 1

7 0 1 1 1 1 0 1 0

8 1 0 0 0 1 0 1 1

9 1 0 0 1 1 1 0 0

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10 1 0 1 0 X X X X

11 1 0 1 1 X X X X

12 1 1 0 0 X X X X

13 1 1 0 1 X X X X

14 1 1 1 0 X X X X

15 1 1 1 1 X X X X

Now, we will use the K-map method to design the logical circuit for the conversion of BCD to
Excess-3 code as:

So,

w=A+BC+BD
x=B' C+B' D+BC' D'
y=CD+C'D'
z=D'

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8.11.2023 15:47 BCD to Excess-3 conversion - Javatpoint

Example: (100001011001)BCD

To find the Excess-3 code of the given Excess-3 code, first, we will make the group of 4 bits
from right to left. Then, we will add 0011 in each group of 4 bits in order to get the excess-3
code.

Excess-3 to BCD conversion

The process of converting Excess-3 to BCD is opposite to the process of converting BCD to
Excess-3. The BCD code can be calculated by subtracting 3, i.e., 0011 from each four-digit
Excess-3 code. Below is the truth table for the conversion of Excess-3 code to BCD. In the below
table, the variables w, x, y, and z represent the bits of the Excess-3 code. The variable 'z'

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8.11.2023 15:47 BCD to Excess-3 conversion - Javatpoint

represents the LSB, and the variable 'w' represents the MSB. In the same way, the variables A, B,
C, and D represent the bits of the binary numbers. The variable 'D' represents the LSB, and the
variable 'A' represents the MSB. The 'don't care conditions' is defined by the variable 'X'.

Decimal Number Excess-3 Code BCD Code

A B C D W x y z

0 0 0 0 0 X X X X

1 0 0 0 1 X X X X

2 0 0 1 0 X X X X

3 0 0 1 1 0 0 0 0

4 0 1 0 0 0 0 0 1

5 0 1 0 1 0 0 1 0

6 0 1 1 0 0 0 1 1

7 0 1 1 1 0 1 0 0

8 1 0 0 0 0 1 0 1

9 1 0 0 1 0 1 1 0

10 1 0 1 0 0 1 1 1

11 1 0 1 1 1 0 0 0

12 1 1 0 0 1 0 0 1

13 1 1 0 1 X X X X

14 1 1 1 0 X X X X

15 1 1 1 1 X X X X

Now, we will use the K-map method to design the logical circuit for the conversion of Excess-3
code to BCD as:

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8.11.2023 15:47 BCD to Excess-3 conversion - Javatpoint

So,

w=AB+ACD
B=x' y'+x' z'+xyz
C=y' z+yz'
D=z'

Example: (101110001100)Excess-3

To find the BCD code of the given BCD number, first, we make the group of 4 bits from right to
left. Then, we subtract 0011 in each group of 4 bits in order to get the BCD code.

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8.11.2023 15:48 Combinational Logic circuits - Javatpoint

Combinational Logic circuits

The combinational logic circuits are the circuits that contain different types of logic gates.
Simply, a circuit in which different types of logic gates are combined is known as a
combinational logic circuit. The output of the combinational circuit is determined from the
present combination of inputs, regardless of the previous input. The input variables, logic gates,
and output variables are the basic components of the combinational logic circuit. There are
different types of combinational logic circuits, such as Adder, Subtractor, Decoder, Encoder,
Multiplexer, and De-multiplexer.

There are the following characteristics of the combinational logic circuit:

At any instant of time, the output of the combinational circuits depends only on the
present input terminals.

The combinational circuit doesn't have any backup or previous memory. The present
state of the circuit is not affected by the previous state of the input.

The n number of inputs and m number of outputs are possible in combinational logic
circuits.

The 'n' input variable comes from the external source while the 'm' output variable goes to the
external destination. In many applications, the source or destinations are storage registers.

Half Adder
The half adder is a basic building block having two inputs and two outputs. The adder is used
to perform OR operation of two single bit binary numbers. The carry and sum are two output
states of the half adder.

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Full Adder
The half adder is used to add only two numbers. To overcome this problem, the full adder was
developed. The full adder is used to add three 1-bit binary numbers A, B, and carry C. The full
adder has three input states and two output states i.e., sum and carry.

Half Subtractors
The half subtractor is also a building block of subtracting two binary numbers. It has two inputs
and two outputs. This circuit is used to subtract two single bit binary numbers A and B. The
'diff' and 'borrow' are the two output state of the half adder.

Full Subtractors
The Half Subtractor is used to subtract only two numbers. To overcome this problem, full
subtractor was designed. The full subtractor is used to subtract three 1-bit numbers A, B, and C,
which are minuend, subtrahend, and borrow, respectively. The full subtractor has three input
states and two output states i.e., diff and borrow.

Multiplexers
The multiplexer is a combinational circuit that has n-data inputs and a single output. It is also
known as the data selector which selects one input from the inputs and routes it to the output.
With the help of the selected inputs, one input line from the n-input lines is selected. The
enable input is denoted by E, which is used in cascade.

De-multiplexers
A De-multiplexer performs the reverse operation of a multiplexer. The de-multiplexer has only
one input, which is distributed over several outputs. One output line is selected at a time by
selecting lines. The input is transmitted to the selected output line.

Decoder
A decoder is a combinational circuit having n inputs and to a maximum of m = 2n outputs. The
decoder is the same as the de-multiplexer. The only difference between de-multiplexer and
decoder is that in the decoder, there is no data input. The decoder performs an operation that
is completely opposite of an encoder.

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Encoder
The encoder is used to perform the reverse operation of the decoder. An encoder having n
number of inputs and m number of outputs is used to produce m-bit binary code which is
related to the digital input number. The encoder takes the digital word and converts it into
another digital word.

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8.11.2023 15:49 Half Adder - Javatpoint

Half Adder
The Half-Adder is a basic building block of adding two numbers as two inputs and produce out
two outputs. The adder is used to perform OR operation of two single bit binary numbers. The
augent and addent bits are two input states, and 'carry' and 'sum 'are two output states of
the half adder.

Block diagram

Truth Table

In the above table,

1. 'A' and' B' are the input states, and 'sum' and 'carry' are the output states.

2. The carry output is 0 in case where both the inputs are not 1.

3. The least significant bit of the sum is defined by the 'sum' bit.

The SOP form of the sum and carry are as follows:

Sum = x'y+xy'
Carry = xy

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Construction of Half Adder Circuit:

In the block diagram, we have seen that it contains two inputs and two outputs. The augent
and addent bits are the input states, and carry and sum are the output states of the half
adder. The half adder is designed with the help of the following two logic gates:

1. 2-input AND Gate.

2. 2-input Exclusive-OR Gate or Ex-OR Gate

1. 2-input Exclusive-OR Gate or Ex-OR Gate

The Sum bit is generated with the help of the Exclusive-OR or Ex-OR Gate.

The above is the symbol of the EX-OR gate. In the above diagram, 'A' and 'B' are the inputs,
and the 'SUMOUT' is the final outcome after performing the XOR operation of both numbers.

The truth table of the EX-OR gate is as follows:

From the above table, it is clear that the XOR gate gives the result 1 when both of the inputs
are different. When both of the inputs are the same, the XOR gives the result 0. To learn more
about the XOR gate, click here.

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2. 2-input AND Gate:

The XOR gate is unable to generate the carry bit. For this purpose, we use another gate called
AND Gate. The AND gate gives the correct result of the carry.

The above is the symbol of the AND gate. In the above diagram, 'A' and 'B' are the inputs, and
'OUT' is the final outcome after performing AND operation of both numbers.

There is the following truth table of AND Gate:

From the above table, it is clear that the AND gate gives the result 1 when both of the inputs
are 1. When both of the inputs are different and 0, the AND gates gives the result 0. To learn
more about the AND gate, click here.

Half-Adder logical circuit:

So, the Half Adder is designed by combining the 'XOR' and 'AND' gates and provide the sum
and carry.

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There is the following Boolean expression of Half Adder circuit:

Sum= A XOR B (A+B)

Carry= A AND B (A.B)

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8.11.2023 15:50 Full Adder - Javatpoint

Full Adder
The half adder is used to add only two numbers. To overcome this problem, the full adder was
developed. The full adder is used to add three 1-bit binary numbers A, B, and carry C. The full
adder has three input states and two output states i.e., sum and carry.

Block diagram

Truth Table

In the above table,

1. 'A' and' B' are the input variables. These variables represent the two significant bits which
are going to be added

2. 'Cin' is the third input which represents the carry. From the previous lower significant
position, the carry bit is fetched.

3. The 'Sum' and 'Carry' are the output variables that define the output values.

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4. The eight rows under the input variable designate all possible combinations of 0 and 1
that can occur in these variables.

Note: We can simplify each of the output 'Boolean function' with the help of the unique map
method.

The SOP form can be obtained with the help of K-map as:

Sum = x' y' z+x' yz+xy' z'+xyz

Carry = xy+xz+yz

Construction of Half Adder Circuit:

The above block diagram describes the construction of the Full adder circuit. In the above
circuit, there are two half adder circuits that are combined using the OR gate. The first half
adder has two single-bit binary inputs A and B. As we know that, the half adder produces two
outputs, i.e., Sum and Carry. The 'Sum' output of the first adder will be the first input of the
second half adder, and the 'Carry' output of the first adder will be the second input of the
second half adder. The second half adder will again provide 'Sum' and 'Carry'. The final
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outcome of the Full adder circuit is the 'Sum' bit. In order to find the final output of the 'Carry',
we provide the 'Carry' output of the first and the second adder into the OR gate. The outcome
of the OR gate will be the final carry out of the full adder circuit.

The MSB is represented by the final 'Carry' bit.

The full adder logic circuit can be constructed using the 'AND' and the 'XOR' gate with an OR
gate.

The actual logic circuit of the full adder is shown in the above diagram. The full adder circuit
construction can also be represented in a Boolean expression.

Sum:

Perform the XOR operation of input A and B.

Perform the XOR operation of the outcome with carry. So, the sum is (A XOR B) XOR Cin
which is also represented as:
(A ⊕ B) ⊕ Cin

Carry:

1. Perform the 'AND' operation of input A and B.

2. Perform the 'XOR' operation of input A and B.

3. Perform the 'OR' operations of both the outputs that come from the previous two steps.
So the 'Carry' can be represented as:
A.B + (A ⊕ B)

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8.11.2023 15:50 Half Subtractor - Javatpoint

Half Subtractor
The half subtractor is also a building block for subtracting two binary numbers. It has two
inputs and two outputs. This circuit is used to subtract two single bit binary numbers A and B.
The 'diff' and 'borrow' are two output states of the half subtractor.

Block diagram

Truth Table

The SOP form of the Diff and Borrow is as follows:

Diff= A'B+AB'
Borrow = A'B

In the above table,

'A' and 'B' are the input variables whose values are going to be subtracted.

The 'Diff' and 'Borrow' are the variables whose values define the subtraction result, i.e.,
difference and borrow.

The first two rows and the last row, the difference is 1, but the 'Borrow' variable is 0.

The third row is different from the remaining one. When we subtract the bit 1 from the
bit 0, the borrow bit is produced.

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Construction of Half Subtractor Circuit

In the block diagram, we have seen that it contains two inputs and two outputs. The carry and
sum are the output states of the half subtractor. The half subtractor is designed with the help
of the following logic gates:

1. 2-input AND gate.

2. 2-input Exclusive-OR Gate or Ex-OR Gate

3. NOT or inverter Gate

1. 2-input Exclusive-OR Gate or Ex-OR Gate

The Diff bit is generated with the help of the Exclusive-OR or Ex-OR gate.

The above is the symbol of the EX-OR gate. In the above diagram, 'A' and 'B' are the inputs,
and 'Diff' is the final outcome after performing the XOR operation of both numbers.

The truth table of the EX-OR gate is as follows:

From the above table, it is clear that the XOR gate gives the result 1 when both of the inputs
are different. When both of the inputs are the same, the XOR gives the result 0. To learn more
about the XOR gate, click here.

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2. 2-input AND gate:

The XOR gate is unable to generate the carry bit. For this purpose, we use another gate called
AND gate. The AND gate is not enough to give the correct result of 'Borrow'. We will use the
NOT gate with the 'AND' gate to get the correct result.

The above is the symbol of the AND gate. In the above diagram, 'A' and 'B' are the inputs, and
'OUT' is the final outcome after performing AND operation of both numbers.

There is the following truth table of AND gate:

From the above table, it is clear that the AND gate gives the result 1 when both of the inputs
are 1. When both of the inputs are different and 0, the AND gates gives the result 0. To learn
more about the AND gate, click here.

3. NOT or Inverter Gate:

The NOT gate is used to get the inverse output. We can combine the 'AND' and 'NOT' gates in
order to get the combinational gate 'NAND'. By inverting the input 'A' using 'NOT' gate and
then use the output of the 'NOT' gate as the input of the 'AND' gate, we can get the 'Borrow'
bit.

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Half-Subtractor logical circuit

So, the Half Subtractor is designed by combining the 'XOR', 'AND', and 'NOT' gates and provide
the Diff and Borrow.

The Boolean expression of the Half Adder circuit is given below:

Diff= A XOR B (A⊕B)

Borrow= not-A AND B (A'.B)

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8.11.2023 15:51 Full Subtractor - Javatpoint

Full Subtractor
The Half Subtractor is used to subtract only two numbers. To overcome this problem, a full
subtractor was designed. The full subtractor is used to subtract three 1-bit numbers A, B, and C,
which are minuend, subtrahend, and borrow, respectively. The full subtractor has three input
states and two output states i.e., diff and borrow.

Block diagram

Truth Table

In the above table,

'A' and' B' are the input variables. These variables represent the two significant bits that
are going to be subtracted.

'Borrowin' is the third input which represents borrow.

The 'Diff' and 'Borrow' are the output variables that define the output values.

The eight rows under the input variable designate all possible combinations of 0 and 1
that can occur in these variables.

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Note: We can simplify each of the Boolean output functions with the help of the unique map
method.

The SOP form can be obtained with the help of K-map as:

Diff=xy' z'+x' y' z+xyz+x'yz'

Borrow=x' z+x' y+yz

Construction of Full Subtractor Circuit:

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8.11.2023 15:51 Full Subtractor - Javatpoint

The above block diagram describes the construction of the Full subtractor circuit. In the
above circuit, there are two half adder circuits that are combined using the OR gate. The first
half subtractor has two single-bit binary inputs A and B. As we know that, the half subtractor
produces two outputs, i.e., 'Diff' and 'Borrow'. The 'Diff' output of the first subtractor will be the
first input of the second half subtractor, and the 'Borrow' output of the first subtractor will be
the second input of the second half subtractor. The second half subtractor will again provide
'Diff' and 'Borrow'. The final outcome of the Full subtractor circuit is the 'Diff' bit. In order to
find the final output of the 'Borrow', we provide the 'Borrow' of the first and the second
subtractor into the OR gate. The outcome of the OR gate will be the final carry 'Borrow' of full
subtractor circuit.

The MSB is represented by the final 'Borrow' bit.

The full subtractor logic circuit can be constructed using the 'AND', 'XOR', and NOT gate with
an OR gate.

The actual logic circuit of the full subtractor is shown in the above diagram. The full subtractor
circuit construction can also be represented in a Boolean expression.

Diff:

Perform the XOR operation of input A and B.

Perform the XOR operation of the outcome with 'Borrow'. So, the difference is (A XOR B)
XOR 'Borrowin' which is also represented as:
(A ⊕ B) ⊕ 'Borrowin'

Borrow:

Perform the 'AND' operation of the inverted input A and B.

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Perform the 'XOR' operation of input A and B.

Perform the 'OR' operations of both the outputs that come from the previous two steps.
So the 'Borrow' can be represented as:
A'.B + (A ⊕ B)'

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8.11.2023 15:51 Binary Adder - Javatpoint

Binary Adder
The registers play an important role in performing the micro-operations. The registers hold the
digital component and the data which performs the arithmetic operation. The Binary Adder is a
logical circuit which is used to perform the addition operation of two binary number of any
length.

The Binary Adder is formed with the help of the Full-Adder circuit. The Full-Adders are
connected in series, and the output carry of the first Adder will be treated as the input carry of
the next Full-Adder.

N-Bit Parallel Adder

The Full Adder is used to sum two single-bit binary numbers with carry input. In digital
calculation, we need to add two n-bit binary numbers rather than only single-bit binary
numbers. For this purpose, we need to use n-bit parallel Adder. In order to get N-bit parallel
adder, we cascade the n number of Full Adders. The carry output of the first Adder is treated as
the carry input of the second Adder.

4-bit Binary Adder

The 'A' and 'B' are the augend, and addend bits are defined by the subscript numbers.
The subscripts start from right to left, and the lower-order bit is defined by subscript '0'.

The C0, C1, C2, and C3 are the carry inputs which are connected together as a chain
using Full Adder. The C4 is the carry output produced by the last Full-Adder.

The Cout of the first Adder is connected as the Cin of the next Full-Adder.

The S0, S1, S2, and S3 are the sum outputs that produce the sum of augend and addend
bits.

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The inputs for the input variable 'A' and 'B' are fetched from different source registers.
For example, the bit for the input variable 'A' comes from register 'R1', and a bit for the
input variable 'B' comes from register 'R2'.

The outcome produced by adding both input variables is stored into either third register
or to one of the source registers.

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8.11.2023 15:52 Binary Adder-Subtractor - Javatpoint

Binary Adder-Subtractor
A Binary Adder-Subtractor is a special type of circuit that is used to perform both operations,
i.e., Addition and Subtraction. The operation which is going to be used depends on the values
contained by the control signal. In Arithmetic Logical Unit, it is one of the most important
components.

To work with Binary Adder-Subtractor, it is required that we have knowledge of the XOR gate,
Full-Adder, Binary Addition, and subtraction.

For example, we will take two 4-bit binary numbers 'X' and 'Y' for the operation with digits.

X0 X1 X2 X3 for X
Y0 Y1 Y2 Y3 for Y

The Binary Adder-Subtractor is a combination of 4 Full-Adder, which is able to perform the

addition and subtraction of 4-bit binary numbers. The control line determines whether the
operation being performed is either subtraction or addition. This determination is done by the
binary values 0 and 1, which is hold by K.

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In the above diagram, the control lines of the first Full-Adder is directly coming as its
input(input carry C0). The X0 is the least significant bit of A, which is directly inputted in the
Full-Adder. The result produced by performing the XOR operation of Y0 and K is the third input
of the Binary Adder-Subtractor. The sum/difference(S0) and carry(C0) are the two outputs
produced from the First Full-adder.

When the value of K is set to true or 1, the Y0⨁K produce the complement of Y0 as the output.
So the operation would be X+Y0', which is the 2's complement subtraction of X and Y. It means
when the value of K is 1; the subtraction operation is performed by the binary Adder-
Subtractor.

In the same way, when the value of K is set to 0, the Y0⨁K produce Y0 as the output. So the
operation would be X+Y0, which is the binary addition of X and Y. It means when the value of K
is 0; the addition operation is performed by the binary Adder-Subtractor.

The carry/borrow C0 is treated as the carry/borrow input for the second Full-Adder. The
sum/difference S0 defines the least significant bit of the sum/difference of numbers X and Y.

Just like X0, the X1, X2, and X3 are faded directly to the 2nd, 3rd, and 4th Full-Adder as an input.
The outputs after performing the XOR operation of Y1, Y2, and Y3 inputs with K are the third

inputs for 2nd, 3rd, and 4th Full-Adder. The carry C1, C2 are passed as the input to the Full-
Adder. Cout is the output carry of the sum/difference. To form the final result, the S1, S2, S3 are
recorded with s0. We will use n number of Full-Adder to design the n-bit binary Adder-
Subtractor.

Example:

We assume that we have two 3 bit numbers, i.e., X=100 and Y=011, and feed them in Full-
Adder as an input.

X0 = 0 X1 = 0 X2 = 1

Y0 = 1 Y1 = 1 & Y2 = 0

For K=0:

Y0⨁K=Y0 and Cin=K=0

So, from first Full-Adder

S0 = X0+Y0+Cin

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S0= 0+1+0

S0=1

C0=0

Similarly,

S1 = X1+Y1+C0
S1 = 0+1+0
S1=1 and C1=0

Similarly,

S2 = X2+Y2+C1
S2 = 1+0+0
S2=1 and C2=0

Thus,

X= 100 =4
Y = 011 = 3
Sum = 0111 = 7

For K=1

Y0⨁K=Y0' and Cin=k=1

So,

S0 = X0+Y0'+Cin
S0 = 0+0+1
S0=1 and C0=0

Similarly,

S1 = X1+Y1'+C0
S1 = 0+0+0
S1=0 and C1=0

Similarly,

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S2 = X2+Y2'+C1
S2 = 1+1+0
S2=0 and C2=0

Thus,

X = 010 = 4
Y = 011 = 3

Difference = 001 = 1

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8.11.2023 15:52 Decimal or BCD Adder - Javatpoint

Decimal or BCD Adder

The BCD-Adder is used in the computers and the calculators that perform arithmetic operation
directly in the decimal number system. The BCD-Adder accepts the binary-coded form of
decimal numbers. The Decimal-Adder requires a minimum of nine inputs and five outputs.

Note: The decimal number requires 4 bits to represent in the BCD code, and the circuit must
have an input carry and an output carry.

There is the following table used in designing of BCD-Adder.

From the above table, it is clear that if the produced sum is between 1 to 9, the Binary and the
BCD code is the same. But for 10 to 19 decimal numbers, both the codes are different. In the
above table, the binary sum combinations from 10 to 19 give invalid BCD. There are the
following points that help the circuit to identify the invalid BCD.

1. It is obvious from the table that a correction is needed when the 'Binary Sum' has an
output carry K=1.

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2. The other six combinations from 10 to 15 need correction in which the bit on the Z8
position is 1.

3. In the Binary sum of 8 and 9, the bit on the Z8 position is also 1. So, the second step fails,
and we need to modify it.

4. To distinguish these two numbers, we specify that the bit on the Z4 or Z2 position also
needs to be 1 with the bit of Z8

5. The condition for a correction and an output carry can be expressed by the Boolean
function:

C=K+Z8.Z4+Z8.Z2

Once the circuit found the invalid BCD, the circuit adds the binary number of 6 into the invalid
BCD code to make it valid.

In the above diagram,

1. We take a 4-bit Binary-Adder, which takes addend and augend bits as an input with an
input carry 'Carry in'.

2. The Binary-Adder produces five outputs, i.e., Z8, Z4, Z2, Z1, and an output carry K.

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3. With the help of the output carry K and Z8, Z4, Z2, Z1 outputs, the logical circuit is
designed to identify the Cout

4. The Z8, Z4, Z2, and Z1 outputs of the binary adder are passed into the 2nd 4-bit binary
adder as an Augend.

5. The addend bit of the 2nd 4-bit binary adder is designed in such a way that the 1st and
the 4th bit of the addend number are 0 and the 2nd and the 3rd bit are the same as Cout.
When the value of Cout is 0, the addend number will be 0000, which produce the same

result as the 1st 4-bit binary number. But when the value of the Cout is 1, the addend bit
will be 0110, i.e., 6, which adds with the augent to get the valid BCD number.

Example: 1001+1000

1. First, add both the numbers using a 4-bit binary adder and pass the input carry to 0.

2. The binary adder produced the result 0001 and carried output 'K' 1.

3. Then, find the Cout value to identify that the produced BCD is invalid or valid using the
expression Cout=K+Z8.Z4+Z8.Z2.
K=1
Z8 = 0
Z4 = 0
Z2 = 0
Cout = 1+0*0+0*0
Cout = 1+0+0
Cout = 1

4. The value of Cout is 1, which expresses that the produced BCD code is invalid. Then, add

the output of the 1st 4-bit binary adder with 0110.

= 0001+0110
= 0111

5. The BCD is represented by the carry output as:

BCD=Cout Z8 Z4 Z2 Z1=1 0 1 1 1

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8.11.2023 15:53 Decoder in Digital Electronics - Javatpoint

Decoder
The combinational circuit that change the binary information into 2N output lines is known as
Decoders. The binary information is passed in the form of N input lines. The output lines define
the 2N-bit code for the binary information. In simple words, the Decoder performs the reverse
operation of the Encoder. At a time, only one input line is activated for simplicity. The
produced 2N-bit output code is equivalent to the binary information.

There are various types of decoders which are as follows:

2 to 4 line decoder:
In the 2 to 4 line decoder, there is a total of three inputs, i.e., A0, and A1 and E and four outputs,
i.e., Y0, Y1, Y2, and Y3. For each combination of inputs, when the enable 'E' is set to 1, one of
these four outputs will be 1. The block diagram and the truth table of the 2 to 4 line decoder
are given below.

Block Diagram:

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Truth Table:

The logical expression of the term Y0, Y0, Y2, and Y3 is as follows:

Y3=E.A1.A0
Y2=E.A1.A0'
Y1=E.A1'.A0
Y0=E.A1'.A0'

Logical circuit of the above expressions is given below:

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3 to 8 line decoder:
The 3 to 8 line decoder is also known as Binary to Octal Decoder. In a 3 to 8 line decoder,
there is a total of eight outputs, i.e., Y0, Y1, Y2, Y3, Y4, Y5, Y6, and Y7 and three outputs, i.e., A0,
A1, and A2. This circuit has an enable input 'E'. Just like 2 to 4 line decoder, when enable 'E' is
set to 1, one of these four outputs will be 1. The block diagram and the truth table of the 3 to 8
line encoder are given below.

Block Diagram:

Truth Table:

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The logical expression of the term Y0, Y1, Y2, Y3, Y4, Y5, Y6, and Y7 is as follows:

Y0=A0'.A1'.A2'
Y1=A0.A1'.A2'
Y2=A0'.A1.A2'
Y3=A0.A1.A2'
Y4=A0'.A1'.A2
Y5=A0.A1'.A2
Y6=A0'.A1.A2
Y7=A0.A1.A2

Logical circuit of the above expressions is given below:

4 to 16 line Decoder
In the 4 to 16 line decoder, there is a total of 16 outputs, i.e., Y0, Y1, Y2,……, Y16 and four inputs,
i.e., A0, A1, A2, and A3. The 3 to 16 line decoder can be constructed using either 2 to 4 decoder
or 3 to 8 decoder. There is the following formula used to find the required number of lower-

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order decoders.

Required number of lower order decoders=m2/m1

m1 = 8
m2 = 16

Required number of 3 to 8 decoders= =2

Block Diagram:

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Truth Table:

The logical expression of the term A0, A1, A2,…, A15 are as follows:

Y0=A0'.A1'.A2'.A3'
Y1=A0'.A1'.A2'.A3
Y2=A0'.A1'.A2.A3'
Y3=A0'.A1'.A2.A3
Y4=A0'.A1.A2'.A3'
Y5=A0'.A1.A2'.A3
Y6=A0'.A1.A2.A3'
Y7=A0'.A1.A2.A3
Y8=A0.A1'.A2'.A3'
Y9=A0.A1'.A2'.A3

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Y10=A0.A1'.A2.A3'
Y11=A0.A1'.A2.A3
Y12=A0.A1.A2'.A3'
Y13=A0.A1.A2'.A3
Y14=A0.A1.A2.A3'
Y15=A0.A1.A2'.A3

Logical circuit of the above expressions is given below:

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8.11.2023 15:54 Encoder in Digital Electronics - Javatpoint

Encoders
The combinational circuits that change the binary information into N output lines are known as
Encoders. The binary information is passed in the form of 2N input lines. The output lines
define the N-bit code for the binary information. In simple words, the Encoder performs the
reverse operation of the Decoder. At a time, only one input line is activated for simplicity. The
produced N-bit output code is equivalent to the binary information.

There are various types of encoders which are as follows:

4 to 2 line Encoder:
In 4 to 2 line encoder, there are total of four inputs, i.e., Y0, Y1, Y2, and Y3, and two outputs, i.e.,
A0 and A1. In 4-input lines, one input-line is set to true at a time to get the respective binary
code in the output side. Below are the block diagram and the truth table of the 4 to 2 line
encoder.

Block Diagram:

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Truth Table:

The logical expression of the term A0 and A1 is as follows:

A1=Y3+Y2
A0=Y3+Y1

Logical circuit of the above expressions is given below:

8 to 3 line Encoder:
The 8 to 3 line Encoder is also known as Octal to Binary Encoder. In 8 to 3 line encoder, there
is a total of eight inputs, i.e., Y0, Y1, Y2, Y3, Y4, Y5, Y6, and Y7 and three outputs, i.e., A0, A1, and
A2. In 8-input lines, one input-line is set to true at a time to get the respective binary code in
the output side. Below are the block diagram and the truth table of the 8 to 3 line encoder.

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Block Diagram:

Truth Table:

The logical expression of the term A0, A1, and A2 are as follows:

A2=Y4+Y5+Y6+Y7
A1=Y2+Y3+Y6+Y7
A0=Y7+Y5+Y3+Y1

Logical circuit of the above expressions is given below:

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Decimal to BCD Encoder

The Octal to Binary Encoder is also known as 10 to 4 line Encoder. In 10 to 4 line encoder,
there are total of ten inputs, i.e., Y0, Y1, Y2, Y3, Y4, Y5, Y6, Y7, Y8, and Y9 and four outputs, i.e., A0,
A1, A2, and A3. In 10-input lines, one input-line is set to true at a time to get the respective
BCD code in the output side. The block diagram and the truth table of the decimal to BCD
encoder are given below.

Block Diagram:

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Truth Table:

The logical expression of the term A0, A1, A2, and A3 is as follows:

A3 = Y9 + Y8
A2 = Y7 + Y6 + Y5 +Y4
A1 = Y7 + Y6 + Y3 +Y2
A0 = Y9 + Y7 +Y5 +Y3 + Y1

Logical circuit of the above expressions is given below:

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Priority Encoder:
4 to 2 line Priority Encoder:

In this priority encoder, there are total of 4 inputs, i.e., Y0, Y1, Y2, and Y3, and two outputs, i.e.,
A0 and A1. The Y3 has high and Y0 has low priority inputs. When more than one input is '1' at
the same time, the output will be the (binary) code corresponding to the higher priority input.
Below is the truth table of the 4 to 2 line priority encoder.

Truth Table:

The logical expression of the term A0 and A1 can be found using K-map as:

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A1=Y3+Y2
A0=Y3+Y2'.Y1

Logical circuit of the above expressions is given below:

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Uses of Encoders:

1. These systems are very easy to use in all digital systems.

2. Encoders are used to convert a decimal number into the binary number. The objective is
to perform a binary operation such as addition, subtraction, multiplication, etc.

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8.11.2023 15:55 Multiplexer in Digital Electronics - Javatpoint

Multiplexer
A multiplexer is a combinational circuit that has 2n input lines and a single output line. Simply,
the multiplexer is a multi-input and single-output combinational circuit. The binary information
is received from the input lines and directed to the output line. On the basis of the values of
the selection lines, one of these data inputs will be connected to the output.

Unlike encoder and decoder, there are n selection lines and 2n input lines. So, there is a total of
2N possible combinations of inputs. A multiplexer is also treated as Mux.

There are various types of the multiplexer which are as follows:

2×1 Multiplexer:
In 2×1 multiplexer, there are only two inputs, i.e., A0 and A1, 1 selection line, i.e., S0 and single
outputs, i.e., Y. On the basis of the combination of inputs which are present at the selection line
S0, one of these 2 inputs will be connected to the output. The block diagram and the truth
table of the 2×1 multiplexer are given below.

Block Diagram:

Truth Table:

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The logical expression of the term Y is as follows:

Y=S0'.A0+S0.A1

Logical circuit of the above expression is given below:

4×1 Multiplexer:
In the 4×1 multiplexer, there is a total of four inputs, i.e., A0, A1, A2, and A3, 2 selection lines,
i.e., S0 and S1 and single output, i.e., Y. On the basis of the combination of inputs that are

present at the selection lines S0 and S1, one of these 4 inputs are connected to the output. The
block diagram and the truth table of the 4×1 multiplexer are given below.

Block Diagram:

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Truth Table:

The logical expression of the term Y is as follows:

Y=S1' S0' A0+S1' S0 A1+S1 S0' A2+S1 S0 A3

Logical circuit of the above expression is given below:

8 to 1 Multiplexer
In the 8 to 1 multiplexer, there are total eight inputs, i.e., A0, A1, A2, A3, A4, A5, A6, and A7, 3
selection lines, i.e., S0, S1and S2 and single output, i.e., Y. On the basis of the combination of

inputs that are present at the selection lines S0, S1, and S2, one of these 8 inputs are connected
to the output. The block diagram and the truth table of the 8×1 multiplexer are given below.

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Block Diagram:

Truth Table:

The logical expression of the term Y is as follows:

Y=S0'.S1'.S2'.A0+S0.S1'.S2'.A1+S0'.S1.S2'.A2+S0.S1.S2'.A3+S0'.S1'.S2 A4+S0.S1'.S2 A5+S0'.S1.S2

.A6+S0.S1.S3.A7

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Logical circuit of the above expression is given below:

8 ×1 multiplexer using 4×1 and 2×1 multiplexer

We can implement the 8×1 multiplexer using a lower order multiplexer. To implement the 8×1
multiplexer, we need two 4×1 multiplexers and one 2×1 multiplexer. The 4×1 multiplexer has 2
selection lines, 4 inputs, and 1 output. The 2×1 multiplexer has only 1 selection line.

For getting 8 data inputs, we need two 4×1 multiplexers. The 4×1 multiplexer produces one
output. So, in order to get the final output, we need a 2×1 multiplexer. The block diagram of
8×1 multiplexer using 4×1 and 2×1 multiplexer is given below.

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16 to 1 Multiplexer
In the 16 to 1 multiplexer, there are total of 16 inputs, i.e., A0, A1, …, A16, 4 selection lines, i.e.,
S0, S1, S2, and S3 and single output, i.e., Y. On the basis of the combination of inputs that are

present at the selection lines S0, S1, and S2, one of these 16 inputs will be connected to the
output. The block diagram and the truth table of the 16×1

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Block Diagram:

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Truth Table:

The logical expression of the term Y is as follows:

Y=A0.S0'.S1'.S2'.S3'+A1.S0'.S1'.S2 '.S3+A2.S0'.S1'.S2.S3'+A3.S0'.S1 '.S2.S3+A4.S0'.S1.S2'.S3'+A5.S0

'.S1.S2'.S3+A6.S1.S2.S3'+A7.S0 '.S1.S2.S3+A8.S0.S1'.S2'.S3'+A9 .S0.S1'.S2'.S3+Y10.S0.S1'.S2.S3

'+A11.S0.S1'.S2.S3+A12 S0.S1.S2 '.S3'+A13.S0.S1.S2'.S3+A14.S0.S1 .S2.S3'+A15.S0.S1.S2'.S3

Logical circuit of the above expression is given below:

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16×1 multiplexer using 8×1 and 2×1 multiplexer

We can implement the 16×1 multiplexer using a lower order multiplexer. To implement the 8×1
multiplexer, we need two 8×1 multiplexers and one 2×1 multiplexer. The 8×1 multiplexer has 3
selection lines, 4 inputs, and 1 output. The 2×1 multiplexer has only 1 selection line.

For getting 16 data inputs, we need two 8 ×1 multiplexers. The 8×1 multiplexer produces one
output. So, in order to get the final output, we need a 2×1 multiplexer. The block diagram of
16×1 multiplexer using 8×1 and 2×1 multiplexer is given below.

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8.11.2023 15:56 De-multiplexer in Digital Electronics - Javatpoint

De-multiplexer
A De-multiplexer is a combinational circuit that has only 1 input line and 2N output lines.
Simply, the multiplexer is a single-input and multi-output combinational circuit. The
information is received from the single input lines and directed to the output line. On the basis
of the values of the selection lines, the input will be connected to one of these outputs. De-
multiplexer is opposite to the multiplexer.

Unlike encoder and decoder, there are n selection lines and 2n outputs. So, there is a total of 2n
possible combinations of inputs. De-multiplexer is also treated as De-mux.

There are various types of De-multiplexer which are as follows:

1×2 De-multiplexer:
In the 1 to 2 De-multiplexer, there are only two outputs, i.e., Y0, and Y1, 1 selection lines, i.e., S0,
and single input, i.e., A. On the basis of the selection value, the input will be connected to one
of the outputs. The block diagram and the truth table of the 1×2 multiplexer are given below.

Block Diagram:

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Truth Table:

The logical expression of the term Y is as follows:

Y0=S0'.A
Y1=S0.A

Logical circuit of the above expressions is given below:

1×4 De-multiplexer:
In 1 to 4 De-multiplexer, there are total of four outputs, i.e., Y0, Y1, Y2, and Y3, 2 selection lines,
i.e., S0 and S1 and single input, i.e., A. On the basis of the combination of inputs which are
present at the selection lines S0 and S1, the input be connected to one of the outputs. The
block diagram and the truth table of the 1×4 multiplexer are given below.

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Block Diagram:

Truth Table:

The logical expression of the term Y is as follows:

Y0=S1' S0' A
y1=S1' S0 A
y2=S1 S0' A
y3=S1 S0 A

Logical circuit of the above expressions is given below:

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1×8 De-multiplexer
In 1 to 8 De-multiplexer, there are total of eight outputs, i.e., Y0, Y1, Y2, Y3, Y4, Y5, Y6, and Y7, 3
selection lines, i.e., S0, S1and S2 and single input, i.e., A. On the basis of the combination of

inputs which are present at the selection lines S0, S1 and S2, the input will be connected to one
of these outputs. The block diagram and the truth table of the 1×8 de-multiplexer are given
below.

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Block Diagram:

Truth Table:

The logical expression of the term Y is as follows:

Y0=S0'.S1'.S2'.A
Y1=S0.S1'.S2'.A
Y2=S0'.S1.S2'.A
Y3=S0.S1.S2'.A

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Y4=S0'.S1'.S2 A
Y5=S0.S1'.S2 A
Y6=S0'.S1.S2 A
Y7=S0.S1.S3.A

Logical circuit of the above expressions is given below:

1×8 De-multiplexer using 1×4 and 1×2 de-multiplexer

We can implement the 1×8 de-multiplexer using a lower order de-multiplexer. To implement
the 1×8 de-multiplexer, we need two 1×4 de-multiplexer and one 1×2 de-multiplexer. The 1×4
multiplexer has 2 selection lines, 4 outputs, and 1 input. The 1×2 de-multiplexer has only 1
selection line.

For getting 8 data outputs, we need two 1×4 de-multiplexer. The 1×2 de-multiplexer produces
two outputs. So, in order to get the final output, we have to pass the outputs of 1×2 de-
multiplexer as an input of both the 1×4 de-multiplexer. The block diagram of 1×8 de-
multiplexer using 1×4 and 1×2 de-multiplexer is given below.
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1 x 16 De-multiplexer
In 1×16 de-multiplexer, there are total of 16 outputs, i.e., Y0, Y1, …, Y16, 4 selection lines, i.e., S0,
S1, S2, and S3 and single input, i.e., A. On the basis of the combination of inputs which are

present at the selection lines S0, S1, and S2, the input will be connected to one of these outputs.
The block diagram and the truth table of the 1×16 de-multiplexer are given below.

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Block Diagram:

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Truth Table:

The logical expression of the term Y is as follows:

Y0=A.S0'.S1'.S2'.S3'
Y1=A.S0'.S1'.S2'.S3
Y2=A.S0'.S1'.S2.S3'
Y3=A.S0'.S1'.S2.S3
Y4=A.S0'.S1.S2'.S3'
Y5=A.S0'.S1.S2'.S3
Y6=A.S0'.S1.S2.S3'
Y7=A.S0'.S1.S2.S3
Y8=A.S0.S1'.S2'.S3'
Y9=A.S0.S1'.S2'.S3
Y10=A.S0.S1'.S2.S3'
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Y11=A.S0.S1'.S2.S3
Y12=A.S0.S1.S2'.S3'
Y13=A.S0.S1.S2'.S3
Y14=A.S0.S1.S2.S3'
Y15=A.S0.S1.S2'.S3

Logical circuit of the above expressions is given below:

1×16 de-multiplexer using 1×8 and 1×2 de-multiplexer

We can implement the 1×16 de-multiplexer using a lower order de-multiplexer. To implement
the 1×16 de-multiplexer, we need two 1×8 de-multiplexer and one 1×2 de-multiplexer. The
1×8 multiplexer has 3 selection lines, 1 input, and 8 outputs. The 1×2 de-multiplexer has only 1
selection line.

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For getting 16 data outputs, we need two 1×8 de-multiplexer. The 1×8 de-multiplexer
produces eight outputs. So, in order to get the final output, we need a 1×2 de-multiplexer to
produce two outputs from a single input. Then we pass these outputs into both the de-
multiplexer as an input. The block diagram of 1×16 de-multiplexer using 1×8 and 1×2 de-
multiplexer is given below.

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