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Theory Assn 2

1. Replacing the safe SRSW array with regular SRSW registers in the "SafeBooleanMRSWRegister" construction would not yield a regular MRSW register. While reads could return either the current or previous value in a MRSW register, in this construction different threads could read different values even without a concurrent write since each reads its own slot. Additionally, there is no mechanism to ensure all slots are updated atomically to reflect the latest write. 2. The algorithm in Fig. 4.22 for constructing an atomic M-valued SRSW register using atomic Boolean SRSW registers is correct. It uses an array of atomic Boolean registers, with writes setting the corresponding bit to true and all others to false. Reads scan

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69 views2 pages

Theory Assn 2

1. Replacing the safe SRSW array with regular SRSW registers in the "SafeBooleanMRSWRegister" construction would not yield a regular MRSW register. While reads could return either the current or previous value in a MRSW register, in this construction different threads could read different values even without a concurrent write since each reads its own slot. Additionally, there is no mechanism to ensure all slots are updated atomically to reflect the latest write. 2. The algorithm in Fig. 4.22 for constructing an atomic M-valued SRSW register using atomic Boolean SRSW registers is correct. It uses an array of atomic Boolean registers, with writes setting the corresponding bit to true and all others to false. Reads scan

Uploaded by

Leela Pavani
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as DOCX, PDF, TXT or read online on Scribd
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1.

If we replace the safe Boolean Single-Reader Single-Writer (SRSW) register array (s_table) with
an array of regular Boolean SRSW registers in the "SafeBooleanMRSWRegister," will the
construction yield a regular Boolean MRSW register?

False.

Justification:

Concurrent Reads and Writes: In a regular MRSW register, if a read is concurrent with a write, the read
can return either the value being written or some previous value. However, in the given
"SafeBooleanMRSWRegister" construction, different threads may read different values even when the
write is not concurrent with reads because each thread reads from its own slot in the s_table.

Last Writer Wins: In a regular MRSW register, if a read is not concurrent with any write, it should return
the last value written. The s_table array in "SafeBooleanMRSWRegister" does not guarantee this
because each thread reads from its own slot, and there is no mechanism to ensure that all slots are
updated atomically to reflect the latest write.

Replacing the safe SRSW with regular SRSW registers doesn't address these issues, so the construction
won't yield a regular Boolean MRSW register.

2. You are given the algorithm in Fig. 4.22 for constructing an atomic M-valued SRSW register using
atomic Boolean SRSW registers. Does this proposal work? Either prove the correctness or
present a counterexample.

The AtomicSRSWRegister algorithm aims to construct an atomic M-valued Single-Reader Single-Writer


(SRSW) register using atomic Boolean SRSW registers. An atomic register provides the highest level of
consistency: all operations appear to be instantaneously committed and are immediately visible to other
operations.

According to properties of an atomic register:

1. The class uses an array of atomic Boolean SRSW registers (r_bit). Since these are atomic, they provide
the highest level of consistency.

2. The write(int x) operation sets r_bit[x] to true and all previous entries to false. This ensures that any
subsequent read() operation will either see the most recent write or some later write, satisfying the
atomicity criterion.

3. The read() operation scans through the r_bit array to find the first true value and returns its index.
This will be the value of the most recent write() operation, ensuring that read() returns the latest
committed value and satisfies atomicity.

4. The class is designed for a single-reader, single-writer scenario. In this setup, there won't be
concurrent operations, which simplifies the task of maintaining atomicity and consistency.
5. Due to the design of the write () method, it's impossible for the read() method to return a stale or
outdated value, as it will always find the highest index where r_bit is set to true, which corresponds to
the latest write.

So, the AtomicSRSWRegister algorithm appears to work correctly for constructing an atomic M-valued
SRSW register using atomic Boolean SRSW registers. It satisfies the criteria for atomicity and consistency
in a single-reader, single-writer scenario. Therefore, the proposal is correct.

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