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CS3351 - Model

The document is a model theory exam for the course CS3351 – Digital Principles and Computer Organization. It contains 3 parts - Part A with 10 2-mark questions, Part B with 5 13-mark questions, and Part C with 1 15-mark question. The questions assess students' ability to analyze and design combinational and sequential circuits, understand computer architecture and organization, and analyze hazards in pipelining. The document also maps the course outcomes and bloom's taxonomy levels addressed by each question.

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151 views2 pages

CS3351 - Model

The document is a model theory exam for the course CS3351 – Digital Principles and Computer Organization. It contains 3 parts - Part A with 10 2-mark questions, Part B with 5 13-mark questions, and Part C with 1 15-mark question. The questions assess students' ability to analyze and design combinational and sequential circuits, understand computer architecture and organization, and analyze hazards in pipelining. The document also maps the course outcomes and bloom's taxonomy levels addressed by each question.

Uploaded by

rkkumar07
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
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TAMILNADU COLLEGE OF ENGINEERING

Karumathampatti, Coimbatore – 641 659


DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGG.
MODEL THEORY EXAMINATIONS – DEC 2023
CS3351 – DIGITAL PRINCIPLES AND COMPUTER ORGANIZATION
Third Semester
(Regulations 2021)
Year & Branch : II CSE Max. Marks: 100
Date & Session : 28.12.2023 & FN Time: 3 Hours
Answer ALL questions
CO1 To analyze and design combinational circuits.
CO2 To analyze and design sequential circuits
CO3 To understand the basic structure and operation of a digital computer.
CO4 To study the design of data path unit, control unit for processor and to familiarize with the hazards.
CO5 To understand the concept of various memories and I/O interfacing.
Bloom’s Taxonomy Levels
K1 – Remembering, K2 – Understanding, K3 – Applying, K4 – Analysing, K5 – Evaluating, K6 - Creating

Part – A 10x2=20
Q. No. Question CO Level Marks
1 Construct half adder and full adder circuits. CO1 K3 2
2 Define Encoder. CO1 K1 2
3 List any four real-time applications of flip-flops. CO2 K3 2
4 Write a short note on the working of counters. CO2 K2 2
5 Outline the instruction cycle architecture with a neat diagram CO3 K2 2
6 Draw the block diagram of Von-Neuman architecture. CO3 K1 2
7 What do you mean by pipelining? List its types. CO4 K3 2
8 Differentiate data hazards and control hazards. CO4 K4 2
9 What is the need of cache memory? CO5 K5 2
10 Define Hit time. CO5 K1 2

Part – B 5x13=65
Q. No. Question CO Level Marks
11 (a) What is a K-map? Simplify the Boolean function, CO1 K5 13
F(w,x,y,z) = ∑(0,1,2,4,5,6,8,9,12,13,14) using K-map.
(OR)
(b) i) Enumerate the design of a full adder using two half adders. CO1 K4 07
ii) Build a 4 bit priority encoder using gates. CO1 K2 06

12 (a) i) What is an SR-latch? Outline the design of SR latch using NOR gates. CO2 K5 07
Also, present the function table for the same.
ii) Outline the design of a D-flip flop with two latches and an inverter with CO2 K3 06
a diagram.
(OR)
(b) Write in detail about the analysis and design of clocked sequential circuits. CO2 K1 13

13 (a) With a neat sketch, explain the working of Von Neuman architecture. CO3 K1 13
(OR)
(b) What is addressing mode? Explain the types of addressing mode with an CO3 K2 13
example.

14 (a) i) What is control unit? Explain the various functions performed by the CO4 K2 08
control unit.
ii) Differentiate hardwired control and microprogrammed control. CO4 K4 05
(OR)
(b) What are pipeline hazards? Give brief notes on the types of pipeline CO4 K2 13
hazards

15 (a) Explain in detail about the DMA operation and list the types of DMA CO5 K1 13
transfer.
(OR)
(b) Elucidate interconnection standards. CO5 K2 13

Part – C 1x15=15
Q. No. Question CO Level Marks
16 (a) Explain the functions with state diagram and characteristics equation of T, CO3 K5 15
D and JK flip-flop. Compare the performances.
(OR)
(b) With neat diagram, write a brief note on the design of a 3:8 line decoder CO4 K6 15
using inverters and AND gates. Also, present the truth table for the same.

CO Attainment of CO in Question Numbers


CO1 Part A:1,2 Part B: 11 a, b Part C:
CO2 Part A:3,4 Part B: 12 a, b Part C: 16 (a) & (b)
CO3 Part A:5,6 Part B: 13 a, b Part C:
CO4 Part A:7,8 Part B: 14 a, b Part C:
CO5 Part A:9,10 Part B: 15 a, b Part C:

FACULTY INCHARGE HOD PRINCIPAL

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