Ministry of Higher Education Academic Year: 2023-2024

Modern Academy For Computer Subject: Microprocessor & Assembly Language

Science and Management Technology Code: CS203
Department: Computer Science Specialization: 2nd Level – 3rd Level
Program: Computer Science Dr.\Lamiaa Hassaan

Microprocessor & Assembly Language

1- Computer software is
a) System software b) Application software c) Programming software d) all of the mentioned

2- Programming languages of a microcomputer

a) Machine language b) Assembly language c) High level languages d) all of the mentioned

3- A debugger
a) easy to run and good b) difficult to run but c) easy to run and good d) difficult to run and
with small programs good with small with long programs good with long programs
programs
4- An assembler is
a) easy to run and good b) difficult to run but c) easy to run and good d) difficult to run and
with small programs good with small with long programs good with long programs
programs
5- ………. is a form of semiconductor memory technology used where the data is written
once and then not changed, data is stored permanently, even when the power is removed
a) RAM b) ROM c) CPU d) None
6- …uses binary signals to synchronize the actions of all devices attached to the system bus
a) Data bus b) Address bus c) Control bus d) None

7- …….. is a form of semiconductor memory technology where data can be rewritten by

removing the chip from the circuit board, exposing it to an ultraviolet light
a) EPROM b) ROM c) PROM d) RAM
8- …… is high speed temporary storage area built into the CPU
a) A processor b) ALU c) A bus d) A Register

9- The S bit in the EFLAGS register refers to:

a) status bit b) sign bit c) sign extension bit d) none of the mentioned

10- Examples of user visible registers

a) EAX, AX, ESP, b) EAX, AX, MAR, IR c) ECX, MBR, DX, SS d) None
BP

1
11- Special purpose registers are
a) 16 bit registers b) 32 bit registers such as c) 16 bit registers such as d) 32 bit registers such as
such as CS, DS EFLAGS AX, BX ECX, EDX

12- ……. contains the instruction most recently fetched

a) PC b) MAR c) IR d)MBR

13- …….contains the address of an instruction to be fetched

a) PC b) MAR c) IR d)MBR

14- The instruction, MOV AX, 0005H belongs to the address mode
a) register b) direct c) immediate d) register relative

15- The O bit in the EFLAGS register refers to:

a) overflow bit b) overload bit c) override segment bit d) none of the mentioned

16- ……….contains a word of data to be written to memory or the word most recently read
a) PC b) MAR c) IR d)MBR

17- The instruction, MOV AX, BX belongs to the address mode

a) direct addressing b) register addressing c) indexed addressing d) immediate addressing

18- Which of the following is not a data copy/transfer instruction?

a) MOV b) PUSH c) DAS d) POP

19- ………..contains the address of a location in memory

a) PC b) MAR c) IR d)MBR

20- Which of the following instruction is not valid?

a) MOV AX, BX b) MOV DS, AX c) MOV [AX], [5000H] d) PUSH AX

21- After each execution of the instruction PUSH AX, the stack pointer is
a) incremented by 1 b) decremented by 1 c) incremented by 2 d) decremented by 2

22- The instruction that pushes the contents of the specified register/memory location on to
the stack is
a) PUSHF b) POPF c) PUSH d) POP
23- After each execution of the instruction POPA, the stack pointer is
a) incremented by 16 b) decremented by 16 c) incremented by 8 d) decremented by 8

24- The operands in MOV instruction, source and destination in an instruction cannot be
a) register, register b) memory location, c) memory location, register d) immediate data,
memory location register

2
25- The instruction MOV DS, ES
a) copies the contents b) copies the contents of c) copies and deletes the d) causes an error
of ES into DS DS into ES contents of ES into DS

26- The instruction MOV EAX, ESP

a) copies the contents of b) copies the contents c) copies and deletes the d) causes an error
ESP into EAX of SP into AX contents of ESP into EAX

27- The instruction POP BX

a) copies the 32 bits b) copies 16 bits contents c) copies the contents of the d) None
contents of BX to of the stack into BX location SS:[SP] to the
the stack stack

28- Which of the following instructions cause errors

a) MOV CS, AX b) MOV EAX, EBP c) MOV CX, [SI] d) PUSHA

29- The coded object modules of the program to be assembled are present in
a) .ASM file b) .OBJ file c) .EXE file d) .OBJECT file

30- The advantages of assembly level programming are

a) flexibility of b) chances of error are c) debugging is easy d) all of the mentioned
programming is more less

31- The extension that is essential for every assembly level program is
a) .ASP b) .ALP c) .ASM d) .PGM

32- The instruction that is not possible among the following is

a) MOV AX, BX b) MOV AX, [BX] c) MOV 55H, BL d) MOV AL, 55H

33- The Stack is accessed using

a) SP register b) SS register c) SP and SS register d) None of the mentioned

34- As the storing of data words onto the stack is increased, the stack pointer is
a) incremented by 1 b) decremented by 1 c) incremented by 2 d) decremented by 2

35- The stack pointer register contains

a) address of the b) pointer address of the c) offset of address of stack d) data present in the
stack segment stack segment segment stack segment
36- POP operation
a) decrements SP b) increments SP c) decrements SS d) increments SS

37- The register or memory location that is pushed into the stack at the end must be
a) popped off last b) pushed off first c) popped off first d) pushed off last

3
38- The number of PUSH instructions and POP instructions in a subroutine must be
a) PUSH instructions b) POP instructions must be c) Both must be d) Instructions may be
must be greater than greater than PUSH equal any kind
POP instructions instructions
39- The SS register contains
a) address of the data b) address of the stack c) pointer address of the d) data in the stack
segment segment stack offset segment
40- While retrieving data from the stack, the stack pointer is
a) incremented by 1 b) incremented by 2 c) decremented by 1 d) decremented by 2

41- ……… enables the programmers to run the program step by step so that the programmer
can find out the exact location of the error
a) Compiler b) Editor c) Debugger d) None
42- If DS=1000, ES=1400, DI=150, EAX=1234, the memory address when executing the
instruction MOV BL, ES:[1234 H] will be:
a) 15243 b) 15234 c) 1634 d) 1643
43- The segment register of the instruction MOV BL, ES:[1234 H] will be:
a) ES b) DS c) SS d) CS

44- The segment register of the instruction MOV BL, [1234 H] will be:
a) ES b) DS c) SS d) CS
45- The address of the instruction POPA will be:
a) SP:[SS] b) SS:[BP] c) SS:[SP] d) SS:[SI]

46- The memory address when executing the instruction MOV AX, 100[DI] will be:
a) DS + DI + 100 b) (DS*10) +DI + 100 c) (ES*10) + DI +100 d) (DS+10)+DI+100

47- If DS=1000, ES=1400, DI=150, BX=CD01 then the memory location when executing
the instruction MOV AL, 100[BX][DI] will be:
a) 1CF51 b) CF51 c) FC51 d) 1FC50
48- Push AX copies the contents of AX onto the stack where address
a) SS:[SP - 1] = AH, b) SS:[SP - 1] = AL, c) SS:[SP - 1] = AH, d) SS:[SP + 1] = AH,
SS:[SP - 2] = AL, SS:[SP - 2] = AH, and SP SS:[SP - 2] = AL, and SP = SS:[SP + 2] = AL, and SP
and SP = SP - 2 = SP - 2 SP + 2 = SP + 2

50- A stack pointer stores the ……..

a) Address of the b) Address of instruction c) Address of instruction to d) Address of top of stack
bottom of the stack being executed be executed

51- The Program Counter (PC) in a microprocessor is used to:

4
a) specify the address of the b) specify the address of the c) specify the number of d) none
instruction to be executed instruction currently executing instructions executed
52- Stack pointer is stored in…..
a) RAM b) ROM c) RAM or ROM d) Microprocessor
53- An instruction that subtracts val3 from EAX
a) sub val3, eax b) sub eax, val3 c) subtract val3, eax d) subtract eax, val3
54- Which of the following is the implementation of AX = (-val2+BX)-val4
a) mov ax, val2 b) mov ax, val3 c) mov ax, val2 d) mov ax, val2
neg ax neg ax neg ax add ax
add ax, bx add ax, bx add ax, bx add ax, bx
sub ax, val4 sub ax, val4 add ax, val4 sub ax, val4
55- A word is
a) one byte b) 8 bytes c) 2 bytes d) 2 bits
56- The control bus uses ……… to synchronize the actions of all devices attached to the
system bus
a) binary signals b) continuous signals c) a and b d) None
57- STOS instruction copies …….. from AL, AX and EAX into memory location
a) numeric values b) strings c) both a and b d) None
58- LODS instruction copies strings memory location ……. into AL, AX, EAX
a) ES:[SI] b) ES:[DI] c) DS:[SI] DS:[DI]
60- Which of the following is used to store subroutine calls?
a) Queue b) Stack c) Data Register d) None
61- EPROM stands for:
a) Erasable programmable read only memory
b) Electrically programmable read write memory
c) Electrically programmable read write memory
d) None
62- Each memory location has
a) address b) contents c) a and b d) None
63- Which of the following belongs to categories of registers?
a) general purpose b) segment c) pointer d) a and b
64- ……. is a segment register that holds the assembly language instructions that are
executed by the microprocessor
a) DS b) CS c) SS d) ES
65- The set of parallel electrical conducting lines connecting connecting the components of
the motherboard is called:
a) conductors b) connectors c) busses d) consecutives

5
66- …… stores the instruction currently being executed
a) Instruction segment b) Instruction register c) both a and b d) None

67- The register which keeps track of the status of the running environment
a) General purpose b) Condition c) Segment d) Flags

67- Which of the following is not an arithmetic instruction?

a) INC b) CMP c) DEC d) ROL

69- Which is not an operand?

a) Variable b) Assembler c) Register d) Memory location
71- INC destination increments the content of destination by….
a) 1 b) 2 c) 8 d) 1024
72- The CS register stores ……. in code segment
a) pointer instructions b) path instructions c) code instructions d) stream line

73- The CF is known as ………….

a) carry flag b) condition flag c) common flag d) none

74- The Flag register is responsible to indicate the……….

a)condition of memory b) the condition of result of c) result of addition d) result of subtraction
ALU operation
75- The instruction that pushes the contents of the specified register/memory location on to
the stack is
a) PUSHA b) POPA c) PUSH d) POP
77- The instruction that supports addition when carry exists is
a) ADD b) ADC c) ADD & ADC d) None of the mentioned
78- The instruction that enables subtraction with borrow is
a) DEC b) SUB c) SBB d) None of the mentioned
79- The flag that acts as Borrow flag in the instruction, SBB is
a) direction flag b) carry flag c) parity flag d) trap flag
80- In general, the destination operand of an instruction can be
a) memory location b) register c) immediate data d) memory location and register
81- The directive that marks the end of an assembly language program is
a) ENDS b) END c) ENDS & END d) None of the mentioned
82- The directive that marks the end of a logical segment is
a) ENDS b) END c) ENDS & END d) None of the mentioned
83- The operands, source and destination in an instruction cannot be

6
a) register, register b) memory location, c) memory location, d) immediate data,
memory location register register
84- The instruction that is not possible among the following is
a) MOV AX, [BX]. b) MOV AX, 5555H c) MOV AX, [SI] d) MOV [SI], [DI]

85- The stack pointer register contains

a) address of the stack b) pointer address of the c) offset of address of d) data present in the
segment stack segment stack segment stack segment
86- While CPU is executing a program, an interrupt exists then it
a) follows the next b) jumps to instruction in c) breaks the normal d) stops executing
instruction in the program other registers sequence of execution of the program
instructions
87- An interrupt breaks the execution of instructions and diverts its execution to
a) Interrupt service routine b) Counter word register c) Execution unit d) control unit

88- If any interrupt request given to an input pin cannot be disabled by any means then the
input pin is called
a) maskable interrupt b) nonmaskable interrupt c) maskable interrupt and d) none of the
nonmaskable interrupt mentioned
89- If the interrupt is generated by the execution of an interrupt instruction then it is
a) software interrupt b) external interrupt c) hardware interrupt d) none of the mentioned
90- What is true about Program counter?
a) It is an 8-bit register, b) When an instruction c) It provides timing d) It is a 16-bit register used
which holds the temporary is fetched from memory and control signal to to store the memory address
data of arithmetic and then it is stored in the the microprocessor location of the next
logical operations. program counter instruction to be executed.

91- Interrupts can be classified into:

a) software &&hardware b)maskabe & non- c) vectored & non- d) all of the mentioned
maskable vectored

92- Assembler is a type of translator that translates ……language into machine level
language.
a) High Level b) Assembly level c) Both A and B d) None of the above
93- …… instructions are used in such cases when some instructions are needed to be
executed number of times to perform certain tasks.
a) Jump b) Loop c) Shift d) Rotate
94- …………loads a byte of a string in memory into AL.
a) LODSB b) LODSW c) STOSB d) STOSW

7
95- The instructions that are used for reading an input port and writing an output port
respectively are:
a) MOV, XCHG b) IN, OUT c) IN, MOV d) MOV, IN
96- LSS instructions loads any 16-bit or 32-bit register with an …… address, and the SS
with a ……. address
a) segment, segment b) segment, offset c) offset, segment d) offset, offset

Select True or False:

1. Segment registers cannot be used as operands for arithmetic and logical instructions
a) True b) False
2. System Software is suited for specific applications.
a) True b) False
3. Machine language can be directly understood and executed by a machine and it is the
language of 0s and 1s.
a) True b) False
4. The clock input provides the basic timing for processor operation and bus control
activity.
a) True b) False
5. The Z flag is set to 1 when an ALU operation results in a 0 output
a) True b) False
6. The Sign flag is set when the contents of the accumulator become negative after an ALU
operation
a) True b) False
7. The segment registers include SS, CS, DS, ES, DI, and SI
a) True b) False
8. The general purpose registers include AX, BX, CX, DX, EX, and FX (EX and FX are
also known as fastcall registers)
a) True b) False
9. SS is the segment register, is used to hold the offset of the stack
a) True b) False
10. LOOP is an instruction based on the AX (or AL) register
a) True b) False
11. A PUSH increments the SS register and a POP decrements it
a) True b) False
12. String manipulation instructions include LODS, MOV, INS, and STOS
a) True b) False
13. The statement MOV AX, [BP - 2] is illegal.

8
a) True b) False
14. The statement MOV ES:SI, CX is legal.
a) True b) False
15. Random Access Memory is a form of semiconductor memory technology that is used for
reading and writing data in any order
a) True b) False
16. In EEPROM, data can be rewritten electrically, while the chip is on the circuit board,
and the writing process is fast
a) True b) False
17. In PROM , data is written into the chip after it is installed in the circuit, but it can only
be written once
a) True b) False
18. LODSW affects the zero flag
a) True b) False
19. LODS: Loads AL, AX, EAX with a byte, two bytes or four bytes of data stored at
DS:[DI]
a) True b) False
20. String manipulation instructions are not affected by the direction flag D
a) True b) False
21. String manipulation instructions change the value of the direction flag D
a) True b) False
22. STOSW, D=1: Store String Word where ES:[DI] = AX; DI = DI + 2
a) True b) False
23. LDS AX, [DI] loads AX with an offset address, and the SS with a segment address
a) True b) False
24. The far jump is a six bytes instruction
a) True b) False
25. The fourth and fifth bytes of the near jump define the segment of the jump address.
a) True b) False
26. ISR is a program responsible for handling multiple interrupts
a) True b) False
27. The first step of interrupt handling is to save the PC content and information about
current state (flags, registers, etc) in the heap
a) True b) False
28. Non-vectored interrupts are those in which vector address is not predefined
a) True b) False

9
1- Compare between a debugger and an assembler.
Debugger Assembler

Easy to run Hard to run

Low overhead programs More program overhead
Close to the machine Isolated from the machine
Good on short programs Good on long programs

2- What is a bus? Describe different types of busses.

 A bus is a group of parallel wires that transfer data from one part of the computer to
another.
 The data bus transfers instructions and data between the CPU and memory.
 The control bus uses binary signals to synchronize the actions of all devices
attached to the system bus.
 The address bus holds the addresses of instructions and data when the currently
executing instruction transfers data between the CPU and memory.

3- Draw a block diagram of a microcomputer.

4- What are user invisible registers? State four of them.

They are registers that cannot be written on by the assembly programmer.

 Program Counter (PC): Contains the address of an instruction to be fetched.
 Instruction Register (IR): Contains the instruction most recently fetched.
 Memory Address Register (MAR): Contains the address of a location in memory.
 Memory Buffer Register (MBR): Contains a word of data to be written to
memory or the word most recently read.

10
5- Consider that DS=1000, ES=1400, DI=150, BX=CD01. Show by figure the memory
state when executing the instruction MOV AL, 100[BX][DI]

Solution:
Memory location = (Segment Register *10) + Disp. + base + index
= DS *10 + +100 + CD01 + 150
= 10000 + 100 + CE51 = 1CF51

6- Consider that DS=1000, ES=1400, DI=150, BX=CD01. Show by figure the memory
state when executing the instruction MOV AL, [BX][DI]

Solution:
Memory location = (Segment Register *10) + base + index
= DS *10 + CD01 + 150
= 10000 + CE51 = 1CE51

11
7- Consider that SP=1234, SS = 300, DS = 100, [SP+1] = 11, [SP+2] = 22, [SP+3]=33,
[SP+4]=44. Calculate and show by figure the memory state when executing the
instruction POP EAX

Solution:
Memory location = (Segment Register *10) + offset
= SS *10 + SP
= 3000 + 1234 = 4234

8- Given DS=A000H, SS=2100H, BX=2C2AH, SI=320H, ES=200H and DI=200H draw

a memory figure representing the execution of the instruction LES BX, [DI]. Assume
that the four bytes saved in memory starting from the calculated address are B2, 1A,
00, and 3C.

Solution:
Memory address = DS*10 + DI
= A0000 +200 = A0200

12
9- Consider DS = 1000, SI = 1000, D=0, SS = 200, [SI] = AB, [SI+1]=CD, [SI-1]=00
Show the memory state when executing the instruction LODSW

Solution:
Memory location = (Segment Register *10) + SI
= DS *10 + 1000
= 10000 + 1000 = 11000

10- Consider DS = 1000, DI = 100, D=1, ES = 200, input string = ABCD1234. Show the
memory state when executing the instruction INSD

Solution:
Memory location = (Segment Register *10) + DI
= ES *10 + 100
= 2000 + 100 = 2100

13
11- Given DS=1000H, BX=6F2AH, DI=1000H, draw a memory figure representing the
execution of the instruction LDS BX, [DI]. Assume that the four bytes saved in
memory starting from the calculated address are 7A, 12, 00, and 30

BX=127A

DS=3000

12- Given that CS=1000, SS=2000, IP=300, BP = 1200, show the execution of short jump,
near jump and far jump:

A4
30
02
04
Starting address→ JMP
Solution:
(i) Short Jump: 2 byte instruction that allows jumps within the range of +127 to -128
bytes from the address of the jump.

14
(ii) Near Jump: 3 byte instruction that allows jumps within the range of +32 Kbytes to
+32 Kbytes from the address of the jump. The second and third bytes form the offset
of the destination of the near jump instruction.

(iii)Far Jump: 5 byte instruction that allows jumps to any memory location within the
real memory system. The second and third bytes form the offset and the fourth and
fifth bytes form the segment of the destination of the jump address.

13- Given that CS=2000, SS=1000, IP=300, DS = 1200, calculate and draw the execution
of short jump, near jump and far jump considering the following figure:

2D
A0
20
1C
Starting address→ JMP

15
 (iv) Short Jump:

2031C
IP = 300
2D Jump Address = 20000+300+1C
A0 = 2031C
20
1C
Starting address = 20000→ JMP

(v) Near Jump:

2231C
IP = 300
2D Jump Address = 20000+300+201C
A0 = 2231C
20
1C
Starting address = 20000→ JMP

(vi) Far Jump:

2FA1C

………..
Jump Address = 2DA00+201C
2D = 2FA 1C
A0
20
1C
Starting address = 20000→ JMP

14- Suppose that SS = 2000H, DS = 2200H, SI = 1200H, and BP = 0101H. Calculate the
address accessed by each of the following instructions, assuming real mode operation
(i) MOV EAX, [BP + 120H]
Address = SS*10 + BP + 120 = 20000 + 101 + 120 = 20221
(ii) MOV BL, [BP +SI -100H]
Address = SS*10 + BP + SI - 100 = 20000 + 101 + 1200 - 100 = 21201
(iii) MOV CX, [SI+0BC]
Address = DS*10 + SI + BC = 22000 + 1200 + BC = 232BC

16