Examples and Problems Chap 3
Examples and Problems Chap 3
What are the maximum and minimum frequencies of a 16 MHz crystal with a
stability of 200 ppm?
The frequency can vary as much as 200 Hz for every 1 MHz of frequency or
200 × 16 = 3200 Hz.
ppm/1,000,000 × 100/10,000,000
However, the simplest way to convert from percentage to ppm is to convert the
percentage value to its decimal form by dividing by 100, or moving the decimal point
two places to the left, and then multiplying by 106, or moving the decimal point six
places to the right. For example, the ppm stability of a 5 MHz crystal with a precision
of 0.005 percent is found as follows. First, put 0.005 percent in decimal form:
0.005 percent = 0.00005. Next, multiply by 1 million:
Example 2
A radio transmitter uses a crystal oscillator with a frequency of 14.9 MHz and a
frequency multiplier chain with factors of 2, 3, and 3. The crystal has a stability of
±300 ppm.
b. Calculate the maximum and minimum frequencies that the transmitter is likely
to achieve if the crystal drifts to its maximum extreme.
This variation is multiplied by the frequency multiplier chain, yielding ±0.03 percent ×
18 = ±0.54 percent.
Example 3
R = MN + A = 32 × 285 + 63 = 9183
The output of this divider must be 100 kHz to match the 100 kHz reference signal
to achieve lock. Therefore, the input to the divider, the output of the VCO, is R times 100
kHz,
Example 4
Demonstrate that the step change in output frequency for the synthesizer in
Example 3 is equal to the phase detector reference range, or 0.1 MHz.
Changing the A factor one increment to 64 and recalculating the output yield
R = 32 × 285 = 64 = 9184
Problems
1. An FM transmitter has an 8.6 MHz crystal carrier oscillator and frequency multipliers
of 2, 3, and 4. What is the output frequency?
3. A 25 MHz crystal has a tolerance of 6200 ppm. If the frequency drifts upward to the
maximum tolerance, what is the frequency of the crystal?
5. A PLL frequency synthesizer has an output frequency of 162.7 MHz. The reference is
a 1MHz crystal oscillator followed by a divider of 10. What is the main
frequency divider ratio?
8. In a DDS, the ROM contains 4096 storage locations holding one cycle of sine wave
values. What is the phase step increment?
9. A DDS synthesizer has a 200MHz clock and a constant value of 16. The ROM address
register has 16 bits. What is the output frequency?
10. A PLL multiplier transmitter is to operate with a 915 MHz output. With a divide
actor of 64, what value of crystal is needed?