Machine-Level Programming:

Introduction

CSE 311 – Computer Organization

Assoc. Prof. Ahmed Fares
Intel x86 Processors
• Dominate laptop/desktop/server market

• Evolutionary design
• Backwards compatible with the 8086, introduced in 1978
• Added more features as time goes on

• Complex instruction set computer (CISC)

• Many different instructions with many different formats
• But only small subset encountered with Linux programs
• Hard to match performance of Reduced Instruction Set Computers (RISC)
• But Intel has done just that!
• In terms of speed at least, less so for low power

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Intel x86 Processors
• Machine Evolution
• Name Date Transistors MHz
• 8086 1979 29k 5-10
• 386 1985 0.3M 16-33
• Pentium 1993 3.1M 60-300
• Pentium 4 2000 45M 1400-1500
• Core 2 Duo 2006 291M 1860-2670
• Core i7 2008 731M 1700-3900
• Core i7 Skylake 2015 1.75B 2800-4000
• Added Features
• Instructions to support multimedia operations
• Instructions to enable more efficient conditional operations
• Transition from 32 bits to 64 bits
• More cores
• Built-in Graphics Processor

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Definitions
• Architecture: (also ISA: instruction set architecture)
The parts of a processor design that one needs to Application
understand or write assembly/machine code
• Examples: instruction set specification, registers Algorithm
• Microarchitecture: Implementation of the Programming Language
architecture Operating System
• Can have many microarchitectures implement the same Instruction Set Architecture
ISA e.g., different cache sizes and core frequencies
• Code Forms: Microarchitecture
• Assembly Code: A text representation of machine code Register-Transfer Level
• Machine Code: The byte-level programs that a processor Gates
executes
Circuits
• Example ISAs:
• Intel/AMD: IA32, x86-64
Devices
• ARM: ARMv6, ARMv7E, ARMv8 Physics
• RISC-V: RV32I, RV64I, RV64G

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Assembly/Machine Code View
CPU Memory
Addresses
Registers
Data Code
PC Data
Condition Instructions
Codes

Programmer-Visible State • Memory

• Register file • Byte addressable array
• Heavily used program data • Code and user data
• Condition codes
• Store status information about most recent arithmetic or logical operation
• Used for conditional branching
• PC: Program counter
• Address of next instruction
• Called “RIP” (Instruction Pointer Register) in X86-64
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Turning C into Object Code
• Code in files p1.c p2.c
• Compile with command: gcc –Og p1.c p2.c -o p
• Use basic optimizations (-Og) [New to recent versions of GCC]
• Put resulting binary in file p
text C program (p1.c p2.c)
Compiler (gcc –Og -S)
text Asm program (p1.s p2.s)
Assembler (gcc –c or as)
binary Object program (p1.o p2.o) Static libraries
(.a)
Linker (gcc or ld)
binary Executable program (p)

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Compiling Into Assembly
C Code (mult_and_add.c) Generated x86-64 Assembly
long mult_and_add(long x, long y, long z) { mult_and_add:
long product = x * y; imulq %rsi, %rdi
return z + product leaq (%rdi, %rdx), %rax
} retq

Obtain (on a lab machine) with command

gcc –Og –S mult_and_add.c
Produces the file mult_and_add.s
Warning: You will get very different results on other machines (e.g., MacOS) due to different
versions of gcc and different compiler settings

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Assembly Characteristics: Data Types
• Integer data of 1 (char), 2 (short), 4 (int), or 8 (long) bytes
• Data values (signed and unsigned)
• Addresses (pointers)

• Floating point data of 4 (float) or 8 (double) bytes

• Stored in a different set of registers

• Code: Byte sequences encoding series of instructions

• No aggregate types such as arrays or structures

• Just contiguously allocated bytes in memory

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Assembly Characteristics: Operations
• Perform arithmetic function on registers or memory data
• Math and logic operations

• Transfer data between memory and register

• Load data from memory into register
• Store register data into memory

• Transfer control
• Unconditional jumps to/from procedures
• Conditional branches

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Object Code mult_and_add:
imulq %rsi, %rdi
leaq (%rdi, %rdx), %rax
Code for mult_and_add retq
0x48
0x0f
0xaf • Assembler: gcc –c mult_and_add.s
0xfe • Translates .s into .o
0x48 • Binary encoding of each instruction
0x8d
• Nearly-complete image of executable code
0x04
• Missing linkages between code in different files
0x17
0xc3 • The number of bytes per instruction varies
• Linker
• Resolves references between files
• Combines with code from run-time libraries
• E.g., code for malloc(), printf()
• Some libraries are dynamically linked
• Linking occurs when program begins execution
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Disassembling Object Code
• Disassembler
objdump –d mult_and_add
• Useful tool for examining object code
• Analyzes bit pattern of series of instructions
• Produces a rendition of the assembly code
• Can be run on either executable binary program or .o file
• Disassembled
00000000004004e7 <mult_and_add>:
4004e7: 48 0f af fe imul %rsi,%rdi
4004eb: 48 8d 04 17 lea (%rdi,%rdx),%rax
4004ef: c3 retq

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x86-64 Integer Registers
%rax %r8

%rbx %r9

%rcx %r10
%rdx %r11
%rsi %r12

%rdi %r13

%rsp %r14

%rbp %r15

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x86-64 Integer Registers
%rax %eax %r8 %r8d

%rbx %ebx %r9 %r9d

%rcx %ecx %r10 %r10d

%rdx %edx %r11 %r11d

%rsi %esi %r12 %r12d

%rdi %edi %r13 %r13d

%rsp %esp %r14 %r14d

%rbp %ebp %r15 %r15d

• Can reference low-order 4 bytes

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Integer Registers
• The lower portion of each
64-bit register can referred
to by alternate register
names
• All 64-bit registers start
with r
• All named 32-bit registers
start with e

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Assembly instructions
• Instruction Format: ins Source, Dest
• ins: opcode (instruction)
• source, dest: operands
• Most opcodes have two operands, but some only have one

• Operand Types
• Immediate: Constant integer data
• Value is the constant
• Example: $0x400, $-533
• Like C constants, but prefixed with $
• Encoded with either 1, 2, 4, or 8 bytes depending on the size of the constant
• Register: One of the integer register names prefixed with a %
• Value is the contents of the register
• Example: %rax, %r13
• Some registers have special uses for particular instructions
• Memory: Consecutive bytes of memory at a given address
• Value is the contents at the specified memory address
• Simplest example: (%rax)
• Various other “addressing modes”
• Note: an address can also be specified with as a constant without the $ prefix

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Our first instruction: move (mov)

• mov Source, Dest

• Moves (copies) the source operand to the destination operand
• Has many purposes
• Load an immediate value (number) into a register
• Copy a value from one register into another register
• Read a value from a memory address
• Write a value from a memory address
• In other hardware architectures, these operations are done with several
different instructions

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mov Operand Combinations
Source, Dest

Reg
Imm
Mem

mov Reg
Reg
Mem

Mem Reg

Cannot do memory-memory operations with a single instruction

Specific instructions may have other operand restrictions

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Instruction suffixes
• Most assembly instructions take a suffix:
• b (byte: 1 byte)
• w (word: 2 bytes)
• l (long word: 4 bytes)
• q (quad word: 8 bytes)
• In general, only the specific register bytes or memory locations are modified
• Exception: “l” instructions that have a register as a destination will set the upper order bits
to 0
• Examples:
• movb $5, %al # moves the number 5 into the lower byte of %rax
• movw $5, %ax # moves 5 into the lower 16-bits of %rax
• movl %ebx, %eax # copies the value of %ebx into %eax (upper
32-bits of %rax are cleared)
• movq %rbx, %rax # copies the value of %rbx into %rax

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Address calculation: load effective address (lea)
• leaq mem, reg

• Computes the memory address of the source operand and saves it in the
destination register

• Uses:
• Computes the memory address for array and structure access
• Compiler will also use it to perform simple arithmetic

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Normal and Simple Memory Addressing Modes
• Normal (R) Mem[Reg[R]]
• The contents of register R is a memory address

leaq (%rcx),%rax

• Displacement D(R) Mem[Reg[R]+D]

• Register R specifies start of memory region
• Constant displacement D specifies offset

leaq 8(%rbp),%rdx

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Indexed Memory Addressing Modes
• Indexed (Rb, Ri) Mem[Reg[Rb] + Reg[Ri]]
• Register Rb often specifies base memory address
• Register Ri often acts as an index
• Often used in accessing arrays
leaq (%rcx, %rdx),%rax

• Scaled Indexed (Rb, Ri, s) Mem[Reg[Rb] + Reg[Ri]*s]

• s is called the scaling factor
• Must be 1, 2, 4, 8 (why these numbers?)
• leaq (%rcx, %rdx, 8),%rax
• Rb is optional ( , Ri, s) is a valid operand

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Complete Memory Addressing Modes
• Most General Form

D(Rb,Ri,S) Mem[Reg[Rb]+S*Reg[Ri]+ D]

• D: Constant “displacement” 1, 2, or 4 bytes

• R b: Base register: Any of 16 integer registers
• R i: Index register: Any, except for %rsp
• S: Scale: 1, 2, 4, or 8

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leaq arithmetic
• Compilers often use the leaq instruction for performing arithmetic
instead of computing addresses
• leaq can perform arithmetic in the form of x + y*s
• Where s is 1, 2, 4, or 8
• Example: adding two numbers
• leaq (%rdi, %rdx), %rax

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Address Computation Examples
%rdx 0xf000
%rcx 0x0100

Expression Address Computation Address

0x8(%rdx)
(%rdx,%rcx)
(%rdx,%rcx,4)
0x80(,%rdx,2)

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Address Computation Examples
%rdx 0xf000
%rcx 0x0100

Expression Address Computation Address

0x8(%rdx) 0xf000 + 0x8 0xf008
(%rdx,%rcx)
(%rdx,%rcx,4)
0x80(,%rdx,2)

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Address Computation Examples
%rdx 0xf000
%rcx 0x0100

Expression Address Computation Address

0x8(%rdx) 0xf000 + 0x8 0xf008
(%rdx,%rcx) 0xf000 + 0x100 0xf100
(%rdx,%rcx,4)
0x80(,%rdx,2)

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Address Computation Examples
%rdx 0xf000
%rcx 0x0100

Expression Address Computation Address

0x8(%rdx) 0xf000 + 0x8 0xf008
(%rdx,%rcx) 0xf000 + 0x100 0xf100
(%rdx,%rcx,4) 0xf000 + 4*0x100 0xf400
0x80(,%rdx,2)

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Address Computation Examples
%rdx 0xf000
%rcx 0x0100

Expression Address Computation Address

0x8(%rdx) 0xf000 + 0x8 0xf008
(%rdx,%rcx) 0xf000 + 0x100 0xf100
(%rdx,%rcx,4) 0xf000 + 4*0x100 0xf400
0x80(,%rdx,2) 2*0xf000 + 0x80 0x1e080

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Machine Programming Basics: Summary
• History of Intel processors and architectures
• Evolutionary design leads to many quirks and artifacts

• C, assembly, machine code

• New forms of visible state: program counter, registers, ...
• Compilers transform statements, expressions, procedures into low-level instruction
sequences

• Assembly Basics: Registers, operands, address computation

• Next time: more instructions

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