Fundamental Concepts of Data Communications

Table 5 UPC Number System Characters

Character Intended Use

0 Regular UPC codes

1 Reserved for future use
2 Random-weight items that are symbol marked at the store
3 National Drug Code and National Health Related Items Code
4 Intended to be used without code format restrictions and with
check digit protection for in-store marking of nonfood items
5 For use with coupons
6 Regular UPC codes
7 Regular UPC codes
8 Reserved for future use
9 Reserved for future use

0 0 0 1 1 0 1 1 1 1 0 0 1 0

Left-hand version of the character 0 Right-hand version of the character 0

FIGURE 4 UPC character 0

Example 1
Determine the UPC label structure for the digit 0.
Solution From Figure 3a, the binary sequence for the digit 0 in the left-hand character field is
0001101, and the binary sequence for the digit 0 in the right-hand character field is 1110010.
The left-hand sequence is comprised of three successive 0s, followed by two 1s, one 0, and one 1.
The three successive 0s are equivalent to a space three bits long. The two 1s are equivalent to a bar
two bits long. The single 0 and single 1 are equivalent to a space and a bar, each one bit long.
The right-hand sequence is comprised of three 1s followed by two 0s, a 1, and a 0. The three
1s are equivalent to a bar three bits long. The two 0s are equivalent to a space two bits long. The sin-
gle 1 and single 0 are equivalent to a bar and a space, each one bit long each. The UPC pattern for the
digit 0 is shown in Figure 4.

4 ERROR CONTROL

A data communications circuit can be as short as a few feet or as long as several thousand
miles, and the transmission medium can be as simple as a pair of wires or as complex as a
microwave, satellite, or optical fiber communications system. Therefore, it is inevitable that
errors will occur, and it is necessary to develop and implement error-control procedures.
Transmission errors are caused by electrical interference from natural sources, such as
lightning, as well as from man-made sources, such as motors, generators, power lines, and
fluorescent lights.
Data communications errors can be generally classified as single bit, multiple bit, or
burst. Single-bit errors are when only one bit within a given data string is in error. Single-bit
errors affect only one character within a message. A multiple-bit error is when two or more
nonconsecutive bits within a given data string are in error. Multiple-bit errors can affect one or
more characters within a message. A burst error is when two or more consecutive bits within a
given data string are in error. Burst errors can affect one or more characters within a message.

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Error performance is the rate in which errors occur, which can be described as either
an expected or an empirical value. The theoretical (mathematical) expectation of the rate at
which errors will occur is called probability of error (P[e]), whereas the actual historical
record of a system’s error performance is called bit error rate (BER). For example, if a sys-
tem has a P(e) of 105, this means that mathematically the system can expect to experience
one bit error for every 100,000 bits transported through the system (105  1/105 
1/100,000). If a system has a BER of 105, this means that in the past there was one bit er-
ror for every 100,000 bits transported. Typically, a BER is measured and then compared
with the probability of error to evaluate system performance. Error control can be divided
into two general categories: error detection and error correction.

5 ERROR DETECTION

Error detection is the process of monitoring data transmission and determining when errors
have occurred. Error-detection techniques neither correct errors nor identify which bits are
in error—they indicate only when an error has occurred. The purpose of error detection is
not to prevent errors from occurring but to prevent undetected errors from occurring.
The most common error-detection techniques are redundancy checking, which in-
cludes vertical redundancy checking, checksum, longitudinal redundancy checking, and
cyclic redundancy checking.

5-1 Redundancy Checking

Duplicating each data unit for the purpose of detecting errors is a form of error detection
called redundancy. Redundancy is an effective but rather costly means of detecting errors,
especially with long messages. It is much more efficient to add bits to data units that check
for transmission errors. Adding bits for the sole purpose of detecting errors is called
redundancy checking. There are four basic types of redundancy checks: vertical redundancy
checking, checksums, longitudinal redundancy checking, and cyclic redundancy checking.
5-1-1 Vertical redundancy checking. Vertical redundancy checking (VRC) is
probably the simplest error-detection scheme and is generally referred to as character par-
ity or simply parity. With character parity, each character has its own error-detection bit
called the parity bit. Since the parity bit is not actually part of the character, it is considered
a redundant bit. An n-character message would have n redundant parity bits. Therefore, the
number of error-detection bits is directly proportional to the length of the message.
With character parity, a single parity bit is added to each character to force the total
number of logic 1s in the character, including the parity bit, to be either an odd number (odd
parity) or an even number (even parity). For example, the ASCII code for the letter C is 43
hex, or P1000011 binary, where the P bit is the parity bit. There are three logic 1s in the
code, not counting the parity bit. If odd parity is used, the P bit is made a logic 0, keeping
the total number of logic 1s at three, which is an odd number. If even parity is used, the P
bit is made a logic 1, making the total number of logic 1s four, which is an even number.
The primary advantage of parity is its simplicity. The disadvantage is that when an
even number of bits are received in error, the parity checker will not detect them because
when the logic condition of an even number of bits is changed, the parity of the character
remains the same. Consequently, over a long time, parity will theoretically detect only 50%
of the transmission errors (this assumes an equal probability that an even or an odd number
of bits could be in error).
Example 2
Determine the odd and even parity bits for the ASCII character R.
Solution The hex code for the ASCII character R is 52, which is P1010010 in binary, where P des-
ignates the parity bit.

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For odd parity, the parity bit is a 0 because 52 hex contains three logic 1s, which is an odd num-
ber. Therefore, the odd-parity bit sequence for the ASCII character R is 01010010.
For even parity, the parity bit is 1, making the total number of logic 1s in the eight-bit sequence
four, which is an even number. Therefore, the even-parity bit sequence for the ASCII character R is
11010010.
Other forms of parity include marking parity (the parity bit is always a 1), no parity (the par-
ity bit is not sent or checked), and ignored parity (the parity bit is always a 0 bit if it is ignored). Mark-
ing parity is useful only when errors occur in a large number of bits. Ignored parity allows receivers
that are incapable of checking parity to communicate with devices that use parity.

5-1-2 Checksum. Checksum is another relatively simple form of redundancy error

checking where each character has a numerical value assigned to it. The characters within
a message are combined together to produce an error-checking character (checksum),
which can be as simple as the arithmetic sum of the numerical values of all the characters
in the message. The checksum is appended to the end of the message. The receiver repli-
cates the combining operation and determines its own checksum. The receiver’s checksum
is compared to the checksum appended to the message, and if they are the same, it is as-
sumed that no transmission errors have occurred. If the two checksums are different, a
transmission error has definitely occurred.

5-1-3 Longitudinal redundancy checking. Longitudinal redundancy checking

(LRC) is a redundancy error detection scheme that uses parity to determine if a transmis-
sion error has occurred within a message and is therefore sometimes called message parity.
With LRC, each bit position has a parity bit. In other words, b0 from each character in the
message is XORed with b0 from all the other characters in the message. Similarly, b1, b2,
and so on are XORed with their respective bits from all the characters in the message. Es-
sentially, LRC is the result of XORing the “character codes” that make up the message,
whereas VRC is the XORing of the bits within a single character. With LRC, even parity is
generally used, whereas with VRC, odd parity is generally used.
The LRC bits are computed in the transmitter while the data are being sent and then
appended to the end of the message as a redundant character. In the receiver, the LRC is re-
computed from the data, and the recomputed LRC is compared to the LRC appended to the
message. If the two LRC characters are the same, most likely no transmission errors have
occurred. If they are different, one or more transmission errors have occurred.
Example 3 shows how are VRC and LRC are calculated and how they can be used to-
gether.

Example 3
Determine the VRCs and LRC for the following ASCII-encoded message: THE CAT. Use odd parity
for the VRCs and even parity for the LRC.
Solution
Character T H E sp C A T LRC
Hex 54 48 45 20 43 41 54 2F
ASCII code b0 0 0 1 0 1 1 0 1
b1 0 0 0 0 1 0 0 1
b2 1 0 1 0 0 0 1 1
b3 0 1 0 0 0 0 0 1
b4 1 0 0 0 0 0 1 0
b5 0 0 0 1 0 0 0 1
b6 1 1 1 0 1 1 1 0
Parity bit b7 0 1 0 0 0 1 0 0
(VRC)

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The LRC is 00101111 binary (2F hex), which is the character “/” in ASCII. Therefore, after the LRC
character is appended to the message, it would read “THE CAT/.”
The group of characters that comprise a message (i.e., THE CAT) is often called a block or
frame of data. Therefore, the bit sequence for the LRC is often called a block check sequence (BCS)
or frame check sequence (FCS).
With longitudinal redundancy checking, all messages (regardless of their length) have the same
number of error-detection characters. This characteristic alone makes LRC a better choice for systems
that typically send long messages.
Historically, LRC detects between 95% and 98% of all transmission errors. LRC will not de-
tect transmission errors when an even number of characters has an error in the same bit position. For
example, if b4 in an even number of characters is in error, the LRC is still valid even though multiple
transmission errors have occurred.

5-1-4 Cyclic redundancy checking. Probably the most reliable redundancy check-
ing technique for error detection is a convolutional coding scheme called cyclic redundancy
checking (CRC). With CRC, approximately 99.999% of all transmission errors are de-
tected. In the United States, the most common CRC code is CRC-16. With CRC-16, 16 bits
are used for the block check sequence. With CRC, the entire data stream is treated as a long
continuous binary number. Because the BCS is separate from the message but transported
within the same transmission, CRC is considered a systematic code. Cyclic block codes are
often written as (n, k) cyclic codes where n  bit length of transmission and k  bit length
of message. Therefore, the length of the BCC in bits is
BCC  n  k
A CRC-16 block check character is the remainder of a binary division process. A
data message polynominal G(x) is divided by a unique generator polynominal function
P(x), the quotient is discarded, and the remainder is truncated to 16 bits and appended
to the message as a BCS. The generator polynominal must be a prime number (i.e., a
number divisible by only itself and 1). CRC-16 detects all single-bit errors, all double-
bit errors (provided the divisor contains at least three logic 1s), all odd number of bit
errors (provided the division contains a factor 11), all error bursts of 16 bits or less, and
99.9% of error bursts greater than 16 bits long. For randomly distributed errors, it is es-
timated that the likelihood of CRC-16 not detecting an error is 1014, which equates
to one undetected error every two years of continuous data transmission at a rate of
1.544 Mbps.
With CRC generation, the division is not accomplished with standard arithmetic di-
vision. Instead, modulo-2 division is used, where the remainder is derived from an exclu-
sive OR (XOR) operation. In the receiver, the data stream, including the CRC code, is di-
vided by the same generating function P(x). If no transmission errors have occurred, the
remainder will be zero. In the receiver, the message and CRC character pass through a block
check register. After the entire message has passed through the register, its contents should
be zero if the receive message contains no errors.
Mathematically, CRC can be expressed as
G1x2
 Q1x2  R1x2 (1)
P1x2
where G(x)  message polynominal
P(x)  generator polynominal
Q(x)  quotient
R(x)  remainder
The generator polynomial for CRC-16 is
P(x)  x16  x15  x2  x0

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CRC-16 polynominal, G(x) = X16 + X15 + X2 + X0

X2 X15 X16

15 14 + 13 12 11 10 9 8 7 6 5 4 3 2 1 + 0 +
MSB XOR XOR LSB XOR

Data input
BCC output

FIGURE 5 CRC-16 generating circuit

The number of bits in the CRC code is equal to the highest exponent of the gener-
ating polynomial. The exponents identify the bit positions in the generating polynomial
that contain a logic 1. Therefore, for CRC-16, b16, b15, b2, and b0 are logic 1s, and all
other bits are logic 0s. The number of bits in a CRC character is always twice the num-
ber of bits in a data character (i.e., eight-bit characters use CRC-16, six-bit characters use
CRC-12, and so on).
Figure 5 shows the block diagram for a circuit that will generate a CRC-16 BCC. A
CRC generating circuit requires one shift register for each bit in the BCC. Note that there
are 16 shift registers in Figure 5. Also note that an XOR gate is placed at the output of the
shift registers for each bit position of the generating polynomial that contains a logic 1, ex-
cept for x0. The BCC is the content of the 16 registers after the entire message has passed
through the CRC generating circuit.

Example 4
Determine the BCS for the following data and CRC generating polynomials:
Data G(x)  x7  x5  x4  x2  x1  x0
 10110111
CRC P(x)  x5  x4  x1  x0
 110011

Solution First, G(x) is multiplied by the number of bits in the CRC code, which is 5:
x5(x7  x5  x4  x2  x1  x0)  x12  x10  x9  x7  x6  x5  1011011100000
Then the result is divided by P(x):

1 1 0 1 0 1 1 1
1 1 0 0 1 1 | 1 0 1 1 0 1 1 1 0 0 0 0 0
1 1 0 0 1 1
1 1 1 1 0 1
1 1 0 0 1 1
1 1 1 0 1 0
1 1 0 0 1 1
1 0 0 1 0 0
1 1 0 0 1 1
1 0 1 1 1 0
1 1 0 0 1 1
1 1 1 0 1 0
1 1 0 0 1 1
0 1 0 0 1  CRC

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The CRC is appended to the data to give the following data stream:
G(x) CRC

兵
兵
1 0 1 1 0 1 1 1 0 1 0 0 1

At the receiver, the data are again divided by P(x) :

1 1 0 1 0 1 1 1
1 1 0 0 1 1 | 1 0 1 1 0 1 1 1 0 1 0 0 1
1 1 0 0 1 1
1 1 1 1 0 1
1 1 0 0 1 1
1 1 1 0 1 0
1 1 0 0 1 1
1 0 0 1 1 0
1 1 0 0 1 1
1 0 1 0 1 0
1 1 0 0 1 1
1 1 0 0 1 1
1 1 0 0 1 1
0 0 0 0 0 0 Remainder  0,
which means there
were no transmis-
sion errors

6 ERROR CORRECTION

Although detecting errors is an important aspect of data communications, determining what

to do with data that contain errors is another consideration. There are two basic types of er-
ror messages: lost message and damaged message. A lost message is one that never arrives
at the destination or one that arrives but is damaged to the extent that it is unrecognizable.
A damaged message is one that is recognized at the destination but contains one or more
transmission errors.
Data communications network designers have developed two basic strategies for han-
dling transmission errors: error-detecting codes and error-correcting codes. Error-de-
tecting codes include enough redundant information with each transmitted message to en-
able the receiver to determine when an error has occurred. Parity bits, block and frame
check characters, and cyclic redundancy characters are examples of error-detecting codes.
Error-correcting codes include sufficient extraneous information along with each message
to enable the receiver to determine when an error has occurred and which bit is in error.
Transmission errors can occur as single-bit errors or as bursts of errors, depending on
the physical processes that caused them. Having errors occur in bursts is an advantage when
data are transmitted in blocks or frames containing many bits. For example, if a typical
frame size is 10,000 bits and the system has a probability of error of 104 (one bit error in
every 10,000 bits transmitted), independent bit errors would most likely produce an error
in every block. However, if errors occur in bursts of 1000, only one or two blocks out of
every 1000 transmitted would contain errors. The disadvantage of bursts of errors is they
are more difficult to detect and even more difficult to correct than isolated single-bit errors.
In the modern world of data communications, there are two primary methods used for er-
ror correction: retransmission and forward error correction.

6-1 Retransmission
Retransmission, as the name implies, is when a receive station requests the transmit station to re-
send a message (or a portion of a message) when the message is received in error. Because the
receive terminal automatically calls for a retransmission of the entire message, retransmission

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is often called ARQ, which is an old two-way radio term that means automatic repeat request or
automatic retransmission request.ARQ is probably the most reliable method of error correction,
although it is not necessarily the most efficient. Impairments on transmission media often occur
in bursts. If short messages are used, the likelihood that impairments will occur during a trans-
mission is small. However, short messages require more acknowledgments and line turnarounds
than do long messages. Acknowledgments are when the recipient of data sends a short message
back to the sender acknowledging receipt of the last transmission. The acknowledgment can in-
dicate a successful transmission (positive acknowledgment) or an unsuccessful transmission
(negative acknowledgment). Line turnarounds are when a receive station becomes the transmit
station, such as when acknowledgments are sent or when retransmissions are sent in response
to a negative acknowledgment. Acknowledgments and line turnarounds for error control are
forms of overhead (data other than user information that must be transmitted). With long mes-
sages, less turnaround time is needed, although the likelihood that a transmission error will oc-
cur is higher than for short messages. It can be shown statistically that messages between 256
and 512 characters long are the optimum size for ARQ error correction.
There are two basic types of ARQ: discrete and continuous. Discrete ARQ uses ac-
knowledgments to indicate the successful or unsuccessful reception of data. There are two
basic types of acknowledgments: positive and negative. The destination station responds
with a positive acknowledgment when it receives an error-free message. The destination sta-
tion responds with a negative acknowledgment when it receives a message containing er-
rors to call for a retransmission. If the sending station does not receive an acknowledgment
after a predetermined length of time (called a time-out), it retransmits the message. This is
called retransmission after time-out.
Another type of ARQ, called continuous ARQ, can be used when messages are di-
vided into smaller blocks or frames that are sequentially numbered and transmitted in suc-
cession, without waiting for acknowledgments between blocks. Continuous ARQ allows
the destination station to asynchronously request the retransmission of a specific frame (or
frames) of data and still be able to reconstruct the entire message once all frames have been
successfully transported through the system. This technique is sometimes called selective
repeat, as it can be used to call for a retransmission of an entire message or only a portion
of a message.

6-2 Forward Error Correction

Forward error correction (FEC) is the only error-correction scheme that actually detects
and corrects transmission errors when they are received without requiring a retransmission.
With FEC, redundant bits are added to the message before transmission. When an error is
detected, the redundant bits are used to determine which bit is in error. Correcting the bit is
a simple matter of complementing it. The number of redundant bits necessary to correct er-
rors is much greater than the number of bits needed to simply detect errors. Therefore, FEC
is generally limited to one-, two-, or three-bit errors.
FEC is ideally suited for data communications systems when acknowledgments are
impractical or impossible, such as when simplex transmissions are used to transmit mes-
sages to many receivers or when the transmission, acknowledgment, and retransmission
time is excessive, for example when communicating to far away places, such as deep-space
vehicles. The purpose of FEC codes is to eliminate the time wasted for retransmissions.
However, the addition of the FEC bits to each message wastes time itself. Obviously, a
trade-off is made between ARQ and FEC, and system requirements determine which
method is best suited to a particular application. Probably the most popular error-correction
code is the Hamming code.

6-2-1 Hamming code. A mathematician named Richard W. Hamming, who was an

early pioneer in the development of error-detection and -correction procedures, developed

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One data unit contains m + n bits

d1 d2 d3 d4 d5 d6 dm h1 h2 h3 hn

m data bits n Hamming bits

FIGURE 6 Data unit comprised of m character bits and n Hamming bits

the Hamming code while working at Bell Telephone Laboratories. The Hamming code is
an error-correcting code used for correcting transmission errors in synchronous data
streams. However, the Hamming code will correct only single-bit errors. It cannot correct
multiple-bit errors or burst errors, and it cannot identify errors that occur in the Hamming
bits themselves. The Hamming code, as with all FEC codes, requires the addition of over-
head to the message, consequently increasing the length of a transmission.
Hamming bits (sometimes called error bits) are inserted into a character at random lo-
cations. The combination of the data bits and the Hamming bits is called the Hamming code.
The only stipulation on the placement of the Hamming bits is that both the sender and the
receiver must agree on where they are placed. To calculate the number of redundant Ham-
ming bits necessary for a given character length, a relationship between the character bits
and the Hamming bits must be established. As shown in Figure 6, a data unit contains m
character bits and n Hamming bits. Therefore, the total number of bits in one data unit is
m  n. Since the Hamming bits must be able to identify which bit is in error, n Hamming bits
must be able to indicate at least m  n  1 different codes. Of the m  n codes, one code in-
dicates that no errors have occurred, and the remaining m  n codes indicate the bit position
where an error has occurred. Therefore, m  n bit positions must be identified with n bits.
Since n bits can produce 2n different codes, 2n must be equal to or greater than m  n  1.
Therefore, the number of Hamming bits is determined by the following expression:
2n ≥ m  n  1 (2)
where n  number of Hamming bits
m  number of bits in each data character
A seven-bit ASCII character requires four Hamming bits (24 > 7  4  1), which
could be placed at the end of the character bits, at the beginning of the character bits, or in-
terspersed throughout the character bits. Therefore, including the Hamming bits with
ASCII-coded data requires transmitting 11 bits per ASCII character, which equates to a
57% increase in the message length.

Example 5
For a 12-bit data string of 101100010010, determine the number of Hamming bits required, arbitrar-
ily place the Hamming bits into the data string, determine the logic condition of each Hamming bit,
assume an arbitrary single-bit transmission error, and prove that the Hamming code will successfully
detect the error.
Solution Substituting m  12 into Equation 2, the number of Hamming bits is
for n  4 24  16 ≥ 12  4  1  17
Because 16 < 17, four Hamming bits are insufficient:
for n  5 25  32 ≥ 12  5  1  18
Because 32 > 18, five Hamming bits are sufficient, and a total of 17 bits make up the data stream (12
data plus five Hamming).

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Arbitrarily placing five Hamming bits into bit positions 4, 8, 9, 13, and 17 yields
bit position 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
H 1 0 1 H 1 0 0 H H 0 1 0 H 0 1 0
To determine the logic condition of the Hamming bits, express all bit positions that contain a logic 1
as a five-bit binary number and XOR them together:
Bit position Binary number
2 00010
6 00110
XOR 00100
12 01100
XOR 01000
14 01110
XOR 00110
16 10000
XOR 10110  Hamming bits
b17  1, b13  0, b9  1, b8  1, b4  0
The 17-bit Hamming code is
H H H H H
1 1 0 1 0 1 0 0 1 1 0 1 0 0 0 1 0
Assume that during transmission, an error occurs in bit position 14. The received data stream is
1 1 0 0 0 1 0 0 1 1 0 1 0 0 0 1 0
兵

error
At the receiver, to determine the bit position in error, extract the Hamming bits and XOR them with
the binary code for each data bit position that contains a logic 1:
Bit position Binary number
Hamming bits 10110
2 00010
XOR 10100
6 00110
XOR 10010
12 01100
XOR 11110
16 10000
XOR 01110  14
Therefore, bit position 14 contains an error.

7 CHARACTER SYNCHRONIZATION

In essence, synchronize means to harmonize, coincide, or agree in time. Character syn-

chronization involves identifying the beginning and end of a character within a message.
When a continuous string of data is received, it is necessary to identify which bits belong
to which characters and which bits are the MSBS and LSBS of the character. In essence,
this is character synchronization: identifying the beginning and end of a character code. In
data communications circuits, there are two formats commonly used to achieve character
synchronization: asynchronous and synchronous.

7-1 Asynchronous Serial Data

The term asynchronous literally means “without synchronism,” which in data communica-
tions terminology means “without a specific time reference.” Asynchronous data transmis-

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