Kafrelshiekh University
Faculty of Engineering
Department of Electrical Eng
Electronic Engineering
Sheet (1)
1- What is the Q- point for a biased transistor as shown in figure with =
150 µ A , = 75 , = 18 v and = 1.0 KΩ.
Fig 1
2- What is the saturation value of collector current in Problem 1 ?
3- What is the cutoff value of VCE in Problem 1 ?
4- Design a biased – transistor circuit using = = 10 V for a Q-
point = 5 mA and =4v.
Assume = 100 . The design involves finding , . And the
minimum power rating of the transistor . Sketch the circuit
5- Determine whether the transistor in the figure is biased in cut off ,
saturation or in the linear region .
Remember that = only in linear region .
Fig 2
SHEET (2)
1- What is the minimum value of in the fig that makes ≥ 10
Fig .1
2- Determine all transistors terminal voltages with respect to ground in the fig .
Fig .2
3- Analyze the circuit in fig to determine the correct voltages at transistor terminals
with respect to ground . Assume = 100 .
Fig . 3
4 – Determine , and for the following fig .
Fig . 4
5 – the data sheet for a particular transistor specifies a minimum of 50 and a
maximum of 125 . what ranges of Q-point values can be expected if an attempt is
made to mass-produce the circuit in the fig ? Is this range acceptable if the Q-point
must remain in the linear region ?
Fig . 5