ARCHITECTURE OF COMPUTERS

Vistula University
lecture 3
 Instruction set architecture (ISA)

An Instruction Set Architecture (ISA) is a set of rules and conventions used to define the interface
between a computer's hardware and its software. It serves as an abstraction layer that allows
software developers to write programs without needing to understand the intricate details of the
underlying hardware. ISAs are a fundamental concept in computer architecture and play a crucial
role in determining a computer's capabilities, performance, and compatibility.
 Key elements of an ISA include:

1. Instructions: The ISA defines a set of machine instructions that the CPU can execute. Each instruction
corresponds to a specific operation, like arithmetic, data movement, or control flow.

2. Data Types: ISAs specify the data types supported by the CPU, including integer, floating-point, and
character data types.

3. Registers: ISAs define the available registers (small, fast storage locations within the CPU) and their
purposes. These registers are used for temporary storage and as operands for instructions.

4. Memory Organization: The ISA specifies how memory is organized, addressing modes, and how data
can be accessed from memory.

5. Instruction Encoding: It defines how instructions are encoded in binary format, specifying the
opcode (operation code) and any necessary operands.

6. Execution Semantics: ISAs define the behavior of each instruction, including how it affects the
processor's state, such as flags and register contents.

7. Control Flow: The ISA includes instructions for managing program flow, like branching (conditional
and unconditional jumps) and function calls.
 Instructions

1. Arithmetic Instructions: These instructions perform mathematical operations like

addition, subtraction, multiplication, and division. They work on data stored in registers
or memory.

2. Data Movement Instructions: These instructions are used to move data between
registers, memory, and other storage locations. Examples include load (move data from
memory to a register) and store (move data from a register to memory) instructions.

3. Logic and Bitwise Instructions: These instructions perform logical operations like AND,
OR, XOR, and bit-shifting. They are often used for tasks like data manipulation and
bitwise operations.

4. Control Flow Instructions: Control flow instructions manage the flow of program
execution. This includes instructions for branching, jumping, and conditional execution.
Examples are branch (unconditional jump), branch if equal, and branch if less than.
 Instructions

5. Data Transfer Instructions: These instructions handle data transfer between different
data types, such as converting between integers and floating-point numbers.

6. Stack Operations: Some ISAs include instructions to support stack-based data

structures, commonly used for function calls and subroutine management.
7. Vector and SIMD Instructions: In modern ISAs, especially those designed for multimedia
and parallel processing, you may find vector and Single Instruction, Multiple Data (SIMD)
instructions for efficiently processing multiple data elements in parallel.

8. System Calls and Privileged Instructions: These instructions are used to interact with
the operating system and perform privileged operations, like entering kernel mode.
 Data Types

1. Integer Data Types:

1. Integer data types are used to represent whole numbers, both positive and
negative, without fractional parts. They are typically expressed as binary numbers.

2. Common integer data types include:

• Byte: 8 bits, used for small integers.

• Word: 16 bits or 32 bits, commonly used for integers.

• Double Word: 32 bits, used for larger integers.

• Quad Word: 64 bits, used for large integers and memory addressing.
 Data Types

2. Floating-Point Data Types:

• Floating-point data types are used to represent numbers with fractional parts and a
wide range of values. They are especially important for scientific and engineering
calculations.
Common floating-point data types include:

• Single Precision: Typically 32 bits, used for single-precision floating-point numbers.

• Double Precision: Typically 64 bits, used for double-precision floating-point

numbers.
• Extended Precision: Some ISAs support extended precision formats with more bits
for increased accuracy.
 Data Types

Character Data Types:

• Character data types are used to represent characters, symbols, and text. These types
are fundamental for processing and displaying textual information.

• Common character data types include:

• Character: Often 8 bits (1 byte) and used for encoding individual characters (e.g.,
ASCII or Unicode).

• String: A sequence of character data.

 Data Types

1. Boolean Data Types:

– Boolean data types represent binary values, typically "true" or "false" (or 1 and 0).

– These are fundamental for decision-making and logical operations.

2. Pointer Data Types:

• Pointers are used to store memory addresses, enabling the manipulation of data in
memory.

• The size of a pointer depends on the system's memory architecture, as it needs to

accommodate the address space.
 Data Types

Custom Data Types:

• Some ISAs may provide support for user-defined or custom data types.

• Custom data types allow programmers to define their own data structures and
representations.
Registers

Registers are fundamental components within a CPU (Central Processing Unit), and they play a
crucial role in executing instructions and performing data manipulation. Here's a more detailed
explanation of registers and their importance within the context of Instruction Set Architectures
(ISAs):

What are Registers?

• Registers are small, high-speed storage locations within the CPU. They are built directly into
the processor chip and are used to store data temporarily.
• Registers are the fastest storage elements in a computer, offering almost instantaneous
access to data.
Registers

Types of Registers:
Different CPUs have various types of registers, each serving a specific purpose. Common types of
registers include:

• General-Purpose Registers: These registers can hold data and are used for a wide range
of tasks, including data manipulation, calculations, and memory addressing.

• Special-Purpose Registers: These registers have specific functions. Examples include the
Program Counter (PC), which keeps track of the address of the next instruction to be
executed, and the Stack Pointer (SP), which helps manage function calls and data
storage in a stack.
• Flag Registers: These registers contain flags or condition codes that provide information
about the outcome of previous operations. For example, a Zero Flag may indicate
whether a previous arithmetic operation resulted in a zero value.
Registers

Roles and Purposes of Registers:

• Temporary Storage: Registers serve as temporary storage for data that is currently being
processed. For example, when performing arithmetic operations, data is often loaded into
registers, processed, and the result is stored back in registers.
• Operands for Instructions: Registers are used as the source and destination for most
instructions in an ISA. When you perform an operation like adding two numbers, those
numbers are often loaded from memory into registers, the operation is performed within
the registers, and the result is typically stored back in registers.

• Data Movement: Registers are essential for moving data between memory and the CPU. For
example, data is often loaded from memory into registers before being processed.

• Control and Program Flow: Special-purpose registers like the Program Counter (PC) are
crucial for managing program flow and instruction sequencing.
Registers

Register Size and Availability:

• The number of registers and their sizes can vary between different CPU architectures. Some
CPUs have a small number of registers, while others may have a larger register file.

• The size of registers often affects the maximum size of data that can be processed in a single
instruction. For example, a CPU with 32-bit registers can process 32-bit data at once.
 Memory Organization

Memory Hierarchy:

• Modern computer systems often have a memory hierarchy that includes various levels of storage,
such as registers, cache, RAM (Random Access Memory), and secondary storage (e.g., hard drives
or SSDs).

• The ISA may define how these different levels of memory are accessed and used in a program.
Memory Organization

Addressing Modes:
Addressing modes determine how data is accessed from memory. Different ISAs support
various addressing modes to provide flexibility for programmers. Common addressing modes
include:
• Direct Addressing: The memory address is specified explicitly in the instruction.

• Register Indirect Addressing: The instruction contains a register that holds the
memory address.

• Immediate Addressing: The data itself is included in the instruction.

• Indexed Addressing: An offset is added to a base address, allowing for arrays and data
structures.

• Relative Addressing: Addresses are computed relative to the current instruction's

location, useful for branching and jumps.

• Stack-Based Addressing: Data is pushed and popped from a stack, commonly used for
function calls and local variables.
Memory Organization

Memory Address Space:

– The ISA defines the size of the memory address space, which dictates the maximum
amount of memory a processor can access directly.

– For example, a 32-bit ISA allows for a 32-bit address space, which can address up to 4
GB of memory.

Data Alignment:

– Memory organization often includes rules for data alignment, which specifies how
data should be stored in memory to optimize access.
– For example, certain data types may need to be aligned to specific memory addresses
to improve performance.
Memory Organization

Byte Ordering (Endianness):

– Some ISAs specify the byte order in which multibyte data types (e.g., integers or
floating-point numbers) are stored in memory. This can be either little-endian or big-
endian.
Memory Protection and Segmentation:

– Some ISAs include features for memory protection, allowing an operating system to
separate memory into different segments and control access to them.

– Memory segmentation can also be used to implement virtual memory systems.

Memory-Mapped I/O:

– Some memory locations are reserved for communicating with peripheral devices.
These memory-mapped I/O addresses allow direct interaction with hardware
components.
Instruction Encoding:

Instruction encoding is a crucial aspect of an Instruction Set Architecture (ISA) that specifies how
instructions are represented in binary format. This encoding determines how the CPU interprets
and executes instructions. Here's a more detailed explanation of instruction encoding within an
ISA:
Instruction Encoding:
Opcode (Operation Code):
– The opcode is a field within the instruction that specifies the operation to be performed.
It defines the type of operation, such as arithmetic, logic, data movement, or control
flow.
– The opcode is typically a binary code that uniquely identifies each instruction in the ISA.

Operands:

– Operands are the data on which the instruction operates. These can be registers,
memory addresses, immediate values, or a combination of these.
– The instruction encoding specifies how the CPU should interpret and access these
operands.

Instruction Length:
• The instruction encoding defines the length of each instruction. Instructions can vary in size
depending on the complexity of the operation and the number of operands.

• Some instructions may be fixed-length, while others are variable-length.

 Instruction Encoding:
Addressing Modes:
– The instruction encoding often includes information about how to compute the
effective memory address for load and store operations. This information is known as
the addressing mode.
– Addressing modes dictate how the CPU should combine operands to determine the
memory address.

Immediate Values:

– Instructions that require immediate values (constants) specify how these values are
encoded within the instruction. Immediate values are often used in arithmetic, logical,
and control instructions.

– The number of bits allocated to immediate values can vary, affecting the range and
precision of values that can be represented.
Instruction Decoding:

• The CPU's control unit is responsible for decoding the binary machine code into meaningful
instructions. It interprets the opcode and operand fields to determine the operation to be
executed and the data on which to operate.
Instruction Encoding:

Register Specifiers:
– For instructions that involve registers, the instruction encoding specifies which registers
are involved. Register specifiers may be encoded as binary values or bit fields within the
instruction.
Encoding Efficiency:

– Efficient instruction encoding is important for optimizing the use of limited memory and
for achieving good instruction throughput.

– Well-designed instruction encodings can help minimize instruction length and

complexity while maximizing instruction density and execution speed.

Machine Code Format:

– The instruction encoding determines the machine code format used to represent
instructions in binary form.

– The machine code format is what is actually stored in memory and executed by the CPU.
Execution Semantics

Execution semantics, within the context of an Instruction Set Architecture (ISA), refer to the rules
and behaviour that dictate how each individual instruction operates. These rules encompass how
instructions affect the processor's state, which includes register contents and flags. Here's a
more detailed explanation of execution semantics in an ISA:Execution semantics, within the
context of an Instruction Set Architecture (ISA), refer to the rules and behavior that dictate how
each individual instruction operates. These rules encompass how instructions affect the
processor's state, which includes register contents and flags. Here's a more detailed explanation
of execution semantics in an ISA.
Execution Semantics

Operation Execution:
• Execution semantics specify what operation an instruction performs. This includes arithmetic
operations (e.g., addition, subtraction), logic operations (e.g., AND, OR), data movement
(e.g., load, store), and control flow operations (e.g., branching, jumping).
Operands and Source/Destination Handling:

• Execution semantics define how instructions interact with their operands, which can be
registers, memory locations, or immediate values.

• Some instructions may specify which register or memory location is the source (input) and
which is the destination (output).

• The behavior of the instruction regarding the handling of these operands is also defined,
such as whether they are modified, overwritten, or left unchanged.
Execution Semantics

Processor State Changes:

– The execution of instructions can alter the processor's internal state. This may include
changes to registers, flags, and other control signals.

– For example, an arithmetic instruction may update a destination register with the result
of the operation.

Flags and Condition Codes:

– Execution semantics define how an instruction affects condition codes or flags. Flags are
special registers that represent certain conditions, such as zero, carry, overflow, and
sign.

– Instructions can set or clear these flags based on the outcome of their operations. For
instance, a comparison operation may set a "zero" flag if the two compared values are
equal.
Execution Semantics

Control Flow Changes:

– Some instructions, such as conditional branches or jumps, alter the control flow of a
program. Execution semantics specify under what conditions such changes occur.

– For example, a "branch if equal" instruction will cause a branch if a specific condition
(equality) is met.

Exception Handling:

– Execution semantics include rules for handling exceptions and interrupts. These rules
dictate how the CPU responds to exceptional conditions, such as divide-by-zero or an
external interrupt signal.

– The behavior during exceptions, like transferring control to a specific address (exception
handler), is defined within the execution semantics.
Execution Semantics

Side Effects:
– Some instructions may have side effects that go beyond the direct results of their
operations. These side effects can include changes to memory or control signals.

– Execution semantics provide information about these side effects.

Sequence of Execution:

– The ISA also specifies the sequence in which instructions are executed. This includes
issues like instruction pipelining, out-of-order execution, and the impact of memory
access delays.
 Control Flow

Control flow instructions are a fundamental part of an Instruction Set Architecture (ISA) that
allow for the management and control of the execution sequence of a program. These
instructions include branching (conditional and unconditional jumps) and function call
instructions. Here's a more detailed explanation of control flow instructions within an ISA:

Flow Control Instructions:

• Some ISAs have flow control instructions to manipulate the program's execution flow, like
enabling or disabling interrupts, setting or clearing condition flags, and handling branch delay
slots (if present).

Subroutine Parameters and Return Values:

• Function call instructions often involve passing parameters to subroutines and receiving
return values. ISAs define conventions for how parameters are passed and how return values
are retrieved, which may involve specific registers or memory locations.
 Control Flow

Branching Instructions:
Branching instructions are used to alter the program's flow by changing the order in which
instructions are executed. They can be categorized into two main types:

• Conditional Branches: These instructions allow the program to take different paths
depending on a condition or a flag status. For example, a "branch if equal" instruction
will cause a branch to a different location in memory if a specified condition is met (e.g.,
two values are equal).

• Unconditional Branches: These instructions unconditionally change the program's flow,

redirecting execution to a specific memory address. For instance, a "jump" instruction is
an unconditional branch that transfers control to the specified address.
 Control Flow

Function Call Instructions:

• Function call instructions are used for subroutines or procedures. These instructions facilitate
the transfer of control to a specific function or subroutine and provide a mechanism for
returning from that subroutine. Common function call instructions include "call" and
"return."

• When a function is called, the program counter (PC) is typically pushed onto a stack, and the
PC is set to the address of the function. When the function completes, the PC is popped from
the stack, returning control to the original location in the program.

Loop Control:
• Control flow instructions are essential for implementing loops, such as "for," "while," and
"do-while" loops in high-level programming languages. These loops are created by using
conditional branches to repeat a sequence of instructions.
 Control Flow

Interrupts and Exceptions:

• Some ISAs include instructions or mechanisms for handling interrupts and exceptions. When
an external event occurs, like a hardware interrupt or a software-generated exception, the
control flow can be redirected to an interrupt handler or an exception-handling routine.
 Simplified microprocessor structure

A simplified microprocessor typically consists of several key components that work together to
execute instructions and perform basic computational tasks. Here is an overview of these
components in a simplified microprocessor structure:
Central Processing Unit (CPU):
The CPU is the brain of the microprocessor. It's responsible for executing instructions and
performing arithmetic and logic operations. It contains the Control Unit and the Arithmetic Logic
Unit (ALU). The Control Unit fetches instructions from memory and directs the execution of each
instruction.
Central Processing Unit (CPU):

Control Unit (CU):

– The Control Unit is responsible for coordinating and managing the execution of
instructions.

– It fetches instructions from memory (the instruction cycle), decodes them to determine
the operation to be performed, and then controls the necessary data path and control
signals to execute the instruction.

– The Control Unit also handles tasks like branching and program flow control.

Arithmetic Logic Unit (ALU):

– The ALU is the component responsible for performing arithmetic and logic operations
on data.

– It is where actual calculations and data manipulation take place. Arithmetic operations
like addition and subtraction, as well as logical operations like AND and OR, are
executed in the ALU.
Central Processing Unit (CPU):

Registers:

– Registers are small, high-speed storage locations within the CPU.

– They are used for temporary storage of data and serve as operands for instructions.
Registers are essential for holding intermediate results and operands during
calculations.

The CPU is responsible for the execution of machine instructions that make up a program. It
fetches these instructions from memory, decodes them to understand what needs to be done,
and then carries out the necessary operations using the ALU and registers. The Control Unit
ensures that the instructions are executed in the correct sequence and that the correct data is
used.
Memory:

Memory stores both instructions (program code) and data. In a simplified microprocessor,
memory may consist of two main types: Program Memory (for instructions) and Data Memory
(for data storage). Addresses are used to access specific locations in memory.
Memory:

Program Memory:

– Program Memory, also known as Instruction Memory, is a section of memory

specifically allocated to store the instructions that make up a program. These
instructions are fetched and executed by the Central Processing Unit (CPU) to run a
software application.
– The program memory holds the machine code, which is a binary representation of the
program's instructions.

Data Memory:
– Data Memory is used for storing various types of data, including variables, arrays, and
other program-related information.

– Data memory is distinct from program memory, ensuring a separation between code
and data. Data memory is where the CPU reads from and writes to when performing
data manipulation operations.
Memory:

Addresses:

– Memory is organized as a sequence of addressable locations, each identified by a

unique memory address.

– Addresses are used by the CPU to access specific locations in memory, whether it's for
fetching an instruction or reading/writing data.
Instruction cycle

The instruction cycle, often referred to as the machine cycle, is a fundamental concept in
computer architecture that outlines the steps a central processing unit (CPU) follows to execute a
single machine-level instruction. It's a sequence of events that takes place for each instruction,
allowing the CPU to fetch, decode, execute, and possibly store the results of that instruction. The
instruction cycle typically consists of the following stages:
Instruction cycle
Fetch: In this stage, the CPU retrieves the next instruction from memory. The program counter
(PC) keeps track of the memory address of the next instruction to be executed. The CPU sends
the address to memory, and the instruction is loaded into the instruction register (IR) within the
CPU.

Decode: Once the instruction is fetched, the CPU decodes it. The control unit (part of the CPU)
interprets the opcode (operation code) of the instruction to determine the specific operation it
needs to perform and what data is involved. This step involves breaking down the instruction
into its constituent parts, including addressing modes and operands.

Execute: With the instruction decoded, the CPU proceeds to execute the operation specified by
the instruction. This stage can involve arithmetic and logic operations, data movement, or
control flow changes, depending on the nature of the instruction.

Write Back (Optional): In some cases, especially for instructions that modify the contents of
registers or memory, there may be a "write back" stage. In this stage, the CPU stores the results
of the operation back in a register or memory location. This stage is optional because not all
instructions require writing back results.
End of Lecture