Esp8684 Datasheet en

ESP8684 Series
Datasheet
UltraLowPower SoC with RISCV SingleCore CPU

Supporting IEEE 802.11b/g/n (2.4 GHz WiFi) and Bluetooth 5 (LE)
1 MB, 2 MB or 4 MB flash in the 4×4 mm QFN package
Including:
ESP8684H1
ESP8684H2
ESP8684H4
Version v1.4
Espressif Systems
Copyright © 2023
www.espressif.com
Product Overview
ESP8684 series of SoCs is an ultra-low-power and highly-integrated MCU-based SoC solution that supports 2.4
GHz Wi-Fi and Bluetooth® Low Energy (Bluetooth LE). The block diagram of ESP8684 series is shown
below.
Espressif’s ESP8684 Wi-Fi + Bluetooth® Low Energy SoC
Core System Wireless MAC and RF

Baseband
2.4 GHz Balun + Switch
RISC-V
32-bit Wi-Fi
Wi-Fi MAC
Microprocessor Baseband
2.4 GHz Receiver
RF Synthesizer
Transmitter
2.4 GHz
Bluetooth LE Link
Cache SRAM Controller
Bluetooth LE
JTAG ROM Baseband
Peripherals RTC
SPI0/1 I2C Master GPIO RTC GPIO PMU
SPI2 GDMA UART

RTC Security
Watchdog
DIG ADC Timer
In-package Flash
Controller
RNG ECC
Temperature Sensor RTC Super Watchdog Timer

Secure
SHA
Boot
eFuse
Main System Watchdog Timer Brownout
Controller Flash Encryption
General-purpose Timer System Timer LED PWM
Modules having power in specific power modes:

Active
Active, Modem-sleep, and Light-sleep;
All modes
Figure 1: Functional block diagram of ESP8684
Solution Highlights
• A complete WiFi subsystem that complies • Storage capacity ensured by 272 KB of SRAM
with IEEE 802.11b/g/n protocol and supports (16 KB for cache) and 576 KB of ROM on the
Station mode, SoftAP mode, SoftAP + Station chip.
mode, and promiscuous mode
• Reliable security features ensured by
• A Bluetooth LE subsystem that supports – Cryptographic hardware accelerators that
features of Bluetooth 5, central role and support ECC, Hash and secure boot
peripheral role
– Random number generator
• Stateoftheart power and RF performance
– External memory encryption and decryption
• 32bit RISCV singlecore processor with a
• Rich set of peripheral interfaces and GPIOs,
four-stage pipeline that operates at up to 120
ideal for various scenarios and complex
MHz
applications
Espressif Systems 1 ESP8684 Datasheet (Version v1.4)

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Features
WiFi – 1 core at 120 MHz: 305.42 CoreMark; 2.55

CoreMark/MHz
• IEEE 802.11 b/g/n-compliant
• 576 KB ROM
• Supports 20 MHz bandwidth in 2.4 GHz band
• 272 KB SRAM (16 KB for cache)
• 1T1R mode with data rate up to 72.2 Mbps
• In-package flash (see details in Chapter 1
• Wi-Fi Multimedia (WMM) ESP8684 Series Comparison)
• TX/RX A-MPDU, TX/RX A-MSDU • Access to flash accelerated by cache
• Immediate Block ACK • Supports flash in-Circuit Programming (ICP)
• Fragmentation and defragmentation

Advanced Peripheral Interfaces
• Transmit opportunity (TXOP)
• 14 × programmable GPIOs
• Automatic Beacon monitoring (hardware TSF)
• Digital interfaces:
• 3 × virtual Wi-Fi interfaces
– 3 × SPI
• Simultaneous support for Infrastructure BSS in
Station mode, SoftAP mode, Station + SoftAP – 2 × UART
mode, and promiscuous mode – 1 × I2C Master
Note that when ESP8684 series scans in Station
– LED PWM controller, with up to 6 channels
mode, the SoftAP channel will change along with
the Station channel – General DMA controller (GDMA), with 1
transmit channel and 1 receive channel
• Antenna diversity
• Analog interfaces:
Bluetooth – 1 × 12-bit SAR ADC, up to 5 channels
• Bluetooth LE: Bluetooth 5 – 1 × temperature sensor
• High power mode�20 dBm� • Timers:
• Speed: 125 kbps, 500 kbps, 1 Mbps, 2 Mbps – 1 × 54-bit general-purpose timer
• Advertising extensions – 2 × watchdog timers
• Multiple advertisement sets – 1 × 52-bit system timer
• Channel selection algorithm #2

Low Power Management
• Internal co-existence mechanism between Wi-Fi
and Bluetooth to share the same antenna • Power Management Unit with four power modes
Security
CPU and Memory
• Secure boot
• 32-bit RISC-V single-core processor, up to 120
MHz • Flash encryption
• CoreMark® score: • 1024-bit OTP, up to 256 bits for use

• Cryptographic hardware acceleration: • Random Number Generator (RNG)
– ECC • Clock glitch filter
– SHA Accelerator (FIPS PUB 180-4)
Applications (A Nonexhaustive List)

With ultra-low power consumption, ESP8684 is an ideal choice for IoT devices in the following areas:
• Smart Home • Health Care
– Light control – Health monitor
– Smart button – Baby monitor
– Smart plug • Smart Agriculture
– Indoor positioning – Smart greenhouse
• Industrial Automation – Smart irrigation
– Industrial robot – Agriculture robot
– Industrial field bus • Retail and Catering
• Consumer Electronics – POS machines
– Smart watch and bracelet – Service robot
– Over-the-top (OTT) devices • Generic Low-power IoT Sensor Hubs
– Logger toys and proximity sensing toys • Generic Low-power IoT Data Loggers

Contents
Contents
Product Overview 1
Solution Highlights 1
Features 2
Applications 3
1 ESP8684 Series Comparison 8

1.1 ESP8684 Series Nomenclature 8
1.2 Comparison 8
2 Pin Definition 9
2.1 Pin Layout 9
2.2 Pin Description 9
2.3 Power Scheme 10
2.4 Strapping Pins 12
3 Functional Description 14
3.1 Radio and Wi-Fi 14
3.1.1 2.4 GHz Receiver 14
3.1.2 2.4 GHz Transmitter 14
3.1.3 Clock Generator 14
3.1.4 Wi-Fi Radio and Baseband 15
3.1.5 Wi-Fi MAC 15
3.1.6 Networking Features 15
3.2 Bluetooth LE 15
3.2.1 Bluetooth LE Radio and PHY 16
3.2.2 Bluetooth LE Link Layer Controller 16
3.3 CPU and Memory 16
3.3.1 CPU 16
3.3.2 Internal Memory 17
3.3.3 Address Mapping Structure 17
3.3.4 Cache 17
3.4 System Clocks 18
3.4.1 CPU Clock 18
3.4.2 RTC Clock 18
3.5 Digital Peripherals 18
3.5.1 General Purpose Input / Output Interface (GPIO) 18
3.5.2 Serial Peripheral Interface (SPI) 20
3.5.3 Universal Asynchronous Receiver Transmitter (UART) 20
3.5.4 I2C Interface 20
3.5.5 LED PWM Controller 21
3.5.6 General DMA Controller 21
3.6 Analog Peripherals 21
3.6.1 Analog-to-Digital Converter (ADC) 21

Contents
3.6.2 Temperature Sensor 21

3.7 Timers 21
3.7.1 General Purpose Timer 21
3.7.2 System Timer 22
3.7.3 Watchdog Timers 22
3.8 Low Power Management 22
3.9 Cryptographic Hardware Accelerators 23
3.10 Physical Security Features 23
3.11 Peripheral Pin Configurations 23
4 Electrical Characteristics 25
4.1 Absolute Maximum Ratings 25
4.2 Recommended Operating Conditions 25
4.3 DC Characteristics (3.3 V, 25 °C) 25
4.4 ADC Characteristics 26
4.5 Current Consumption 27
4.5.1 RF Current Consumption in Active Mode 27
4.5.2 Current Consumption in Other Modes 27
4.6 Reliability 28
4.7 Wi-Fi Radio 28
4.7.1 Wi-Fi RF Transmitter (TX) Specifications 28
4.7.2 Wi-Fi RF Receiver (RX) Specifications 29
4.8 Bluetooth LE Radio 30
4.8.1 Bluetooth LE RF Transmitter (TX) Specifications 30
4.8.2 Bluetooth LE RF Receiver (RX) Specifications 32
5 Package Information 35
6 Related Documentation and Resources 36
Revision History 37

List of Tables
List of Tables
1 ESP8684 Series Member Comparison 8
2 Pin Description 9
3 Description of ESP8684 Series Power-up and Reset Timing Parameters 12
4 Strapping Pins 12
5 Parameter Descriptions of Setup and Hold Times for the Strapping Pins 13
6 IO MUX Pin Functions 19
7 Power-Up Glitches on Pins 20
8 Peripheral Pin Configurations 23
9 Absolute Maximum Ratings 25
10 Recommended Operating Conditions 25
11 DC Characteristics (3.3 V, 25 °C) 25
12 ADC Characteristics 26
13 ADC Calibration Results 26
14 Current Consumption for Wi-Fi (2.4 GHz) in Active Mode 27
15 Current Consumption for Bluetooth LE in Active Mode 27
16 Current Consumption in Low-Power Modes 27
17 Current Consumption in Modem-sleep Mode 27
18 Reliability Qualifications 28
19 Wi-Fi Frequency 28
20 TX Power with Spectral Mask and EVM Meeting 802.11 Standards 28
21 TX EVM Test 29
22 RX Sensitivity 29
23 Maximum RX Level 30
24 RX Adjacent Channel Rejection 30
25 Bluetooth LE Frequency 30
26 Transmitter General Characteristics 30
27 Transmitter Characteristics - Bluetooth LE 1 Mbps 30
28 Transmitter Characteristics - Bluetooth LE 2 Mbps 31
29 Transmitter Characteristics - Bluetooth LE 125 Kbps 31
30 Transmitter Characteristics - Bluetooth LE 500 Kbps 32
31 Receiver Characteristics - Bluetooth LE 1 Mbps 32
32 Receiver Characteristics - Bluetooth LE 2 Mbps 32
33 Receiver Characteristics - Bluetooth LE 125 Kbps 33
34 Receiver Characteristics - Bluetooth LE 500 Kbps 33

List of Figures
List of Figures
1 Functional block diagram of ESP8684 1
2 ESP8684 Series Nomenclature 8
3 ESP8684 Pin Layout (Top View) 9
4 ESP8684 Series Power Scheme 11
5 ESP8684 Series Power-up and Reset Timing 11
6 Setup and Hold Times for the Strapping Pins 13
7 Address Mapping Structure 17
8 QFN24 (4×4 mm) Package 35

1 ESP8684 Series Comparison
1 ESP8684 Series Comparison
1.1 ESP8684 Series Nomenclature
ESP8684 H x
Flash
Flash temperature
H: High temperature
Chip series
Figure 2: ESP8684 Series Nomenclature
1.2 Comparison
Table 1: ESP8684 Series Member Comparison
Ordering Code InPackage flash Ambient Temperature (°C) Package (mm)

ESP8684H1 1
1 MB –40 ∼ 105 QFN24 (4*4)
ESP8684H2 2 MB –40 ∼ 105 QFN24 (4*4)
ESP8684H4 4 MB –40 ∼ 105 QFN24 (4*4)
1
The ESP8684H1 chip is still in sample status.

2 Pin Definition
2 Pin Definition
2.1 Pin Layout
22 XTAL_N
23 XTAL_P
19 U0RXD
20 U0TXD
24 VDDA
21 VDDA
ANT 1 18 GPIO18
VDDA3P3 2 17 VDD3P3_CPU
VDDA3P3 3 16 GPIO10
GPIO0 4 15 GPIO9
ESP8684
GPIO1 5 14 GPIO8
25 GND
GPIO2 6 13 MTDO
MTDI 10
VDD3P3_RTC 11
MTCK 12
7
9
CHIP_EN
GPIO3
MTMS
Figure 3: ESP8684 Pin Layout (Top View)
2.2 Pin Description
Table 2: Pin Description
Name No. Type Power Domain Function

ANT 1 I/O — RF input and output
VDDA3P3 2 PA — Analog power supply
VDDA3P3 3 PA — Analog power supply
GPIO0 4 I/O/T VDD3P3_RTC GPIO0, ADC1_CH0
GPIO2 6 I/O/T VDD3P3_RTC GPIO2, ADC1_CH2, FSPIQ
High: on, enables the chip.
CHIP_EN 7 I VDD3P3_RTC Low: off, the chip powers off.
Note: Do not leave the CHIP_EN pin floating.
MTMS 9 I/O/T VDD3P3_RTC MTMS, GPIO4, ADC1_CH4, FSPIHD
MTDI 10 I/O/T VDD3P3_RTC MTDI, GPIO5, FSPIWP

2 Pin Definition
Name No. Type Power Domain Function

VDD3P3_RTC 11 PD — Input power supply for RTC
MTCK 12 I/O/T VDD3P3_CPU MTCK, GPIO6, FSPICLK
MTDO 13 I/O/T VDD3P3_CPU MTDO, GPIO7, FSPID
GPIO8 14 I/O/T VDD3P3_CPU GPIO8
GPIO10 16 I/O/T VDD3P3_CPU GPIO10, FSPICS0
VDD3P3_CPU 17 PD — Input power supply for digital IO
U0RXD 19 I/O/T VDD3P3_CPU U0RXD, GPIO19
U0TXD 20 I/O/T VDD3P3_CPU U0TXD, GPIO20
VDDA 21 PA — Analog power supply
XTAL_N 22 — — External crystal output
XTAL_P 23 — — External crystal input
VDDA 24 PA — Analog power supply
GND 25 G — Ground
1
PA : analog power supply; PD : power supply for digital IO; I: input; O: output; T: high impedance.
2
Pin functions in bold font are the default pin functions.
3
The pin function in this table refers only to some fixed settings and do not cover all cases for signals that
can be input and output through the GPIO matrix. For more information on the GPIO matrix, please
refer to Chapter IO MUX and GPIO Matrix (GPIO, IO_MUX) in ESP8684 Technical Reference Manual.
2.3 Power Scheme

Digital pins of ESP8684 are divided into two different power domains:
• VDD3P3_CPU
• VDD3P3_RTC
VDD3P3_CPU is the input power supply for digital IO and digital system.
VDD3P3_RTC is the input power supply for RTC, RTC IO, and digital system.
The power scheme diagram is shown in Figure 4.

2 Pin Definition
Figure 4: ESP8684 Series Power Scheme
Notes on CHIP_EN:
Figure 5 shows the power-up and reset timing of ESP8684 series. Details about the parameters are listed in
Table 3.
t0 t1
2.8 V
VDDA,
VDDA3P3,
VDD3P3_RTC,
VDD3P3_CPU
VIL_nRST
CHIP_EN
Figure 5: ESP8684 Series Powerup and Reset Timing

2 Pin Definition
Table 3: Description of ESP8684 Series Powerup and Reset Timing Parameters
Min
Parameter Description (µs)
Time between bringing up the VDDA, VDDA3P3, VDD3P3_RTC, and
t0 50
VDD3P3_CPU rails, and activating CHIP_EN
Duration of CHIP_EN signal level < VIL_nRST (refer to its value in
t1 50
Table 11) to reset the chip
2.4 Strapping Pins

ESP8684 series has two strapping pins:
• GPIO8
• GPIO9
Software can read the values of GPIO8 and GPIO9 from GPIO_STRAPPING field in GPIO_STRAP_REG register.
For register description, please refer to Section GPIO Matrix Register Summary in
ESP8684 Technical Reference Manual.
During the chip’s power-on reset, RTC watchdog reset, and brownout reset, the latches of the strapping pins
sample the voltage level as strapping bits of ”0” or ”1”, and hold these bits until the chip is powered down or shut
down.
By default, GPIO9 is connected to the internal weak pull-up resistor. If GPIO9 is not connected or connected to
an external high-impedance circuit, the latched bit value will be ”1”.
To change the strapping bit values, you can apply the external pull-down/pull-up resistances, or use the host
MCU’s GPIOs to control the voltage level of these pins when powering on ESP8684.
After reset, the strapping pins work as normal-function pins.
Table 4 lists detailed booting configurations of the strapping pins.
Table 4: Strapping Pins
Booting Mode 1
Pin Default SPI Boot Joint Download Boot2
GPIO8 N/A Don’t care 1
Internal weak
GPIO9 1 0
pull-up
Enabling/Disabling ROM Messages Print During Booting
Pin Default Functionality
When the value of eFuse field EFUSE_UART_PRINT_CONTROL is
0 (default), print is enabled and not controlled by GPIO8.
GPIO8 N/A 1, if GPIO8 is 0, print is enabled; if GPIO8 is 1, it is disabled.
2, if GPIO8 is 0, print is disabled; if GPIO8 is 1, it is enabled.
3, print is disabled and not controlled by GPIO8.

2 Pin Definition
1
The strapping combination of GPIO8 = 0 and GPIO9 = 0 is invalid and will trigger unexpected be-
havior.
2
Joint Download Boot mode supports UART Download Boot download method. In addition to SPI
Boot and Joint Download Boot modes, ESP8684 also supports SPI Download Boot mode. For
details, please see ESP8684 Technical Reference Manual > Chapter Chip Boot Control.
Figure 6 shows the setup and hold times for the strapping pins before and after the CHIP_EN signal goes high.
Details about the parameters are listed in Table 5.
t0 t1
VIL_nRST
CHIP_EN
VIH
Strapping pin
Figure 6: Setup and Hold Times for the Strapping Pins
Table 5: Parameter Descriptions of Setup and Hold Times for the Strapping Pins
Min
Parameter Description (ms)
t0 Setup time before CHIP_EN goes from low to high 0
t1 Hold time after CHIP_EN goes high 3

3 Functional Description
This chapter describes the functions of ESP8684.
3.1 Radio and WiFi

The ESP8684 series radio consists of the following blocks:
• 2.4 GHz receiver
• 2.4 GHz transmitter
• bias and regulators
• balun and transmit-receive switch
• clock generator
3.1.1 2.4 GHz Receiver

The 2.4 GHz receiver demodulates the 2.4 GHz RF signal to quadrature baseband signals and converts them to
the digital domain with two high-resolution, high-speed ADCs. To adapt to varying signal channel conditions,
ESP8684 series integrates RF filters, Automatic Gain Control (AGC), DC offset cancelation circuits, and
baseband filters.
3.1.2 2.4 GHz Transmitter

The 2.4 GHz transmitter modulates the quadrature baseband signals to the 2.4 GHz RF signal, and drives the
antenna with a high-powered CMOS power amplifier. The use of digital calibration further improves the linearity of
the power amplifier.
Additional calibrations are integrated to cancel any radio imperfections, such as:
• carrier leakage
• I/Q amplitude/phase matching
• baseband nonlinearities
• RF nonlinearities
• antenna matching
These built-in calibration routines reduce the cost, time, and specialized equipment required for product
testing.
3.1.3 Clock Generator

The clock generator produces quadrature clock signals of 2.4 GHz for both the receiver and the transmitter. All
components of the clock generator are integrated into the chip, including inductors, varactors, filters, regulators
and dividers.
The clock generator has built-in calibration and self-test circuits. Quadrature clock phases and phase noise are
optimized on chip with patented calibration algorithms which ensure the best performance of the receiver and the
transmitter.

3.1.4 WiFi Radio and Baseband

The ESP8684 series Wi-Fi radio and baseband support the following features:
• 802.11b/g/n
• 802.11n MCS0-7 that supports 20 MHz bandwidth
• 802.11n 0.4 µs guard interval
• data rate up to 72.2 Mbps
• RX STBC (single spatial stream)
• adjustable transmitting power
• antenna diversity
ESP8684 series supports antenna diversity with an external RF switch. This switch is controlled by one or
more GPIOs, and used to select the best antenna to minimize the effects of channel imperfections.
3.1.5 WiFi MAC

ESP8684 series implements the full 802.11 b/g/n Wi-Fi MAC protocol. It supports the Basic Service Set (BSS)
STA and SoftAP operations under the Distributed Control Function (DCF). Power management is handled
automatically with minimal host interaction to minimize the active duty period.
The ESP8684 series Wi-Fi MAC applies the following low-level protocol functions automatically:
• 3 × virtual Wi-Fi interfaces
• infrastructure BSS in Station mode, SoftAP mode, Station + SoftAP mode, and promiscuous mode
• RTS protection, CTS protection, Immediate Block ACK
• fragmentation and defragmentation
• TX/RX A-MPDU, TX/RX A-MSDU
• transmit opportunity (TXOP)
• Wi-Fi multimedia (WMM)
• CCMP, TKIP, WEP, BIP, WPA2-PSK/WPA2-Enterprise, and WPA3-PSK/WPA3-Enterprise
• automatic beacon monitoring (hardware TSF)
3.1.6 Networking Features

Espressif provides libraries for TCP/IP networking and other networking protocols over Wi-Fi. TLS 1.2 (default)
and 1.3 are also supported.
3.2 Bluetooth LE
ESP8684 series includes a Bluetooth Low Energy subsystem that integrates a hardware link layer controller, an
RF/modem block and a feature-rich software protocol stack. It supports the core features of Bluetooth 5.

3.2.1 Bluetooth LE Radio and PHY

Bluetooth Low Energy radio and PHY in ESP8684 series support:
• 1 Mbps PHY
• 2 Mbps PHY for higher data rates
• coded PHY for longer range (125 Kbps and 500 Kbps)
• HW listen before talk (LBT)
3.2.2 Bluetooth LE Link Layer Controller

Bluetooth Low Energy Link Layer Controller in ESP8684 series supports:
• LE advertising extensions, to enhance broadcasting capacity and broadcast more intelligent data
• multiple advertisement sets
• simultaneous advertising and scanning
• adaptive frequency hopping and channel assessment
• LE channel selection algorithm #2
• connection parameter update
• high duty cycle non-connectable advertising
• LE privacy 1.2
• LE data packet length extension
• link layer extended scanner filter policies
• low duty cycle directed advertising
• link layer encryption
• LE Ping
3.3 CPU and Memory

3.3.1 CPU
ESP8684 series has a low-power 32-bit RISC-V single-core microprocessor with the following features:
• four-stage pipeline that supports a clock frequency of up to 120 MHz
• RV32IMC ISA
• 32-bit multiplier and 32-bit divider
• up to 32 vectored interrupts at seven priority levels
• up to 2 hardware breakpoints/watchpoints
• JTAG for debugging

3.3.2 Internal Memory

ESP8684’s internal memory includes:
• 576 KB of ROM: for booting and core functions.
• 272 KB of onchip SRAM: for data and instructions, running at a configurable frequency of up to 120
MHz. Of the 272 KB SRAM, 16 KB is configured for cache.
• 1 Kbit of eFuse: 256 bits are reserved for your data, such as encryption key and device ID.
• Inpackage flash : See details in Chapter 1 ESP8684 Series Comparison.
3.3.3 Address Mapping Structure
Figure 7: Address Mapping Structure
Note:
The memory space with gray background is not available for use.
3.3.4 Cache
ESP8684 series has an four-way set associative cache. This cache is read-only and has the following
features:
• size: 16 KB

• block size: 32 bytes
• critical word first and early restart
3.4 System Clocks

3.4.1 CPU Clock
The CPU clock has three possible sources:
• external main crystal clock
• fast RC oscillator (typically about 17.5 MHz, and adjustable)
• PLL clock
The application can select the clock source from the three clocks above. The selected clock source drives the
CPU clock directly, or after division, depending on the application. Once the CPU is reset, the default clock
source would be the external main crystal clock divided by 2.
Note:
ESP8684 is unable to operate without an external main crystal clock.
3.4.2 RTC Clock

The RTC slow clock is used for RTC counter, RTC watchdog and low-power controller. It has three possible
sources:
• internal slow RC oscillator (typically about 136 kHz, and adjustable)
• internal fast RC oscillator divided clock (derived from the fast RC oscillator divided by 256)
• external slow clock (clock signal input through GPIO0, and typically about 32.768 kHz)
The RTC fast clock is used for RTC peripherals and sensor controllers. It has two possible sources:
• external main crystal clock divided by 2
• internal fast RC oscillator clock (typically about 17.5 MHz, and adjustable)
3.5 Digital Peripherals

3.5.1 General Purpose Input / Output Interface (GPIO)
ESP8684 has 14 GPIO pins which can be assigned various functions by configuring corresponding registers.
Besides digital signals, some GPIOs can be also used for analog functions, such as ADC.
All GPIOs have selectable internal pull-up or pull-down, or can be set to high impedance. When these GPIOs are
configured as an input, the input value can be read by software through the register. Input GPIOs can also be set
to generate edge-triggered or level-triggered CPU interrupts. All digital IO pins are bi-directional, non-inverting
and tristate, including input and output buffers with tristate control. These pins can be multiplexed with other
functions, such as the UART, SPI, etc. For low-power operations, the GPIOs can be set to holding state.

The IO MUX and the GPIO matrix are used to route signals from peripherals to GPIO pins. Together they provide
highly configurable I/O. Using GPIO Matrix, peripheral input signals can be configured from any IO pins while
peripheral output signals can be configured to any IO pins. Table 6 shows the IO MUX functions of each pin. For
more information about IO MUX and GPIO matrix, please refer to Chapter IO MUX and GPIO Matrix (GPIO,
IO_MUX) in ESP8684 Technical Reference Manual.
Table 6: IO MUX Pin Functions
Name No. Function 0 Function 1 Function 2 Reset Notes

GPIO0 4 GPIO0 GPIO0 — 0 R, G
GPIO2 6 GPIO2 GPIO2 FSPIQ 1 R
MTMS 9 MTMS GPIO4 FSPIHD 1 R
MTDI 10 MTDI GPIO5 FSPIWP 1 R, G
MTCK 12 MTCK GPIO6 FSPICLK 1* —
MTDO 13 MTDO GPIO7 FSPID 1 —
GPIO8 14 GPIO8 GPIO8 — 1 —
GPIO10 16 GPIO10 GPIO10 FSPICS0 1 —
U0RXD 19 U0RXD GPIO19 — 3 —
U0TXD 20 U0TXD GPIO20 — 4 —
Reset
The default configuration of each pin after reset:
• 0 - input disabled, in high impedance state (IE = 0)
• 1 - input enabled, in high impedance state (IE = 1)
• 2 - input enabled, pull-down resistor enabled (IE = 1, WPD = 1)
• 3 - input enabled, pull-up resistor enabled (IE = 1, WPU = 1)
• 4 - output enabled, pull-up resistor enabled (OE = 1, WPU = 1)
• 1* - When the value of eFuse bit EFUSE_DIS_PAD_JTAG is

0, input enabled, pull-up resistor enabled (IE = 1, WPU = 1)
1, input enabled, in high impedance state (IE = 1)
We recommend pulling high or low GPIO pins in high impedance state to avoid unnecessary power
consumption. You may add pull-up and pull-down resistors in your PCB design referring to Table 11, or enable
internal pull-up and pull-down resistors during software initialization.
Notes
• R - These pins have analog functions.
• G - These pins have glitches during power-up. See details in Table 7.

Table 7: PowerUp Glitches on Pins
Typical Time Period

Pin Glitch1
(µs)
GPIO0 Low-level glitch 40
MTDI Low-level glitch 60
1
Low-level glitch: the pin is at a low level during the time period;
3.5.2 Serial Peripheral Interface (SPI)

ESP8684 series features three SPI interfaces (SPI0, SPI1, and SPI2). SPI0 and SPI1 can be configured to
operate in SPI memory mode and SPI2 can be configured to operate in general-purpose SPI mode.
• SPI Memory mode
In SPI memory mode, SPI0 and SPI1 interface with in-package flash. Data is transferred in bytes. Up to
four-line STR reads and writes are supported. The clock frequency is configurable to a maximum of 60
MHz in STR mode.
• SPI2 Generalpurpose SPI (GPSPI) mode
When SPI2 acts as a general-purpose SPI, it can operate in master and slave modes. SPI2 supports
two-line full-duplex communication and single-/two-/four-line half-duplex communication in both master
and slave modes. The host’s clock frequency of SPI2 is configurable. Data is transferred in bytes. The
clock polarity (CPOL) and phase (CPHA) are also configurable. The SPI2 interface can connect to GDMA.
In master or slave mode, the clock frequency is 40 MHz at most, and the four modes of SPI transfer format
are supported.
3.5.3 Universal Asynchronous Receiver Transmitter (UART)

ESP8684 series has two UART interfaces, i.e. UART0 and UART1, which support IrDA and asynchronous
communication (RS232 and RS485) at a speed of up to 2.5 Mbps. The UART controller provides hardware flow
control (CTS and RTS signals) and software flow control (XON and XOFF).
3.5.4 I2C Interface

ESP8684 series has an I2C bus master interface. The I2C interface supports:
• standard mode (100 Kbit/s)
• fast mode (400 Kbit/s)
• up to 800 Kbit/s (constrained by SCL and SDA pull-up strength)
• 7-bit and 10-bit addressing mode
• double addressing mode
• 7-bit broadcast address
You can configure instruction registers to control the I2C interface for more flexibility.

3.5.5 LED PWM Controller

The LED PWM controller has the following features:
• Six identical, independent PWM generators (i.e. channels) that generate digital waveforms
• Configurable waveform periods and duty cycle
• Maximum PWM resolution: 14 bits
• PWM signal output in low-power mode (Light-sleep mode)
• Automatic duty cycle fading - gradual increase/decrease of PWM duty cycle, which is useful for the LED
RGB color-gradient generator.
3.5.6 General DMA Controller

ESP8684 series has a general DMA controller (GDMA) with two independent channels, i.e. one transmit channel
and one receive channel. These two channels are shared by peripherals with DMA feature. The GDMA controller
implements a fixed-priority scheme among these channels, whose priority can be configured.
The GDMA controller controls data transfer using linked lists. It allows peripheral-to-memory and
memory-to-memory data transfer at a high speed. All channels can access internal RAM.
Peripherals on ESP8684 series with DMA feature are SPI2 and SHA.
3.6 Analog Peripherals

3.6.1 AnalogtoDigital Converter (ADC)
ESP8684 series integrates a 12-bit SAR ADC, which supports measurements on 5 channels.
For ADC characteristics, please refer to Table 12.
3.6.2 Temperature Sensor

The temperature sensor generates a voltage that varies with temperature. The voltage is internally converted via
an ADC into a digital value.
The temperature sensor has a range of –40 °C to 125 °C. It is designed primarily to sense the temperature
changes inside the chip. The temperature value depends on factors like microcontroller clock frequency or I/O
load. Generally, the chip’s internal temperature is higher than the operating ambient temperature.
3.7 Timers
3.7.1 General Purpose Timer
ESP8684 series is embedded with a 54-bit general-purpose timer, which is based on a 16-bit prescaler and a
54-bit auto-reload-capable up/down-timer.
The timers’ features are summarized as follows:
• a 16-bit clock prescaler, from 2 to 65536
• a 54-bit time-base counter programmable to be incrementing or decrementing

• able to read real-time value of the time-base counter
• halting and resuming the time-base counter
• programmable alarm generation
• level interrupt generation
3.7.2 System Timer

ESP8684 series integrates a 52-bit system timer, which has two 52-bit counters and three comparators. The
system timer has the following features:
• counters with a fixed clock frequency of 16 MHz
• three types of independent interrupts generated according to alarm value
• two alarm modes: target mode and period mode
• 52-bit target alarm value and 26-bit periodic alarm value
• automatic reload of counter value
• counters can be stalled if the CPU is stalled or in OCD mode
3.7.3 Watchdog Timers

The ESP8684 series contains two watchdog timers: one in general-purpose timer group (called Main System
Watchdog Timer, or MWDT) and one in the RTC module (called the RTC Watchdog Timer, or RWDT).
During the flash boot process, RWDT and MWDT are enabled automatically in order to detect and recover from
booting errors.
Watchdog timers have the following features:
• four stages, each with a programmable timeout value. Each stage can be configured, enabled and
disabled separately
• interrupt, CPU reset, or core reset for MWDT upon expiry of each stage; interrupt, CPU reset, core reset, or
system reset for RWDT upon expiry of each stage
• 32-bit expiry counter
• write protection, to prevent RWDT and MWDT configuration from being altered inadvertently
• flash boot protection

If the boot process from an SPI flash does not complete within a predetermined period of time, the
watchdog will reboot the entire main system.
3.8 Low Power Management

With the use of advanced power-management technologies, ESP8684 series can switch between different
power modes.
• Active mode: CPU and chip radio are powered on. The chip can receive, transmit, or listen.
• Modem-sleep mode: The CPU is operational and the clock speed can be reduced. Wireless base band,
and radio are disabled, but wireless connection can remain active.

• Light-sleep mode: The CPU is paused. Any wake-up events (MAC,RTC timer, or external interrupts) will
wake up the chip. Wireless connection can remain active.
• Deep-sleep mode: CPU and most peripherals are powered down. Only the PMU in RTC power
management unit is powered on. For more details, please refer to Figure 1.
For power consumption in different power modes, please refer to Current Consumption.
3.9 Cryptographic Hardware Accelerators

ESP8684 series is equipped with hardware accelerators of general algorithms, such as:
• SHA1/SHA224/SHA256 (FIPS PUB 180-4)
• ECC
3.10 Physical Security Features

• In-package flash encryption (AES-XTS algorithm) with software inaccessible key prevents unauthorized
readout of your application code or data.
• Secure boot feature uses a hardware root of trust to ensure only signed firmware can be booted.
• The clock glitch filter can filter the glitches on the external main crystal clock, so as to prevent the chip from
being attacked by clock glitches.
3.11 Peripheral Pin Configurations
Table 8: Peripheral Pin Configurations
Interface Signal Pin Function

ADC ADC1_CH0 GPIO0 One 12-bit SAR ADC
ADC1_CH1 GPIO1
ADC1_CH2 GPIO2
ADC1_CH3 GPIO3
ADC1_CH4 MTMS
JTAG MTDI MTDI JTAG for software debugging
MTCK MTCK
MTMS MTMS
MTDO MTDO
UART U0RXD_in Any GPIO pins Two UART channels with hardware flow control
U0CTS_in
U0DSR_in
U0TXD_out
U0RTS_out
U0DTR_out
U1RXD_in
U1CTS_in
U1DSR_in
U1TXD_out

Interface Signal Pin Function

U1RTS_out
U1DTR_out
I2C I2CEXT0_SCL_in Any GPIO pins One I2C channel in slave or master mode
I2CEXT0_SDA_in
I2CEXT0_SCL_out
I2CEXT0_SDA_out
LED PWM ledc_ls_sig_out0~5 Any GPIO pins Six independent PWM channels
SPI2 FSPICLK_in/_out_mux Any GPIO pins • Master mode and slave mode of SPI, Dual
FSPICS0_in/_out SPI, Quad SPI, and QPI
FSPICS1~5_out • Connection to external flash, RAM, and
FSPID_in/_out other SPI devices
FSPIQ_in/_out • Four modes of SPI transfer format
FSPIWP_in/_out • Configurable SPI frequency
FSPIHD_in/_out • 64-byte FIFO or GDMA buffer

4 Electrical Characteristics
4.1 Absolute Maximum Ratings

Stresses beyond the absolute maximum ratings listed in the table below may cause permanent damage to the
device. These are stress ratings only, and do not refer to the functional operation of the device.
Table 9: Absolute Maximum Ratings
Symbol Parameter Min Max Unit

VDDA3P3, VDDA, VDD3P3_RTC, Voltage applied to power supply pins
–0.3 3.6 V
VDD3P3_CPU per power domain
1
Ioutput Cumulative IO output current — 730 mA
TST ORE Storage temperature –40 150 °C
1
The chip worked properly after a 24-hour test in ambient temperature at 25 °C, and the IOs in two domains
(VDD3P3_RTC, VDD3P3_CPU) output high logic level to ground.
4.2 Recommended Operating Conditions
Table 10: Recommended Operating Conditions
Symbol Parameter Min Typ Max Unit

VDDA3P3, VDDA,
VDD3P3_RTC, Voltage applied to power supply pin 3.0 3.3 3.6 V
1
VDD3P3_CPU
IV DD 2 Current delivered by external power supply 0.5 — — A
TA Operating ambient temperature -40 — 105 °C
1
To write eFuse, VDD3P3_CPU should not be higher than 3.3 V.
2
If you use a single power supply, the recommended output current is 500 mA or more.
4.3 DC Characteristics (3.3 V, 25 °C)
Table 11: DC Characteristics (3.3 V, 25 °C)
Symbol Parameter Min Typ Max Unit

CIN Pin capacitance — 2 — pF
1 1
VIH High-level input voltage 0.75 × VDD — VDD + 0.3 V
1
VIL Low-level input voltage –0.3 — 0.25 × VDD V
IIH High-level input current — — 50 nA
IIL Low-level input current — — 50 nA
2 1
VOH High-level output voltage 0.8 × VDD — — V
2 1
VOL Low-level output voltage — — 0.1 × VDD V
1
High-level source current (VDD = 3.3 V,
IOH — 40 — mA
VOH >= 2.64 V, PAD_DRIVER = 3)

Low-level sink current (VDD1= 3.3 V, VOL =

IOL — 28 — mA
0.495 V, PAD_DRIVER = 3)
RP U Pull-up resistor — 45 — kΩ
RP D Pull-down resistor — 45 — kΩ
1 1
VIH_nRST Chip reset release voltage 0.75 × VDD — VDD + 0.3 V
1
VIL_nRST Chip reset voltage –0.3 — 0.25 × VDD V
1
VDD is the I/O voltage for a particular power domain of pins.
2
VOH and VOL are measured using high-impedance load.
4.4 ADC Characteristics
Table 12: ADC Characteristics
Symbol Parameter Min Max Unit

ADC connected to an external
DNL (Differential nonlinearity)1 –1 3 LSB
100 nF capacitor; DC signal input;
ambient temperature at 25 °C;
INL (Integral nonlinearity) –4 8 LSB
Wi-Fi off
Sampling rate — — 100 kSPS 2
1
To get better DNL results, you can sample multiple times and apply a filter, or calculate the average value.
2
kSPS means kilo samples-per-second.
ESP-IDF provides a couple of calibration methods for ADC. Results after calibration using hardware + software
calibration are shown in Table 13. For higher accuracy, users may apply other calibration methods provided in
ESP-IDF, or implement their own.
Table 13: ADC Calibration Results
Parameter Description Min Max Unit

ATTEN0, effective measurement range of 0 ~ 950 -5 5 mV
Total error
ATTEN3, effective measurement range of 0 ~ 2800 -10 10 mV

4.5 Current Consumption

4.5.1 RF Current Consumption in Active Mode
The current consumption measurements are taken with a 3.3 V supply at 25 °C ambient temperature.
TX current consumption is rated at a 100% duty cycle.
RX current consumption is rated when the peripherals are disabled and the CPU idle.
Table 14: Current Consumption for WiFi (2.4 GHz) in Active Mode
Work Mode RF Condition Description Peak (mA)

802.11b, 1 Mbps, @22 dBm 370
TX 802.11g, 54 Mbps, @20 dBm 320
Active (RF working)
802.11n, HT20, MCS7, @19 dBm 300
RX 802.11b/g/n, HT20 65
Table 15: Current Consumption for Bluetooth LE in Active Mode
Work Mode RF Condition Description Peak (mA)

Bluetooth LE @ 20.0 dBm 320
TX Bluetooth LE @ 9.0 dBm 190
Active (RF working) Bluetooth LE @ 0 dBm 150
Bluetooth LE @ –15.0 dBm 90
RX Bluetooth LE 62
4.5.2 Current Consumption in Other Modes
Table 16: Current Consumption in LowPower Modes
Work mode Description Typ Unit

Light-sleep — 140 µA
Deep-sleep Only RTC timer is powered on 5 µA
Power off CHIP_EN is set to low level, and the chip is powered off 1 µA
Table 17: Current Consumption in Modemsleep Mode
Frequency Typ1 Typ2

Work mode (MHz) Description (mA) (mA)
WFI (Wait-for-Interrupt) 9.4 10.3
80
CPU run at full speed 12.1 13.0
Modem-sleep3
WFI (Wait-for-Interrupt) 10.7 11.5
120
CPU run at full speed 14.7 15.6
1
Current consumption when all peripheral clocks are disabled.
2
Current consumption when all peripheral clocks are enabled. In practice, the current consumption might be
different depending on which peripherals are enabled.
3
In Modem-sleep mode, Wi-Fi is clock gated, and the current consumption might be higher when accessing
flash. For a flash rated at 80 Mbit/s, in SPI 2-line mode the consumption is 10 mA.
4.6 Reliability
Table 18: Reliability Qualifications
Test Item Test Conditions Test Standard

HTOL (High Temperature
125 °C, 1000 hours JESD22-A108
Operating Life)
ESD (Electro-Static HBM (Human Body Mode)1± 2000 V JS-001
2
Discharge Sensitivity) CDM (Charge Device Mode) ± 1000 V JS-002
Current trigger ± 200 mA
Latch up JESD78
Voltage trigger 1.5 × VDDmax
Bake 24 hours @125 °C
J-STD-020, JESD47,
Preconditioning Moisture soak (level 3: 192 hours @30 °C, 60% RH)
JESD22-A113
IR reflow solder: 260 + 0 °C, 20 seconds, three times
TCT (Temperature Cycling
–65 °C / 150 °C, 500 cycles JESD22-A104
Test)
uHAST (Highly
Accelerated Stress Test, 130 °C, 85% RH, 96 hours JESD22-A118
unbiased)
HTSL (High Temperature
150 °C, 1000 hours JESD22-A103
Storage Life)
LTSL (Low Temperature
–40 °C, 1000 hours JESD22-A119
Storage Life)
1
JEDEC document JEP155 states that 500 V HBM allows safe manufacturing with a standard ESD control process.
2
JEDEC document JEP157 states that 250 V CDM allows safe manufacturing with a standard ESD control process.
4.7 WiFi Radio
Table 19: WiFi Frequency
Min Typ Max

Parameter
(MHz) (MHz) (MHz)
Center frequency of operating channel 2412 — 2484
4.7.1 WiFi RF Transmitter (TX) Specifications
Table 20: TX Power with Spectral Mask and EVM Meeting 802.11 Standards
Min Typ Max

Rate
(dBm) (dBm) (dBm)
802.11b, 1 Mbps — 21.5 —
802.11b, 11 Mbps — 21.5 —
802.11g, 6 Mbps — 21.5 —
802.11g, 54 Mbps — 19.5 —
Cont’d on next page

Table 20 – cont’d from previous page

Min Typ Max
Rate
(dBm) (dBm) (dBm)
802.11n, HT20, MCS0 — 21.0 —
802.11n, HT20, MCS7 — 19.0 —
Table 21: TX EVM Test
Min Typ SL1

Rate
(dB) (dB) (dB)
802.11b, 1 Mbps, @21.5 dBm — –25.2 –10
802.11b, 11 Mbps, @21.5 dBm — –25.2 –10
802.11g, 6 Mbps, @21.5 dBm — –20.4 –5
802.11g, 54 Mbps, @19.5 dBm — –26.8 –25
802.11n, HT20, MCS0, @21 dBm — –21.0 –5
802.11n, HT20, MCS7, @19 dBm — –29.0 –27
1
SL stands for standard limit value.
4.7.2 WiFi RF Receiver (RX) Specifications
Table 22: RX Sensitivity
Min Typ Max

Rate
(dBm) (dBm) (dBm)
802.11b, 1 Mbps — –99.0 —
802.11b, 2 Mbps — –96.5 —
802.11b, 5.5 Mbps — –94.0 —
802.11b, 11 Mbps — –90.0 —
802.11g, 6 Mbps — –94.0 —
802.11g, 9 Mbps — –92.0 —
802.11g, 12 Mbps — –91.0 —
802.11g, 18 Mbps — –89.0 —
802.11g, 24 Mbps — –86.0 —
802.11g, 36 Mbps — –83.0 —
802.11g, 48 Mbps — –78.5 —
802.11g, 54 Mbps — –77.0 —
802.11n, HT20, MCS0 — –92.5 —
802.11n, HT20, MCS1 — –90.5 —
802.11n, HT20, MCS2 — –87.5 —
802.11n, HT20, MCS3 — –84.5 —
802.11n, HT20, MCS4 — –81.5 —
802.11n, HT20, MCS5 — –77.5 —
802.11n, HT20, MCS6 — –75.5 —
802.11n, HT20, MCS7 — –74.0 —

Table 23: Maximum RX Level
Min Typ Max

Rate
(dBm) (dBm) (dBm)
802.11b, 1 Mbps — 5 —
802.11b, 11 Mbps — 5 —
802.11g, 6 Mbps — 5 —
802.11g, 54 Mbps — 0 —
802.11n, HT20, MCS0 — 5 —
802.11n, HT20, MCS7 — -1 —
Table 24: RX Adjacent Channel Rejection
Min Typ Max

Rate
(dB) (dB) (dB)
802.11b, 1 Mbps — 35 —
802.11b, 11 Mbps — 35 —
802.11g, 6 Mbps — 31 —
802.11g, 54 Mbps — 20 —
802.11n, HT20, MCS0 — 31 —
802.11n, HT20, MCS7 — 16 —
4.8 Bluetooth LE Radio
Table 25: Bluetooth LE Frequency
Min Typ Max

Parameter
(MHz) (MHz) (MHz)
Center frequency of operating channel 2402 — 2480
4.8.1 Bluetooth LE RF Transmitter (TX) Specifications
Table 26: Transmitter General Characteristics
Parameter Description Min Typ Max Unit

1
RF transmit power RF power control range –24.0 — 20.0 dBm
1
Target center frequency range and transmit power are configurable by software. See ESP RF Test Tool and
Test Guide for more details.
Table 27: Transmitter Characteristics Bluetooth LE 1 Mbps

Max |fn |n=0, 1, 2, ..k — 1.0 — kHz
Max |f0 − fn | — 2.3 — kHz
Carrier frequency offset and drift


Max |fn − fn−5 | — 1.4 — kHz
|f1 − f0 | — 1.5 — kHz
∆ f 1avg — 250.2 — kHz
Min ∆ f 2max (for at least
Modulation characteristics — 234.4 — kHz
99.9% of all ∆ f 2max )
∆ f 2avg /∆ f 1avg — 1.0 — —
± 2 MHz offset — –32 — dBm
In-band spurious emissions ± 3 MHz offset — –38 — dBm
> ± 3 MHz offset — –41 — dBm
Table 28: Transmitter Characteristics Bluetooth LE 2 Mbps

Max |fn |n=0, 1, 2, ..k — 3.7 — kHz
Max |f0 − fn | — 1.8 — kHz
Max |fn − fn−5 | — 1.5 — kHz
|f1 − f0 | — 1.1 — kHz
∆ f 1avg — 500.0 — kHz
Min ∆ f 2max (for at least
Modulation characteristics — 460.7 — kHz
99.9% of all ∆ f 2max )
∆ f 2avg /∆ f 1avg — 1.0 — —
Table 29: Transmitter Characteristics Bluetooth LE 125 Kbps

Max |fn |n=0, 1, 2, ..k — 0.6 — kHz
Max |f0 − fn | — 0.7 — kHz
|fn − fn−3 | — 0.4 — kHz
|f0 − f3 | — 0.7 — kHz
∆ f 1avg — 250.0 — kHz
Modulation characteristics Min ∆ f 1max (for at least
— 241.0 — kHz
99.9% of all∆ f 2max )

Table 30: Transmitter Characteristics Bluetooth LE 500 Kbps

Max |fn |n=0, 1, 2, ..k — 0.5 — kHz
Max |f0 − fn | — 0.6 — kHz
|fn − fn−3 | — 0.2 — kHz
|f0 − f3 | — 0.8 — kHz
∆ f 2avg — 251.3 — kHz
Modulation characteristics Min ∆ f 2max (for at least
— 234.5 — kHz
99.9% of all ∆ f 2max )
4.8.2 Bluetooth LE RF Receiver (RX) Specifications
Table 31: Receiver Characteristics Bluetooth LE 1 Mbps

Sensitivity @30.8% PER — — –98.0 — dBm
Maximum received signal @30.8% PER — — 8 — dBm
Co-channel C/I F = F0 MHz — 8 — dB
F = F0 + 1 MHz — -1 — dB
F = F0 – 1 MHz — -3 — dB
F = F0 + 2 MHz — –26 — dB
F = F0 – 2 MHz — –28 — dB
Adjacent channel selectivity C/I
F = F0 + 3 MHz — –34 — dB
F = F0 – 3 MHz — –33 — dB
F >= F0 + 4 MHz — –33 — dB
F <= F0 – 4 MHz — –31 — dB
Image frequency — — –33 — dB
F = Fimage + 1 MHz — –32 — dB
Adjacent channel to image frequency
F = Fimage – 1 MHz — –34 — dB
30 MHz ~ 2000 MHz — –23 — dBm
2003 MHz ~ 2399 MHz — –30 — dBm
Out-of-band blocking performance
2484 MHz ~ 2997 MHz — –10 — dBm
3000 MHz ~ 12.75 GHz — –17 — dBm
Intermodulation — — –31 — dBm
Table 32: Receiver Characteristics Bluetooth LE 2 Mbps



F = F0 + 2 MHz — –11 — dB
F = F0 – 2 MHz — –7 — dB
F = F0 + 4 MHz — –35 — dB
F = F0 – 4 MHz — –30 — dB
F = F0 + 6 MHz — –35 — dB
F = F0 – 6 MHz — –29 — dB
F >= F0 + 8 MHz — –39 — dB
F <= F0 – 8 MHz — –33 — dB
30 MHz ~ 2000 MHz — –30 — dBm
2003 MHz ~ 2399 MHz — –34 — dBm
Out-of-band blocking performance
2484 MHz ~ 2997 MHz — –19 — dBm
3000 MHz ~ 12.75 GHz — –28 — dBm
Intermodulation — — –33 — dBm
Table 33: Receiver Characteristics Bluetooth LE 125 Kbps

F = F0 + 1 MHz — -7 — dB
F = F0 – 1 MHz — -5 — dB
F = F0 + 2 MHz — –35 — dB
F = F0 – 2 MHz — –34 — dB
F = F0 + 3 MHz — –38 — dB
F = F0 – 3 MHz — –37 — dB
F >= F0 + 4 MHz — –41 — dB
F <= F0 – 4 MHz — –45 — dB
Table 34: Receiver Characteristics Bluetooth LE 500 Kbps

F = F0 + 1 MHz — -6 — dB
Espressif
AdjacentSystems
channel selectivity C/I 33 ESP8684 Datasheet (Version v1.4)

F = F0 – 1 MHz — -5 — dB
F = F0 + 2 MHz — –29 — dB
F = F0 – 2 MHz — –32 — dB
F = F0 + 3 MHz — –31 — dB
F = F0 – 3 MHz — –36 — dB
F >= F0 + 4 MHz — –34 — dB
F <= F0 – 4 MHz — –33 — dB

5 Package Information
5 Package Information
Figure 8: QFN24 (4×4 mm) Package
Note:
• All dimensions are in millimeters (mm).
• The pins of the chip are numbered in a clockwise direction from Pin 1 in the top view;
• Please go to Chipsets to view the recommended PCB package source file (asc). The source file can be imported
using software such as PADS or AD (Altium Designer);
• For information about tape, reel, and product marking, please refer to Espressif Chip-Packing Information.

6 Related Documentation and Resources
6 Related Documentation and Resources

Related Documentation
• ESP8684 Technical Reference Manual – Detailed information on how to use the ESP8684 memory and peripherals.
• ESP8684 Hardware Design Guidelines – Guidelines on how to integrate the ESP8684 into your hardware product.
• ESP8684 Series SoC Errata – Descriptions of errors in ESP8684 series of SoCs from chip revision 0 forward.
• Certificates
https://espressif.com/en/support/documents/certificates
• ESP8684 Product/Process Change Notifications (PCN)
https://espressif.com/en/support/documents/pcns?keys=ESP8684
• Documentation Updates and Update Notification Subscription
https://espressif.com/en/support/download/documents
Developer Zone
• ESP-IDF Programming Guide for ESP8684 – Extensive documentation for the ESP-IDF development framework.
• ESP-IDF and other development frameworks on GitHub.
https://github.com/espressif
• ESP32 BBS Forum – Engineer-to-Engineer (E2E) Community for Espressif products where you can post questions,
share knowledge, explore ideas, and help solve problems with fellow engineers.
https://esp32.com/
• The ESP Journal – Best Practices, Articles, and Notes from Espressif folks.
https://blog.espressif.com/
• See the tabs SDKs and Demos, Apps, Tools, AT Firmware.
https://espressif.com/en/support/download/sdks-demos
Products
• ESP8684 Series SoCs – Browse through all ESP8684 SoCs.
https://espressif.com/en/products/socs?id=ESP8684
• ESP8684 Series Modules – Browse through all ESP8684-based modules.
https://espressif.com/en/products/modules?id=ESP8684
• ESP8684 Series DevKits – Browse through all ESP8684-based devkits.
https://espressif.com/en/products/devkits?id=ESP8684
• ESP Product Selector – Find an Espressif hardware product suitable for your needs by comparing or applying filters.
https://products.espressif.com/#/product-selector?language=en
Contact Us
• See the tabs Sales Questions, Technical Enquiries, Circuit Schematic & PCB Design Review, Get Samples
(Online stores), Become Our Supplier, Comments & Suggestions.
https://espressif.com/en/contact-us/sales-questions

Revision History
Revision History
Date Version Release notes

2023-10-31 v1.4 Added current consumption for Bluetooth LE in Active mode in Table 15
• Updated table 1
• Renamed ”SiP Flash” to ”In-package Flash” to keep term consistency
2023-07-25 v1.3 • Added information about clock glitch filter in Section Physical Security Fea-
tures
• Added SRAM clock frequency in Section Internal Memory.
2022-12-13 v1.2 Updated table 24

2022-12-08 v1.1 Delete feature ”Supports external power amplifier”
• Updated section ADC Characteristics.

• Added section Reliability.
2022-10-24 v1.0
• Updated section Bluetooth LE Radio
• Added link to the recommended PCB package source file.
Added table ”power-up glitches on pins” for General Purpose Input / Output Inter-
2022-07-12 v0.7
face (GPIO)
2022-06-30 v0.6 Updated Current Consumption in Other Modes
2022-05-05 v0.5 Updated Wi-Fi Radio and Bluetooth LE Radio
2022-01-28 v0.4 Updated Electrical Characteristics and Package Information
2021-12-22 v0.2 Updated section Applications
2021-11-30 v0.1 Preliminary release

Disclaimer and Copyright Notice
Information in this document, including URL references, is subject to change without notice.
ALL THIRD PARTY’S INFORMATION IN THIS DOCUMENT IS PROVIDED AS IS WITH NO
WARRANTIES TO ITS AUTHENTICITY AND ACCURACY.
NO WARRANTY IS PROVIDED TO THIS DOCUMENT FOR ITS MERCHANTABILITY, NON-
INFRINGEMENT, FITNESS FOR ANY PARTICULAR PURPOSE, NOR DOES ANY WARRANTY
OTHERWISE ARISING OUT OF ANY PROPOSAL, SPECIFICATION OR SAMPLE.
All liability, including liability for infringement of any proprietary rights, relating to use of information
in this document is disclaimed. No licenses express or implied, by estoppel or otherwise, to any
intellectual property rights are granted herein.
The Wi-Fi Alliance Member logo is a trademark of the Wi-Fi Alliance. The Bluetooth logo is a
registered trademark of Bluetooth SIG.
All trade names, trademarks and registered trademarks mentioned in this document are property
www.espressif.com of their respective owners, and are hereby acknowledged.
Copyright © 2023 Espressif Systems (Shanghai) Co., Ltd. All rights reserved.

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ESP8684 Series

Ultra­Low­Power SoC with RISC­V Single­Core CPU

Espressif’s ESP8684 Wi-Fi + Bluetooth® Low Energy SoC

Core System Wireless MAC and RF

2.4 GHz Receiver

SPI0/1 I2C Master GPIO RTC GPIO PMU

SPI2 GDMA UART

Temperature Sensor RTC Super Watchdog Timer

General-purpose Timer System Timer LED PWM

Modules having power in specific power modes:

Figure 1: Functional block diagram of ESP8684

Espressif Systems 1 ESP8684 Datasheet (Version v1.4)

Wi­Fi – 1 core at 120 MHz: 305.42 CoreMark; 2.55

• TX/RX A-MPDU, TX/RX A-MSDU • Access to flash accelerated by cache

• Immediate Block ACK • Supports flash in-Circuit Programming (ICP)

• Fragmentation and defragmentation

• Bluetooth LE: Bluetooth 5 – 1 × temperature sensor

• High power mode�20 dBm� • Timers:

• Advertising extensions – 2 × watchdog timers

• Multiple advertisement sets – 1 × 52-bit system timer

• Channel selection algorithm #2

• CoreMark® score: • 1024-bit OTP, up to 256 bits for use

Espressif Systems 2 ESP8684 Datasheet (Version v1.4)

– ECC • Clock glitch filter

– SHA Accelerator (FIPS PUB 180-4)

Applications (A Non­exhaustive List)

• Smart Home • Health Care

– Light control – Health monitor

– Smart button – Baby monitor

– Smart plug • Smart Agriculture

– Indoor positioning – Smart greenhouse

• Industrial Automation – Smart irrigation

– Industrial robot – Agriculture robot

– Industrial field bus • Retail and Catering

• Consumer Electronics – POS machines

– Smart watch and bracelet – Service robot

– Over-the-top (OTT) devices • Generic Low-power IoT Sensor Hubs

Espressif Systems 3 ESP8684 Datasheet (Version v1.4)

1 ESP8684 Series Comparison 8

Espressif Systems 4 ESP8684 Datasheet (Version v1.4)

3.6.2 Temperature Sensor 21

6 Related Documentation and Resources 36

Espressif Systems 5 ESP8684 Datasheet (Version v1.4)

Espressif Systems 6 ESP8684 Datasheet (Version v1.4)

Espressif Systems 7 ESP8684 Datasheet (Version v1.4)

1 ESP8684 Series Comparison

1.1 ESP8684 Series Nomenclature

Figure 2: ESP8684 Series Nomenclature

Table 1: ESP8684 Series Member Comparison

Ordering Code In­Package flash Ambient Temperature (°C) Package (mm)

Espressif Systems 8 ESP8684 Datasheet (Version v1.4)

2.1 Pin Layout

Figure 3: ESP8684 Pin Layout (Top View)

2.2 Pin Description

Table 2: Pin Description

Name No. Type Power Domain Function

Espressif Systems 9 ESP8684 Datasheet (Version v1.4)

Name No. Type Power Domain Function

2.3 Power Scheme

UltraLowPower SoC with RISCV SingleCore CPU

WiFi – 1 core at 120 MHz: 305.42 CoreMark; 2.55

Applications (A Nonexhaustive List)

Ordering Code InPackage flash Ambient Temperature (°C) Package (mm)

Figure 5: ESP8684 Series Powerup and Reset Timing

Table 3: Description of ESP8684 Series Powerup and Reset Timing Parameters

3.1 Radio and WiFi

3.1.4 WiFi Radio and Baseband

3.1.5 WiFi MAC

• Inpackage flash : See details in Chapter 1 ESP8684 Series Comparison.