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Lc550egy SHM1 LG

This document provides specifications for the 55.0" QWUXGA TFT LCD model LC550EGY. Key details include: - The display has a 54.64" diagonal active area with 3840 x 2160 resolution and a pixel pitch of 0.420 x 0.315 mm. - It uses a-Si TFT technology and operates in transmissive mode with a normally black display. - The interface is a 10-bit V by One interface over 8 lanes capable of displaying over 1 billion colors. - Absolute maximum ratings include an operating temperature range of 0-50°C and humidity of 10-90% RH.

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0% found this document useful (0 votes)
90 views40 pages

Lc550egy SHM1 LG

This document provides specifications for the 55.0" QWUXGA TFT LCD model LC550EGY. Key details include: - The display has a 54.64" diagonal active area with 3840 x 2160 resolution and a pixel pitch of 0.420 x 0.315 mm. - It uses a-Si TFT technology and operates in transmissive mode with a normally black display. - The interface is a 10-bit V by One interface over 8 lanes capable of displaying over 1 billion colors. - Absolute maximum ratings include an operating temperature range of 0-50°C and humidity of 10-90% RH.

Uploaded by

zoki
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 40

LC550EGY

Product Specification

SPECIFICATION
FOR
APPROVAL

( ) Preliminary Specification
( ● ) Final Specification

Title 55.0” QWUXGA TFT LCD

BUYER HKC SUPPLIER LG Display Co., Ltd.

SET MODEL *MODEL LC550EGY


SUFFIX SHM1 (RoHS Verified)

SIGNATURE SIGNATURE
APPROVED BY APPROVED BY
DATE DATE

/ K.Y. Chong / Team Leader

REVIEWED BY

/ K.Y. Chong / Project Leader

PREPARED BY
/ H.G. Kang/ Engineer

Please return 1 copy for your confirmation with


TV Product Development Dept.
your signature and comments. LG Display Co., Ltd.

Ver 1.0
LC550EGY

Product Specification

CONTENTS
Number ITEM Page
COVER 0
CONTENTS 1
RECORD OF REVISIONS 2
1 GENERAL DESCRIPTION 3
2 ABSOLUTE MAXIMUM RATINGS 4
3 ELECTRICAL SPECIFICATIONS 5
3-1 ELECTRICAL CHARACTERISTICS 5
3-2 INTERFACE CONNECTIONS 6
3-3 SIGNAL TIMING SPECIFICATIONS 7
3-4 V by One Input Characteristics 8
3-5 INTARA INTERFACE SIGNAL SPECIFICATION 10
3-6 COLOR DATA REFERENCE 11
3-7 POWER SEQUENCE 12
4 OPTICAL SPECIFICATIONS 13
5 MECHANICAL CHARACTERISTICS 17
6 MECHANICAL DIMENSION 18
6-1 BOARD ASSEMBLY DIMENSION 18
6-2 CONTROL BOARD ASSEMBLY DIMMENSION 19
7 RELIABILITY 20
8 INTERNATIONAL STANDARDS 21
8-1 SAFETY 21
8-2 ENVIRONMENT 21
9 PACKING 22
9-1 PACKING FORM 22
10 PRECAUTIONS 23
10-1 HANDLING PRECAUTIONS 23
10-2 OPERATING PRECAUTIONS 23
10-3 PROTECTION FILM 24
10-4 STORAGE PRECAUTIONS 24
10-5 PACKING PRECAUTIONS 24

Ver 1.0 1 /39


LC550EGY

Product Specification

RECORD OF REVISIONS

Revision No. Revision Date Page Description


0.1 May 1, 2014 - Preliminary Specification (First Draft)
0.2 Jun. 9, 2014 19 Updated the drawing of control board assembly
1.0 Jun. 27, 2014 - Final CAS release

Ver 1.0 2 /39


LC550EGY

Product Specification

1. General Description
The LC550EGY is a Color Active Matrix Liquid Crystal Display with an integral the Source PCB and Gate
implanted on Panel (GIP). The matrix employs a-Si Thin Film Transistor as the active element.
It is a transmissive type display operating in the normally black mode. It has a 54.64 inch diagonally measured
active display area with QWUXGA resolution (2160 vertical by 3840 horizontal).
Each pixel is divided into Red, Green, Blue and White sub-pixels or dots which are arranged in vertical stripes.
Gray scale or the luminance of the sub-pixel color is determined with a 10-bit gray scale signal for each dot.
Therefore, it can present a palette of more than 1.07Bilion colors.
It has been designed to apply the 10-bit 8 Lane V by One interface.
It is intended to support LCD TV, PCTV where high brightness, super wide viewing angle, high color gamut,
high color depth and fast response time are important.

EPI(RGBW)
EEPROM
Source Driver Circuit
Data
Vby1 SCL SDA S1 S11520
format
1~8lane
G1
Bit
select CN1
(51pin) Option
signal Timing Controller
HTPDN
LOCKN
Vby1 Rx + G+
Control TFT - LCD Panel
Vby1 I2C Signal (3840 × 2160 pixels)
8lane s [Gate In Panel]
+12V
Power Circuit
Power Signals G2160
Block

General Features
Active Screen Size 54.64 inches(1387.8mm) diagonal
Outline Dimension 1225.2 (H) x 696.7 (V) x 1.4 (D) mm(Typ.)
Pixel Pitch 0.420 mm x 0.315 mm
Resolution 3840 horiz. by 2160 vert.
Color Depth 10bit(D), 1.07Billon colors
Source D-IC : 8-bit EPI, gamma reference voltage, and control signals
Drive IC Data Interface
Gate D-IC : Gate In Panel
Viewing Angle (CR>10) Viewing angle free ( R/L 178 (Min.), U/D 178 (Min.))
Weight 2.6 Kg (Typ.)
Display Mode Transmissive mode, Normally black
Surface Treatment (Top) Hard coating(3H), Anti-glare treatment of the front polarizer (Haze 1%(Typ.) )

Ver 1.0 3 /39


LC550EGY

Product Specification

2. Absolute Maximum Ratings


The following items are maximum values which, if exceeded, may cause faulty operation or permanent damage
to the LCD module.

Table 1. ABSOLUTE MAXIMUM RATINGS

Value
Parameter Symbol Unit Note
Min Max

Power Input Voltage LCD Circuit VLCD -0.3 +14.0 VDC


1
T-Con Option Selection Voltage VLOGIC -0.3 +4.0 VDC

Operating Temperature TOP 0 +50 °C


2,3
Storage Temperature (without packing) TST -20 +60 °C

Panel Front Temperature TSUR - +68 °C 4

Operating Ambient Humidity HOP 10 90 %RH


2,3
Storage Humidity HST 5 90 %RH

Note1. Ambient temperature condition (Ta = 25  2 °C )


2. Temperature and relative humidity range are shown in the figure below.
Wet bulb temperature should be Max 39°C, and no condensation of water.
3. Gravity mura can be guaranteed below 40°C condition.
4. The maximum operating temperatures is based on the test condition that the surface temperature
of display area is less than or equal to 68°C with LCD module alone in a temperature controlled chamber.
Thermal management should be considered in final product design to prevent the surface temperature of
display area from being over 68℃. The range of operating temperature may be degraded in case of
improper thermal management in final product design.
90%

60
60%

50 Storage
Humidity [(%)RH]

Wet Bulb
Temperature [°C]
40
40%
Operation
30
20
10
0
10%
5%

-20 0 10 20 30 40 50 60 70 80

Dry Bulb Temperature [°C]

Ver 1.0 4 /39


LC550EGY

Product Specification

3. Electrical Specifications
3-1. Electrical Characteristics

Table 2. ELECTRICAL CHARACTERISTICS


Value
Parameter Symbol Unit Note
Min Typ Max
Circuit :
Power Input Voltage VLCD 10.8 12.0 13.2 VDC
- 1185 1541 mA 1
Power Input Current ILCD
- 1781 2315 mA 2
T-CON Option Input High Voltage VIH 2.7 - 3.6 VDC
Selection Voltage Input Low Voltage VIL 0 - 0.7 VDC
Power Consumption PLCD - 14.22 18.50 Watt 1
Rush current IRUSH - - 10 A 3

Note 1. The specified current and power consumption are under the VLCD=12.0V, Ta=25  2°C, fV=60Hz
condition, and mosaic pattern(8 x 6) is displayed and f V is the frame frequency.
2. The current is specified at the maximum current pattern.
3. The duration of rush current is about 2ms and rising time of power input is 0.5ms (min.).
4. Ripple voltage level is recommended under ± 5% of typical voltage

White : 1023 Gray


Black : 0 Gray

Mosaic Pattern(8 x 6)

Ver 1.0 5 /39


LC550EGY

Product Specification
3-2. Interface Connections
This LCD module employs one kind of interface connection, 51-pin connector is used for the module
electronics.
3-2-1. LCD Module
- LCD Connector(CN1): FI-RXE51S-HF(manufactured by JAE) or GT05S-51S-H38(manufactured by LSM)
or IS050-C51B-C39-C (manufactured by UJU)
- Mating Connector : FI-R51HL(manufactured by JAE) or compatible

Table 3. MODULE CONNECTOR(CN1) PIN CONFIGURATION


No Symbol Description No Symbol Description
1 VLCD Power Supply +12.0V 27 GND Ground
2 VLCD Power Supply +12.0V 28 Rx0n V-by-One HS Data Lane 0
3 VLCD Power Supply +12.0V 29 Rx0p V-by-One HS Data Lane 0
4 VLCD Power Supply +12.0V 30 GND Ground
5 VLCD Power Supply +12.0V 31 Rx1n V-by-One HS Data Lane 1
6 VLCD Power Supply +12.0V 32 Rx1p V-by-One HS Data Lane 1
7 VLCD Power Supply +12.0V 33 GND Ground
8 VLCD Power Supply +12.0V 34 Rx2n V-by-One HS Data Lane 2
9 NC NO CONNECTION 35 Rx2p V-by-One HS Data Lane 2
10 GND Ground 36 GND Ground
11 GND Ground 37 Rx3n V-by-One HS Data Lane 3
12 GND Ground 38 Rx3p V-by-One HS Data Lane 3
13 GND Ground 39 GND Ground
14 PWM TIN External VBR (From System) 40 Rx4n V-by-One HS Data Lane 4
15 PWM TOUT External VBR (For System) 41 Rx4p V-by-One HS Data Lane 4
„L‟ or „NC‟ :Low Power,
16 Gplus Mode 42 GND Ground
„H‟ : High Luminance
17 Gplus EN „L‟: RGB Mode, „H‟ or NC : Gplus Mode 43 Rx5n V-by-One HS Data Lane 5
18 SDA SDA (For I2C) 44 Rx5p V-by-One HS Data Lane 5
19 SCL SCL (For I2C) 45 GND Ground
20 NC NO CONNECTION (Note 3) 46 Rx6n V-by-One HS Data Lane 6
21 Bit SEL ‘H’ or NC= 10bit(D) , ‘L’ = 8bit 47 Rx6p V-by-One HS Data Lane 6
22 Data format „L‟ : Non division, „H‟ 2 division 48 GND Ground
‘H‟ or NC : AGP
23 AGP or NSB 49 Rx7n V-by-One HS Data Lane 7
‘L‟ : NSB (No signal Black)
24 GND Ground 50 Rx7p V-by-One HS Data Lane 7
25 HTPDN Hot plug detect 51 GND Ground
26 LOCKN Lock detect - - -

Note 1. All GND (ground) pins should be connected together to the LCD module‟s metal frame.
2. All Input levels of V-by-One signals are based on the V-by-One-HS Standard Version 1.4
3. #20 NC(No Connection) : These pins are used only for LGD (Do not connect)
4. About specific pin(#22), Please see the Appendix Ⅷ.
5. Specific pin No. #23 is used for “No signal detection” of system signal interface.
It should be GND for NSB (No Signal Black) while the system interface signal is not.
If this pin is “H”, LCD Module displays AGP (Auto Generation Pattern).

Ver 1.0 6 /39


LC550EGY

Product Specification

3-3. Signal Timing Specifications


Table 4 shows the signal timing required at the input of the Vx1 transmitter. All of the interface signal timings
should be satisfied with the following specification for normal operation.

Table 4. TIMING TABLE (DE Only Mode)

ITEM Symbol Min Typ Max Unit Note


Display
Period tHV 480 480 480 tCLK 3840/8

Horizontal Blank tHB 50 70 120 tCLK 1

Total tHP 530 550 600 tCLK


Display
Period tVV 2160 2160 2160 Lines

Vertical Blank tVB 40 90 600 Lines 1

Total tVP 2200 2250 2760 Lines

ITEM Symbol Min Typ Max Unit Note

DCLK fCLK 60 74.25 78.00 MHz 594/8

Frequency Horizontal fH 121.8 135 140 KHz 2

Vertical fV 47 60 63 Hz 2

notes: 1. The input of HSYNC & VSYNC signal does not have an effect on normal operation (DE Only Mode).
If you use spread spectrum of EMI, add some additional clock to minimum value for clock margin.

2. The performance of the electro-optical characteristics may be influenced by variance of the vertical
refresh rate and the horizontal frequency

※ Timing should be set based on clock frequency.

Ver 1.0 7 /39


LC550EGY

Product Specification

3-4. V by One input signal Characteristics

3-4-1. V by One Input Signal Timing Diagram

1UI = 1/(Serial data rate)

ㆍ ㆍ B C

Y

A
ㆍ D Y=0mV

ㆍ ㆍ F E
X

X=0 UI X=1 UI

Table5. Eye Mask Specification

X[UI] Note Y[mV] Note

A 0.25 (max) 2 0 -

B 0.3 (max) 2 50 3

C 0.7(min) 3 50 3

D 0.75(min) 3 0 -

E 0.7(min) 3 l -50 l 3

F 0.3(max) 2 l -50 l 3

notes 1. All Input levels of V by One signals are based on the V by One HS Standard Ver. 1.4
2. This is allowable maximum value.
3. This is allowable minimum value.
4. The eye diagram is measured by the oscilloscope and receiver CDR characteristic must be
emulated.
- PLL bandwidth : 20 Mhz
- Damping Factor : 1.5

Ver 1.0 8 /39


LC550EGY

Product Specification

3-4-2. V by One Input Signal Characteristics


1) DC Specification

VRTH
VRCT
VRTL

Description Symbol Min Max Unit


CML Differential input High threshold VRTH - 50 mV
CML Differential input Low threshold VRTL -50 - mV
CML common mode Bias Voltage VRCT 0.6 0.8 V
2) AC Specification

Vdiff =0
Lane0

tRISK_INTER
Lane1 Vdiff =0

<Inter-pair Skew between two Lanes>

1H
T-CON
Max 1 DE
V By One Rx IP
Hblank
Vblank Rx1 Rx2
Rx1 (Sub Block) (Sub Block)
DE

Vblank
Rx2 4 Lane 4 Lane
DE

<Inter-pair Skew between two sub Blocks> <TCON – VbyOne Brief Diagram >

Description Symbol Min Max Unit notes


Allowable inter-pair skew between lanes tRISK_INTER - 5 UI 1,3
Allowable iner-pair skew between sub-blocks tRISK_BLOCK - 1 DE 1,4

Notes 1.1UI = 1/serial data rate


2. it is the time difference between the true and complementary single-ended signals.
3. it is the time difference of the differential voltage between any two lanes in one sub block.
4. it is the time difference of the differential voltage between any two blocks in one IP.

Ver 1.0 9 /39


LC550EGY

Product Specification

3-5. Intra interface Signal Specification


3-5-1. EPI Signal Specification
Table 6. ELECTRICAL CHARACTERISTICS

Parameter Symbol Condition MIN TYP MAX Unit notes

Logic & EPI Power Voltage VCC - 1.62 1.8 1.98 VDC
EPI input common voltage VCM LVDS Type 0.8 VCC/2 1.3 V
EPI input differential voltage Vdiff - 150 - 500 mV
EPI Input eye diagram Veye - 90 - - mV
Effective Veye width time B1&B2 0.25 - - UI

EPI +

Vdiff Vdiff

0V

EPI -
Vdiff
Vcm
0V
(Differential Probe) (Active Probe)

EPI Differential signal characteristics


1 UI

0.5 UI

Veye
0V
Veye

(Differential Probe)
B1 B2

Eye Pattern of EPI Input


*Source PCB

FIG. 3 Measure point

Ver 1.0 10 /39


LC550EGY

Product Specification

3-6. Color Data Reference

The brightness of each primary color (red, green, blue) is based on the 10bit or 8bit gray scale data input for the color.
The higher binary input, the brighter the color. Table 7 provides a reference for color versus data input.

Table 7. COLOR DATA REFERENCE


Packer input &
30bpp RGB (10bit) 24bpp RGB (8bit)
Unpacker output
D[0] R[2] R[0]

D[1] R[3] R[1]

D[2] R[4] R[2]

D[3] R[5] R[3]


Byte0
D[4] R[6] R[4]

D[5] R[7] R[5]

D[6] R[8] R[6]

D[7] R[9] R[7]

D[8] G[2] G[0]

D[9] G[3] G[1]

D[10] G[4] G[2]

D[11] G[5] G[3]


Byte1
D[12] G[6] G[4]

D[13] G[7] G[5]

D[14] G[8] G[6]

D[15] G[9] G[7]

D[16] B[2] B[0]

D[17] B[3] B[1]

D[18] B[4] B[2]

D[19] B[5] B[3]


Byte2
D[20] B[6] B[4]

D[21] B[7] B[5]

D[22] B[8] B[6]

D[23] B[9] B[7]

D[24] Don‟t care

D[25] Don‟t care

D[26] B[0]

D[27] B[1]
Byte3
D[28] G[0]

D[29] G[1]

D[30] R[0]

D[31] R[1]

Ver 1.0 11 /39


LC550EGY

Product Specification

3-7. Power Sequence


3-7-1. LCD Driving circuit

90% 90%
Power Supply For LCD
VLCD 10% 10% 10%
0V
T7
T1
T2 T5

0V Vx1 Data
Interface Signal (Tx_data)

100% T3 T4
T6
User Control Signal
(DATA FORMAT,BIT_SEL)

Power for LED LED ON

Table 8. POWER SEQUENCE

Value
Parameter Unit Notes
Min Typ Max
T1 0.5 - 20 ms 1
T2 0 - - ms 2
T3 400 - - ms 3
T4 100 - - ms 3
T5 1.0 - - s 4
T6 0 - T2 ms 5
T7 0 - - ms 6

Note : 1. Even though T1 is over the specified value, there is no problem if I2T spec of fuse is satisfied.
2. If T2 is satisfied with specification after removing V by One Cable, there is no problem.
3. The T3 / T4 is recommended value, the case when failed to meet a minimum specification,
abnormal display would be shown. There is no reliability problem.
4. T5 should be measured after the Module has been fully discharged between power off and on period.
5. If the on time of signals (Interface signal and user control signals) precedes the on time of Power (VLCD),
it will be happened abnormal display. When T6 is NC status, T6 doesn‟t need to be measured.
6. It is recommendation specification that T7 has to be 0ms as a minimum value.
※ Please avoid floating state of interface signal at invalid period.
※ When the power supply for LCD (VLCD) is off, be sure to pull down the valid and invalid data to 0V.

Ver 1.0 12 /39


LC550EGY

Product Specification
4. Optical Specification
Optical characteristics are determined after the unit has been „ON‟ and stable in a dark environment at 25± 2°C.
The values are specified at distance 50cm from the LCD surface at a viewing angle of  and  equal to 0 °.
FIG. 1 shows additional information concerning the measurement equipment and method.
LCD Module Pritchard 880 or
Optical Stage(x,y)
equivalent

50cm
FIG. 1 Optical Characteristic Measurement Equipment and Method

Ta= 25± 2°C, VLCD=12.0V, fV=60Hz, Dclk=74.25MHz,


Light source : D65 standard
Table 9. OPTICAL CHARACTERISTICS User Option : #16pin “L”(Low Power Mode)

Value
Parameter Symbol Unit Note
Min Typ Max
Contrast Ratio CR 800 1200 - 1

Variation G to G σ 6 9 3
Response Time ms
Gray to Gray (BW) G to G BW 8 12 2

Transmittance T 7.21 8.01 % 4

Rx 0.651
RED
Ry 0.331
Color Coordinates Gx Typ 0.317 Typ
GREEN
[CIE1931] Gy -0.03 0.600 +0.03

Bx 0.151
BLUE
By 0.063
right(=0°) r (x axis) 89 - -
Viewing left (=180°) l (x axis) 89 - -
2D
Angle degree 6
(CR>10) up (=90°) u (y axis) 89 - -

down (=270°) d (y axis) 89 - -


Gray Scale - - - 7

Ver 1.0 13 /39


LC550EGY

Product Specification

Note : 1. Contrast Ratio(CR) is defined mathematically as :


CR(Contrast Ratio) = Maximum CRn (n=1, 2, 3, 4, 5)
Surface Luminance at position n with all white pixels
CRn =
Surface Luminance at position n with all black pixels
n = the Position number(1, 2, 3, 4, 5). For more information, see FIG 2.
The contrast ratio is valued with operating condition of LGD‟s standard BLU
2. Response time is the time required for the display to transit from any gray to white (Rise Time, Tr)
and from any gray to black (Decay time, Tf). For additional information see the FIG. 3.
※ G to GBW Spec stands for average value of all measured points.
Photo Detector : RD-80S / Field : 2 °
The contrast ratio is valued with operating condition of LGD‟s standard BLU

3. G to G σ is Variation of Gray to Gray response time composing a picture

G to G (σ) = √ Σ(Xi- u)2


N
Xi = Individual Data
u = Data average
N : The number of Data

4. The value of transmittance should be extracted using the standard light source of D65

5. The value of color coordinates should be extracted using the standard light source of D65
6. Viewing angle is the angle at which the contrast ratio is greater than 10. The angles are
determined for the horizontal or x axis and the vertical or y axis with respect to the z axis which
is normal to the LCD module surface. For more information, see the FIG. 4.

7. Gray scale specification


Gamma Value is approximately 2.2. For more information, see the Table 10.
Table 10. GRAY SCALE SPECIFICATION
Gray Level Luminance [%] (Typ)
L0 0.083
L63 0.27
L127 1.04
L191 2.49
L255 4.68
L319 7.66
L383 11.5
L447 16.1
L511 21.6
L575 28.1
L639 35.4
L703 43.7
L767 53.0
L831 63.2
L895 74.5
L959 86.7
L1023 100

Ver 1.0 14 /39


LC550EGY

Product Specification

Measuring point for Contrast Ratio

H
A

② ③


V
B

A : H / 4 mm
④ ⑤ B : V / 4 mm
@ H,V : Active Area

FIG. 2 Points for Contrast Ratio Measure

Response time is defined as the following figure and shall be measured by switching the input signal for
“Gray(N)” and “Black or White”.

Tr Tf
100
90

Optical
Response

10
Gray(N) White Gray(N) Black
0
N = 0(Black)~1023(White)

FIG. 3 Response Time

Ver 1.0 15 /39


LC550EGY

Product Specification

Dimension of viewing angle range

Normal
E Y
 = 90, Up

 = 180, Left

 = 0, Right

 = 270, Down

FIG. 4 Viewing Angle

Ver 1.0 16 /39


LC550EGY

Product Specification

5. Mechanical Characteristics

Table 11 provides general mechanical characteristics.

Table 11. MECHANICAL CHARACTERISTICS


Item Value

Horizontal 1225.2 mm
Outline Dimension
Vertical 696.7 mm
(Only Glass)
Depth 1.4 mm

Horizontal 1209.6 mm
Active Display Area
Vertical 680.4 mm

Weight 2.6Kg (Typ.)

Hard coating(3H),
Surface Treatment
Anti-glare treatment of the front polarizer : Haze 1%(typ.)

Note : Please refer to a mechanic drawing in terms of tolerance at the next page.

Ver 1.0 17 /39


LC550EGY

Product Specification

6. Mechanical Dimension
6-1. Board Assembly Dimension

Ver 1.0 18 /39


LC550EGY

Product Specification

6-2. Control Board Assembly Dimension

Ver 1.0 19 /39


LC550EGY

Product Specification

7. Reliability

Table 12. ENVIRONMENT TEST CONDITION

No. Test Item Condition

1 High temperature storage test Ta= 60°C 90% 240h

2 Low temperature storage test Ta= -20°C 240h

3 High temperature operation test Ta= 50°C 50%RH 500h

4 Low temperature operation test Ta= 0°C 500h

5 Humidity condition Operation Ta= 40 °C ,90%RH

Altitude operating 0 - 16,400 ft


6
storage / shipment 0 - 40,000 ft

Note : Before and after Reliability test, LCM should be operated with normal function.

Ver 1.0 20 /39


LC550EGY

Product Specification

8. International Standards

8-1. Safety
a) UL 60065, Underwriters Laboratories Inc.
Audio, Video and Similar Electronic Apparatus - Safety Requirements.
b) CAN/CSA C22.2 No.60065:03, Canadian Standards Association.
Audio, Video and Similar Electronic Apparatus - Safety Requirements.
c) IEC 60065, The International Electrotechnical Commission (IEC).
Audio, Video and Similar Electronic Apparatus - Safety Requirements.

8-2. Environment
a) RoHS, Directive 2011/65/EU of the European Parliament and of the council of 8 June 2011

Ver 1.0 21 /39


LC550EGY

Product Specification

9. Packing
9-1. Packing Form
a) Package quantity in one Pallet : 120 pcs

b) Pallet Size : 1390 mm(W) X 890 mm(D) X 1090 mm(H)

Ver 1.0 22 /39


LC550EGY

Product Specification

10. Precautions
Please pay attention to the followings when you use this TFT LCD module.

10-1. Handling Precautions


(1) Please attach the surface transparent protective film to the surface in order to protect the polarizer.
Transparent protective plate should have sufficient strength in order to the resist external force.
(2) Acetic acid type and chlorine type materials for the cover case are not desirable because the former
generates corrosive gas of attacking the polarizer at high temperature and the latter causes circuit break
by electro-chemical reaction.
(3) Do not touch, push or rub the exposed polarizers with glass, tweezers or anything harder than HB
pencil lead. And please do not rub with dust clothes with chemical treatment.
Do not touch the surface of polarizer for bare hand or greasy cloth.(Some cosmetics are detrimental
to the polarizer.)
(4) After removing the protective film, when the surface becomes dusty, please wipe gently with absorbent
cotton or other soft materials like chamois soaks with petroleum benzine.
Do not use acetone, toluene and alcohol because they cause chemical damage to the polarizer.
(5) Wipe off saliva or water drops as soon as possible. Their long time contact with polarizer causes
deformations and color fading.
(6) Since a module is composed of electronic circuits, it is not strong to electrostatic discharge.
Make certain that treatment persons are connected to ground through wrist band etc. And don‟t touch
interface pin directly. Panel ground path should be connected to metal ground.
(7) Please make sure to avoid external forces applied to the Source PCB and D-IC during the process of
handling or assembling the TV set. If not, It causes panel damage or malfunction.
(8) Panel and BLU should be protected from the static electricity. If not, it causes IC damage.
(9) Do not pull or fold the source D-IC which connect the source PCB and the panel.
(10) Panel(board ass‟y) should be put on the BLU structure precisely to avoid mechanical impact.
(11) FFC Cable should be connected between System board and Source PCB correctly.
(12) Mechanical structure for backlight system should be designed for sustaining board ass‟y safely.
(13) Surface temperature of the Source D-IC should be controlled under 100℃ with TV Set status.
If not, problems such as IC damage or decrease of lifetime could occur.

10-2. Operating Precautions


(1) Response time depends on the temperature.(In lower temperature, it becomes longer.)
(2) Brightness depends on the temperature. (In lower temperature, it becomes lower.)
And in lower temperature, Stable time(required time that brightness is stable after turned on)
becomes longer
(3) Be careful for condensation at sudden temperature change. Condensation makes damage to polarizer or
electrical contacted parts. And after fading condensation, smear or spot will occur.
(4) When fixed patterns are displayed for a long time, remnant image is likely to occur.
(5) Module has high frequency circuits. Sufficient suppression to the electromagnetic interference shall be
done by system manufacturers. Grounding and shielding methods may be important to minimized the
interference.

Ver 1.0 23 /39


LC550EGY

Product Specification

10-3. Protection Film


(1) Please keep attaching the protection film before assembly.
(2) Please peel off the protection film slowly.
(3) Please peel off the protection film just like shown in the Fig.1
(4) Ionized air should be blown over during the peeling.
(5) Source PCB should be connected to the ground when peel off the protection film.
(6) The protection film should not be contacted to the source D-IC during peeling it off.

< Fig. 1 >


10-4. Storage Precautions
When storing modules as spares for a long time, the following precautions are necessary.

(1) Temperature : 5 ~ 40 ℃
(2) Humidity : 35 ~ 75 %RH
(3) Period : 6 months
(4) Control of ventilation and temperature is necessary.
(5) Please make sure to protect the product from strong light exposure, water or moisture. Be careful for
condensation.
(6) Please keep the modules at a circumstance shown below Fig. 2

No Baking 50℃, 10%, 24hr 50℃, 10%, 48hr

2 month 3 month 6 month

< Fig. 2 >

10-5. Packing Precautions


Product assembled into module should be stored in the Al-bag(cover case).

Ver 1.0 24 /39


LC550EGY

Product Specification

# APPENDIX-Ⅰ-1
■ Pallet Ass‟y

① ②


③ ④

Desiccant X4



Ver 1.0 25 /39


LC550EGY

Product Specification

# APPENDIX-Ⅰ- 2
■ Control PCB Packing Ass’y

a) Control PCB Qty / Box : 120 pcs


b) Tray Qty / Box : 13Tray(Upperst Tray Is empty)
c) Tray Size : 453 X 353 X 16
d) Box size : 468 X 355 X 165

[12Tray+Empty Tray]

[10pcs/Tray]

[12Tray] [Inserting into Box]

NO. DESCRIPTION MATERIAL

1 PCB Packing A,ssy -

2 Tray PET

3 Box SWR4

Ver 1.0 26 /39


LC550EGY

Product Specification

# APPENDIX-Ⅱ-1

20± 0.2mm
15mm
6± 0.2mm

LC550EGY-SHM1 Model Name

Serial Label

20± 0.2mm
17mm
6± 0.2mm

55 6871L-6851B*************** Serial No.

Inch P/N

Ver 1.0 27 /39


LC550EGY

Product Specification

# APPENDIX-Ⅱ-2
■ BOX Label

LC550EGY-SHM1
QTY : 15

■ Pallet Label

LC550EGY
SHM1
120 PCS 001/01-01
MADE IN KOREA RoHS Verified

XXXXXXXXXXXXX XXX

Ver 1.0 28 /39


LC550EGY

Product Specification

# APPENDIX- Ⅲ
■ Required signal assignment for Flat Link (Thine : THCV215) Transmitter

TX’s Inner Structure

Packer Scrambler 8/10b Encoder Serializer


8 H H j j
D[31:24] G G h h
8 F F g g
8 Tx_n
D[23:16] PD[7:0] PD[7:0] E E f f
D D i i
8 Tx_p
C C e e
D[15:8] d d
B B
8 A A c c
D[7:0] b b
D/K D/K a a

Timing diagram of the Serializer


First Last
a b c d e i f g h g

time

Timing
THCV215 FI-RE51(41)S-HF
Controller
or Compatible
100nF
8
Tx_n Rx_n
D[31:24]

8 100nF
D[23:16] Tx_p Rx_p
Tx’s
8 Inner
D[15:8] Strucure HTPDN HTPDN
8
D[7:0]
LOCKN LOCKN

VCC

notes: 1. The LCD module uses a 100 nF capacitor on positive and negative lines of each receiver input.
2. Refer to Vx1 Transmitter Data Sheet for detail descriptions. (THCV215 or Compatible)
3. About Module connector pin configuration, Please refer to the Page 7.

Ver 1.0 29 /39


LC550EGY

Product Specification

# APPENDIX- Ⅳ-1
■ Option Pin Circuit Block Diagram

1) Circuit Block Diagram of Gplus Mode Selection pin

Gplus Mode Selection : Pin 16

1KΩ
Data format Select
(Pin16) Gplus Mode

75kΩ

ASIC
(TCON)

System Side LCM Side

2) Circuit Block Diagram of Gplus Enable pin

Gplus Enable : Pin 17

VCC

75kΩ
1KΩ
Gplus Enable
Gplus Enable
(Pin 17)

ASIC
(TCON)

System Side LCM Side

Ver 1.0 30 /39


LC550EGY

Product Specification

# APPENDIX- Ⅳ-2
■ Option Pin Circuit Block Diagram

3) Circuit Block Diagram of Bit Selection pin

Bit Select Pin : Pin 21

VCC

75kΩ
1KΩ
Bit Select
Bit Select
(Pin 21)

ASIC
(TCON)

System Side LCM Side

4) Circuit Block Diagram of Data format Selection pin

Data format Select Pin : Pin 22

1KΩ
Data format Select
(Pin 15,16) Data format Select

75kΩ

ASIC
(TCON)

System Side LCM Side

Ver 1.0 31 /39


LC550EGY

Product Specification

# APPENDIX- Ⅳ-3
■ Option Pin Circuit Block Diagram
5) Circuit Block Diagram of AGP Selection pin

AGP(auto Generation Pattern ) or NSB (no signal black) : Pin 23

FI-RE51S-HF
Vcc : 3.3V

10kΩ
pin 1kΩ
#23

R1 ≤ 1kΩ 75kΩ
(0Ω recommand)

ASIC
(TCON)

System Side LCM Side

Ver 1.0 32 /39


LC550EGY

Product Specification

# APPENDIX- Ⅳ-4
■ Option Pin Circuit Block Diagram
6) I2C (SDA/SCL) Selection Pin

SDA/SCL : Pin 18, 19

VCC
ASIC
(TCON)
4.7kΩ
100Ω
SDA/SCL
(Pin 18, 19) EEPROM
Slave Address : 70

EEPROM
Slave Address : A0

PM IC

Slave Address : 40

System Side LCM Side

Note : I2C Line of Set Soc avoid using slave address 40, 70, A0 because LCD module uses those

Ver 1.0 33 /39


LC550EGY

Product Specification

# APPENDIX- V
■ Scanning and Gplus Mode Design Guide
◊ When Gplus Enable is “L", PWM TOUT = System Dimming.
PWM TOUT signals are synchronized with V-Sync Freq. of System in T-Con Board.
#15 PWM TOUT Pin must be connected to LED Driver, In case of non-Scanning mode.

(4pin)
#1 : PWM_TOUT #1
#2 : PWM_TOUT #2 LCM T-con Board
#3 : PWM_TOUT #3 #1
#4 : GND

T-Con
#4

(51pin)
#14 : PWM TIN
#15 : PWM TOUT #1 #51
#16 : G plus Mode
CNT1 51pin

CNT4
#4 #1
#14 #16
B/L Signal PWM TIN Gplus Mode
Generation
Block
#15
PWM TOUT
High Luminance
3.3V
LED
Driver System
Main IC Low Power
(PWM Generator)
14pin
Chassis

◊ PWM Specification ( VDD = 3.3V )


1. PWM High Voltage Range : 2.5V~3.6V
2. PWM Low Voltage Range : 0.0V~0.7V

VDD
EXTVBR-B 50 Hz for PAL VDD*0.9
Frequency 60 Hz for NTSC
Rising Time

Rising Time MAX 10.0 μs


Falling Time

VDD*0.1
Falling Time MAX 10.0 μs
0

Ver 1.0 34 /39


LC550EGY

Product Specification

# APPENDIX- Ⅵ-1
■ Flicker Adjustment
1) Gplus EN(#17) must be „L‟(RGB Mode) for flicker adjustment

Parameter Unit Min Typ Max Note

Inversion Method - V2-Dot Inversion

Adjust Pattern /
- V2Dot Full Flicker / 511Gray 60Hz
Gray Level

Position - Center

Voltage range V 4.734 5.56 6.371

Tune the V-com level till


the flicker level became
stable on center position.

Row 1 Row 1

Row 2 Row 2
511Gray

Row 3 Row 3
0Gray

Row 4 Row 4

<Input data> <G+ Panel>

SCL
PMIC
SDA
B A : Pull-up Resistors
(If it is necessary)
Adjustment JIG LCD Module B : I2C Connector
(Refer to Appendix IX)

Ver 1.0 35 /39


LC550EGY

Product Specification

# APPENDIX- VI -2

Vcom Adjustment

MODULE 51 Pin CNT(CN1) PIN CONFIGURATION

Pin No Description Note

1~15 -

17 Gplus EN „L‟: RGB Mode, “H”:Gplus Mode

18 SDA

19 SCL

20 NC

21~51 -

LC550EGY-SHM1 Control PCB Assembly uses TI PWM IC(TPS65178).


PWM IC (Slave) Address is 40h (01000000), Vcom Register address is 0x16.

If you need detailed information, Please refer to TI PWM IC(TPS65178) Data Sheet or contact with TI
company.

Ver 1.0 36 /39


LC550EGY

Product Specification

# APPENDIX- Ⅶ
■ The reference method of BL dimming
It is recommended to use synchronous V-sync frequency to prevent waterfall
(Vsync * 2 =P-Dim Frequency)

Ver 1.0 37 /39


LC550EGY

Product Specification

# APPENDIX- Ⅷ

■ input mode of pixel data

Mode 1 : Non-Division Mode 2 : 2 Division

Lane 1st Data 2nd Data Data# Lane 1st Data 2nd Data Data#

Lane0 1 9 3833 Lane0 1 5 1917

Lane1 2 10 3834 Lane1 2 6 1918

Lane2 3 11 3835 Lane2 3 7 1919

Lane3 4 12 3836 Lane3 4 8 1920

Lane4 5 13 3837 Lane4 1921 1925 3837

Lane5 6 14 3838 Lane5 1922 1926 3838

Lane6 7 15 3839 Lane6 1923 1927 3839

Lane7 8 16 3840 Lane7 1924 1928 3840

Ver 1.0 38 /39


LC550EGY

Product Specification

# APPENDIX-Ⅸ

# 0.31+0.03/
0.31+0.03/-0.02
0.02

Adhesive
Area
(Adhesive)
4.5+0.8/ 0.4
4.5+0.8/-0.4

124 ± 1.0
Conductor Pad
Bottom Side
Silicone Tape
Area

Adhesive
Area

(Stiffener)
16.0+0.8/-0.4
Adhesive-left Adhesive-right (Adhesive)
4.5+0.8/-0.4

# 0.3 mm Max

# 0.31+0.03/-0.02

< Pad Detail– 60Pin >


- Material List
# 30.5 +0.06/ -0.035
0.035

# 0.5 +0.07/-0.045
# 0.3+0.04/-0.02
## 0.5± 0.05
# 3+0.5/-0.35

# 29.5± 0.05

◈ Note
- Pad : GOLD Plating
- # ≥ Cpk 1.0
- ## ≥ Cpk 1.33
- Stiffener color : Sky Blue
- H-F
- Dimensions unit : mm

Ver 1.0 39 /39

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