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M&M KEC502 Unit-1 Assignment-2

This document contains an assignment for a microprocessor and microcontroller course. It includes 12 questions about the 8085 microprocessor related to memory interfacing, instruction cycles, flags, registers, timing diagrams, and interfacing input/output devices. Students are asked to explain concepts like op-code fetch cycles, memory and I/O read/write operations, and memory mapped I/O. They are also asked to draw diagrams for instruction timing and an example of displaying the accumulator value to memory. The questions cover various learning outcomes and bloom's taxonomy levels from knowledge to application.

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41 views1 page

M&M KEC502 Unit-1 Assignment-2

This document contains an assignment for a microprocessor and microcontroller course. It includes 12 questions about the 8085 microprocessor related to memory interfacing, instruction cycles, flags, registers, timing diagrams, and interfacing input/output devices. Students are asked to explain concepts like op-code fetch cycles, memory and I/O read/write operations, and memory mapped I/O. They are also asked to draw diagrams for instruction timing and an example of displaying the accumulator value to memory. The questions cover various learning outcomes and bloom's taxonomy levels from knowledge to application.

Uploaded by

manavh857
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as DOCX, PDF, TXT or read online on Scribd
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SHEAT COLLEGE OF ENGINEERING & MANAGEMENT, BABATPUR, VARANASI

(0384)
Department of Electrical & Electronics Engineering
ASSIGNMENT 2 Date:

UNIT-1

MICROPROCESSOR AND MICROCONTROLLER (KEC502)


SI No. Question COs Bloom’s
Level
1 List the sequence of events that occurs when the 8085 reads CO1 K2
from memory.
2 The instruction LDA 2050H copies the contents of the CO1 K4
memory location 2050Hinto the accumulator. It is a 3-byte
instruction with four machine cycles and 13 T-states. Identify
the fourth machine cycle and its control signal.
3 Interface EPROM of 16 K using 8K x 8 chips and a RAM of 8K CO1 K4
using 4K x 8 chips to the system lines of 8085 using a 3 x 8
decoder.
4 Explain the different flags available in 8085 along-with the flag CO1 K3
register. Also explain the various general purpose registers
available in 8085.
5 Discuss the following: CO1 K2
(i) Instruction cycle and machine cycle,
(ii) T-states with typical timing diagrams
6 Draw the timing diagram of the following instruction: CO1 K3
(i) ADD B,
(ii) CALL 2050H
7 Explain how the op-code is fetched from the memory. Explain CO1 K3
the op-code fetch cycle with the help of a timing diagram
8 Write an instruction to display the content of the Accumulator to CO1 K3
the memory location 3500H. Draw the timing diagram as the
instruction is executed.
9 Explain the timing diagrams of IO Read, IO Write, Memory CO1 K3
Read and Memory Write operations in 8085.
10 Explain the various types of IO devices and Logic devices CO1 K3
interfaced with an 8085 system.
11 Briefly explain memory mapped IO and it advantages and CO1 K2
disadvantages over IO-mapped IO.
Describe the concept interfacing input and output devices CO1 K3
12 with 8085 microprocessor by interfacing 8-DIP switches as
input devices and Seven-segment LED display as output
device to 8085.

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