Embedded Systems Assignment-4, S Raguraam, RVCE22BME036

1. DB9 Connector
The DB9 or D-Subminiature connector is a serial communication connector that is used to connect
two computer systems. It consists of 9 pins arranged in 2 rows surrounded by a D-shaped shield.

Common applications of the connector include Video output from computer to monitor, connecting
computer to Printers, Controller Area Network applications Etc.

2. Differences between Serial and Parallel Communication

Sl.N Serial Transmission Parallel Transmission
o
1. Serial Transmission is the type of transmission in Parallel Transmission is the mode of
which a single communication link is used to transmission in which multiple parallel links
transfer the data from one end to another. are used that transmits each bit of data
simultaneously.
2. In case of Serial Transmission, only one bit is In case of Parallel Transmission, 8-bits
transferred at one clock pulse. transferred at one clock pulse.
3. As single link is used in Serial Transmission, it Multiple links need to be implemented in case
can be implemented easily without having to of Parallel Transmission, hence it is not cost
spend a huge amount. It is cost efficient. efficient.
4. As single bit gets transmitted per clock in case of 8-bits get transferred per clock in case of
Serial Transmission, its performance is Parallel transmission; hence it is more
comparatively lower as compared to Parallel efficient in performance.
Transmission.
5. Serial Transmission is preferred for long distance Parallel Transmission is preferred only for
transmission. short distance.
6. Serial Transmission is less complex as compared Parallel Transmission is more complex as
to that of Parallel Transmission. compared to that of Serial Transmission.

3. Simplex and Duplex

Simplex mode: In simplex mode, Sender can send the data but the sender can’t receive the data. It is
a unidirectional communication.

Half-duplex mode: In half-duplex mode, Sender can send the data and also can receive the data one
at a time. It is two-way directional communication but one at a time.

Full duplex mode: In full-duplex mode, Sender can send the data and also can receive the data
simultaneously. It is two-way directional communication simultaneously.
 Embedded Systems Assignment-4, S Raguraam, RVCE22BME036

4. Shift Registers
A shift register basically consists of several single bit “D-Type Data Latches”, one for each data bit,
either a logic “0” or a “1”, connected together in a serial type daisy-chain arrangement so that the
output from one data latch becomes the input of the next latch and so on.
Parallel In Serial Out:

Data is fed In parallel to each latch and clock is applied to output each bit serially.

Serial In Parallel Out:

Serial input is fed one bit per clock and parallel output is obtained by connecting lines to each latch.
 Embedded Systems Assignment-4, S Raguraam, RVCE22BME036

5. Communication Protocols
A system of rules and specifications that allow transfer of data from one device to another are communication
protocols. Communication protocols can be classified into Inter-system and Intra-system protocols.

Serial Peripheral Interface (SPI):

SPI is a full duplex synchronous intra-system serial communication protocol that was developed by Motorola. It
works on the Single Master- Multiple Slave concept and uses 4 data lines for communication:
1. Master In-Slave Out (MISO): Output from the slave is sent to the master
2. Master Out Slave In (MOSI): Output from the master is sent to the slave
3. Chip Select (CS): Line used to select the slave to send the data to, in case multiple slave devices are
connected.
4. Serial Clock (SCLK): Clock signal generated by master, is sent to the slaves for synchronization

The master only selects one slave at a time. The other slaves remain inactive until selected. The
working of SPI is based on shift registers that are used in both master and slaves to shift data into
and out of each device. The SPI bus connects the shift registers on both devices to form a long,
distributed shift register. Data is first loaded into the master shift register, and then serial clock is
issued multiple times until all the data bits are transferred to the slave register. During each clock, 1
bit of data is transferred starting from the MSB to LSB.
 Embedded Systems Assignment-4, S Raguraam, RVCE22BME036

The Master and Slave registers are connected such that data is cycled through the two devices even
if the cycled data is useless. This is called a “don’t care” condition. For example, in a sensor, the
MISO data is important while MOSI data can be ignored. Both the master and slave registers are
overwritten when new data needs to be sent.
In a multiple slave arrangement, Slave Select line is used to select the slave before sending the data.
SPI Frame Format:
SPI uses no start or stop bits. The data frame is defined by the slave select (SS) signal. The Master
must first drive the SS signal to the slave to initiate the read or write, following which data bits are
transferred through MOSI and MISO.
Clock Polarity: defines the resting value of SCLK. CPOL = 1 means SCLK idles at 1 and the first leading
edge (falling edge) defines the first clock pulse. For CPOL = 0 means SCLK idles at 0 and the first
leading edge (rising edge) defines the first clock pulse.
Clock Phase: defines which edge is used as the active edge to capture data
CPHA = 0, Leading edge is active
CPHA = 1, Trailing edge is active
CPHA = 1 is usually used in SPI to ensure stable signals in MISO/MOSI lines. Data is driven out at
leading edge of clock and captured at trailing edge.

Advantages of SPI:

 Accuracy of clock is not important, since both transmitter and receiver depend on the same
clock.
 No addressing needed since SPI is point-to-point
 Signals are unidirectional keeping circuit simple.
 Embedded Systems Assignment-4, S Raguraam, RVCE22BME036

 Any data size can be used.

 No clock extraction needed, No special transistors needed. It is a simple logic level circuit.

Disadvantages of SPI:

 The point to point bus means more pins are required to interface more devices.
 No, flow control, data acknowledge or error checking. The master has no information if the
data was accurately sent or received.
 The bus cannot be shared between two or more masters.

Universal Asynchronous Receiver/ Transmitter (UART):

UART is an Asynchronous system for serial communication. It consists of two data lines and works on
single master-single slave concept:
1. Transmitter (Tx): Transmits serial data
2. Receiver (Rx): Receives serial data
UART does not have a clock signal which necessitates start and stop bits in each data packet. The
transmitter generates a bitstream based on its clock signal while the receiver is using its internal
clock signal to sample the incoming data. The point of synchronization is managed by having the
same baud rate on both devices with an allowable difference of 10 percent in baud rate.

UART Frame Format:

Each Frame in UART is in the form of a packet. The UART Serial Controller creates the serial packets
from parallel data and sends them to Transmitter. Each packet consists of a start bit followed by
Data frame and parity bits, ends with 1 or 2 stop bits.

The transmitter line is held at logic high when idle. To start the transmission of data, the line is
pulled to logic low for one clock cycle. The receiver detects the high to low transition and starts
reading the bits at the set baud rate.
The data frame contains the data being sent. It can be from 5 to 8 bits (9 bits if no parity bit is used).
It is sent with LSB first and MSB last.
Parity bit is used for error correction at the receiver end by determining if the given data has a n
even or odd number of 1’s. parity bit = 0 if even number of 1’s are sent. Parity bit = 1 if odd number
of 1’s are sent.
 Embedded Systems Assignment-4, S Raguraam, RVCE22BME036

The stop bits consist of a low to high transition that signals the end of the transmission.

Advantages of UART:

 Requires only 2 wires for communication.

 Clock signal not required.
 Contains parity bit to check quality of data received.
 Less power consumption.

Disadvantages of UART:

 Data frame size is limited to 8 or 9 bits.

 Baud rate must be selected carefully in both the master and slave devices.
 Less speed compared to parallel communication.

Inter- Integrated Circuit (I2C):

I2C is a synchronous half duplex communication protocol and was developed by Philips
Semiconductors in 1982. It works on Multiple Master- Multiple Slave concept, with two lines:
1. Serial Data (SDA): Handles data transfer
2. Serial Clock (SCL): Handles Synchronization

While I2C allows multiple masters to be connected on the same bus, only a single master can remain
active at a time.
 Embedded Systems Assignment-4, S Raguraam, RVCE22BME036

I2C Frame Format:

Each I2C Message contains:

1. Start condition: alerts all slave devices to listen for incoming address signal by switching SDA
from idle high (1) to low (0), then SCL from idle high(1) to low(0).
2. Address frame: a 7-bit sequence of bits unique to each slave is sent by the master. The
slaves compare the sent address with their own address.
3. Read/Write bit: a single bit specifying whether the master is sending(0) or receiving(1) data.
4. Acknowledge bit: a single bit follows each frame that is returned by the slave to the master if
the previous frame is received correctly. (idle 1, ACK = 0)
5. Data Frame: when ACK bit is received by master, it sends the first data frame of 8 bits,
followed by another ACK bit by the slave and so on.
6. Stop condition: When the required data blocks are transferred through the SDA line, the SDA
line switches from a low voltage(0) level to a high voltage level(1) before the SCL line
switches from high to low.

Up to 128 Slave devices can be controlled by a single Master device using I2C. When Multiple
Masters are connected to the bus, each master sends signals in turns, checking if the bus is being
used or not.

Advantages of I2C:

 Uses only 2 Wires

 Supports multiple masters and multiple slave devices.
 Acknowledgement of data transfer after each frame.
 Good error handling

Disadvantages of I2C:

 Slower data transfer rates

 Frame size is limited
 Half duplex nature requires complicated circuits, hardware and firmware.

References:

1. https://www.realdigital.org/doc/6c55fef7bba4a22ff35dce46a3c359af#:~:text=An%20SPI
%20data%20frame%20is,a%20read%20or%20a%20write.
Embedded Systems Assignment-4, S Raguraam, RVCE22BME036