Unit 3 8085 Assembly Language Programming
Unit 3 8085 Assembly Language Programming
(1) Explain instruction format and Opcode format of 8085 μP with example.
OR With help of examples, explain the formation of opcodes of 8085 OR
What is an instruction? List type of instruction based on size.
Each instruction of 8085 has 1 byte opcode. With 8 bit binary code, we can generate 256 different
binary codes. In this, 246 codes have been used for opcodes.
The 3 bytes instruction has an opcode followed by 16 bit address or data. While storing the 3 bytes
instruction in memory, the sequence of storage is, opcode first followed by low byte of address or
data and then high byte of address or data.
Immediate Addressing
In immediate addressing mode, the data is specified in the instruction itself. The data will be a part
of the program instruction. All instructions that have ‘ I ’ in their mnemonics are of immediate
addressing type. For Example, MVI B, 3EH - Move the data 3EH given in the instruction to B
register.
Register Addressing
In register addressing mode, the instruction specifies the name of the register in which the data is
available. This type of addressing can be identified by register names (such as ‘A’, ‘B’ etc.) in the
instruction. For Example, MOV A, B -Move the content of B register to A register.
Direct Addressing
In direct addressing mode, the data will be in memory. The address of the data is specified in the
instruction directly.
For Example, LDA 1050H - Load the data available in memory location 1050H in accumulator.
Indirect Addressing
In indirect addressing mode, the data will be in memory. The address of the data is specified in the
instruction indirectly i.e. address is store in Registers. This type of addressing can be identified by
letter ‘M’ present in the instruction.
For Example: MOV A, M - The memory data addressed by HL pair is moved to A register.
Implied Addressing
In implied addressing mode, there is no operand. i.e. This type of instruction does not have any
address, register name, immediate data specified along with it.
For Example, CMA - Complement the content of accumulator.
The 8085 instruction set can be classified into the following six functional group.
1) Data Transfer Instructions
2) Arithmetic Instructions
3) Logical Instructions
4) Branching Instructions
5) Stack related instructions
6) Input/output instructions
7) Machine Control Instructions
Addition:-Any 8-bit number, or the contents of register, or the contents of memory location can be added to
the contents of accumulator. The result (sum) is stored in the accumulator. No two other 8-bit registers can
be added directly. Example: The contents of register B cannot be added directly to the contents of register
C. For example, ADD B
Subtraction: - Any 8-bit number, or the contents of register, or the contents of memory location can be
subtracted from the contents of accumulator. The result is stored in the accumulator. Subtraction is
performed in 2’s complement form. If the result is negative, it is stored in 2’s complement form. No two
other 8-bit registers can be subtracted directly. For example, SUB C
Increment and Decrement: - The 8-bit contents of a register or a memory location can be incremented or
decremented by 1.The 16-bit contents of a register pair can be incremented or decremented by 1.Increment
or decrement can be performed on any register or a memory location. Ex: i) INR D ii) INX H
Load accumulator
If the value of the low-order 4-bits in the accumulator is greater than 9 or if AC flag is set, the
instruction adds 6 to the low-order four bits. If the value of the high-order 4-bits in the
accumulator is greater than 9 or if the Carry flag is set, the instruction adds 6 to the high-order
four bits.
Example: DAA
is placed in the Carry flag, and the Carry flag is placed in the D7. CY is modified according to bit
D0. S, Z, P, AC are not affected.
Example: RAR
Jump conditionally
The program sequence is transferred to the memory location specified by the 16-bit address given
in the instruction based on the specified flag of the PSW as described below.
Example: JZ 2034H or JZ XYZ
Call conditionally
The program sequence is transferred to the memory location specified by the 16-bit address given
in the operand based on the specified flag of the PSW as described below. Before the transfer, the
address of the next instruction after the call (the contents of the program counter) is pushed onto
the stack.
Example: CZ 2034H or CZ XYZ
RET none:
The program sequence is transferred from the subroutine to the calling program. The two bytes
from the top of the stack are copied into the program counter, and program execution begins at
the new address.
Example: RET
Restart
RST 0-7:
The RST instruction is equivalent to a 1-byte call instruction to one of eight memory locations
depending upon the number. The instructions are generally used in conjunction with interrupts
and inserted using external hardware. However these can be used as software instructions in a
program to transfer program execution to one of the eight locations. The addresses are:
The 8085 has four additional interrupts and these interrupts generate RST instructions internally
and thus do not require any external hardware. These instructions and their Restart addresses are:
Example: SIM
9.What is stack? Explain stack related instruction with example OR Give
function of stack. OR What is stack? Explain the stack operations using
examples.
The stack is a group of memory location in the R/W memory (RAM) that is used for temporary
storage of data during the execution of a program.
Address of the stack is stored into the stack pointer register.
The 8085 provide two instructions PUSH & POP for storing information on the stack and reading
it back.
a. Data in the register pairs stored on the stack by using the instruction PUSH.
b. Data is read from the stack by using the instruction POP.
c. PUSH & POP both instruction works with register pairs only.
d. The storage and retrieval of the content of registers on the stack fallows the LIFO(Last-
In-First-Out) sequence.
For PUSH H
The stack pointer is decremented by one to 2098H, and the contents of the h register are copied to
memory location 2098H.The stack pointer register is again decremented by one to 2097H,and the
contents of the L register are copied to memory location 2097H.The contents of the register pair
HL are not destroyed.
For POP H
The contents of the top of the stack location shown by the stack pointer are copied in the L
register and the stack pointer register is incremented by one to 2098 H. The contents of the top of
the stack (now it is 2098H) are copied in the H register, and the stack pointer is incremented by
one. The contents of memory location 2097H and 2098 are not destroyed until some other data
bytes are stored in these location.
A subroutine is a group of instructions that will be used repeatedly in different locations of the
program. Rather than repeat the same instructions several times, they can be grouped into a one
program which is called subroutine.
When main program calls a subroutine the program execution is transferred to the subroutine.
After the completion of the subroutine, the program execution returns to the main program.
The microprocessor uses the stack to store the return address of the subroutine.
The 8085 has two instructions for dealing with subroutines.
– The CALL instruction is used to CALL the subroutine.
– The RET instruction is used to return to the main program at the end of the subroutine.
– Subroutine process is shown in figure below.
RET Instruction
RET none
The program sequence is transferred from the subroutine to the calling program. The two bytes
from the top of the stack are copied into the program counter, and program execution begins at
the new address.
Example: RET
We can also return from the subroutine by using conditional RET instruction. For Example,RC 16-
bit address Return if CY = 1
RNC16-bit address Return if CY = 0
RP16-bit address Return if S = 0
RM16-bit address Return if S = 1 RZ
16-bit address Return if Z = 1
RNZ16-bit address Return if Z = 0
RPE16-bit address Return if P = 1
RPO16-bit address Return if P = 0
The Programming Technique used to instruct the microprocessor to repeat task is called looping.
This process is accomplished by using jump instructions.
A loop can be classified into two groups:
Continuous loop- repeats a task continuously
Conditional loop-repeats a task until certain data condition are met
Continuous loop
A continuous loop is set up by using the unconditional jump Instruction shown in the flowchart. A
program with Continuous loop does not stop repeating the tasks until the system is reset.
Conditional Loop
A Conditional loop is setup by the conditional jump instructions. These instructions Check flags
(zero, carry, etc.) and repeat the specified task if the conditions are satisfied. These loops usually
include counting and indexing. Conditional loop is shown by the Flowchart as follow.
Classification of Interrupts
(1) Maskable and Non-Maskable
(2) Vectored and Non-Vectored
(3) Edge Triggered and Level Triggered
(4) Priority Based Interrupts
Maskable Interrupts
Maskable interrupts are those interrupts which can be enabled or disabled. Enabling and Disabling is
done by software instructions. The interrupts can be masked by moving an appropriate data to
accumulator and then executing SIM instruction. (SIM - Set Interrupt Mask).The status of maskable
interrupts can be read into accumulator by executing RIM instruction (RIM - Read Interrupt Mask).
List of Maskable Interrupts:
RST 7.5
RST 6.5
RST 5.5INTR
Non-Maskable Interrupts
The interrupts which are always in enabled mode are called non maskable interrupts. Theseinterrupts
can never be disabled by any software instruction.
TRAP is a non-maskable interrupt.
Vectored Interrupts
The interrupts which have fixed memory location for transfer of control from normalexecution.
List of vectored interrupts:
RST 7.5
RST 6.5
RST 5.5TRAP
The addresses to which program control goes:
Non-Vectored Interrupts
The interrupts which don't have fixed memory location for transfer of control from normal execution is
called Non-Vectored Interrupts. The address of the memory location is sent along with the interrupt.
INTR is a non-vectored interrupt.
Priority of interrupts:
Interrupt Priority
TRAP 1
RST 7.5 2
RST 6.5 3
RST 5.5 4
INTR 5
Software Interrupts
The software interrupts are program instructions. These instructions are inserted at desired locations in a program.
While running a program, if software interrupt instruction is encountered, then the processor executes an
interrupt service routine (ISR).
When the instruction is executed, the processor executes an interrupt service routine stored inthe vector address of
the software interrupt instruction. The software interrupts of 8085 are RST 0, RST1, RST 2, RST 3, RST 4, RST
5, RST6 and RST 7.
All software interrupts of 8085 are vectored interrupts. The software interrupts cannot be masked and they cannot
be disabled. The vector addresses of software interrupts are given in table below
Interrupt Vector Address
RST0 0000H
RST1 0008H
RST2 0010H
RST3 0018H
RST4 0020H
RST5 0028H
RST6 0030H
RST7 0038H
13. Explain 8085 Vectored interrupts: TRAP, RST 7.5, RST 6.5, RST 5.5 and RST.