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CY7B8392

The document describes the CY7B8392 Ethernet coaxial transceiver interface chip. It provides details on its features such as supporting 10BASE5 and 10BASE2 Ethernet standards and its low power BiCMOS design. Pin descriptions and logic block diagram are also included.

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0% found this document useful (0 votes)
36 views7 pages

CY7B8392

The document describes the CY7B8392 Ethernet coaxial transceiver interface chip. It provides details on its features such as supporting 10BASE5 and 10BASE2 Ethernet standards and its low power BiCMOS design. Pin descriptions and logic block diagram are also included.

Uploaded by

dcastrelos2000
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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CY7B8392

Ethernet Coax Transceiver Interface


Functional Description
1CY7B8392

Features The CY7B8392 is a low power coaxial transceiver for Ethernet


10BASE5 and 10BASE2 applications. The device contains all
• Compliant with IEEE802.3 10BASE5 and 10BASE2
the circuits required to perform transmit, receive, collision de-
• Pin compatible with the popular 8392 tection, heartbeat generation, jabber timer and attachment
• Internal squelch circuit to eliminate input noise unit interface (AUI) functions. In addition, the CY7B8392 fea-
• Hybrid mode collision detect for extended distance tures an advanced hybrid collision detection.
• Automatic AUI port isolation when coaxial connector is The transmitter output is connected directly to a double termi-
not present nated 50Ω cable.
• Low power BiCMOS design The CY7B8392 is fabricated with an advanced low power
• 16-Pin DIP or 28-Pin PLCC BiCMOS process. Typical standby current during idle is 25 mA.

Logic Block Diagram

RX+
HIGH PASS AUI
CCM DRIVER
EQUALIZATION
RX–

RXI LOW PASS


FILTER CD+
AUI
GND – CARRIER DRIVER
LOW PASS SENSE CD–
FILTER +

TX+

TX–
– COLLISION
CDS
LOW PASS +
RCV FILTER

TXO WAVEFORM + DC/AC


SHAPING SQUELCH

VEE
10 MHz CLK WATCH DOG JABBER RESET
OSC TIMER 26 ms TIMER 0.4 sec
RR+
REFERENCE
1K CIRCUIT
TRANSMIT RECEIVE
RR– STATE STATE
MACHINE MACHINE

HBE 8392–1

Pin Configurations PLCC


DIP Top View
Top View
CDS
TXO
CD+
CD–
RX+

RXI
NC

CD+ 1 16 CDS
4 3 2 1 28 2726
CD– 2 15 TXO VEE (NC) 5 25 VEE (NC)
RX+ 3 14 RXI VEE (NC) 6 24 VEE
VEE 4 VEE 7 23 VEE (NC)
13 VEE 7B8392
7B8392 VEE 8 22 VEE (NC)
VEE 5 12 RR–
VEE (NC) 9 21 VEE
RX– 6 11 RR+ VEE (NC) 10 20 VEE (NC)
TX+ 7 10 GND VEE (NC) RR–
11 1213 14 15 16 1718
TX– 8 9 HBE
TX+

GND
GND
TX–

RR+
RX–

HBE

8392–3 8392–2

Cypress Semiconductor Corporation • 3901 North First Street • San Jose • CA 95134 • 408-943-2600
Document #: 38-02016 Rev. ** Revised January 1996

This datasheet has been downloaded from http://www.digchip.com at this page


CY7B8392

Pin Description
Pin Number
16-Pin 28-Pin
DIP PLCC Pin Name Description
1 2 CD+ AUI Collision Output pins. Differential driver that transmit a 10-MHz signal during
2 3 CD– collision events, jabber and CD Heartbeat conditions. Also referred to as CI port.
3 4 RX+ AUI Receive Output pins. Differential driver that outputs the signal receive from
6 12 RX– the line. Also referred to as DI port.
7 13 TX+ AUI Transmit Input pins. Differential receiver that inputs the signal for transmission
8 14 TX– onto the cable.
9 15 HBE Heartbeat Enable Pin. When this pin is grounded, the heartbeat is enabled. When
the pin is connected to VEE, the heartbeat is disabled.
11 18 RR+ External Resistor. A 1K 1% resistor should be connected between these pins to
12 19 RR– establish proper internal operation current.
14 26 RXI Receive Input. This pin is connected directly to the coaxial cable.
15 28 TXO Transmitter Output. This pin is connected directly (10BASE2 thin wire) or through
a diode to the coaxial cable.
16 1 CDS Collision Detect Sense. Ground sense connection for the collision detect circuit.
This pin should be connected separately to the shield to prevent ground drops from
altering the receive mode collision detect threshold.
10 16,17 GND Positive Power Supply Pin.
4,5,13 5–11, VEE Negative Power Supply Pin.
20–25

CY7B8392 Description Long Cable Application


The IEEE 802.3 standard is designed for 500 meters of Ether-
Transmitter net cable and 185 meters of thin coax cable (RG58A/U). To
The CY7B8392 transfers Manchester-encoded data from the extend the cable segment to 1000 meters and 300 meters of
AUI port of the DTE (TX+ and TX–) to the coaxial cable. The Ethernet cable and thin coaxial cable respectively, transmit
output waveform is wave shaped to meet IEEE 802.3 specifi- collision detection mode is required. The disadvantage of or-
cations. For Ethernet compatible applications (10BASE5), an dinary transmit collision detection mode is that it will detect
external isolation diode should be added to further reduce the collision only when the station is transmitting; it will not be able
coax load capacitance. to detect collision of two far-end stations when it is not trans-
The AUI squelch circuit prevents signals with less than 15 ns mitting. Transmit mode collision detection is not allowed in re-
pulse width or smaller than 225 mV in amplitude from reaching peater applications.
the output driver. The squelch circuit also turns the transmitter The CY7B8392 utilizes a hybrid combination of receive and
off at the end of the packet if the amplitude remains less than transmit collision detection. When the device is not transmit-
225 mV for more than 190 ns. ting, the unit automatically sets the collision threshold voltage
to the smaller (less negative) receive level. This allows colli-
Receiver sion detection of two far end stations while the unit is not trans-
The CY7B8392 receiver transfers the serial data from the co- mitting. If the unit enters the transmit mode, the collision de-
axial cable to the DTE via the balanced differential output (RX+ tection threshold is automatically changed to the larger (more
and RX–). The received signal is amplified and equalized by negative) transmit collision detection threshold. This feature
the on chip equalizer. eliminates the need for an external voltage divider at the input
of CDS when using the 1000 meters and 300 meters of Ether-
The device also contains an internal squelch function that dis- net and thin coaxial cable length, respectively.
criminates noise from valid data. A 4-pole Bessel filter is used
to extract the DC level of the received signal. If the DC level of Heartbeat Test Function
the received signal is lower than an internally set squelch
threshold, the CY7B8392 receive function will not be activated. The Heartbeat Test Function is enabled when the HBE pin is
tied to ground. When enabled, a 10-MHz collision signal is
Collision Detection transmitted to the MAC over the CD+/CD– pair after the trans-
mission of a packet for 10±5BT[1]. The Heartbeat function
The collision detection circuit monitors the signal level on the should be disabled by tying the HBE pin to VEE for repeater
coax cable. This signal voltage level is compared against the applications.
collision voltage threshold VCD. When the measured signal
level is more negative than VCD, a collision condition is de-
Note:
clared by the CY7B8392 by sending a 10-MHz signal over the
1. BT = Bit Time = 100 ns.
CD+/CD– pair.

Document #: 38-02016 Rev. ** Page 2 of 8


CY7B8392

Jabber Function erly terminated coaxial segment is attached. While RXI is un-
The on-chip watchdog timer prevents the DTE from locking up terminated the AUI port will remain powered down. The AUI
a network by transmitting continuously. When the transmission port will only be activated when RXI is connected to a termi-
exceeds the jabber time limit, the Jabber function disables the nated coaxial segment.
transmitter and sends a 10-MHz signal over the CD± pair. When the RXI input becomes unterminated (after power-up),
Once the transmitter is in the jabber state, it must remain in the a 10-MHz signal is transmitted over the CI circuit for 800 ms.
idle state for 500 ms before it will exit the jabber state. After the transmission of the 10-MHz signal, the CI port is dis-
abled.
AUI Function
This function allows multiple MAUs to be connected to a single
The CY7B8392 Auto AUI function will isolate the AUI CI port AUI port without having to turn off the coaxial transceiver man-
when coaxial cable is not present. The CY7B8392 monitors ually.
the average DC level at the RXI input and determines if a prop-
Connection Diagram for Standard CY7B8392 Applications
AUI
CABLE

DC to DC +
12 to15VDC
CONVERTER 9V (ISOLATED)
≥ 100 mA

NOTE 5
510Ω
1 16
510Ω
COLLISION
PAIR 78Ω 510Ω
2 15 510Ω
DTE

NOTE 2 T1 (NOTE 3)
4 13 COAX

RECEIVE CD+ CDS


1 16
PAIR 78Ω NOTE 4
CD– TXO
5 12 2 15
RX+ RXI
3 14
CY7B8392
VEE 4 VEE
13
VEE 5 RR–
12
7 10
RX– 6 RR+ 1KΩ 1%
11
TRANSMIT TX+ GND
PAIR 7 10
8 9 78Ω TX– HBE
8 9
8392–4

Maximum Ratings
Operating Range
(Above which the useful life may be impaired. For user guide-
lines, not tested.) Ambient
Range Temperature VEE
Storage Temperature ................................. –65°C to +150°C
Commercial 0°C to +70°C –9V ± 5%
Ambient Temperature with
Notes:
Power Applied ................................................. –0°C to +70°C 2. 78Ω resistors not required if AUI cable not present.
Supply Voltage ...............................................................–12V 3. T1 is a 1:1 pulse transformer, with an inductance of 30 to 100 µH.
4. IN916 or equivalent.
Input Voltage .................................... GND+0.3V to VEE–0.3V 5. Resistors may be as small as 510Ω; larger values may be used to reduce
power dissipation.
ESD Protection .........................................................2200V[6] 6. HBM measurement exception: HBE and RXI pins ESD protected to
1100V

Document #: 38-02016 Rev. ** Page 3 of 8


CY7B8392

Electrical Characteristics Over the Operating Range[7]


Parameter Description Min. Typ. Max. Unit
VEE Supply Voltage –8.55 –9.0 –9.45 V
[8]
IEE1 (VEE to GND) Non-transmitting –25 –35 mA
IEE2 (VEE to GND) Transmitting –70 –80 mA
IMAU Input Bias Current (RXI and TXO pin) –2 25 µA
ITDC Transmitter Output DC Current 37 41 45 mA
ITAC Transmitter AC Current ±28 mA
ICDS Cable Sense Input Bias Current 1 3 µA
VIH HBE input HIGH voltage -4.2 V
VIL HBE input LOW voltage -4.8 V
IIH HBE input HIGH current 300 µA
IIL HBE input LOW current -10 µA
VDIS AUI Disable Voltage At RXI -4.0 V
VCD Collision Threshold (Receive Mode) –1.45 –1.53 –1.62 V
VCS Carrier Sense Threshold –0.42 –0.60 V
RX, CD Differential Output Voltage ±475 ±1500 mV
VOB Differential Output Voltage Imbalance - Idle ± 40 mV
[9]
VOC Common Mode Voltage (DI and CI ports) –3.5 V
[10]
VTS Transmitter Squelch Threshold –175 –225 –300 mV
[11]
RRXI Shunt Resistance—Non-transmitting 100 kΩ
[11]
RTXO Shunt Resistance—Transmitting 10 kΩ
RTX Differential Impedance At TX± 30 kΩ

Capacitance
Parameter Description Test Conditions Typ. Unit
CX Input Capacitance Guaranteed by Design 1.5 pF
Notes:
7. Testing is done under test load as defined in AC Test Loads and Waveforms.
8. Not including current through external pulldown resistors.
9. During idle, VOC is reduced to minimize the power dissipation across the load resistors connected to RX± and CD±.
10. For a minimum pulse width of >40 ns.
11. To measure shunt resistance, the pin (RXI or TXO) is terminated to 0 volts and the current is measured, then the pin is forced to –2 volts and the current is
measured. The resistance is found by:
DV 2V
R = -------- = --------------------------------------
DI I 0V – I
( ) ( – 2V )

Document #: 38-02016 Rev. ** Page 4 of 8


CY7B8392

AC Test Loads and Waveforms

39Ω
TXO RECEIVER (RX)
TRANSMITTER 50 µH
OUTPUT
COLLISION OUTPUT (CD)
25Ω 39Ω
510Ω 510Ω

VEE

(a) (b) 8392–5

Switching Characteristics Over the Operating Range


Parameter Description Min. Typ. Max. Unit
tRON Receiver Start-Up Delay 2.5 5 bits
tRONV First Validly Timed Bit On RX± tRON+1 bits
tRD Receiver Propagation Delay 25 50 ns
tRR Differential Output Rise Time (RX±, CD±) 4 7 ns
tRF Differential Output Fall Time (RX±, CD±) 4 7 ns
tOS Differential Output Settling Time (VOB = ± 40mV) 1 µs
tRJ Receiver and Cable Total Jitter ±2 ns
tTST Transmitter Start-Up Delay 1 2 bits
tTSTV First Validly Timed Bit On TXO tTST+1 bits
tTD Transmitter Propagation Delay 25 50 ns
tTR Transmitter Output Rise Time (TXO) 20 25 30 ns
tTF Transmitter Fall Time (TXO) 20 25 30 ns
tTM tTR and tTF Mismatch ±0.5 ±3 ns
tTS Transmit Skew (TXO) ±0.5 ±2 ns
[12]
tTON Transmit Turn-On Pulse Width at VTS (TX±) 10 20 40 ns
tTOFF Transmit Turn-Off Delay 130 200 300 ns
tCON Collision Turn-On Delay 7 13 bits
tCOFF Collision Turn-Off Delay 20 bits
fCD Collision Frequency 8.5 10 12.5 MHz
tCD Collision Pulse Width 40 50 60 ns
tHON CD Heartbeat Delay 0.6 1.1 1.6 µs
tHW CD Heartbeat Duration 0.5 1.0 1.5 µs
tJA Jabber Activation Delay 20 26 32 ms
tJR Jabber Reset Time Out 300 420 550 ms
Notes:
12. For a minimum pulse amplitude of >300 mV.

Document #: 38-02016 Rev. ** Page 5 of 8


CY7B8392

Switching Waveforms

ReceiverTiming

INPUT 50%
TO RXI
tRD
tRON
50% 90%
RX+
10%
RX–
tRF
tRR 8392–6

Transmit Timing

TX+
TX– vTS 50%
tTON tTD tTOFF
90%
TXO
50% 10%
OUTPUT
tTST

tTF tTR 8392–7

Heartbeat Timing

TX+
TX–
tHON tHW

CD+
CD–
8392–8

Collision Timing
0V –1.2V
INPUT VCD (max) VCD (min)
TO RXI
–1.75V –6.8V
tCON 1/fCD tCD tCOFF
CD+
CD–

8392–9

Jabber Timing

TX+
TX–
tJA

TXO
tJR

CD+
CD– 8392–10

Document #: 38-02016 Rev. ** Page 6 of 8


CY7B8392

Ordering Information
Package Operating
Ordering Code Name Package Type Range
CY7B8392–JC J64 28-Lead Plastic Leaded Chip Carrier Commercial
CY7B8392–PC P1 16-Lead (300-Mil) Molded DIP

Package Diagrams

28-Lead Plastic Leaded Chip Carrier J64

16-Lead (300-Mil) Molded DIP P1

Document #: 38-02016 Rev. ** Page 7 of 8


© Cypress Semiconductor Corporation, 1996. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use
of any circuitry other than circuitry embodied in a Cypress Semiconductor product. Nor does it convey or imply any license under patent or other rights. Cypress Semiconductor does not authorize
its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress
Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges.

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