See discussions, stats, and author profiles for this publication at: https://www.researchgate.

net/publication/224345161

Predictive Control Algorithm Technique for Multilevel Asymmetric Cascaded

H-Bridge Inverters

Article in IEEE Transactions on Industrial Electronics · January 2009

DOI: 10.1109/TIE.2008.2006948 · Source: IEEE Xplore

CITATIONS READS
126 424

3 authors:

Marcelo A Perez Patricio Cortes

Universidad Técnica Federico Santa María REFU Elektronik GmbH
118 PUBLICATIONS 6,463 CITATIONS 65 PUBLICATIONS 7,068 CITATIONS

SEE PROFILE SEE PROFILE

Jose Rodriguez
Universidad Técnica Federico Santa María
317 PUBLICATIONS 18,854 CITATIONS

SEE PROFILE

Some of the authors of this publication are also working on these related projects:

Partial Power Converters for Two-Stage PV Systems View project

Inspection of transmission lines View project

All content following this page was uploaded by Marcelo A Perez on 29 May 2014.

The user has requested enhancement of the downloaded file.

4354 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 55, NO. 12, DECEMBER 2008

Predictive Control Algorithm Technique for

Multilevel Asymmetric Cascaded H-Bridge Inverters
Marcelo A. Pérez, Member, IEEE, Patricio Cortés, Member, IEEE, and José Rodríguez, Senior Member, IEEE

Abstract—Predictive control algorithms have been proposed The modularity provided by the CHB is very attractive for
for power electronic converters, featuring a high performance STATCOM applications, because the dc sources can be re-
in terms of dynamic behavior. This is true due mainly to the placed by capacitors which provide the reactive power required
accurate modeling and the finite set of inputs or possible switching
combinations. However, when it is used in multilevel converters, to compensate the load current [15].
the dynamic performance is degraded, because the optimization Predictive control relies on a model of the inverter and
algorithm needs to evaluate and search over a large number basically calculates the error of a cost function for each pos-
of possible switching combinations. In this paper, a predictive sible input, selecting the input that minimizes this function.
control algorithm, which exhibits high dynamic performance for Predictive control algorithms exhibit a high dynamic and a
multilevel converters, is proposed. The algorithm reduces the com-
plexity of calculations and the number of possible combinations, very good performance when applied to power electronics [16];
allowing the use of predictive control with a large number of this feature can be achieved because the power electronics
switching states. Experimental results on a 27-level asymmetric devices, in spite of its nonlinear characteristic, can be modeled
multicell converter, which validate the proposed algorithm, are accurately [17], and using a parameter estimation scheme, the
presented. model uncertainties can be adjusted [18]. In addition, the inputs
Index Terms—Asymmetric multicell inverters, multilevel con- belong to a finite set of switching combinations [19], reducing
verters, predictive control. the processing time used to perform the optimization.
Predictive control has been successfully applied to two-level
I. I NTRODUCTION three-phase inverters [20], where the cost function is related

M ULTILEVEL inverters can provide an efficient alterna- to minimize the error of the output current and a given cur-
tive to high power applications, providing a high quality rent reference. Cost functions with higher complexity can be
output voltage, increasing the efficiency and robustness, and implemented, incorporating the model of the load to provide a
reducing the electromagnetic interference. There are three well- direct power control [21], [22], the model of an induction motor
established topologies of multilevel inverters: neutral point to provide flux and torque control capability [23], or impose a
clamped (NPC) [1], flying capacitor [2], and cascaded H-bridge desired load current spectrum [24].
(CHB) [3], [4]. This paper deals with the CHB inverter topology Multilevel inverters have a higher number of switching com-
which is based on a series connection of many single-phase binations than a two-level inverter [25]. Hence, the number
H-bridge inverters to provide the total output voltage required of iterations to implement the predictive algorithm, as well
by the load [5], [6]. as the processing time, is greatly increased. This requirement
The CHB inverter with equal dc sources has a large number degrades the overall performance, and the implementation of
of redundant switching combinations that synthesize the same predictive control could become impracticable when the sample
output voltage per phase [7]. Using asymmetrical dc sources, it time is large enough. However, the predictive control of three-
is possible to reduce the redundancies, increasing the output level NPC inverters has been reported [26]. The NPC inverter
voltage levels [8]. Therefore, a high quality output voltage has the property that does not have switching redundancy, i.e.,
can be achieved using only a few H-bridge inverters [9], fea- each possible output voltage has one and only one switching
turing a very low harmonic content, reduced common mode combination; therefore, the processing time could remain small.
voltage [10], and practically no electromagnetic compatibility In [27], an extension of the algorithm is proposed and tested in
issues [11]. a four-level NPC.
Considering the high quality output voltage provided by this It is possible to reduce the processing time required by
converter, applications like high power drives [12], [13] and predictive control, using the fact that the solution of the dis-
STAtic COMpensators (STATCOMs) [14] have been proposed. crete model can be expressed directly in terms of the state
variables. Therefore, this function does not have to be evaluated
Manuscript received April 16, 2008; revised August 29, 2008. First published in each optimization iteration. The theoretical background and
October 31, 2008; current version published December 2, 2008. This work an example application can be found in [28] and the references
was supported in part by the Chilean Government under Project FONDECYT therein.
1080443, by the Industrial Electronics and Mechatronics Millennium Science
Nucleus, by the Science and Technology Bicentenario Project PSD-30, and by This paper proposes a predictive control algorithm for mul-
Universidad Técnica Federico Santa María. tilevel inverters, which has a reduced execution time. The
The authors are with the Department of Electronic Engineering, Uni- algorithm is based on a two-stage sequence; the first stage
versidad Técnica Federico Santa María, Valparaíso 110-V, Chile (e-mail:
[email protected]). uses the direct solution to obtain a reference state vector. The
Digital Object Identifier 10.1109/TIE.2008.2006948 second stage selects, if possible, the best switching combination

0278-0046/$25.00 © 2008 IEEE

Authorized licensed use limited to: Universidad Tecnica Federico Santa Maria. Downloaded on December 4, 2008 at 08:48 from IEEE Xplore. Restrictions apply.
PÉREZ et al.: PREDICTIVE CONTROL ALGORITHM TECHNIQUE FOR CASCADED H-BRIDGE INVERTERS 4355

Fig. 2. Predictive control algorithm.

of switching combinations per phase for a CHB with N invert-

ers connected in series is given by

S = 3N (3)

where S is the number of switching combinations.

Fig. 1. Multilevel asymmetric CHB inverter topology.

III. P REDICTIVE C ONTROL A LGORITHMS
that matches the cost function, using the available switching
Predictive control uses a model of the system to be controlled
redundancies. The experimental results of the algorithm applied
to calculate the state variables at the next sample time. Then, it
on a 27-level CHB inverter are given.
selects the input that minimizes a cost function defined by these
state variables and the references.
II. A SYMMETRIC CHB I NVERTER The basic algorithm to implement a predictive control starts
sensing the state variables x(k) and disturbances d(k) of the
The CHB inverter can provide a high output voltage with
system in a given sampling time k. Using a suitable model, it is
low harmonic content, connecting in series many single-phase
possible to obtain the state variables during the next sampling
three-level H-bridge inverters. The power topology of a multi-
time x(k + 1), for each possible input u. Using this predicted
level CHB inverter is shown in Fig. 1.
variables and the references xref (k + 1), it is possible to opti-
When the dc link voltages are equal, the maximum num-
mize a defined cost function E. The input u∗ that minimizes the
ber of output voltage levels that this topology can provide is
cost function is applied in the next sampling time k + 1. This
given by
algorithm is shown in Fig. 2, where it is possible to note that the
L = 2N + 1 (1) operation of modeling and evaluating the cost function, which
are both time consuming functions, are within the optimization
where L is the number of levels, and N is the number of loop, repeated for each possible input.
inverters connected in series.
Using different dc voltages, it is possible to increase the
IV. P REDICTIVE C ONTROL FOR P OWER I NVERTERS
output voltage levels using the same number of H-bridges.
The maximum number of voltage levels is obtained when the In a three-phase cascaded multilevel inverter, composed by
ratio between each dc voltage is three, namely, trinary. The single-phase inverters connected in series, the total number of
maximum number of levels using a trinary dc voltage ratio is switching combinations, i.e., possible inputs, is given by
given by
Sp = (3N )P = 33N (4)
L=3 . N
(2)
where Sp is the number of switching combinations of the three-
On the other hand, the number of possible switching combi- phase inverter, and P = 3 is the number of phases. The pre-
nations does not depend on the asymmetry factor. The number dictive algorithm must calculate the optimal input, considering

Authorized licensed use limited to: Universidad Tecnica Federico Santa Maria. Downloaded on December 4, 2008 at 08:48 from IEEE Xplore. Restrictions apply.
4356 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 55, NO. 12, DECEMBER 2008

and can be expressed as

N
%
vo = Vdcj sj (10)
j=1

where Vdcj is a diagonal matrix containing the dc-link volt-

ages, and sj is the switching combination of the j-inverter.
Thus, using this approach, it is possible to reduce the possible
switching combinations, reducing also the number of iterations.
The number of switching combinations necessary to perform
the optimization is given by

Sp = P (3N ) = 3N +1 . (11)

For instance, consider the multilevel CHB shown in Fig. 1

with N = 3 inverters and S = 27 switching combinations
Fig. 3. Three-phase systems with neutral point not connected. per phase. Using the proposed methodology, the three-phase
switching combinations are Sp = 81 instead of Sp = 19.683,
each one of this switching combinations, which becomes very when all the possibilities are considered.
difficult as soon as N is greater than one.
However, to reduce the number of algorithm iterations, it is
possible to take advantage of the fact that, in three-phase sys- V. P ROPOSED P REDICTIVE C ONTROL A LGORITHM
tems with no neutral point connected, the line currents can be
In this section, an algorithm to efficiently implement the pre-
used to calculated directly the voltages required in each phase.
dictive control for multilevel inverter is proposed. The proposed
When the neutral point is not connected, as shown Fig. 3, the
algorithm is based on the following two stages: 1) the use of a
line current must accomplish
direct solution to reduce considerably the required processing
ioa + iob + ioc = 0 (5) power and 2) the analysis of switching redundancies of the
topology in order to reduce the subset of possible inputs.
and each current can be calculated, considering the impedances
Za = Zb = Zc = Z, as A. Direct Solution
1 The discrete model of a multilevel inverter is given by
io = M(v + vcm ) (6)
Z
x(k + 1) = Ax(k) + B (x(k), d(k)) u(k) + Ed(k) (12)
where io is the three-phase output current, v is the tree-phase
balanced output voltage, vcm is the common mode output where x are the state variables, u are the inputs, and d are the
voltage, and disturbances. The matrices A, B, and E define the dynamic
  of the system. It is important to note that the matrix B, which
2 −1 −1
1 multiplies the inputs, depends on the state variables and dis-
M= −1 2 −1  .
3 turbances, which is a common behavior in power electronics
−1 −1 2
converters.
Applying the properties The predictive control algorithm is based on a cost function
given by
Mx = x (7)
E = g (x(k + 1), xref (k + 1)) (13)
when x is a balanced three-phase variable and
where g is an arbitrary positive semidefinite function,
Mx = 0 (8) xref (k + 1) is the state vector reference for the next sample
time, and x(k + 1) is the estate vector predicted.
when x is a common mode variable, the total output voltage can The algorithm optimizes the cost function over the set of
be calculated as possible inputs, and the input which minimizes the cost function
is applied at the next sampling time
vo = Zio + vcm . (9)
u(k + 1) = u∗ . (14)
Therefore, given a defined common mode voltage, it is
possible to obtain the output voltage required to produce the This algorithm follows the scheme mentioned in the previous
desired output current. section, shown in Fig. 2.
In CHB inverters, this output voltage is a function of the dc To find the direct solution of the predictive algorithm, it is
link voltages and the switching combinations of each inverter necessary to obtain the state variables from the cost function.

Authorized licensed use limited to: Universidad Tecnica Federico Santa Maria. Downloaded on December 4, 2008 at 08:48 from IEEE Xplore. Restrictions apply.
PÉREZ et al.: PREDICTIVE CONTROL ALGORITHM TECHNIQUE FOR CASCADED H-BRIDGE INVERTERS 4357

TABLE I
VOLTAGE LEVEL REDUNDANCIES

the algorithm can be applied if the state variables can be

expressed explicitly from the cost function.

B. Redundancy Analysis
The switching redundancies are defined by the different
switching combinations that produce the same output voltage
per phase. In the symmetric CHB inverter, there exists a max-
imum of redundancies. They are reduced when the asymmetry
factor is changed, reaching no redundancies when the asymme-
try is trinary. In the Table I, the switching combinations and
Fig. 4. Predictive control algorithm using the direct solution. the corresponding output voltages using two cells per phase for
symmetric H-bridge and two asymmetric H-bridges are shown.
Consider a cost function based on the quadratic error of the When there are no redundancies, the correspondence be-
state variables and the references, given by tween switching combinations and output voltages is direct,
E = (x(k + 1) − xref (k + 1))2 . (15) because each phase output voltage calculated at the previous
section has only one corresponding switching combination.
To minimize this function, it is necessary that This feature simplifies the implementation of the predictive
algorithm; however, the degrees of freedom are reduced. There-
E ∗ = 0 ⇒ x∗ (k + 1) = xref (k + 1) (16) fore, to control other state variables, for example, the dc link
voltages, it is necessary to use a weight factor.
replacing this expression in the discrete model, it is possible to
define VI. T WENTY -S EVEN -L EVEL A SYMMETRIC
H-B RIDGE I NVERTER
F(k) = xref (k + 1) − Ax(k) − Ed(k). (17)
The 27-level asymmetric CHB inverter is composed by
This function does not depend on the inputs and can be calcu- three single-phase three-level inverters per phase, each one fed
lated outside the optimizing loop. Moreover, if it is possible to by a dc voltage which has a trinary ratio, i.e., vdc1 = Vdc ,
find B−1 (x(k), d(k)), then the required input can be calculated vdc2 = 3Vdc , and vdc3 = 9Vdc , like as shown in Fig. 1. Each
directly using phase of this inverter can synthesize an output voltage vo of
L = 3N = 27 levels.
u(k + 1) = B−1 (x(k), d(k)) F(k) (18) Assuming a resistive–inductive load model, the system can
be described by the following:
and the algorithm only has to find the possible input u∗ closest
to the optimal input u(k + 1). d
If the matrix B does not have an inverse, it is possible to L io = −rio + Mvo (20)
dt
calculate the term
where
G(k) = B (x(k), d(k)) u(k + 1) (19)
vo = s1 vdc1 + s2 vdc2 + s3 vdc3 . (21)
for each input u(k + 1) and compare with the function F(k) in
order to obtain the minimum error. Consider that each dc link is fed by a diode rectifier and they
This modified algorithm is shown in Fig. 4. The time con- have a fixed value. The output voltage can be written as
suming operations, like next step evaluation and cost function
vo = sVdc (22)
calculations, are processed outside the optimization loop.
This algorithm can be applied directly to any converter, where the switching combination is
which can be expressed as (12), and uses a quadratic error over
its states (currents and/or voltages). For another cost functions, s = s1 + 3s2 + 9s3 . (23)

Authorized licensed use limited to: Universidad Tecnica Federico Santa Maria. Downloaded on December 4, 2008 at 08:48 from IEEE Xplore. Restrictions apply.
4358 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 55, NO. 12, DECEMBER 2008

TABLE II
EXPERIMENTAL SETUP PARAMETERS

Fig. 5. Implementation of direct predictive controller of a 27-level CHB

inverter.

The discrete model, using a first order derivative approxima-

tions, is given by

x(k + 1) = Ax(k) + Bu(l) (24)

where x = io , u = s, and
& r' Ts
A = 1 − Ts I B= MVdc . (25)
L L
The function F(k) to obtain the direct solution is
& r'
F(k) = ioref (k + 1) − 1 − Ts io (k) (26)
L
and the function G(k) is
Fig. 6. Operation at 30% of the nominal load. (a) Inverter 9 output voltage
Ts vo9 . (b) Inverter 3 output voltage vo3 . (c) Inverter 1 output voltage vo1 .
G(k) = Vdc Ms(k + 1) (27) (d) Total phase output voltage vo .
L
Excluding the common mode voltage and considering only from the optimal switching combination. The selection of each
balanced switching combinations, it is possible to determine switching combination could be implemented using a compar-
directly the optimal switching combination using ative iterative algorithm like as shown in Fig. 5.

L 1 & & r' '

ŝ = ioref (k + 1) − 1 − Ts io (k) . (28) VII. E XPERIMENTAL R ESULTS
Ts Vdc L
In order to validate the proposed algorithm, experimental
This switching reference can be calculated before the opti-
results with a 27-level CHB multilevel inverter were per-
mization loop. The optimization loop must calculate the error
formed. The parameters used in the implementation are given in
between the optimal switching combination and each one of the
Table II. The predictive control is implemented using a dSPACE
possible switching combinations using, for example, an error
platform model CP1104.
function like
Using a light load equivalent to 30% of the nominal load, the
Es = (ŝ − s(k))2 . (29) output voltage of the 90-V inverter produces a high switching
frequency when the output voltage required is maximum, as
The input that produces the smallest error is considered for shown in Fig. 6. Moreover, the 30- and 10-V inverters produce
the next switching combination s(k + 1). high switching frequency at the same time. The sinusoidal
The multilevel CHB inverter does not have redundancies; output current, as well as the output voltage, is shown in Fig. 7.
therefore, it is possible to simplify the optimizing loop, cal- When the load is increased to 80% of the nominal load,
culating directly the switching combination for each inverter as shown in Fig. 8, the output voltage of the 90- and 30-V

Authorized licensed use limited to: Universidad Tecnica Federico Santa Maria. Downloaded on December 4, 2008 at 08:48 from IEEE Xplore. Restrictions apply.
PÉREZ et al.: PREDICTIVE CONTROL ALGORITHM TECHNIQUE FOR CASCADED H-BRIDGE INVERTERS 4359

Fig. 7. Operation at 30% of the nominal load: Phase output voltage vo , line Fig. 9. Operation at 80% of the nominal load: Phase output voltage vo , line
to line output voltage vo(L−L) , and output current io . to line output voltage vo(L−L) , and output current io .

Fig. 10. Dynamic response of the predictive current controller.

Fig. 8. Operation at 80% of the nominal load. (a) Inverter 9 output voltage
vo9 . (b)Inverter 3 output voltage vo3 . (c) Inverter 1 output voltage vo1 .
(d) Total phase output voltage vo .

inverter does not present a high switching frequency, which

is concentrated in the 10-V inverter. The output current also
presents a sinusoidal waveform in this operating condition, as
shown in Fig. 9, as well as the output voltage. Fig. 11. Dynamic response of the linear controller and hybrid modulation.
Fig. 10 shows the dynamic response of the output current
when the reference changes periodically between 30% and 80%
of the load current. eters are in Table II. Fig. 11 shows the dynamic response of the
To compare its dynamical performance, a linear PI control output current when the reference changes between 30% and
using a hybrid modulation [10] is implemented. The PI param- 80% of the load current.

Authorized licensed use limited to: Universidad Tecnica Federico Santa Maria. Downloaded on December 4, 2008 at 08:48 from IEEE Xplore. Restrictions apply.
4360 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 55, NO. 12, DECEMBER 2008

VIII. C ONCLUSION [17] P. Merceorelli, N. Kubasiak, and S. Liu, “Model predictive control of an
electromagnetic actuator fed by multilevel PWM inverter,” in Proc. IEEE
A predictive control algorithm for multilevel asymmetric Int. Symp. Ind. Electron., May 4–7, 2004, vol. 1, pp. 531–535.
H-bridge inverter is presented. The algorithm is based on the [18] S.-J. Jeong and S.-H. Song, “Improvement of predictive current con-
trol performance using online parameter estimation in phase controlled
direct solution of the predictive model in order to reduce the rectifier,” IEEE Trans. Power Electron., vol. 22, no. 5, pp. 1820–1825,
processing time and a topology redundancy analysis to reduce Sep. 2007.
the subset of possible switching combinations. The resulting [19] J. Rodriguez, J. Pontt, C. Silva, M. Salgado, S. Rees, U. Ammann,
P. Lezana, R. Huerta, and P. Cortes, “Predictive control of three-phase
algorithm can be implemented to obtain directly the switching inverter,” Electron. Lett., vol. 40, no. 9, pp. 561–563, Apr. 29, 2004.
combinations when there are no redundancies, for example, a [20] J. Rodriguez, J. Pontt, C. A. Silva, P. Correa, P. Lezana, P. Cortes, and
27-level asymmetric inverter. The proposed predictive control U. Ammann, “Predictive current control of a voltage source inverter,”
IEEE Trans. Ind. Electron., vol. 54, no. 1, pp. 495–503, Feb. 2007.
algorithm can be used with cascaded multilevel converters, [21] S. A. Larrinaga, M. A. R. Vidal, E. Oyarbide, and J. R. T. Apraiz, “Predic-
which have a large number of possible switching combinations, tive control strategy for DC/AC converters based on direct power control,”
allowing the use of a reduced sample time. Experimental results IEEE Trans. Ind. Electron., vol. 54, no. 3, pp. 1261–1271, Jun. 2007.
[22] J. Rodriguez, J. Pontt, P. Correa, P. Lezana, and P. Cortes, “Predictive
show a fast dynamic response compared to classical linear power control of an AC/DC/AC converter,” in Conf. Rec. 14th IEEE IAS
controllers. Annu. Meeting, Oct. 2005, vol. 2, pp. 934–939.
[23] J. Rodriguez, J. Pontt, C. Silva, P. Cortes, U. Amman, and S. Rees,
“Predictive current control of a voltage source inverter,” in Proc. 35th
R EFERENCES Annu. IEEE PESC, Jun. 20–25, 2004, pp. 2192–2196.
[1] J. Rodriguez, S. Bernet, B. Wu, J. Pontt, and S. Kouro, “Multi- [24] P. Cortes, J. Rodriguez, D. E. Quevedo, and C. Silva, “Predictive current
level voltage-source-converter topologies for industrial medium-voltage control strategy with imposed load current spectrum,” IEEE Trans. Power
drives,” IEEE Trans. Ind. Electron., vol. 54, no. 6, pp. 2930–2945, Electron., vol. 23, no. 2, pp. 612–618, Mar. 2008.
Dec. 2007. [25] O. Lopez, J. Alvarez, J. Doval-Gandoy, and F. D. Freijedo, “Multilevel
[2] L. Xu and V. G. Agelidis, “VSC transmission system using flying capac- multiphase space vector PWM algorithm,” IEEE Trans. Ind. Electron.,
itor multilevel converters and hybrid PWM control,” IEEE Trans. Power vol. 55, no. 5, pp. 1933–1942, May 2008.
Del., vol. 22, no. 1, pp. 693–702, Jan. 2007. [26] R. Vargas, P. Cortes, U. Ammann, J. Rodriguez, and J. Pontt, “Predictive
[3] M. A. Perez, J. R. Espinoza, J. Rodriguez, and P. Lezana, “Regenerative control of a three-phase neutral-point-clamped inverter,” IEEE Trans. Ind.
medium-voltage ac drive based on a multicell arrangement with reduced Electron., vol. 54, no. 5, pp. 2697–2705, Oct. 2007.
energy storage requirements,” IEEE Trans. Ind. Electron., vol. 52, no. 1, [27] G. S. Perantzakis, F. H. Xepapas, and S. N. Manias, “Efficient predictive
pp. 171–180, Feb. 2005. current control technique for multilevel voltage source inverters,” in Proc.
[4] P. Lezana, J. Rodriguez, and D. A. Oyarzun, “Cascaded multilevel inverter Eur. Conf. Power Electron. Appl., Sep. 11–14, 2005. CD-ROM.
with regeneration capability and reduced number of switches,” IEEE [28] A. Linder and R. Kennel, “Model predictive control for electrical drives,”
Trans. Ind. Electron., vol. 55, no. 3, pp. 1059–1066, Mar. 2008. in Proc. IEEE 36th PESC, 2005, pp. 1793–1799.
[5] C. R. Baier, J. I. Guzman, J. R. Espinoza, M. A. Perez, and
J. R. Rodriguez, “Performance evaluation of a multicell topology imple-
mented with single-phase nonregenerative cells under unbalanced supply
voltages,” IEEE Trans. Ind. Electron., vol. 54, no. 6, pp. 2969–2978,
Dec. 2007.
[6] P. Lezana, C. A. Silva, J. Rodriguez, and M. A. Perez, “Zero-steady-state-
error input-current controller for regenerative multilevel converters based
on single-phase cells,” IEEE Trans. Ind. Electron., vol. 54, no. 2, pp. 733–
740, Apr. 2007.
[7] R. Gupta, A. Ghosh, and A. Joshi, “Switching characterization of cas-
caded multilevel-inverter-controlled systems,” IEEE Trans. Ind. Electron., Marcelo A. Pérez (M’06) received the Engineer
vol. 55, no. 3, pp. 1047–1058, Mar. 2008. degree in electronic engineering and the M.Sc. and
[8] C. Rech and J. R. Pinheiro, “Hybrid multilevel converters: Unified analy- D.Sc. degrees in electrical engineering from the Uni-
sis and design considerations,” IEEE Trans. Ind. Electron., vol. 54, no. 2, versity of Concepción, Concepción, Chile, in 2000,
pp. 1092–1104, Apr. 2007. 2003, and 2006, respectively.
[9] Z. Du, L. M. Tolbert, J. N. Chiasson, and B. Ozpineci, “Reduced He is currently a Postdoctoral Researcher in the
switching-frequency active harmonic elimination for multilevel convert- area of efficiency improvement in multilevel con-
ers,” IEEE Trans. Ind. Electron., vol. 55, no. 4, pp. 1761–1770, Apr. 2008. verters with the Department of Electronic Engi-
[10] C. Rech and J. R. Pinheiro, “Impact of hybrid multilevel modulation neering, Universidad Técnica Federico Santa María,
strategies on input and output harmonic performances,” IEEE Trans. Valparaíso, Chile.
Power Electron., vol. 22, no. 3, pp. 967–977, May 2007.
[11] Y. Liu and F. L. Luo, “Trinary hybrid 81-level multilevel inverter for mo-
tor drive with zero common-mode voltage,” IEEE Trans. Ind. Electron.,
vol. 55, no. 3, pp. 1014–1021, Mar. 2008.
[12] J. Dixon, A. A. Breton, F. E. Rios, J. Rodriguez, J. Pontt, and M. A. Perez,
“High-power machine drive, using non redundant 27-level inverters and
active front end rectifiers,” IEEE Trans. Power Electron., vol. 22, no. 6,
pp. 2527–2533, Nov. 2007.
[13] S. Kouro, R. Bernal, H. Miranda, C. A. Silva, and J. Rodriguez, “High-
performance torque and flux control for multilevel inverter fed induction Patricio Cortés (S’05–M’08) received the Engi-
motors,” IEEE Trans. Power Electron., vol. 22, no. 6, pp. 2116–2123, neer and M.Sc. degrees in electronic engineering
Nov. 2007. from the Universidad Técnica Federico Santa María
[14] J. D. L. Morales, M. F. Escalante, and M. Mata-Jimenez, “Observer for (UTFSM), Valparaíso, Chile, in 2004, where he re-
DC voltages in a cascaded H-bridge multilevel STATCOM,” IET Elect. ceived the Ph.D. degree in 2008.
Power Appl., vol. 1, no. 6, pp. 879–889, Nov. 2007. In 2003, he was with the Department of Electronic
[15] Q. Song, W. Liu, and Z. Yuan, “Multilevel optimal modulation and dy- Engineering, UTFSM, where he is currently a Re-
namic control strategies for STATCOMs using cascaded multilevel invert- search Associate. In 2007, he visited the Institute
ers,” IEEE Trans. Power Del., vol. 22, no. 3, pp. 1937–1946, Jul. 2007. of Control and Industrial Electronics, Warsaw Uni-
[16] P. Athalye, D. Maksimovic, and R. Erickson, “Variable-frequency pre- versity of Technology, Warsaw, Poland. His main
dictive digital current mode control,” IEEE Power Electron. Lett., vol. 2, research interests are power electronics, adjustable
no. 4, pp. 113–116, Dec. 2004. speed drives, and predictive control.

Authorized licensed use limited to: Universidad Tecnica Federico Santa Maria. Downloaded on December 4, 2008 at 08:48 from IEEE Xplore. Restrictions apply.
PÉREZ et al.: PREDICTIVE CONTROL ALGORITHM TECHNIQUE FOR CASCADED H-BRIDGE INVERTERS 4361

José Rodríguez (S’83–M’81–SM’94) received the

Engineer degree in electrical engineering from
the Universidad Técnica Federico Santa María,
Valparaíso, Chile, and the Dr. Ing. degree in elec-
trical engineering from the University of Erlangen,
Erlangen, Germany, in 1977 and 1985, respectively.
Since 1977, he has been with the Universidad Téc-
nica Federico Santa María, where he is currently a
Professor in the Department of Electronic Engineer-
ing and the President of the university. During his
sabbatical leave in 1996, he was responsible for the
mining division of the Siemens Corporation in Chile. He has a large consulting
experience in the mining industry, particularly in the application of large drives
like cycloconverter-fed synchronous motors for semiautogenous grinding mills,
high power conveyors, controlled drives for shovels, and power quality issues.
His research interests are mainly in the areas of power electronics and electrical
drives. In the last years, his main research interests are in multilevel inverters
and new converter topologies. He has authored and coauthored more than
130 refereed journal and conference papers and contributed to one chapter in
the Power Electronics Handbook (Academic Press, 2006).

Authorized licensed
View publication stats use limited to: Universidad Tecnica Federico Santa Maria. Downloaded on December 4, 2008 at 08:48 from IEEE Xplore. Restrictions apply.