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NI LabVIEW For CompactRIO Developer's Guide-21-29

The document discusses different programming modes for CompactRIO systems, including LabVIEW FPGA interface mode, CompactRIO scan mode, and hybrid mode. It provides details on when each mode should be used, such as using LabVIEW FPGA for maximum performance or custom hardware, and using scan mode for simpler applications under 500Hz.
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0% found this document useful (0 votes)
91 views9 pages

NI LabVIEW For CompactRIO Developer's Guide-21-29

The document discusses different programming modes for CompactRIO systems, including LabVIEW FPGA interface mode, CompactRIO scan mode, and hybrid mode. It provides details on when each mode should be used, such as using LabVIEW FPGA for maximum performance or custom hardware, and using scan mode for simpler applications under 500Hz.
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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CHAPTER 2

Choosing a CompactRIO Programming Mode


The CompactRIO architectures presented in Chapter 1 provide you with the option to implement your I/O by customizing
the FPGA hardware through LabVIEW FPGA or by using NI CompactRIO Scan Mode. If you have LabVIEW Real-Time
and LabVIEW FPGA on your development computer, you are prompted to select which programming mode you would
like to use when you add a CompactRIO target to your LabVIEW project. Upon selecting a mode, you can also go into
Hybrid Mode if you want to use a hybrid of LabVIEW FPGA and CompactRIO Scan Mode for your application.

Figure 2.1. If you have LabVIEW FPGA installed, you are prompted to select a programming
mode
when adding a CompactRIO system to your LabVIEW project.

An overview of each programming mode follows.

LabVIEW FPGA Interface Mode


With the LabVIEW FPGA Interface mode, you can unlock the real power of CompactRIO by customizing the FPGA
personality in addition to programming the real-time processor. This helps you achieve performance that typically
requires custom hardware. Using LabVIEW FPGA, you can implement custom timing and triggering, offload signal
processing and analysis, create custom protocols, and access I/O at its maximum rate.

When communicating data between an FPGA VI and Real-Time VI, you have the option to stream data at very high
rates using DMA FIFOs, or to communicate single-point data using controls and indicators.

CompactRIO Scan Mode


Using CompactRIO Scan Mode, you can program the real-time processor of your CompactRIO system but not the
FPGA. In this mode, NI provides a predefined personality for the FPGA that periodically scans the I/O and places it in
a memory map, making it available to LabVIEW Real-Time. CompactRIO Scan Mode is sufficient for applications that
require single-point access to I/O at rates of a few hundred hertz. It does not support streaming data at high rates.

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Hybrid Mode
Using the CompactRIO Scan Mode and LabVIEW FPGA at the same time on a target is known as Hybrid Mode. With
this approach, the modules you select to program directly with LabVIEW FPGA are removed from the I/O scan, and
the remaining modules communicate with the RIO Scan Interface. Note that the RIO Scan Interface uses two of the
three DMA channels that are normally available for use in LabVIEW FPGA.

This section offers tips on choosing a programming mode for your CompactRIO application. You should choose a
programming mode based on your application requirements for performance, reliability, customization, and I/O. The
NI LabVIEW for CompactRIO Developer’s Guide discusses programming techniques and best practices for both
LabVIEW FPGA programming and the RIO Scan Interface use.

When to Use LabVIEW FPGA


Like processor-based control systems, FPGAs have been used to implement all types of industrial control systems,
including analog process control, discrete logic, and batch or state-machine-based control systems. However, FPGA-
based control systems differ from processor-based systems in significant ways. If your application has any of the
requirements listed below, you should program your I/O and other low-level tasks using LabVIEW FPGA. You can find more
information on programming with LabVIEW FPGA in Chapter 5: Customizing Hardware Through LabVIEW FPGA.

Figure 2.2. With LabVIEW FPGA, you can create custom FPGA VIs for high-speed data
acquisition,
control loops, or custom timing and triggering.

Maximum Performance and Reliability


When you compile your control application for an FPGA device, the result is a highly optimized silicon
implementation that provides true parallel processing with the performance and reliability benefits of dedicated

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hardware circuitry. Because there is no OS on the FPGA chip, the code is implemented in a way that ensures
maximum performance and reliability.

High-Speed Waveform Acquisition/Generation (>500 Hz)


The RIO Scan Interface is optimized for control loops running at less than 500 Hz, but many C Series I/O modules are
capable of acquiring and generating at much higher rates. If you need to take full advantage of these module features
and acquire or generate at speeds higher than 500 Hz, you can use LabVIEW FPGA to acquire at a user-defined rate
tailored to your application.

Custom Triggering/Timing/Synchronization
With the reconfigurable FPGA, you can create simple, advanced, or otherwise custom implementations of triggers,
timing schemes, and I/O or chassis synchronization. These can be as elaborate as triggering a custom CAN message
based on the rise of an analog acquisition exceeding a threshold or as simple as acquiring input values on the rising
edge of an external clock source.

Hardware-Based Analysis/Generation and Coprocessing


Many sensors output more data than can be reasonably processed on the real-time processor alone. You can use the
FPGA as a valuable coprocessor to analyze or generate complex signals while freeing the processor for other critical
threads. This type of FPGA-based coprocessing is commonly used in applications such as:

■■ Encoding/decoding sensors

■■ Tachometers

■■ Standard and/or custom digital protocols

■■ Signal processing and analysis

■■ Spectral analysis (fast Fourier transforms and windowing)

■■ Filtering, averaging, and so on

■■ Data reduction

■■ Third-party IP integration

■■ Sensor simulation

■■ Cam and crank

■■ Linear-variable differential transformers (LVDTs)

■■ Hardware-in-the-loop simulation

Highest Performance Control


Not only can you use the FPGA for high-speed acquisition and generation, but you also can implement many control
algorithms on the FPGA. You can use single-point I/O with multichannel, tunable PID or other control algorithms to
implement deterministic control with loop rates beyond 1 MHz. For example, the PID control algorithm that is
included with the LabVIEW FPGA Module executes in just 300 ns (0.000000300 seconds).

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Using LabVIEW FPGA Interface Mode
When you discover your CompactRIO controller from the LabVIEW project, select LabVIEW FPGA Interface as your
programming mode. LabVIEW FPGA Interface mode automatically detects your I/O modules and adds them to the
LabVIEW project. You can find more information and best practices on using LabVIEW FPGA Interface mode in
Chapter 5: Customizing Hardware Through LabVIEW FPGA.

When to Use CompactRIO Scan Mode


Some industrial control and monitoring applications are based on single-point I/O data. The data used in these
processes represents the current value of a physical I/O channel. The processes are not concerned with tracking the
time history of the data, comparing the current value to any of the previous values, or measuring the change rate of
a value. Often they do not require loop rates faster than 500 Hz. You can simplify these types of applications by using
CompactRIO Scan Mode.

RIO Scan Interface technology allows single-point I/O access up to rates of a few hundred hertz without the need to
write FPGA code or an RT to FPGA interface. When the controller is accessing I/O via the scan interface, module I/O
is automatically read from the modules and placed in a current value table on the CompactRIO controller.

NI CompactRIO – Scan Mode Interface

LabVIEW Real-Time FPGA

I/O Modules

I/O Modules
I/O Variables NI Scan Engine

RIO Scan
I/O Memory Interface
LabVIEW Table
Real-Time VI

Figure 2.3. Block Diagram Description of the RIO Scan Interface Software Components

When deciding to use Scan Mode for a CompactRIO application, you should consider the required performance or
loop rates and channel count. The graph in Figure 2.4 shows benchmarking that was completed using Scan Mode for
a PID control loop, including one analog input and one analog output. The data shows that PID loop rates higher than
100 Hz combined with a high-channel count have a significant impact on CPU usage. Generally, you should not use
Scan Mode when you require loop rates faster than 500 Hz.

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Figure 2.4. When using the RIO Scan Interface, high-channel counts combined with
high-loop rates have a significant impact on CPU.

Although you should not use Scan Mode for high-speed data acquisition or control loops, it does offer several benefits:

■■ Ease of Programming—Drag and drop your I/O variables directly into your LabVIEW Real-Time VI during
development.

■■ Ability to Dynamically Detect I/O Modules—Slots not configured through the project automatically detect
inserted modules. You can then configure these modules through the variable API.

■■ Fault Engine—The NI Scan Engine features the built-in NI Fault Engine that throws errors deterministically.

■■ Diagnostics and Debugging—With the Distributed System Manager, you can view current values and faults
as well as override current I/O values while your program is running.

Not all CompactRIO hardware works with NI Scan Mode. For a list of C Series I/O modules that feature Scan Mode
support, see C Series Modules Supported by CompactRIO Scan Mode. CompactRIO targets with 1M gate FPGAs
cannot fully support the scan interface. You can implement some scan interface features on unsupported targets,
but you must use LabVIEW FPGA.

Using CompactRIO Scan Mode


When you discover your CompactRIO controller from the LabVIEW project, select Scan Interface as your programming
mode. The RIO Scan Interface automatically detects your I/O modules and adds them to the LabVIEW project. You
can then drag and drop the I/O variables onto your LabVIEW Real-Time and host VI block diagrams and instantly read
and write scaled, calibrated I/O data without any FPGA programming or compiling.

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Figure 2.5. Drag and drop I/O variables onto your Real-Time VI block diagram.

The Scan Engine also provides a Timed-Loop timing source, so you can synchronize code with I/O updates for low-jitter
control applications.

Figure 2.6. Use a Timed Loop with the clock source set to Synchronize to Scan Engine
to synchronize the loop to I/O updates.

You can find example programs for using Scan Mode at \LabVIEW\examples\ScanEngine.

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When programming in Scan Mode, another option for interfacing to I/O variables is through the I/O Variable
programmatic API, shown in the Figure 2.7. The programmatic API offers several benefits over the static I/O Variable
Node API:

■■ You can iterate through multiple variables at once without dropping down a large number of I/O Variable Nodes

■■ Deployment to a CompactRIO target is less complicated since the items are not bound to a LabVIEW project

■■ The programmatic API promotes scalability

■■ You can change I/O variable configuration settings while running an application, and configuration settings are
viewable on the block diagram

Figure 2.7. Use the I/O Variable Programmatic API

While the programmatic API offers several advantages, it does require more programming. The I/O Variable programmatic
API can be found in the LabVIEW functions palette under Data Communication»Shared Variable»I/O Variable.

When deploying Scan Engine I/O variables to a CompactRIO controller, note that these variables have the potential
to take up a significant portion of the CPU bandwidth. If you deploy a chassis in Scan Mode that physically contains
all the modules you want to use, it publishes a variable called PercentHWScanUtilization. This value tells you what
percentage of CPU bandwidth is dedicated to reading or writing I/O variables based on your scan time and deployed
hardware. Based on this, you have an idea of how much time can be dedicated to other processes.

Figure 2.8. Monitor the CPU bandwidth that is used for reading and writing to Scan Engine I/O
variables.

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When to Use Hybrid Mode
Using Scan Mode and LabVIEW FPGA at the same time on a target is known as Hybrid Mode. With this approach,
the modules you select to program directly with LabVIEW FPGA are removed from the I/O scan, and the remaining
modules communicate with the RIO Scan Interface. When you compile your LabVIEW FPGA VI, if any I/O modules
are configured to use Scan Mode, the necessary components of the RIO Scan Interface are included in the compile.
The result is a single bitfile that works with the Scan Mode features for modules configured to use Scan Mode as
well as your custom FPGA logic that communicates directly with the remaining I/O modules.

Figure 2.9. After activating Hybrid Mode, write an FPGA VI to interface with the module
and pass data to the real-time host.

In Hybrid Mode, you can continue using the RIO Scan Interface on some modules while programming others directly
on the FPGA. You can use the FPGA programming model to handle high-speed operations, inline processing,
waveform buffered acquisition, and certain modules that do not feature Scan Mode support. Activate FPGA
programming for a particular module by dragging and dropping the module project item from under the CompactRIO
chassis to under the FPGA target. By doing this, you can program the FPGA for custom code running in parallel with
the scan interface for other modules. You can access the FPGA I/O from the real-time VI by using either the FPGA
Host Interface Functions or User-Defined Variables.

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Figure 2.10. Activate FPGA programming for a particular module by dragging and dropping the
module project item from under the CompactRIO chassis to under the FPGA target.

You need to note a few important limitations when using Hybrid Mode. First, the compile time significantly increases
because the compiler has to combine the default RIO Scan Interface bitfile as well as the FPGA code that was
created into one bitfile. Secondly, the number of DMA channels that you can use in the FPGA code is reduced since
the Scan Engine uses two channels. Most FPGAs have three DMA channels, so most applications have only one
DMA channel left to use in the FPGA code.

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