0% found this document useful (0 votes)
41 views1 page

Digital Design: Mid Term Exam

The document outlines the questions for a midterm exam on digital design. It includes the following: 1) Draw circuit diagrams for a 3-bit register with load input, 5-bit shift left register, ripple counter that counts from 127 to 0, and 4-bit down synchronous counter. Also define flip flops, n-bit register, and n-bit counter. 2) Design a synchronous self-starting counter that counts the sequence 0,3,4,5,7 using T flip flops. Draw the state diagram and implement the counter using J-K flip flops. 3) Determine the count sequence and whether the given ripple counter is self-starting.

Uploaded by

Saif Salah
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
0% found this document useful (0 votes)
41 views1 page

Digital Design: Mid Term Exam

The document outlines the questions for a midterm exam on digital design. It includes the following: 1) Draw circuit diagrams for a 3-bit register with load input, 5-bit shift left register, ripple counter that counts from 127 to 0, and 4-bit down synchronous counter. Also define flip flops, n-bit register, and n-bit counter. 2) Design a synchronous self-starting counter that counts the sequence 0,3,4,5,7 using T flip flops. Draw the state diagram and implement the counter using J-K flip flops. 3) Determine the count sequence and whether the given ripple counter is self-starting.

Uploaded by

Saif Salah
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 1

Time Allowed: 1 HR

Mid term Exam CCE Students


Total Marks: 20
Digital Design 2060 - 2061

Solve the following Questions

First Question:

a. Draw (ONLY ) the following circuits:


 3-bit register with load input.
 5 bit shift left register.
 Ripple counter that counts from 127 to 0 at +ve edge.
 4 bit down synchronous counter.
b. Define:
 Flip flops.
 N-Bit register.
 N-Bit counter.

c. Design a synchronous self starting counter that counts with the sequence: use T Flip
Flop.
0,3,4,5,7 (10 marks)
Second Question:

A building consists of 2 stages with an underground stage ( ‫) مبىن من انقني م منو ار ىر ن‬, labeled
0, 1, 2. It is needed to design the counter circuit for its lifter (‫)مصعد‬, hence;

o Draw the state diagram for the counter count sequence.


(5 marks)
o Design the counter circuit using (J-K flip flop).

Third Question: A B C

For the shown ripple counter: Q j j Q j 1


Q
CP
o What is the count sequence? Q k 1 Q k Q k
1
o Is the counter self starting?

(5 marks)

With Best Wishes

You might also like