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Lecture08 Ee326 Output Stages

This document provides an overview of a lecture on output stages and power amplifiers. It discusses general considerations for power amplifiers, including driving loads, delivering large currents and voltages, and efficiency metrics. Specific output stage topologies covered include the emitter follower, push-pull stage, and improved push-pull stage. Analysis focuses on large-signal behavior, linearity, gain, and current flow in these stages. The document also announces an upcoming exam on the covered material.

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0% found this document useful (0 votes)
52 views

Lecture08 Ee326 Output Stages

This document provides an overview of a lecture on output stages and power amplifiers. It discusses general considerations for power amplifiers, including driving loads, delivering large currents and voltages, and efficiency metrics. Specific output stage topologies covered include the emitter follower, push-pull stage, and improved push-pull stage. Analysis focuses on large-signal behavior, linearity, gain, and current flow in these stages. The document also announces an upcoming exam on the covered material.

Uploaded by

Kini Family
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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ECEN326: Electronic Circuits

Spring 2022

Lecture 8: Output Stages and Power Amplifiers

Sam Palermo
Analog & Mixed-Signal Center
Texas A&M University
Announcements
• Homework 8 due Apr 28
• Exam 3 May 5
• 12:30 – 2:30
• Closed book w/ one standard note sheet
• 8.5”x11” front & back
• Bring your calculator
• Emphasis will be on Lectures 7-8
• Sample Exam3s posted on website

• Reading
• Razavi Chapter 14
2
Agenda
• General Output Stage Considerations
• Emitter Follower as a Power Amplifier
• Push-Pull Stage
• Improved Push-Pull Stage
• Large-Signal Considerations
• Heat Dissipation
• Efficiency and Power Amplifier Classes
3
Why Special Output Stages
or Power Amplifiers?
• Power amplifiers are necessary to efficiently drive
a load with high power

• Examples
• A cellphone may need 1W of power at the antenna
• Audio systems require tens to hundreds of Watts

• As ordinary voltage/current amplifiers are not


suited for efficiently supporting these power levels,
specialized output stages are necessary

4
Power Amplifier Characteristics
• Can drive a small “heavy”
load resistance
• Example: Speaker resistance Example : Delivering 1W to an 8 speaker
can be 4-16 2
V  1
Sinusoidal Pout   P    1W
• Delivers large current levels  2  RL
This results in a peak voltage
• Often in the hundreds of mA VP  4V
and a peak current
• Requires large voltage swings IP 
VP 4V
  500mA
RL 8
• Draws a large amount of
power from the supplies
• Dissipates a large amount of
power, and thus can get hot
5
Power Amplifier Performance Metrics
• Linearity or Distortion
• Audio amplifiers must have low distortion to
reproduce music with high fidelity
• Power Efficiency
Power Delivered to Load

Power Drawn from Supply

• Maximum Voltage Rating


• May require high power supplies
• Transistors must have sufficiently high
breakdown voltages
6
Agenda
• General Output Stage Considerations
• Emitter Follower as a Power Amplifier
• Push-Pull Stage
• Improved Push-Pull Stage
• Large-Signal Considerations
• Heat Dissipation
• Efficiency and Power Amplifier Classes
7
Emitter Follower Large-Signal Behavior:
Positive Half-Cycle

Here VBE is assumed to be 0.8V


due to the high current levels

 As Vin increases Vout also follows and Q1 provides more current


 No major issue with the input signal positive half-cycle

CH 13 Output Stages and Power Amplifiers 8


Emitter Follower Large-Signal Behavior:
Negative Half-Cycle

 However as Vin decreases, Vout also decreases, shutting off Q1


and resulting in a constant Vout
 The output signal clips at a minimum value of –I1RL
CH 13 Output Stages and Power Amplifiers 9
Example: Emitter Follower

• What are the input and output voltages when IC1


drops to 1% of I1?
Assume I S  5  1015 A
Vin  VBE  Vout
I 
Vin  VT ln  C1    I C1  I1 RL
 IS 
 0.325mA 
Vin  25.9mV ln  15 
 0.325mA  32.5mA8  387 mV
 5  10 A 
 0.325mA 
Vout  387 mV  25.9mV ln   258mV
 5  1015 A 

• At this current level, the VBE has dropped to 645mV


• For voltage levels much below 400mV, the output
will saturate at –IlRL = -260mV
CH 13 Output Stages and Power Amplifiers 10
Linearity of an Emitter Follower

 As Vin decreases the output waveform


will be clipped, introducing nonlinearity in
I/O characteristics

 Overall, the fixed I1 limits the output swing

CH 13 Output Stages and Power Amplifiers 11


Agenda
• General Output Stage Considerations
• Emitter Follower as a Power Amplifier
• Push-Pull Stage
• Improved Push-Pull Stage
• Large-Signal Considerations
• Heat Dissipation
• Efficiency and Power Amplifier Classes
12
Push-Pull Stage

 As Vin increases, Q1 is on and pushes a current into RL.


 As Vin decreases, Q2 is on and pulls a current out of RL.
 For positive Vin, Q1 shifts the output down and for negative Vin,
Q2 shifts the output up.
CH 13 Output Stages and Power Amplifiers 13
Overall I/O Characteristics of Push-Pull Stage

 Vin  VBE1, Vin VBE1



Vout   0,  VBE 2  Vin  VBE1
V  V
 in BE 2 , Vin   VBE 2

 However, for small Vin, there is a dead zone (both Q1 and Q2 are
off) in the I/O characteristic, resulting in gross nonlinearity
 The dead zone is from -|VBE2| ≤ Vin ≤ VBE1
CH 13 Output Stages and Power Amplifiers 14
Small-Signal Gain of Push-Pull Stage

RL
Av 
RL  re

 The push-pull stage exhibits a gain that tends to unity when


either Q1 or Q2 is on.
 When Vin is very small, the gain drops to zero.
CH 13 Output Stages and Power Amplifiers 15
Sinusoidal Response of Push-Pull Stage

Here VBE is assumed to be 0.6V


for small currents near crossover

 For large Vin, the output follows the input with a fixed DC
offset, however as Vin becomes small the output drops to zero
and causes “Crossover Distortion.”
CH 13 Output Stages and Power Amplifiers 16
Agenda
• General Output Stage Considerations
• Emitter Follower as a Power Amplifier
• Push-Pull Stage
• Improved Push-Pull Stage
• Large-Signal Considerations
• Heat Dissipation
• Efficiency and Power Amplifier Classes
17
Improved Push-Pull Stage

 With a battery of VB inserted between the bases of Q1 and Q2,


the dead zone is eliminated.

What should VB be so that at least one transistor is always on?


Q2 turns off when Vin   VBE 2
at this point we want Q1 on, or V1  VBE1
Thus, VB  V1  Vin  VBE1   VBE 2 

CH 13 Output Stages and Power Amplifiers


VB  VBE1  VBE 2 18
Implementation of VB

 Since VB=VBE1+|VBE2|, a natural choice would be two series diodes


 I1 in figure (b) is used to bias the diodes and Q1.
CH 13 Output Stages and Power Amplifiers 19
Example: Current Flow I

I out

When is I in  I1, assuming 1   2 ?


This occurs when I B1  I B 2 ,
Iin
which implies that I C1  I C 2
and that I out  0
Thus, this occurs when
Vout  0
CH 13 Output Stages and Power Amplifiers 20
Example: Current Flow II

• The offset between input and output is minimized


when the input is in the middle of the diodes

If VD1  VBE1 and VD 2  VBE 2 ,


then Vout  Vin
Assuming a balanced design with
Iin
I1  I 2 and I B1  I B 2 ,
then I in  0 when Vout  0

CH 13 Output Stages and Power Amplifiers 21


Addition of CE Stage

 A CE stage (Q4) is added to provide voltage gain from the input


to the bases of Q1 and Q2
 This push-pull circuit is often used in high-power output stages
CH 13 Output Stages and Power Amplifiers 22
Bias Point Analysis

With Vout  0 and assuming that


I C 3  I C 4 , VD1  VBE1, and VD 2  VBE 2
then the voltage in the middle of the diodes
VX  0, and we can redraw the top half of the circuit

Vout=0
VX=0

 IC 3   I C1 

VD1  VT ln 
  VBE1  VT ln 
 
 I S , D1   I S ,Q1 
 For bias point analysis, the circuit can
be simplified to the one on the right,  I S ,Q1 
I C1    IC 3

which resembles a current mirror  I S , D1 
 For a well-defined IS ratio, D1 can be
realized as a diode-connected transistor
CH 13 Output Stages and Power Amplifiers 23
Small-Signal Analysis - I

In order to derive the gain of the circuit, we can treat it as a two - stage amplifier
vout vN vout
 
vin vin vN
Assuming VA   and rD  0, the second stage can be viewed as 2 parallel emitter followers

vout RL RL
 
vN RL  re1 re 2 R  1
L
g m1  g m 2

CH 13 Output Stages and Power Amplifiers 24


Small-Signal Analysis - II

The gain of the first stage can be expressed as


vN
  g m 4 RN where
vin
RN  r 1 r 2   g m1  g m 2 r 1 r 2 RL

The overall gain is


 
 
vout vN vout R
    g m 4 r 1 r 2   g m1  g m 2 r 1 r 2 RL  L 
vin vin vN  1 
R 
 L g g 
 m1 m2 
vout
CH 13 Output Stages and Power Amplifiers
  g m 4 r 1 r 2  g m1  g m 2 RL 25
vin
Output Resistance Analysis

• For the output resistance, we do need to consider the finite rO of Q3 & Q4

1 rO 3 || rO 4
Rout  
g m1  g m 2 ( g m1  g m 2 )(r 1 || r 2 )
The picture can't be display ed.

 If β is low, the second term of the output resistance will rise,


which will be problematic when driving a small resistance.
CH 13 Output Stages and Power Amplifiers 26
Agenda
• General Output Stage Considerations
• Emitter Follower as a Power Amplifier
• Push-Pull Stage
• Improved Push-Pull Stage
• Large-Signal Considerations
• Heat Dissipation
• Efficiency and Power Amplifier Classes
27
Example: Biasing

Design Specs :
Common Emitter Av  5
Output Stage Av  0.8
with RL  8,  npn  2  pnp  100
and assume I C1  I C 2

1. From the output stage gain and I C1, 2


conditions we can find g m1, 2 and I C1, 2
vout RL
Av ,OS    0.8
vN R  1
L
g m1  g m 2
1
g m1  g m 2 
2
 
1
with I C1  I C 2  g m1  g m 2   1  250 mA V
4
and I C1  I C 2  6.5mA
CH 13 Output Stages and Power Amplifiers 28
Example: Biasing

2. From the Common Emitter gain condition we can find I C 4


Av ,CE   g m 4 RN   g m 4 r 1 r 2   g m1  g m 2 r 1 r 2 RL 
Using r 1  398, r 2  199, and RL  8
g m 4  7.52 mA V  I C 4  195A

However, this design


procedure neglects any
output swing specification!

CH 13 Output Stages and Power Amplifiers 29


Problem of Base Current

Note, this assumes that


IC3 is the same as IC4, Vout , p  156mV
which may not exactly 19.5mA
be the case due to the
different 1,2
 8

 195 µA of base current in Q1 can only support 19.5 mA of collector


current, insufficient for high current operation (hundreds of mA).
CH 13 Output Stages and Power Amplifiers 30
Modification of the PNP Emitter Follower

• Another output stage issue is that the Q2 PNP transistor typically have
low current gain () and low fT
• Using a composite transistor consisting of an emitter follower PNP (Q3)
and a common emitter NPN (Q2) allows for improved performance

Here Vin is the first


stage output (VN)

CH 13 Output Stages and Power Amplifiers 31


Modified PNP Emitter Follower
Gain & Output Resistance
Small-Signal Model

Writing a KCL at the output node


vout  vin v
 g m3 vin  vout   g m 2  g m3 vin  vout r 2  out  0
r 3 RL
As the Q3 collector current forms the Q2 base current
g m 2   2 g m3
1 1
vout RL Rout  
 1  2  1g m3
vin RL 
1  2  1g m3 
1 r 3
 2  1g m3 
r 3
Output resistance has been
CH 13 Output Stages and Power Amplifiers reduced by 2+1 factor 32
Modified PNP Emitter Follower
Input Resistance
Small-Signal Model

vin  vout vin  Av vin


iin  
r 3 r 3
vin r r 3
Rin   3 
iin 1  Av 1  RL
1
RL 
 2  1g m3

Rin  r 3  3  2  1RL

Input resistance has been increased by ~(2+1) factor


CH 13 Output Stages and Power Amplifiers 33
Additional Bias Current

 Q2 is often a large transistor to support the output current


levels, resulting in large base capacitance
 I1 is added to the base of Q2 to provide an additional bias
current to Q3 so the capacitance at the base of Q2 can be
charged/discharged quickly
CH 13 Output Stages and Power Amplifiers 34
Example: Minimum Vin

• There is a minimum Vin for which the effective emitter follower


transistors remain in active mode
• Here we conservatively assume for active mode we need a min. VBC=0V
Simple PNP Emitter Follower Modified PNP Emitter Follower

Min Vin≈0 Min Vin≈VBE2


Vout≈|VEB2| Vout≈|VEB3|+VBE2

• The modified PNP emitter follower has a reduced input range by VBE2
CH 13 Output Stages and Power Amplifiers 35
HiFi Design

vout 1 1 R
vout    1 1
  g m 4 r 1 r 2  g m1  g m 2 RL vin K R2 R2
vin R1  R2
• As gm1 and gm2 vary • Placing the output stage in a
dramatically during large negative feedback loop allows for
signal operation, the circuit a more constant gain, and thus
displays nonlinear distortion better linearity
CH 13 Output Stages and Power Amplifiers 36
Short-Circuit Protection

• Excessive output stage current


can result if the output is
shorted to ground, damaging
the circuit

• Qs and r are used to “steal”


some base current away from
Q1 when the output is
accidentally shorted to ground,
preventing short-circuit damage

• Drawbacks
• r increases output resistance
• Voltage drop across r reduces
maximum output swing

CH 13 Output Stages and Power Amplifiers 37


Agenda
• General Output Stage Considerations
• Emitter Follower as a Power Amplifier
• Push-Pull Stage
• Improved Push-Pull Stage
• Large-Signal Considerations
• Heat Dissipation
• Efficiency and Power Amplifier Classes
38
Emitter Follower Power Rating

The average power dissipated by Q1 can be calculated by integrated the


current - voltage product over a complete period and dividing by the period time.

1 T
Pav 
T 0
I CVCE dt

1 T V sin t 
Pav  0  I1  P VCC  VP sin t dt
T  RL 
0
0 VCCVP sin t VP2 sin 2 t
1 T
 0 I1VCC  I1VP sin t   dt
T RL RL
1 T VP2
 0 I1VCC  1  cos 2t 
 V  T 2 RL
Pav  I1VCC  P 
 2  V
I1  P
Pav ,max  I1VCC VP2 
RL V 
 I1VCC    I1VCC  P 
2 RL  2 

 Maximum power dissipated across Q1 occurs in the absence of


a signal.
CH 13 Output Stages and Power Amplifiers 39
Example: Current Source Power Dissipation

• The power dissipated by the I1 current source is also important, as it will


ultimately need to be realized at the transistor level also

1 T 1 T
PI1  0
I V
1 out  VEE dt  0
I1 VP sin t  VEE dt
T T
1 T 0
  I1VP sin t  I1VEE dt
T 0

PI1   I1VEE

• Note that the I1 power is positive, as VEE is a negative supply

CH 13 Output Stages and Power Amplifiers 40


Push-Pull Stage Power Rating

• Assuming a symmetric design, the power ratings of Q1 and Q2 are the


same and can be computed by integrating over a half-period.
CH 13 Output Stages and Power Amplifiers 41
Push-Pull Stage Power Rating

1 T2 1 T  
VCC  VP sin t  VP sin t dt
2
T 0 T 0
Pav  V I
CE C dt 
 RL 
1 T 2 VCCVP VP2 2
 0 sin t  sin tdt
T RL RL
0
1 T 2 VCCVP 1 T 2 VP2
 0 sin tdt  0 1  cos 2t dt
T RL T 2 RL
VCCVP VP2
 
RL 4 RL

VP  VCC VP 
Pav    
RL   4 
2VCC
Maximum power occurs with VP 

2
VCC
Pav ,max  2
 RL
CH 13 Output Stages and Power Amplifiers 42
Example: Push-Pull Pav

VP  VCC VP 
Pav     If Vp = 4VCC/π → Pav=0
RL   4 
Impossible since Vp cannot go
above supply (VCC)
CH 13 Output Stages and Power Amplifiers 43
Heat Sink

 Heat sink, provides large surface area to dissipate heat from


the chip.
CH 13 Output Stages and Power Amplifiers 44
Thermal Runaway

• For a constant IC, VBE has a negative-


to-absolute-temperature (NTAT)
coefficient of approximately -2mV/K
• Conversely, if the push-pull output
stage is biased with a constant voltage,
the current will increase with
temperature
• This increased current results in more
heat (higher temperature), and thus
more current
• This positive feedback loop is called
thermal runaway and can result in
CH 13 Output Stages and Power Amplifiers
transistor damage 45
Thermal Runaway Mitigation

• Assuming that Q3 and Q4 have relatively constant bias currents with


temperature (using good current mirror techniques), the diode voltages
drop with temperature Diode Voltages
I D1 I I I
VD1  VD 2  VT ln  VT ln D 2  VT ln D1 D 2
I S , D1 I S ,D 2 I S , D1I S , D 2
Transistor VBE Voltages
I C1 I I I
VBE1  VBE 2  VT ln  VT ln C 2  VT ln C1 C 2
I S ,Q1 I S ,Q 2 I S ,Q1I S ,Q 2
From a KVL, these voltage pairs are the same
I D1I D 2 I C1 I C 2
VT ln  VT ln
I S , D1I S , D 2 I S ,Q1I S ,Q 2
I D1I D 2 I I
 C1 C 2
I S , D1I S , D 2 I S ,Q1I S ,Q 2

 Using diode biasing prevents thermal runaway since the currents in Q1


and Q2 will track those of D1 and D2 as long as their Is’s track with
CHtemperature.
13 Output Stages and Power Amplifiers 46
Agenda
• General Output Stage Considerations
• Emitter Follower as a Power Amplifier
• Push-Pull Stage
• Improved Push-Pull Stage
• Large-Signal Considerations
• Heat Dissipation
• Efficiency and Power Amplifier Classes
47
Power Amplifier Efficiency
• Power amplifier efficiency is critical because
PAs draw a significant amount of power
from the supply voltages

• Power amplifier efficiency is the ratio of the


average power delivered to the load over
the total power consumed from the supplies
Power Delivered to Load Pout
 
Power Drawn from Supply Pout  Pckt
48
Emitter Follower Efficiency
The average power delivered to the load is
VP2
Pout 
2 RL
The average power consumed by Q1 is
 V 
PQ1  I1VCC  P 
 2 
The average power consumed by I1 is
PI1   I1VEE  I1VCC with VEE  VCC
Thus the total average circuit power is
 V   V 
Pckt  I1VCC  P   I1VCC  I1 2VCC  P 
 2   2 

VP2 • The emitter follower output


2 RL stage only has a peak
The Emitter Follower Efficiency is  EF  2
VP  VP  efficiency of 25% as VP
 I1 2VCC  
2 RL  2  goes to VCC
V
with I1  P   EF  P
V • Note, this can’t actually be
RL 4VCC achieved, as we need some
VCE and voltage across I1
49
Emitter Follower Efficiency Example
• What if the emitter follower is designed to
deliver Vp, but only operates with Vp=VCC/2?
Now the average power delivered to the load is
2
 VP 
 
 2  VP2
Pout  
2 RL 8 RL
The total average circuit power becomes
 VP  2VP2 VP2 V
Pckt  I1 2VCC     with I1  P and VCC  VP
 4  RL 4 RL RL
VP2
8 RL 1
 EF  2 
VP 2VP2 VP2 15
 
8 RL RL 4 RL

• Now the efficiency drops to only 6.7%


50
Push-Pull Stage Efficiency

The average power delivered to the load is


VP2
Pout 
2 RL
Both Q1 and Q2 consume an average power of
VP  VCC VP 
PQ1, 2    
RL   4 

• The push-pull output stage


has a peak efficiency of
2
78.5% as VP goes to VCC
VP
2 RL
• Note, this can’t actually be
The Push - Pull Stage Efficiency is  PP  2 achieved, as we need some
VP 2VP  VCC VP 
    VCE across both Q1 and Q2
2 RL RL   4 
V • Also, we are excluding the
 PP  P
4VCC input bias stage
51
Total Push-Pull Stage Efficiency
• Assume that I1=I2 and that they are chosen
to allow a peak swing of VP
In order to support a peak swing of VP
VP
I1 
RL
The input bias stage power is
2VCCVP
RL
Thus the total push - pull stage efficiency is
VP2
2 RL
 PP 
2VPVCC 2VCCVP

RL RL

 
 
1  VP 
 PP 
4  VCC  VP 
   
 
52
Class A Power Amplifiers
• Each transistor is on for the entire cycle
• Emitter follower is a Class A power amplifier

• Display high linearity, but low efficiency


(25% maximum)
53
Class B Power Amplifiers
• Each transistor conducts for half the cycle
• Simple push-pull stage is a Class B power amp

• Display high efficiency, but low linearity


• Bad crossover distortion
54
Class AB Power Amplifiers
• Each transistor conducts for slightly more than a
half-cycle
• Improved push-pull stage is a Class AB power amp

• Compromise between Class A and B


• Good distortion at slightly degraded efficiency
• Many other PA classes exist (C, D, E, …) and are
often studied in grad-level RF circuit design classes
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Thanks for the fun semester!!!

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