Digital Logic Notes
Digital Logic Notes
• Digital signal
• Combinational & Sequential logic Circuits
• Clock Signal
• Boolean algebra & logic gates
• TTL & CMOS Families
• Flip Flop & Resister
• Decoder & Encoder
• Multiplexer & Demultiplexer
• Application
Digital Signal
• Analog versus digital system Analog system:
process information that varies continuously,
time varying signals that take any value across
continuous range
• Analog versus digital system Digital system: use
discrete quantities to represent information,
distinct or separated quantities
Advantages of digital signal
• Easy of design
• Reproducibility of result
• Flexibility
• Functionality
• Programmability
• Speed
• Economy
Logic level
• Binary logic used in digital system
• Assumes only TWO values: HIGH or LOW
• These two levels can represent two numerals 1
and 0 of the binary system
• These two logic states: TRUE and FALSE of
the logic operations
Logic Circuit
Logic Circuit
2. OR
3. AND
4. OR
Realization of Basic Gates Using
Universal NOR Gates
1. NOT (Inverter)
2. AND
3. OR
Boolean Expression (Law)
Dorgan's Law
Prove that
Logic Families
• Bipolar – diode logic (DL)
• Resistor transistor logic (RTL)
• Diode transistor logic (DTL)
• Transistor transistor logic (TTL)
• Emitter couple logic (ECL)
• Current mode logic (CML)
• Integrated injection logic (IIL or I2L)
• MOS – PMOS, NMOS, CMOS
• Bi-MOS – using both bipolar and MOS
Basic Characteristics of ICs
• Propagation delay
• Power dissipation
• Fan in and fan out
• Noise immunity
• Power supply requirement
• Operating temperature
• Current and voltage parameters
Electrical Characteristics
Logic Level & Voltage Range
• Typical acceptable voltage ranges for positive logic 1 and logic
0 are shown below
• A logic gate with an input at a voltage level within the
indeterminate‟ range will produce an unpredictable output
level.
Propagation Delay Time
• Propagation delay is the time required for a digital
signal to travel from the input(s) of a logic gate to
the output.
• It is measured in microseconds (μs), nanoseconds
(ns), or picoseconds (ps).
• Propagation delay is important because it has a
direct effect on the speed at which a digital
device, such as a computer can operate. This is
true of memory chips as well as microprocessors.
Propagation Delay Time
• A measure of how long it takes for a gate to
change state. Ideally, should be as short as
possible.
• tPHL - the time it takes the output to go from a
high to a low
• tPLH - the time it takes the output to go from a
low to a high
• Average Propagation Delay
tPHL + tPLH
𝑡𝑝 =
2
Fan-In
• The fan-in defined as the maximum number of
inputs that a logic gate can accept.
• If number of input exceeds, the output will be
undefined or incorrect.
• It is specified by manufacturer and is provided
in the data sheet.
• gates with large fan-in are
bigger and slower
Fan Out
• The fan-out is defined as the maximum
number of inputs (load) that can be connected
to the output of a gate without degrading the
normal operation.
• gates with large fan-out
are slower
Clock Signal
• A digital clock signal is basically a square wave
• It has only two levels, one is zero and the other one is high, which
the high level can be different according to the requirement of the
circuit.
• Digital circuits always have some input and generate digital outputs
accordingly.
• Some digital circuits are not clocked, meaning that the input applied
to the circuit flows through digital gates without any timing or
storage and generates the output.
• It only takes a time equal to the propagation delay time to reach the
output.
• A clock plays very important role as it is used to open
and close digital paths, allow or stop a process and in
general provide timing for the circuit.
• You can compare a clock with the traffic lights. They
stop and allow the traffic in a timely manner so that the
traffic can flow smoothly with the least delays.
• If you just let the traffic through there will be a big jam
and the output is unpredictable.
• Clocks are especially used for digital circuits with
feedbacks and also to avoid glitches in a circuit.
• What is a glitch? A glitch is an unpredictable output.
Say you have some input and for those you expect a
known output, but before the output settles to what you
expect, you might have one or more transitions that are
not suppose to be there. These are called glitches.
Characteristics of TTL logic
• Power dissipation is usually 10 mW per gate.
• Propagation delays are 10 nS when driving a
15 pF/400 ohm load.
• Voltage levels range from 0 to VCc where Vcc
is typically 4.75V - 5.25V. Voltage range 0V
- 0.8V creates logic level 0.Voltage range 2V -
Vcc creates logic level 1.
Characteristics of CMOS logic
• Dissipates low power: The power dissipation is dependent
on the power supply voltage, frequency, output load, and
input rise time. At 1 MHz and 50 pF load, the power
dissipation is typically 10 nW per gate
• Short propagation delays: Depending on the power
supply, the propagation delays are usually around 25 nS to
50 nS.
• Rise and fall times are controlled: The rise and falls are
usually ramps instead of step functions, and they are 20 -
40% longer than the propagation delays.
• Noise immunity approaches 50% or 45% of the full logic
swing. Levels of the logic signal will be essentially equal to
the power supplied since the input impedance is so high.
Comparison Between TTL & COMS
Sr. No. Parameter CMOS logic TTL logic
Flip Flop
SR JK D T
SR Flip-Flop
• The SR flip-flop, also known as a SR Latch, can be considered as
one of the most basic sequential logic circuit possible. This simple
flip-flop is basically a one-bit memory bi-stable device that has two
inputs, one which will “SET” the device (meaning the output = “1”),
and is labelled S and one which will “RESET” the device (meaning
the output = “0”), labelled R.
• Then the SR description stands for “Set-Reset”. The reset input
resets the flip-flop back to its original state with an output Q that
will be either at a logic level “1” or logic “0” depending upon this
set/reset condition.
• SR flip-flop is to connect together a pair of cross-coupled 2-
input NAND gates
• This device consists of two inputs, one called the Set, S and the
other called the Reset, R with two corresponding outputs Q and its
inverse or complement Q (not-Q)
SR Flip-Flop
Truth Table of SR Flip Flop
Shift Register
• A simple Shift Register can be made using only
D-type flip-Flops, one flip-Flop for each data bit.
• The output from each flip-Flop is connected to
the D input of the flip-flop at its right.
• Shift registers hold the data in their memory
which is moved or “shifted” to their required
positions on each clock pulse.
• Each clock pulse shifts the contents of the register
one bit position to either the left or the right.
• The Shift Register is another type of sequential
logic circuit that can be used for the storage or the
transfer of binary data
• two binary numbers before they are added
together, or to convert the data from either a serial
to parallel or parallel to serial format.
• Shift register IC‟s are generally provided with
a clear or reset connection so that they can be
“SET” or “RESET” as required.
• Generally, shift registers operate in one of four
different modes with the basic movement of data
through a shift register
Types of Shift Register
• Serial-in to Parallel-out (SIPO)