Lecture Notes

EE-215 Electronic Devices and Circuits

Operation in the Saturation Mode

• for a npn BJT to operate in the active mode,

– the EBJ is forward biased and

– the CBJ is reverse biased i.e vCB ≥ 0

• but as a pn junction does not effectively becomes forward biased

– until the forward voltage across it, exceeds the cut-in voltage of approximately 0.5V

• the cut-in voltage of the EBJ is typically 0.5V,

– but as the CBJ area is 10 to 100 times the EBJ area

– the cut-in voltage of the CBJ will be lesser around typically 0.4V
• figure shows plot of i = ISevBE /VT in blue and i = (100 × IS)evBC/VT in red

• from the figure cut-in voltage for CBJ is ≈ 0.4V

• =⇒ the active mode operation of an npn transistor still continues

• the active mode operation of an npn transistor still continues for negative vCB down to
approxi- mately −0.4V

• thus for active mode operation for an npn BJT

– EBJ is forward-biased and CBJ is reverse-biased =⇒ vCB ≥ −0.4V

• beyond vCB = −0.4V i.e. for vBC > 0.4V , the CBJ begins to

– conduct sufficiently and thus the transistor leaves the active mode,
– and enters the saturation mode of operation, where iC decreases.

• in case of active mode

– EBJ is forward biased, electrons flow from the emitter to the base
– and holes from the base to the emitter
– these electrons will diffuse across the thin base region and reach the depletion region,
– experiences the electric field across the space charge region and move into the collector

• in case of saturation mode

– both EBJ and CBJ are forward biased

• Note that here we augment the π − model for active region, with the forward-conducting
CBJ diode DC

• Apply KCL at collector terminal

– iC = ISevBE /VT − ISCevBC/VT

• applying KCL at base terminal

IS vBE /VT
– iB = βe + ISCevBC/VT
– now we have an additional hole current term because of the forward biased CBJ i.e.
ISCevBC/VT

v /V − v /V
ISe BE T ISCe BC T
• divide 1st eq by 2nd =⇒ iC
=
iB IS v /V v /V
β e BE T +I SCe BC T

• this ratio, iC
iB
is called f orced β and is denoted as β f orced

– (because iC
iB
can be set to any desired value lower than β by adjusting vBC)

• thus β f orced < β and β f orced can be reduced by increasing vBC i.e. by driving the transistor
deeper into saturation

• the collector-to-emitter voltage of a saturated transistor can be given as

– vCEsat = vC − vE = vCB − vEB

– vCEsat = −vBC + vBE ∵vCB = −vBC and vEB = −vBE
– vCEsat = vBE − vBC

• as vBE ≈ 0.7V in active region and vBC ≈ 0.4V at the start of saturation region
 • =⇒ vCEsat = 0.7 − 0.4 = 0.3V at the start of saturation region

• ultimately the current iC is reduced to zero

• =⇒ iC = ISevBE /VT − ISCevBC/VT = 0 =⇒ ISevBE /VT = ISCevBC/VT

• (vBE − vBC) /VT = ln IISC

S
• vBE − vBC = VT ln IISC
S
• (vB − vE ) − (vB − vC) = VT lnI ISC
S
• −vE + vC = VT ln IISC =⇒ vCE = VT lnI ISC
S S
• if CBJ area is 100 times the EBJ area =⇒ ISC
IS
= 100

• for ISC
I
= 100 =⇒ vCE = VT ln 100 = 0.115V
S
• for ISC
I
= 50 =⇒ vCE = VT ln 50 = 0.098V
S

Exercise 6.8

• Use Eq. (6.14) i.e. iC = ISevBE /VT −ISCevBC/VT to show that iC reaches zero at VCE = VT ln(ISC/IS).

• Calculate VCE for a transistor whose CBJ has 100 times the area of EBJ.

Solution

• iC = ISevBE /VT − ISCevBC/VT = 0

• =⇒ ISevBE /VT = ISCevBC/VT

evBE
= ISC
=⇒ e(vBE −vBC )/VT = ISC
• =⇒
/VT

evBC/VT IS IS

• (vBE − vBC) /VT = ln IISC

S
• vBE − vBC = VT ln IISC
S
• (vB − vE ) − (vB − vC) = VT lnI ISC
S

• vB − vE − vB + vC = VT lnIISC
S
• −vE + vC = VT ln IISC
S
• =⇒ vCE = VT ln ISC
I
S
• As CBJ area is 100 times the EBJ area =⇒ ISC = 100 × IS

• =⇒ ISC
I
= 100 =⇒ vCE = VT ln 100 = 0.11513V = 115.13mV
S
Exercise 6.9

• Use Eqs. (6.14), (6.15), and (6.16) to show that a BJT operating in saturation with VCE = VCEsat
has a forced β given by
eVCEsat/VT − ISCIS
β =β f orced
β ISC
eVCEsat/VT + IS

• Fing β f orced for β = 100, ISC/IS = 100, and VCEsat = 0.2V

Solution

• eq6.14 =⇒ iC = ISevBE /VT − ISCevBC/VT

• eq6.15 =⇒ iB = IS
β evBE /VT + ISCevBC/VT

• Eq6.16 =⇒ β = iC

f orced iB saturation

• β = iC
f ISevBE /VT −ISCevBC/VT
iB saturation = IS v /V
orced e BE T
β
+ISCevBC/VT

BJT: Device Structure and Physical Operation

Solution: Exercise 6.9

• β f orced IISevBE /VT −ISCevBC/VT

= S evBE /VT +I evBC/VT
SC
β

• β f orced ISevBE /VT −ISCevBC/VT

ISevBE /VT +β ISCevBC/VT
=β
• divide numerator and denominator by evBC/VT
v /V
!
IS e vBE /VT −ISC
• β f orced = ev BC/V
BE T
T
IS ev / +β ISC
β eVBC
T
v −v
!
BE BC
ISe VT
• βf vBE −vBC
orced
= ISe VT +β ISC

• As vBE − vBC = (vB − vE ) − (vB − vC) = vB − vE − vB + vC = −vE + vC = vC − vE = vCE

vCE !
• =⇒ f orced = ISe T −ISC
V
vCE

β β ISe VT +β ISC
Solution: Exercise 6.9
vCE
!
VT −I
• β f orced = ISe
vCE
SC

β ISe VT +β ISC

• divide numerator and denominator by IS

 vCE 
I
e VT − SC
• =⇒ β f orced =β vCE
I S

β
e VT + ISC
IS

• when β = 100, ISC/IS = 100, and VCEsat = 0.2V

• β f orced e0.2/25e−3−100
e0.2/25e−3+(100)(100)
= 100 = 22.194