8051 Microcontroller

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8051

Microcontroller
Microprocessor Based System
CPU
External RAM, ROM, I/O
(No internal RAM, ROM, I/O ports in the CPU)

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Microcontroller
 A smaller computer on a CHIP
 On-chip RAM, ROM, I/O Ports, Timer, Serial
Controller…
 Example: Motorola’s 6811, Intel’s 8051,
Atmel 32

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Microprocessor vs.
Microcontroller
Microprocessor Microcontroller
 CPU is stand-alone,  CPU, RAM, ROM, I/O and
RAM, ROM, I/O, timer are timer are all on a single
separate chip
 Designer can decide on  Fixed amount of on-chip
the amount of ROM, ROM, RAM, I/O ports df
RAM and I/O ports. dfdfdfdfdfdfdf
 Expansive  Not Expansive
 Versatility  Single-purpose
 General-purpose  Special Purpose.

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C based Embedded
Systems
 Special purpose computer system usually
completely inside the device it controls
 Has specific requirements and performs pre-
defined tasks
 Cost reduction compared to general purpose
processor
 Different design criteria
 Performance
 Reliability
 Availability
 Safety

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Embedded Systems
Examples

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Examples

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Harvard Architecture

In Harvard Architecture the data and


instructions are stored in separate memory
units each with their own bus.
Advantages:
 Speeding up the data transfer rate,
 Permits the designer to implement different
bus widths and word sizes for program and
data memory space.

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8051 CPU Operation
1.Features
2.Pin Diagram
3.Block Diagram

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8051 Microcontroller
 Intel introduced 8051, referred as MCS-
51, in 1981.
 The 8051 is an 8-bit processor
 The CPU can work on only 8 bits of data at a
time
 The 8051 became widely popular after
allowing other manufactures to make
and market any flavor of the 8051.

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Features of 8051
8 bit Processor
4KB Internal ROM
128 Bytes Internal RAM
Four 8 BIT I/O PORTS (32 I/O LINES)
Two 16 Bit Timers/Counters
On Chip Full Duplex UART for Serial Communication
5 Vector Interrupts ( 2 External, 3 Internal -
Timer0,Timer1,Serial)
On Chip Clock Oscillator
16 bit Address bus
64k External Code Memory
64k External Data Memory
16-bit program counter to access external Code Memory and
16 bit Data Pointer to access external Data Memory
128 user defined flags
32 General Purpose Registers each of 8 bits

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8051 Family
 The 8051 is a subset of the 8052
 The 8031 is a ROM-less 8051
 Add external ROM to it
 You lose two ports, and leave only 2 ports for I/O
operations

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Pin Diagram

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Block Diagram of 8051

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Separate read instructions for external data and code memory.
Pin Description of the 8051
 8051 family members (e.g., 8751, 89C51,
89C52, DS89C4x0)
 Have 40 pins dedicated for various functions such
as I/O, RD, WR, address, data, and interrupts.
 Come in different packages, such as
 DIP(dual in-line package),
 QFP(quad flat package), and
 LLC(leadless chip carrier)
 Some companies provide a 20-pin version of
the 8051 with a reduced number of I/O ports
for less demanding applications

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XTAL1 and XTAL2
 The 8051 has an on-chip oscillator but
requires an external crystal to run it
 A quartz crystal oscillator is connected to inputs
XTAL1 (pin19) and XTAL2 (pin18)
 The quartz crystal oscillator also needs two
capacitors of 30 pF value
 The original 8051 operates at 12 MHZ

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XTAL1 and XTAL2 …..
 If you use a frequency source other than a
crystal oscillator, such as a TTL oscillator:
 It will be connected to XTAL1
 XTAL2 is left unconnected

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RST
 RESET pin is an input and is active high (normally
low)
 Upon applying a high pulse to this pin, the
microcontroller will reset and terminate all activities
 This is often referred to as a power-on reset
 Activating a power-on reset will cause all values in
the registers to be lost

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EA’
 EA’, “external access’’, is an input pin
and must be connected to Vcc or GND
 The 8051 family members all come with
on-chip ROM to store programs and also
have an external code and data memory.
 Normally EA pin is connected to Vcc
(Internal Access)
 EA pin must be connected to GND to
indicate that the code or data is stored
externally.

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PSEN’ and ALE
 PSEN, “program store enable’’, is an
output pin
 This pin is connected to the OE pin of the
external memory.
 For External Code Memory, PSEN’ = 0
 For External Data Memory, PSEN’ = 1
 ALE pin is used for demultiplexing the
address and data.

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I/O Port Pins
 The four 8-bit I/O ports P0,
P1, P2 and P3 each uses 8
pins.
 All the ports upon RESET
are configured as output.

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Port 0
 Port 0 is also designated as AD0-AD7.
 When connecting an 8051 to an external
memory, port 0 provides both address
and data.
 The 8051 multiplexes address and data
through port 0 to save pins.
 ALE indicates if P0 has address or data.
 When ALE=0, it provides data D0-D7
 When ALE=1, it has address A0-A7

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Port 1 and Port 2
 In 8051-based systems with no
external memory connection:
 Both P1 and P2 are used as simple
I/O.
 In 8051-based systems with
external memory connections:
 Port 2 must be used along with P0 to
provide the 16-bit address for the
external memory.
 P0 provides the lower 8 bits via A0 –
A7.
 P2 is used for the upper 8 bits of the
16-bit address, designated as A8 –
A15, and it cannot be used for I/O.
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Port 3
 Port 3 can be used as input or
output.
 Port 3 has the additional
function of providing some
extremely important signals

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General Block Diagram
of 8051
Interrupt 4K 128 B Timer 0
Control ROM RAM Timer 1

CPU

Bus Serial
OSC 4 I/O Ports
Control Port

TXD RXD
P0 P1 P2 P3
8051 Memory Structure

External

External
60K

64K 64K

SFR
EXT INT 4K
128
EA = 0 EA = 1 Internal
Program Memory Data Memory
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8051 RAM with addresses

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8051 Register Bank
Structure

Bank R0 R1 R2 R3 R4 R5 R6 R7
3
Bank R0 R1 R2 R3 R4 R5 R6 R7
2
Bank R0 R1 R2 R3 R4 R5 R6 R7
1
Bank R0 R1 R2 R3 R4 R5 R6 R7
0

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8051 Register Banks with
address

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8051 Programming Model

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8051 Addressing Modes
 The CPU can access data in various ways,
which are called addressing modes

1. Immediate
2. Register
3. Direct
4. Register indirect
5. External Direct

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