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Dco Notes

The document discusses digital logic circuits such as logic gates, decoders, adders, and their implementation using NAND and NOR gates. It explains basic logic gates like AND, OR, NOT, XOR and XNOR gates through their truth tables. Combinational circuits for addition are implemented using half adders and full adders. Parallel adders are constructed using half adders and full adders. Decoders are discussed as combinational circuits that convert binary inputs to selected outputs. A 3x8 decoder and 4x16 decoder are given as examples to decode 3-bit and 4-bit binary inputs to 8 and 16 outputs respectively. Implementation of full adders using decoders is also explained.
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0% found this document useful (0 votes)
135 views21 pages

Dco Notes

The document discusses digital logic circuits such as logic gates, decoders, adders, and their implementation using NAND and NOR gates. It explains basic logic gates like AND, OR, NOT, XOR and XNOR gates through their truth tables. Combinational circuits for addition are implemented using half adders and full adders. Parallel adders are constructed using half adders and full adders. Decoders are discussed as combinational circuits that convert binary inputs to selected outputs. A 3x8 decoder and 4x16 decoder are given as examples to decode 3-bit and 4-bit binary inputs to 8 and 16 outputs respectively. Implementation of full adders using decoders is also explained.
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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all of
gate NOR and 4ofe WAND
y
=A A
dnsesslem
Laur
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A A+ "
law
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law AND ww)
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= c (6.c) A B)"c
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Boeleam in
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n
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deal that
Date:
no.: Page
Tinpati
Pago no..
Dalo:

AND 9ale
A.B
B

OR gate

NOI
gale

XOR gate
A

A A6 + AB
B
A.6

A: A.B A+A.B AB-B= A.8+B


- (A+ (Ãt B) -(A+8)-(8+8)
=A+B

(A+B). (A+ B) = + A+B


A Bt
Tinpati
Page no.:
Date:II

XNOR gate A

A.B AB+ ÄB

AB
A+B

A8 + AB = AB . =A+B)(A+B)
AB +AB

inatlemeatatia uing gate


AND gate
A

B
B

A+B A.B A-B

NOR
gale A+B= HB

A A+B A+ 8
B

(u NOT Gate
A
-Tinupati
Page no.:
Date:

w) XOR
gate

XNOR
X

Jhe becuct ed al liRuau, aithea ith

ex AB, AB' ABA8


aateA
Whe sm s ll iteaala,ithea Asith
kneun as marten Lanmlemeat
At B
A+ 8
AB
Tirupati
Page no.:
Date:

Min tem Mar tem

tim deignation
mo N+y+L Mo
M
M2 M2
m3 Ma
my Mu
-
-| Ms 2 t y t z' Ms
Me
+y'+x' Mz

t i sed to
3, 4 arialler
AAhaut alqebua theouna.
A B
dvaiale

8
lo

4 vaiaeles

10
Tirupati
Page no.:
Date: ||

F= 2(,4, 5, 6, )
lo
A+8'c

F = E (3,4, 6, 4)
BC+ AC

4
tull adder ’
Page no.:
Tirupati
Date: //

lladder
In
XOR
32-

FA
Cn Cany
-ol y+y z t 1Z

| I4+z(xDy)

yy+ y2

72+
y+
cosinational ieit
Haly adde and full. adder ig NAND

Sun

NAND ny NOR5
NAND 5 NOR-+
4
Tirupati
Page no.
Date: / I

Cin HA

Out

2y+ (1¬y)

Paralel Adder i- (onatntnal ciuit


dlauential cineit
Pavallel Adder - B2

Cs Cu
FA

tutytfAT
S4 S2 S

adde the addihen of


Q ene bit no and
adde digital cicuit apabe st finding aitmati
Tirupati
Page no.:
Date: | |

Bum
Binary
oOololooOoo
oOoO|Oo
Ded m
Se Su S Si

lo

l2
13

16
Tinupati
Page no.:
Date:

dt cenuLent Runahy coded


to the maximm 2 outhut
Do
D

3 X8

DecodeY
Do

D
D+

Truth table oooooolo


Do Di D4 Da Du Ds

Octa ex 3X8
Uewerter
Aom binay
-Tirnpati
Page no.:
Date:

Create full addex


adder uing
Decorde.
S=
C 5(3, s,
64) ’

D3
Du

D<

ptert comimeutweythenhgw do the


NOR gate
a deeod er wlh
Enable ingut Dy uput i
4 X16 decoder
ing. 3x decoder

3X8

total total
16

nput De Qutput
2 3X8

DIs

at a tme
the OnyI
seend ene. decodeY ither 1st
Tirupati
Page no.:
Date:

Demutiplese 1X2

Do
D,
D2
D3

iSi S.,Sa’ Seled uines

Encoder’ ReveYSe 0t decader,


2nput
liner
2to n
encadey n output

8X3 enceder 2° to 3 encode's octal to


Truth table of 8X3 encader
Bàanyi
Do lo

at a ime enly input can be high


Page no.: Tirpati
Date:

y, 2, 3, 6,

Do

D
y= D2t D+Dst D:
Dy
D5T
D
X= D+D3t Ds+ D+

Do
o
Ds Da
If
tHere
high ex
be
D 6 l be ignared and
and jut

ishen D&1 shen


YOAt all .
Do 0 and
then
t isXe u9hich s not in
thutth tabte ushich is limita ten
en coder
Piomty
Made to emove the limitatten
4 nomal encode.
V’ Valid Output enede
iatt au f J input
input high.
higa.
Tirupati
Page no.:
Date: |

X ’ dent carearbe 1/o


Do Di

X
X
X

DoD,
Dad

2 D3t D2

DoD,

D,b

D2
DB

See 8X3, 4 X2 See all


Tiypati
Page no.:
Date:|/

Multtplexer Aso knoon u dato'seletoY

+ op ne
inputunes
1
nselecne redire cttng

n 2
So S1Y

Ii

II;

So

y Lo Si 52 t Ii S, Só t I2 5, Sa t Ls.So

Lo

I
Tirypati
Page no.:
Date: |/

F(A,6, ) =i,3, 5,6)


n+l>o of yaiable
A n no f elect ue

sutput
2
3
1

AB+ ÃC Not needed

la

Impl ementatfontable both select ’


both net
DDl
I I2 I3 select’o
A 2
A 4 6
A

* We have seleted BC as selet ies

A I;

B
C.

-
C C
+oo
TOo
o
3
I2, To
B A
Line
selet Cue B
uhee
A
6) U,
l,2, ={ f(A,
) 8,
B
A
I,
4x1
C C
C
H(o
Jo
nput Cand
ct
sele 8and A
|I Date:
no.: Page
Tinypati
Tirupati
Page no.:
Date: |/

f (ABe D) > o,l, 3, 4, Bi 9,15)


BCD ’ select line
A A
Qutput
Io

2 6
Ae )
A A O0A

to
-
15|9123.
-Thpat'.
Page no.
Date:

Parallel addeu adder A

C C3 + Gn

Zo

33 adden
ere simultanesusly add
Aiultaneously but we hav to unit
Pseeies cayi.
CPU

Z3y3 t ,@n t Y3 Cn
dsli t (3+ys) Cin
+ BCin
Tirupati
Page no..
Date:

o t Po CL

Cary Lokahead! Ghener ato r


3

od
o

Casy eokahead Adde.


go.fo sill be
generated at send casy okahead
Generator

yele2 Cauy Lokahead inenerator Cxeateu


simultan eeuly all ca cike Coc

al the i l be
Calulated

A
Page no.:
Date:

A-B
A+ (2's cempliment of 8)
At U's complimert of 6) +1
heeWe e to aubtator.

Cout
+. Cin

Lty t1

M=0
M-1

Oork tor beth adde and subha dtor.


M4 M

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