MPMC M4 PDF

CST 307 MICROPROCESSORS AND MICROCONTROLLERS
S5 CSE
MODULE 4
Module- 4 (Interfacing chips): Programmable Peripheral

Input/output port 8255 - Architecture and modes of
operation, Programmable interval timer 8254-Architecture
and modes of operation- DMA controller 8257 Architecture
(Just mention the control word, no need to memorize the
control word of 8254 and 8257)
8255 – Programmable Peripheral Interface
• The Intel 8255A is a general purpose programmable I/O
device designed for use with Intel microprocessors.
• It consists of three 8-bit bidirectional I/O ports (24 I/O lines)
that can be configured to meet different system I/O needs.
• The three ports are designated as PORT A, PORT B and
PORT C.
Ports of 8255
• Port A contains one 8-bit output latch/buffer and one 8-bit input buffer.
• Port B is same as PORT A.
• However, PORT C is split into two parts- PORT C lower (PC3-PC0)
and PORT C upper (PC7-PC4) by the control word.
• The four ports – two 8-bit PORTs and two 4-bit PORTs are divided in
two groups Group A (PORT A and upper PORT C) Group B (PORT B
and lower PORT C) for programming purpose.
Modes of 8255 – It works in two modes:
1.Bit set reset (BSR) mode

2.Input/output (I/O) mode
• To know in which mode the interface is working we need to know the

value of Control word.
• Control word is a part of control register in 8255 which specify an I/O
function for each port.
• If the most significant bit of control word or D7 is 1 then 8255 works in I/O mode
else, if it’s value is 0 it works in BSR mode.
1.BSR Mode – When MSB of the control register is zero(0), 8255 works in Bit Set-
Reset mode.in this only PC bit are used for set and reset.
2.I/O Mode – When MSB of the control register is one(1), 8255 works in Input-Output
mode.it is further divided into three categories.
3.Mode 0 – In this mode all three ports (PA, PB, PC) can work as simple input function
or output function also in this mode there is no interrupt handling capabilities.
4.Mode 1 – In this either port A or port B can work and port C bits are used as
Handshake signal before actual data transmission plus it has interrupt handling
capabilities.
5.Mode 2 – In this only port A works and port B can work either in Mode 0 or Mode 1
and the 6 bits of port C are used as Handshake signal plus it also has to interrupt
handling capability.
Format of control word 8255 - BSR Mode
Format of control word 8255- IO Mode
Operating Modes of 8255
8255A has three different operating modes −
• Mode 0 − In this mode, Port A and B is used as two 8-bit ports and Port C
as two 4-bit ports. Each port can be programmed in either input mode or
output mode where outputs are latched and inputs are not latched. Ports
do not have interrupt capability.
• Mode 1 − In this mode, Port A and B is used as 8-bit I/O ports. They can
be configured as either input or output ports. Each port uses three lines
from port C as handshake signals. Inputs and outputs are latched.
• Mode 2 − In this mode, Port A can be configured as the bidirectional port
and Port B either in Mode 0 or Mode 1. Port A uses five signals from Port
C as handshake signals for data transfer. The remaining three signals from
Port C can be used either as simple I/O or as handshake for port B
Functional Description:
This support chip is a general purpose I/O component to interface

peripheral equipment to the microcomputer system bus. It is
programmed by the system software so that normally no external logic
is necessary to interface peripheral devices or structures.
• Data Bus Buffer:
• It is a tri-state 8-bit buffer used to interface the chip to the system data
bus. Data is transmitted or received by the buffer upon execution of
input or output instructions by the CPU. Control words and status
information are also transferred through the data bus buffer.
Read/Write and Logic Control:
• The function of this block is to control the internal operation of the
device and to control the transfer of data and control or status words. It
accepts inputs from the CPU address and control buses and, in turn,
issues command to both the control groups.
CS (Chip Select):
• A low on this input selects the chip and enables the communication
between 8255A & the CPU. It is connected to the decoded address,
and A0 & A1 are connected to the microprocessor address lines.
Their result depends on the following
conditions
CS A1 A0 Result
0 0 0 PORT A
0 0 1 PORT B
0 1 0 PORT C
0 1 1 Control Register
1 X X No Selection
RESET
• This is an active high signal. It clears the control register and sets all ports in
the input mode.
RD (Read):
• A low on this input enables the 8255A to send the data or status information to the
CPU on the data bus.
WR (Write):
• A low on this input pin enables the CPU to write data or control words into the
8255A.
A1, A0 Port Select:

• These input signals, in conjunction with the RD and WR inputs, control the selection
of one of the three ports or the control word registers. They are normally connected
to the least significant bits of the address bus (A0 and A1).
•
A1 A0 RD WR CS Result
Input Operation
PORT A → Data Bus
0 0 0 1 0
0 1 0 1 0 PORT B → Data Bus
1 0 0 1 0 PORT C → Data Bus
Output
Operation
0 0 1 0 0 Data Bus → PORT A
0 1 1 0 0 Data Bus → PORT A
1 0 1 0 0 Data Bus → PORT B
1 1 1 0 0 Data Bus → PORT D

• To communicate with peripherals through 8255 three steps are
necessary:
1.Determine the addresses of Port A, B, C and Control register

according to Chip Select Logic and the Address lines A0 and A1.
2.Write a control word in control register.
3.Write I/O instructions to communicate with peripherals through port
A, B, C.
• The common applications of 8255 are:
• Traffic light control

• Generating square wave
• Interfacing with DC motors and stepper motors

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CST 307 MICROPROCESSORS AND MICROCONTROLLERS

Module- 4 (Interfacing chips): Programmable Peripheral

1.Bit set reset (BSR) mode

• To know in which mode the interface is working we need to know the

This support chip is a general purpose I/O component to interface

A1, A0 Port Select:

0 1 0 1 0 PORT B → Data Bus

1 0 0 1 0 PORT C → Data Bus

0 1 1 0 0 Data Bus → PORT A

1 0 1 0 0 Data Bus → PORT B

1 1 1 0 0 Data Bus → PORT D

1.Determine the addresses of Port A, B, C and Control register

• Traffic light control

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