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Schmitt 1

This document discusses a Schmitt trigger circuit that uses current conveyors to provide controllable hysteresis. It begins with an overview of current conveyors and their advantages over operational amplifiers in pulse circuits like comparators. It then presents a circuit design using two second-generation current conveyors (CCII+) that implements both inverting and non-inverting Schmitt trigger comparators with adjustable hysteresis. Simulation and experimental results confirm the circuit works as intended to provide fast switching with a digitally controlled hysteresis window.
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0% found this document useful (0 votes)
31 views5 pages

Schmitt 1

This document discusses a Schmitt trigger circuit that uses current conveyors to provide controllable hysteresis. It begins with an overview of current conveyors and their advantages over operational amplifiers in pulse circuits like comparators. It then presents a circuit design using two second-generation current conveyors (CCII+) that implements both inverting and non-inverting Schmitt trigger comparators with adjustable hysteresis. Simulation and experimental results confirm the circuit works as intended to provide fast switching with a digitally controlled hysteresis window.
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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International Journal of Advances in Telecommunications, Electrotechnics, Signals and Systems Vol. 1, No.

1 (2012)

Schmitt Trigger with Controllable Hysteresis Using


Current Conveyors
Jiri Misurec and Jaroslav Koton

Abstract—Active elements working in the current or mixed analog converter with reference input enabling digital control
mode are still attractive for the design of analog functional blocks. the value of hysteresis of the Schmitt trigger. The behavior of
The current conveyor (CC) was defined already in 1968. This the proposed circuit is analyzed both by SPICE simulations
paper deals with hysteresis comparators using second generation
current conveyor. The comparator is basically a pulse circuit. and experimental measurements showing the performance of
In these circuits, the maximum rate of change in the output the Schmitt trigger.
voltage is required during switching from one state to another.
In comparators with operational amplifiers the switching time is II. S ECOND - GENERATION C URRENT C ONVEYOR AND I TS
given by the slew rate of the operational amplifier used, which is
not too high. If a current conveyor is used, the time of switching I MPLEMENTATION
the comparator gets shorter. The comparator is capable to Generally, in the second-generation of current conveyors,
operate at a higher frequency bands and if it is used, for example, terminal Y is only a voltage terminal having infinite input
in converters, a higher operating frequency can be reached. The
connection of an inverting and a non-inverting comparator with impedance in theory. The X port is the current input and the
adjustable hysteresis is shown as a practical implementation. current transfer from port X to port Y is zero, from X to Z it
Using the AD844, results of experimental measurements are is unity. A three-port is involved here (see Fig. 1), the matrix
presented that confirm the theoretical assumptions and the results representation of which is given by relations:
of computer simulation.
    
Keywords—Current conveyor, analog circuit design, hysteresis VX 0 1 0 IX
comparator.  IY  =  0 0 0   VY  . (1)
IZ 1 0 0 VZ
I. I NTRODUCTION Its advantageous properties and application possibilities
The current conveyors as active elements are known since have grown with the development of circuits and systems in
1968 [1], when Smith and Sedra presented the first-generation the current mode. Second-generation current conveyors have
current conveyor (CCI). Later on the the second- and third- come to feature prominently in circuit structures of some
generation current conveyors have been designed [2], [3]. commercially manufactured circuits. The AD844 circuit is
These elements are now with advantage used in applications, a transimpedance amplifier (Analog Devices). In its internal
where the wide bandwidth or current output response is structure there is a CCII+ second-generation current conveyor.
necessary. Nowadays, different types of current conveyors are A high-impedance outlet is important here, which is used as
described that are mostly based on the CCII, e.g. current port z of the CCII+ conveyor. The internal connection of the
controlled CC (CCCII) [17], differential voltage CC (DVCC) circuit is shown in Fig. 2(a), the schematic symbol of the
[18], or electronically tunable CC (ECCII) [19], [20]. AD844 circuit in the PSpice program is in Fig. 2(b), and the
The application possibilities of current conveyors are mostly ideal model is in Fig. 2(c).
presented on linear circuit design, e.g. frequency filters [4]–[7] It is evident from the equivalent circuit connection that its
or immittace simulators [8]–[11]. However, the CCII can be internal connection consists of two voltage followers and one
used to implement other functional blocks, such as Schmitt current follower. Current IIN flows via input resistance RIN
trigger circuit, by creating a regenerative feedback that takes (the input resistance of low-impedance terminal is ca. 50 Ω).
part of the output voltage from terminal Z and applies it to the This current is detected by the current follower and transferred
Y terminal of the active element [12], [13]. Schmitt Triggers to the transimpedance terminal.
based on other active elements such as Current Through The current passage through the so-called transimpedance
Transconductance Amplifier (CTTA) or Current Differencing produces a voltage, which is conveyed to the compensation
Transconductance Amplifier (CDTA) can be found e.g. in [14], terminal. On this terminal the output current IZ of the current
[15]. conveyor is obtained too. For the sake of load separation
In this paper we use simple second-generation current
conveyors to implement Schmitt trigger with inverting and CCII+
IY IZ
non-inverting hysteresis loop. First basic circuit topology is Y Z
IX
described that is subsequently supplemented by and digital-to VY X VZ
VX
J. Misurec and J. Koton are with the Department of Telecommunications,
Brno University of Technology, Purkynova 118, 612 00 Brno, Czech Republic.
Corresponding author: [email protected].
Manuscript received July 5, 2012; revised September 29, 2012. Fig. 1. Schematic symbol of CCII+ second-generation current conveyor

doi: 10.11601/ijates.v1i1.9 26
International Journal of Advances in Telecommunications, Electrotechnics, Signals and Systems Vol. 1, No. 1 (2012)

IY CCII+ follower
a voltage IZ is included on the voltage output of CCII+A IZA
Y Z Y Z
Itransimpedance
X amplifier. However, in the case of current
VY X VIN X
Vconveyor
X
the Vvoltage
Z output is not made use of. The tran- R3
VOUT1
simpedance models the impedance of output terminal Z and
is formed by a parallel combination of resistance Rt (its R4
magnitude is ca. 3 MΩ) and capacitance Ct (cca. 4.5 pF).
The output impedance 5 of the transimpedance terminal of this IX CCII+B IZB
current source is high. X Z
3 1 IIN Rt of comparators are in the nature of pulse
The output circuits Y
IIN 1 R1
circuits
RIN and thus a maximum Ct rate6 of change in the output VOUT2
2
voltage is usually required in comparison. This parameter
has a direct influence on the switching time. In the classical
R2
comparator with operational amplifier the switching time is
given by the slew Zrate of the operational amplifier used. In
comparators with current conveyors the switching time should
Fig. 3. Non-inverting and inverting hysteresis comparator with two CCII+s
be
Y substantially
1 I shorter.
IN
IIN 1 OUT
X
III. H YSTERESIS COMPARATOR WITH CCII+ hysteresis comparator, and output voltage VOUT2 is the output
of inverting hysteresis comparator.
Similarly as in [12], transimpedance amplifiers AD844 [16]
To describe the activity and determine the values of positive
including CCII+ were used to implement the comparator. The
comparison voltage +VP and negative comparison voltage
schematic diagram of a hysteresis comparator implemented
−VN of the comparator from Fig. 3 we will start from the
using two CCII+ conveyors is shown in Fig. 3.
knowledge of CCII+ in the AD844 circuit as given above. In
From the connection of non-inverting hysteresis comparator
this case the most important parameter of CCII+ is the mag-
with operational amplifier the equivalent connection of non-
nitude of the transimpedance formed by a parallel connection
inverting or inverting hysteresis comparator with CCII+ can
of resistance Rt and capacitance Ct . These elements form
be derived. The connection given in Fig. 3 combines two
the impedance of output terminal Z. The output resistance
possibilities. The circuit part containing the CCII+A current
CCII+ IZ
IY represents RX of low-impedance terminal X also needs to be taken into
conveyor Y Z
the non-inverting hysteresis comparator
I consideration.
whileVthe partX
X
containing the CCII+B current conveyor per-
Y VZ Consider that the output voltage VOUT1 can acquire values
forms theVX function of an inverting hysteresis comparator.
+VOUT SAT or −VOUT SAT , with the output voltage VOUT2
Then output voltage VOUT1 is the output of the non-inverting
always acquiring the opposite values, i.e. −VOUT SAT and
+VOUT SAT . The outputs VOUT1 and VOUT2 are mutually
5 complementary.
CCII+ Consider that the output voltage VOUT2 of conveyor CCII+B
IY 3 1 IZ
Y Z IIN Rt has a maximum positive level, i.e. VOUT2 = +VOUT SAT , in
IX
VY X IIN VZ Ct
1 6 which case the voltage +VP on port Y of current conveyor
VX2 RIN
CCII+B is given by the relation:
R2
(a) +VP = +VOUT SAT = +VOUT SAT β. (2)
R1 + R2
U4 75 1 8
Z
3 V+N1N2 If on the contrary there is on the output of conveyor CCII+B
+
3
Y 11 a minimum negative level, VOUT2 = −VOUT SAT , then the
IIIN
IN Rt 6
OUT voltage on port Y of this conveyor is:
IIIN
IN 11 6
OUT
2 RIN 2 Ct 5
X 4- C R2
AD844/AD V- −VN = −VOUT SAT = −VOUT SAT β. (3)
R1 + R2
(b)
By the definition of current conveyor CCII+ it holds that
Z
VX = VY , so that the voltage on port Y will be repeated
Y 1
also on port X of CCII+B . Therefore, the current flowing into
IIN terminal X can be expressed as:
IIN 1 OUT
X VIN − VOUTS AT β
IX = . (4)
2RX + R4
(c)
From the conveyor definition it further follows that the output
Fig. 2. (a) Internal connection of circuit AD844 [16], (b) symbol of circuit current of conveyor CCII+A is IZA = IX , and the output
AD844 in PSpice program, (c) idealized model of circuit AD844 current of conveyor CCII+B is IZB = −IX . The output voltage

27
International Journal of Advances in Telecommunications, Electrotechnics, Signals and Systems Vol. 1, No. 1 (2012)

of conveyor CCII+A is then given by the relation: V. D IGITAL C ONTROL OF H YSTERESIS AND
E XPERIMENTAL M EASUREMENTS
VIN − VOUT SAT β Rt
VZA = VOUT1 = (5) For the digital control of hysteresis magnitude the com-
2RX + R4 1 + sRt Ct
parator connection including a CCII+ was proposed as given
and the output voltage of conveyor CCII+B is: in Fig. 5. The initial basic connection given in Fig. 3 was
complemented with a multiplier with digital-to-analog con-
VIN − VOUT SAT β Rt verter AD7533 [21], operational amplifier LM741 (which is
VZB = VOUT2 = − , (6)
2RX + R4 1 + sRt Ct connected as a voltage follower), and a third CCII+ current
conveyor AD844. Voltage from the divider R1 -R2 is conveyed
where s = jω, whereas ω is the angular frequency. Simplified to the multiplier, where it is multiplied by the value of a 10-bit
relations can be obtained in the form of input word D, which sets the hysteresis magnitude. Therefore,
Rt it is necessary to multiply the relations (2), (3) and (9) by
VZA = VOUT1 = (VIN ∓ VOUT SAT β) , (7) the value D. The value D expresses the binary fraction value
2RX + R4
of 10-bit digital input word DAC; examples of calculating D
for some of the combinations are given in Table I. In the
comparator connection implemented, hysteresis can be set in
Rt
VZB = VOUT2 = − (VIN ∓ VOUT SAT β) , (8) an interval h = 0 V to h = 12.125 V, in dependence on the
2RX + R4 set combination of 10-bit digital word D.
where the negative sign “–”and positive sign “+”within the The measured waveforms for the control word D =
parentheses denote the state of comparator output voltages 1111111111 is given in Fig. 6. For this value of the number
VOUT1 and VOUT2 . If VOUT1 = −VOUT SAT , then VOUT2 = D the maximum value of comparator hysteresis is obtained,
+VOUT SAT , and if VOUT1 = +VOUT SAT then VOUT2 = h = 12.125 V. For D = 1000000000 the waveform is
−VOUT SAT . shown in Fig. 7 while for D = 0000000001 it is shown in
After switching the conveyor outputs to the values VOUT1 =
−VOUT SAT and VOUT2 = +VOUT SAT the input voltage VIN
must drop below the value −VOUT SAT β. The comparator
hysteresis is defined as the difference between the positive
and the negative comparison level of input voltage and is thus
given by the relation:

h = +VP − (−VN ) = +VOUT SAT β − (−VOUT SAT β) =


= 2βVOUT SAT .
(9)

IV. C OMPUTER S IMULATION OF H YSTERESIS


C OMPARATOR WITH CCII+
a)
(a)
The operation of the comparator from Fig. 3 was tested a)
in computer simulation. In the MicroCap simulation program
the model of the AD844AD circuit will be used. The circuit
parameters set for the simulation were: supply voltage VCC =
±15 V, saturation voltage VOUT SAT = 10 V, the resistance
values chosen are R1 = R2 = 10 kΩ, consequently β =
0.5, R3 = 20 kΩ, and R4 = 1 kΩ. The calculated value
of comparison voltage is +VP = 5 V and the comparator
hysteresis is then h = 10. For the chosen VIN = 10 V the
output current magnitudes of the two current conveyors are
IZA = 4.5 mA and IZB = −4.5 mA.
Simulation results are given for non-inverting comparator
in Fig. 4(a), and for inverting comparator in Fig. 4(b). Ar-
b)
rowheads in the waveforms follow the direction of the change Fig. 4. Waveform of hysteresis characteristics
b)
(b) of comparator with CCII+ a) non-
in input voltage VIN . As can be seen, the circuit performs Fig. 4. Waveform of hysteresis characteristics
inverting, of comparator with CCII+ a) non-
b) inverting
the expected function. The circuit part containing the CCII+B inverting, b) inverting
fulfills the function of inverting hysteresis comparator, the part
with CCII+A performs the function of non-inverting hysteresis Fig. 4. (a) non-inverting, (b) inverting waveform of hysteresis characteristic
comparator. of comparator from Fig. 3
4 Computer with CCII+ and with controlled hysteresis
4 Computer with CCII+ and with controlled hysteresis
For the digital control of hysteresis magnitude the comparator connection including a
For thewas
CCII+ digital controlas
proposed ofgiven
hysteresis magnitude
in Fig. the comparator
5. The initial connection
basic connection including
given in Fig. 3a
CCII+ was proposedwith
was complemented as given in Fig. 5.with
a multiplier Thedigital-to-analog
initial basic connection given
converter in Fig. 3
AD7533JN,
was complemented with a multiplier with digital-to-analog converter 28 AD7533JN,
International Journal of Advances in Telecommunications, Electrotechnics, Signals and Systems Vol. 1, No. 1 (2012)

TABLE I
B INARY FRACTION REPRESENTATION OF SOME COMBINATIONS OF 10- BIT
DAC INPUT D IGITAL INPUT B INARY FRACTION VALUE

Digital input (MSB → LSB) Binary fraction value


1111111111 1023/1024
1000000001 513/1024
1000000000 512/1024
0111111111 511/1024
0000000001 1/1024
0000000000 0/1024

CCII+A IZA CCII+B IZB (a) a)


schematic of comparators with variable hysteresis
Y Z X Z Fig. 7. Hysteresis loop for D = 1000000000, a) non-
1 VIN X
R3
VOUT1 Y
R1
VOUT2 b) inverting comparator
ection shown in Fig. 5 there is inverting comparator output
put and non-inverting output R4 voltage of comparator with
esis is on the OUT1 Ioutput.X
Jumpers are used for choosing R2
digital input word D; in the final implementation, electronic
LM741 AD844
2
+ +
veform for the_ control15word D = 1111111111
AD7533 _
is given in
10k
e2 number D the maximum value ... of comparator
1 hysteresis is
r D = 1000000000 the waveform is shown in Fig. 7 while
scillogram is shown in Fig. Fig. 8. The hysteresisofha)comparators
value ofschematic in b)a)
(b)
D 5. Design 7. Hysteresis with variable hysteresis
Fig. 7. Hysteresis loop for D = 1000000000, a) non-
by the parameter of ∆X cursors in the Fig. left bottom cornerloop for DFig. = 1000000000,
7. Hysteresis loop a)fornon-inverting
D = 1000000000, comparator
(a) non-inverting comparator
b) inverting comparator
the right bottom corner b) inverting
(b) invertingcomparator
comparator
In thegives thecomparators
valueconnection
ofwith . hysteresis
2⋅Vvariable
Fig. 5. Design schematic of
comparator outsatshown in Fig. 5 there is inverting comparator output a)
voltage on the OUT2 output and non-inverting output voltage ofFig. 8. Hysteresis
comparator withloop for D = 0000000001, a) non-
digitally controlled hysteresis is on the OUT1 output. Jumpers are used for choosing b) inverting comparator
the combination of 10-bit digital input word D; in the final implementation, electronic
control is reckoned with. The testing input signal has a sinusoidal waveform of frequ
The oscilloscopic waveform for the control word D = 1111111111 is given in
Fig. 6. For this value of the number D the maximum value of comparator With increasing frequency
hysteresis is of the input signal the magnit
obtained, h = 12.125V. For D = 1000000000 the waveform changes.
is shownThe oscillogram
in Fig. while of output signal of inverting c
7 b)
a)
for D = 0000000001 theFig. oscillogram frequency f hysteresis
= 5.5 kHzh and D set to 0000000001 is given
7. Hysteresis loop for D = 1000000000, a) non-invertingincomparator
is shown in Fig. 8. The value of
the oscillograms is given by the parameter of ∆X cursors gives
in the theleftwaveform
bottom for input frequency f = 650 kHz. Th
corner
b) inverting comparator
while the parameter (a) ∆Y
b) in the right bottom corner gives thecompared
value of 2⋅V with the oscillograms
outsat. (a) a) given in Fig. 8b. For the a
a) D the hysteresis should b) be h = 125mV but the actual hyster
oop for D = 1111111111, a) non-inverting Fig.comparator
8. Hysteresis loop for D = 0000000001, Fig.
a) 8. Hysteresis loop
non-inverting for D = 0000000001, a) non-
comparator
b) inverting comparator input signal frequency increases, b)the hysteresis
inverting loop gets m
comparator
b) inverting comparator
namic properties of current conveyors come to be fully sho
ing, testing
The noticeable input overshooting
signal can be observed on theofwavef
The testing input signal has a sinusoidal waveform able effect of frequency
on comparator f =has
2.2aprecision,
sinusoidal
kHz. waveform freque
showing in the util
comparator
With with AD844ANZ.of the input signal the magnit
With increasing frequency of the input signal theincreasing
magnitudefrequency
of the hysteresis value
changes. The oscillogram of output signal changes.
of invertingThe oscillogram
comparator of at output signal of inverting c
input signal
frequency
frequency f = 5.5 kHz and D set to 0000000001 is given in Fig. 9a while Fig. f = 5.5 kHz and D set to 0000000001
9b is given
gives the waveform
gives the waveform for input frequency f = 650 kHz. The two waveforms can be for input frequency f = 650 kHz. Th
compared
(b) a) with the oscillograms
a) given in Fig.comparedb) Forwith
8b. the the
aboveoscillograms
b)value of input
(b)
givenword
in Fig. 8b. For the a
Fig. 6. Hysteresis loop
D the hysteresis
Fig. 8. for D = 1111111111,
should
Hysteresis beloop for D a)
h = 125mV D the
non-inverting hysteresis
but the actual a)
= 0000000001, comparator
hysteresis should be is 300mV. If thethe actual hystere
h =
value comparator
non-inverting 125mV but
b) inverting
input signal frequency comparator
increases, b)the input
Fig. 6. Hysteresis loop for D = 1111111111, (a) non-inverting comparator Fig. 8. Hysteresis
loop gets more extended andthethehysteresis
signal
loop forfrequency increases,
D = 0000000001, loop gets m
(a) non-inverting comparator
(b) inverting comparator (b)hysteresis
inverting
invertingcomparator
comparator dy-
namic properties
namic properties of current conveyors come to be fully shown. At the time of switch- of current conveyors come to be fully sho
ing, testing
The noticeable
inputovershooting
signal has a can be observed
sinusoidal ing,
waveform noticeable
on the overshooting
of waveforms.
frequency f This = 2.2has can
kHz. be observed
a consider- on the wavef
Fig. 8. The value of hysteresisable effect
h in theon comparator
comparatoris precision,
given output able effect
showing
signal of theonutilizable
ininverting comparator
comparator atprecision,
frequency bandshowing
input signal of
frequency in the util
by the parameter of ∆Xcomparator cursors in with AD844ANZ.
the
With increasing left bottom corner 5.5 kHz comparator
and D set towith AD844ANZ.
frequency of the input signal the magnitude of the hysteresis value
0000000001 is given in Fig. 9(a) while
while the parameter ∆Y changes.in the rightThebottom corner gives
oscillogram the Fig.
of output 9(b) of
signal gives the waveform
inverting for input
comparator frequency
at input signal 650 kHz.
value of 2VOUT SAT . The testing input signal was a sinusoidal The two waveforms can be compared with the oscillograms
frequency f = 5.5 kHz and D set to 0000000001 is given in Fig. 9a while Fig. 9b
waveform of frequency 2.2 kHz. given in Fig. 8(b). For the above value of input word D the
gives the waveform for input frequency f = 650 kHz. The two waveforms can be
With increasing frequency of the input signal the mag- hysteresis should be h = 125 mV but the actual hysteresis
compared with the oscillograms given in Fig. 8b. For the above value of input word
nitude of the hysteresis value changes. The waveforms of value is 300 mV. If the input signal frequency increases, the
D the hysteresis should be h = 125mV but the actual hysteresis value is 300mV. If the
input signal frequency increases, the hysteresis loop gets more extended and the dy-
namic properties of current conveyors come to be fully shown. At the time of switch-
ing, noticeable overshooting can be observed on the waveforms. This has a consider-
29
able effect on comparator precision, showing in the utilizable frequency band of
comparator with AD844ANZ.
International Journal of Advances in Telecommunications, Electrotechnics, Signals and Systems Vol. 1, No. 1 (2012)

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b) frequency f kHz presents
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(b) frequency the solution
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2007.performed and a digitally
[14] P. Silapan and M. Siripruchyanun, “A Simple Current-mode Schmitt
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hysteresiscontrolled
gets inverting
loophysteresis can and
more extended non-inverting
be set
and in
thean comparator
interval
dynamic properties is proposed. The comparator
Trigger Employing has
Only Single MO-CTTA”, in Proc. 6th Int. Conf.
dependence on some
the pulse
set circuit
combination elements
of 10-bit and therefore
digital
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Electrical voltage change
Engineering/Electronics, is
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noticeable Measuringcan on bean observed
experimentalon thespecimen shows and
[15] P. Silapan the M.results obtained.“Fully and electronically con-
Siripruchyanun,
Somewhat better results were expected
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trollable controlled
current-mode comparator.
Schmitt triggers employing only single MO-
CCCDTA and their applications ”, Analog Integr Circ Sig Process, doi:
Examining
cision, showing in thethe causes frequency
utilizable will be the bandsubject of further investigation.
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10.1007/s10470-010-9593-2, of 68,
hys-pp. 111-128, 2011.
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with AD844. i.e. fullAD844:
extent60ofMHz h, half the Monolithic Op Amp, Analog
2000V/µs
extent of h, and the least value of h, were compared[17]with calculated values. The de-
Devices, Rev. F. 2009.
A. Fabre, O. Saaid, F. Wiest, and C. Baucheron, High frequency
viation fromVI. these values is ca. 3% for individual values
C ONCLUSION of D.based
applications In on
thea new
connection
current controlled conveyor, IEEE Trans.
given, there is evidently a drop
The paper presents the solution of a voltage comparator in voltage, obviously due
Circuitsto the
Syst.-I,AD7533JN
Vol. 43, No. 2, multi-
pp. 82-90, 1996.
olution ofwith
a voltage
current comparator
plier. Measuring
conveyors CCII+. with current
the comparator conveyors
A theoreticalwithout multiplier
analysis
[18] H.O. Elwan and A.M. Soliman, Novel CMOS differential voltage current
and did not exhibit
conveyor this
and its error. Thus
applications, the Circuits, Devices, Systems, Vol.
IEE Proc.
ysis and computer
computer simulation
good
simulation are performed
functionality
were performed anda digitally
of the comparator
and a digitally
was verified and 144,
controlled the No.advantage of the
3, pp. 195-200, 1997.current
on-inverting comparator
inverting mode
and was isshown.
proposed.
non-inverting The work
Further
comparatorcomparator
willbeen
has has
focus
[19] S. Minaei, O.K. Sayin, and H. Kuntman, A new CMOS electronically
on obtaining atunable
proposed. higher operating frequency.
current conveyor and its application to current-mode filters, IEEE
s and therefore a maximum rate of output voltage change is
The comparator has some pulse circuit elements and therefore Trans. Circuits Systems I, Vol. 53, No. 7, p. 1448-1457, 2006.
g on an experimental
a maximum rate specimen
of output shows thechange
voltage resultsisobtained.
usually required. [20] W. Surakampontorn and K. Kumwachara, CMOS-based electronically
tunable current conveyor, Electronics Letters, Vol. 28, No. 14, pp. 1316-
were expected in the design of this controlled comparator.
Measuring on an experimental specimen shows the results
1317, 1992.
be the subject of further investigation. The values of hys-
obtained. The values of hysteresis h measured for three chosen [21] Datasheet AD7533: CMOS low cost 10-bit multiplying DAC, Analog
ee chosencombinations
combinations of D,of i.e.
D, full
i.e. extent of h, half
full extent thehalf
of h, extent
theof h, and Devices, Rec. C, 2007.
the least value of h, were compared
value of h, were compared with calculated values. The de- with calculated values. The Jiri Misurec MSc. (1985), Ph.D. (1991), Ass. Prof. (2007) is with the Brno
deviation from these values was cca. 3% for individual values University of Technology, Dept. of Teleinformatics, Czech Republic. He gives
is ca. 3% for individual values of D. In the connection lectures in and leads the exercise for the subject “Analog technique”and gives
of D. In the connection given, there is evidently a drop in lectures in the course “Digital Signal Processing”. His research interest is
a drop in voltage,
voltage,obviously
obviouslyduedue to the AD7533JN multi-
to the AD7533 multiplier. Measuring focused on the area of analog technique, converters, especially on converters
arator without
the comparator without multiplierthis
multiplier did not exhibit diderror. Thus the
not exhibit this error. working both in voltage and current mode. Now he is interested in general-
comparatorThuswastheverified and the advantage
good functionality of the current
of the comparator
ization of sensitivity analysis of transfer functions. This should be used for
was verified comparison of newly developed applications. In the latest he also cooperates
work will and
focustheonadvantage
obtainingofa the higher operating
current mode was frequency.
shown. Further with a number of companies on implementation of fundamental research
results into practice.
work will focus on obtaining a higher operating frequency.
Jaroslav Koton received the M.Sc. an Ph.D. degree in electrical engineering
from the Brno University of Technology, Czech Republic, in 2006 and 2009,
R EFERENCES respectively. He is currently an Assistant Professor at the Department of
[1] K. C. Smith and A. Smith, “The Current Conveyor: a New Circuit Telecommunications of the Faculty of Electrical Engineering and Communi-
Building Block,”IEEE Proc., Vol. 56, pp. 1368-1369, 1968. cation of Brno University of Technology, Czech Republic. His current research
[2] A. Sedra and K. C. Smith, “A second-generation current conveyor and is focused on linear and non-linear circuit designing methods with current or
its application,”IEEE Trans. Circuit Theory, Vol. 17, pp. 132-134, 1970. voltage conveyors, and current active elements. He is an author or co-author
[3] A. Fabre, “Third-generation current conveyor: a new helpful active of about 85 research articles published in international journals or conference
element,”Electronics Letters, Vol. 31, No. 5, pp. 338-339, 1995. proceedings. Dr. Koton is a Member of IEEE and IACSIT.

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