____________________________________________________

_____________
_________
MODELING A DIODE

iD
DUT
(device under test)
vD

iD(A)
100m

1m

1
10u
2,3*N*vt

100n

IS
1n
200m 600m 1
vD(V)
___________________________________________________________________________
 Diode Modeling - 2-

INTRODUCTION

Referring to the Characterization Handbook's chapter on curve fitting, regression analysis was
introduced as a method for linear curve fitting. It was a pretty simple and straight -forward
method. We had to so lve the partially differentiated equations for the parameters m and b of
the equation
y = m*x + b

It was mentioned that fitting more complex measurement curves leads to much more complex
problems for solving the set of equations for the parameters. And pretty often, this set of non-
linear equations cannot be solved without numerical methods.

But there is a way around:

A simple way to fit non-linear curves to measured non- linear data is to transform them to a
linear world. But the question is, how to do it. A look at the 'target function' of the model
equation gives a hint. An example: in case of an exponential function like
v
i = IS *e N * vt
,
the transform needed is a simple logarithmic conversion. This automatically gives the non -
linear transformat ion for the measured data. Once the measured data are transformed to this
linear range, a linear regression analysis is applied. And so we yield the slope and y -intersect
of the fitted line. The model parameters are finally calculated out of these two valu es.

This will become much more transparent in the following diode modeling example.
 Diode Modeling - 3-

The SPICE equivalent schematic for a diode is shown in figure 1. It consists of the ideal diode
D representing its non- linear DC characteristic plus two voltage dependent capacitors for
taking care of the space charge (CS) and delay effects (CD) as well as a series resistor RS
for the high-current effects. The series inductor (bonding effect ...) is neglected as well as a
parasitic capacitor (housing effects ...).

iD
--->
____
o-------|____|--------
| RS |
| ---------o-------- |
| | | | |
| ----- | | | vD_internal
| \ / --- --- |
vD| \ / --- CD --- CS |
| ----- D | | |
| | | | |
| ---------o-------- |
V | V
o---------------------

D Diode with its nonlinear DC characteristic

RS Series resistor
CS Space charge capacitance, the hyperbolic function
CD Diffusion capacitance, the transit time effect

Fig.1: Equivalent schematic of the diode

 Diode Modeling - 4-

DC CHARACTERIZATION: PARAMETERS IS, N AND RS

Neglecting high current effects, i.e. RS=0 or vD = vD internal, and also neglecting
recombination effects for low biasing voltage, the diode current in the forward active region is
modeled using:

DC:
vD
iD = IS * e * vt
N −1
(1)
with
Is : saturation current (leakage current, typical fA)
N : emission coefficient (ideal diode: N=1)
VT : temperature voltage 27mV at 25°C
or VT = k*T/q = 8.6171 E-5 * (T /'C + 273.15)
(1a)
 Diode Modeling - 5-

Measurement setup:

iD
DUT
(device under test)
vD

iD(A)
100m

1m

1
10u
2,3*N*vt

100n

IS
1n
200m 600m 1
vD(V)
Fig.2: DC characteristic of the diode under forward bias

Determination of the DC parameters IS and N:

Provided vD >0, i.e. neglecting the term ( -1) in (1),

and applying a logarithmic conversion yields:

vD
log(iD) = log(Is) + ------ log(e)
N VT

= log(Is) + [1 / (2,3 N VT)] vD (2a)

This is an equation of the form:

y = b + m x (2b)
 Diode Modeling - 6-

In order to interpret (2b) linearly, we have to substitute:

y = log(iD) (2c)

b = log(Is) (2d)

m = [1 / (2,3 N VT)] (2e)

x = vD (2f)

This explains how to manipulate the measured data: after the logarithmic conversion of the
measured values of iD (2c), they are introduced with the still linear values of vD (2f) into the
regression equations (10) and (11) of the previous regression analysis chapter 4.1 as yi- and
xi- values. We obtain the y- intersect b and the slope m of the linear regression function.
Solving (2d) for Is and (2e) for N we finally are able to calculate these two parameters out of
b and m as follows:

b
Is = 10 (3)

and
N = 1 / (2,3 m VT)
with VT from (1a) (4)

Validity of this extraction:

The parameter extraction described above is valid only in that range of measured data, where
the assumptions are true. This means: eq.(3) and (4) are valid for vD > 0 (data above the
measurement resolution (non-noisy data), typ. >0,2 V). The diode current should not be
dominated by recombination effects (the weaker slope at low bias voltages) but also below
high-current effects (no ohmic effects, the famous knee in the half - logarithmic diode
characteristic above typically 0.7 V)
 Diode Modeling - 7-

PARAMETER RS

After the parameters Is and N are extracted, the value of RS can be found from the two
highest bias points of index n and index (n-1) as follows:

vD(n) - vD(n-1)
RS_start = ------------------- (5)
iD(n) - iD(n-1)

Another method to determine the ohmic part of a diode characteristic is to consider the
voltage drop between the ideal diode characteristics its shift due to the ohmic effect. This is
done by firstly determining the maximum current from the sweep by

i_RS=ia.m[max_index]

and then by calculating that voltage drop following

v_RS = measured_voltage - ideal_diode_voltage

or
v_RS = va.m[max_index] - vt*N*ln(i_RS / IS)

what finally gives

RS = v_RS / i_RS

Of course, the diode DC parameters IS and N have to be determined first.

Pre-requisite for a good RS extraction:

the ohmic effect dominates the diode characteristics. Referring to fig.2, the decline for high
bias voltage must be clearly visible in the extraction range.
 Diode Modeling - 8-

CV CHARACTERIZATION

The frequency behavior of a semiconductor can be modeled by a space charge capacitance

(dominant at reverse biasing) and a diffusion capacitance (domina nt at forward bias) that
models the time delay effects. The first capacitance is typically measured with a negative bias
using a CV meter (capacitance versus voltage) while the latter is commonly measured using a
network analyzer.

This chapter covers the modeling of the space charge capacitor. Another method is using a
network analyzer, measuring the s11 curve with a negative bias. This is not covered here.

Space charge capacitance in general, extracting parameters Cj0, Vj, m

The behavior of the space charge capacitor is given by:

CV:

for vD > FC * VJ :
C JO
Cs =
M
 vD 
1− ÷
 VJ 
(6a)
and else:
C JO  v 
Cs = * 1 − FC * (1 + M ) + M * D 
(1 − FC )(1+ M )  VJ 

(6b)
with
CJO space charge capacitance at vD = 0V
VJ built- in potential or pole voltage (typ. 0,7V)
M junction exponential factor, deter mines the slope of the CV plot
(abrupt pn junction (<0,5um): M = 1/2)
(linear pn junction (> 5um): M = 1/3)
FC : forward capacitance switching coefficient, default 0,5
For more details see /Antognetti/.
 Diode Modeling - 9-

Measurement setup: .
CS (pF)
1.6p

1.2p

DUT
C(v) (device under test)
0.8p
-3 -1 1
vD (V)
Fig 3: CV-characteristics of the diode

Determination of the CV parameters:

We only use the negative bias region for parameter extraction. The logarithmic conversion of
(6a) gives:
 vD 
ln (C S ) = ln (C J 0 ) − M * ln  1 − ÷
÷
 V J  (7)
This equation can be interpreted again as a linear function:

y = b + m * x
with y = ln(CS) (8a)
b = ln(CJO) (8b)
m = - M (8c)
and x = ln[1 - vD / VJ ] (8d)

How to proceed: the measured values of CS are converted logarithmically according to (8a).
Then, following (8d), the stimulating data of the voltage sweep vD are converted too. Since
the parameter VJ has a physical meaning, its value should be in t he range of 0,2 .. 1V.
Therefore we select 0,2V as a starting value for VJ. These two arrays are now introduced into
equations (10) and (11) of the chapter on regression analysis as yi - resp. xi- values. A linear
curve is fitted to this transformed 'cloud' of stimulating and measured data and we get the y -
intersect b and the slope m for the actual value of VJ. These two values are the best choice
for the given VJ. In the next step, this procedure is repeated with an incremented VJ, and we
2
get another pair of m(VJ) and b(VJ) . But now the regression coefficient r will be different
from the earlier one: depending on the actual value of VJ, the regression line fits the
transformed data 'cloud' better or worse. Once the best regression coefficient is found, the
iteration loop is stopped and we get VJ_opt as well as the corresponding b(VJ_opt) and
m(VJ_opt).
 Diode Modeling - 10-

The final parameter values are then from (8c):

M = - m(VJ_opt) (9a)
and from (8b):
CJO = exp [ b(VJ_opt) ] (9b)

Validity of this extraction:

The parameter extraction for the space charge capacitor is valid only for stimulus
voltages below FC * VJ , FC_default = 0,5.

In practice, there is always an overlay of this capacitance with some parasitic ones, e.g.
packaging or bond pads. If they are not known and therefore cannot be de -embedded
(eliminated from the measured data by calculations), the three modeling parameters may have
values that have no physical meaning. This is especially true for VJ and M.
Nevertheless the fitting of t he proposed method is generally very good and pretty easy.

In order to also determine the parasitic offset capacitance, see the examples in the chapter
about 'regression analysis applications'.
 Diode Modeling - 11-

HF MODELING: PARAMETER TT

The small signal equivalent schematic of the diode for high frequencies is given in fig.4.
When comparing it to fig.1, it can be seen that the element D, representing the non - linear DC
transfer curve of the diode has been replaced by the linearized small signal conductance gD.

iD
---> ____
o-------|____|--------
| RS |
| ---------o-------- |
| | | | |
| | | | |vD_internal
| - --- --- |
vD| | | --- CD --- CS |
| - gD | | |
| | | | |
| ---------o-------- |
V | V
o---------------------

gD small signal conductance of the given operating point

RS ohmic series resistor
CS space charge capacitance, the hyperbolic function
CD diffusion capacitance, the transit time effect

Fig.4: small signal equivalent schematic of the diode for high frequencies

Let's start with gD , the slope to the DC diode characteristics at the operating bias point.

∂ iD (1) IS   v   1
gD = = × exp  D ÷ − 1÷÷ = ×iD (18)
∂ vD N ×vt   N ×vt   N ×vt

The diffusion capacitance in the operating point is given by /Antognetti/:

1
CD = TT * gD = TT * ×iD
N ×vt (19)

CD is typically overlying the space charge capacitance.

When performing a 2-port measurement of a diode with a network analyzer, we can calculate
the total diode capacitance by converting the S-parameters to Y-parameters and calculating
Cdiode= IMAG(-Y12) / (2 PI freq).
The resulting CV curve is depicted below in fig.5:
 Diode Modeling - 12-

Converting S-parameters to CV plots:

The influence of the diode transit time TT to the CV curve

TT=1p
Diffusion Capacitance:
CD = TT * gD
with
∂ iD
gD =
∂ vD

TT=0

VJ
Fig.5: the diffusion capacitance overlays the space charge capacitance for high DC bias.

When applying a NWA, compared to CV meter measurements, there are no restrictions

related to positive diode DC biasing and measurement instrument restrictions. Therefore, we
can easily forward bias the diode and study the transition from the space charge capacitance to
the diffusion capacitance. This gives the diffusion capacitance.

NOTE: in practice, especially for packaged devices, the diffusion capacitance is overlaid by
the package inductor! See further below!

Determining TT:
As can be seen in fig. 6, CD can also be optimized in the S -parameters for medium DC biases,
below the influence of RS. In other words, r elated to S-parameters, TT shifts the Sxx and Sxy
traces (adds phase). The effect is dominant for medium and higher DC biases below take -over
of RS.

NOTE:
When RS begins dominating the diode DC trace, think of the 'inner' diode as a resistor with
1/gD in series with a voltage source of e.g. 0,7V. Therefore, the capacitances CS and CD are
shortened by this decreasing diode resistor, and therefore, TT is shortened by this resistor!!
 Diode Modeling - 13-

The influence of the diode transit time TT to S-parameters

TT=0
TT=0
TT=1p

TT=1p

Fig.6: How the transit time TT influences the S -parameters

Finally, when taking also the series inductance into account, which is a typical first -order
model of the diode package, we get S -parameters like shown in fig.7:

S-parameter Modeling (package included)

- the additional
phase shift stems
freq
from the series
inductance
(package effect!)

vd

Fig.7: Diode S21-Parameters including the package inductor

The series inductor overlays the so far discussed S -parameters of the inner diode. It basically
adds phase to the inner diode S -parameters, and for high DC biasing (where RS domiinates),
the inductance affects the diode S21 trace considerable: S21 now turns downwards, tending
towards S21->0 for infinite frequency.

Related to modeling, LS can be obtained from optimization of high DC biases.

 Diode Modeling - 14-

MODEL LIMITATIONS
In order to keep the models simple and usable and to have re asonable simulation times, they
might suffer from some limitations:

DC: diodes may show recombination effects at low forward bias voltages. This shows -up as
a lower slope on a half- logarithmic scale. In order to cover this effect, the diode model is
replaced by a subcircuit, consisting of a diode for the recombination effect, another one in
parallel for the upper voltage area and a resistance in series with both diodes. (Both diodes
have RS=1e-6 Ohm).

CV: any parasitic capacitance is not included in the diode model. Using again a sub -circuit, a
2nd parasitic capacitance can easily be added.

RF: the parasitic series inductor is not included. Again, a subcircuit could be used for
modeling.
 Diode Modeling - 15-

DETAILS OF THE BERKELEY SPICE DIODE MODELING FOR EXP ERTS

This section gives detailed information about the Berkeley Spice model including thermal and
noise modeling.

vd

Gmin

2
IR id

2
IDN

RS irb

+ -
cj

cd

The complete SPICE parameter list:

parameter description units default example .

RS ohmic resistance Ohm 0 10

IS saturation current A 1.0E-14 1.0E-14

N emission coefficient - 1 1

BV reverse breakdown voltage V infinite 40

IBV current at breakdown voltage A 1.E-3

CJO zero bias junction capacitance F 0 2.0E-12

VJ junction potential V 1 0.6
M grading coefficient - 0.5 0.5
FC coeff.for forward-bias deplet.cap. - 0.5 0.5

TT transit time sec 0 1E-10

EG activation energy eV 1.11 1.11 for Si

0.67 for Ge
XTI saturation current temp.exp. - 3.0 3

KF flicker noise coefficient - 0

AF flicker noise exponent - 1

TNOM parameter measurement temp. 'C 27

GMIN min.SPICE conductance
(a SPICE convergence parameter) 1E-12
 Diode Modeling - 16-

MODEL EQUATIONS:
DC model: _________________________________________
forward:
 vd  k * TEMP
id = IS e N*vt − 1÷ + G min* vd vt =
  with q
reverse:
 − vd + BV 
irb = IBV  e vt − 1÷
 
AC model: _________________________________________
Junction capacitance
CJO
cj = M
 vd 
 1 − ÷
 VJ  for vd<FC*VJ

CJO  M 
cj = 1 + ( vd − FC * VJ ) 
(1 − FC) M
 VJ(1 − FC) 
for vd>FC*VJ.

Diffusion capacitance:
vd
 1 
cd = TT IS * * e N*vt + G min÷
 vt * N 
_________________________________________
Noise model (used only in AC analysis)
2 4 * k * TEMP
IRS = * ∆f
RS thermal noise

2 KF * id AF
IDN = 2 * q * id * ∆f + ∆f
f
shot noise flicker noise

Thermal model: _________________________________________

XTI q *EG  TEMP − TNOM 
TEMP  ÷
  N
IS TEMP = ISTNOM  ÷ e k *N  TEMP *TNOM 
 TNOM 

 TEMP  ni
VJ TEMP = VJ TNOM  ÷ + 2 * vt * log
 TNOM  n i _ TEMP
with ni = 1.45E-10
q  − EG 115
. 
 TEMP  2k  TEMP + TNOM÷
n i _ TEMP = n i *  ÷e
 TNOM
 Diode Modeling - 17-

REFERENCE

Diode modeling and modeling in general:

P.Antognetti, G.Massobrio, Semiconductor Device Modeling with SPICE,

McGraw-Hill, 1988, ISBN 0-07-002107-4