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Logic Families and Programmable Logic Devices

The document discusses different types of programmable logic devices including ROM, PLA, PAL, PROM, EPROM, and EEPROM. It provides definitions and explanations of each type of memory device. For example, it states that a ROM consists of both decoder and OR gates on a single IC and defines an address and word. It also explains that a PLA is similar to a ROM but does not provide full decoding like a ROM. The document asks and answers multiple questions about the characteristics and differences between the memory devices.

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Dei Peh
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0% found this document useful (0 votes)
124 views3 pages

Logic Families and Programmable Logic Devices

The document discusses different types of programmable logic devices including ROM, PLA, PAL, PROM, EPROM, and EEPROM. It provides definitions and explanations of each type of memory device. For example, it states that a ROM consists of both decoder and OR gates on a single IC and defines an address and word. It also explains that a PLA is similar to a ROM but does not provide full decoding like a ROM. The document asks and answers multiple questions about the characteristics and differences between the memory devices.

Uploaded by

Dei Peh
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
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Unit 5

Memory Devices
LOGIC FAMILIES AND PROGRAMMABLE LOGIC DEVICES

1. Mention the important characteristics of digital IC’s? [Nov 2015]


 Fan out
 Power dissipation
 Propagation Delay
 Noise Margin
 Fan In
 Operating temperature
 Power supply requirements

2. List basic types of programmable logic devices. [May 2016]


 . Read only memory
 . Programmable logic Array
 . Programmable Array Logic

3. Explain ROM[Nov 2017]
A read only memory (ROM) is a device that includes both the decoder and the OR gates
within a single IC package. It consists of n input lines and m output lines. Each bit combination of
the input variables is called an address. Each bit combination that comes out of the output lines is
called a word. The number of distinct addresses possible with n input variables is 2n.

4. Define address and word: [May 2015]


In a ROM, each bit combination of the input variable is called on address. Each bit
combination that comes out of the output lines is called a word.
5. State the types of ROM[Nov 2016]
 . Masked ROM.
 . Programmable Read only Memory
 . Erasable Programmable Read only memory.
 . Electrically Erasable Programmable Read only Memory.

6. What is programmable logic array? How it differs from ROM? [May 2014]
In some cases the number of don’t care conditions is excessive, it is more economical to use a
second type of LSI component called a PLA.A PLA is similar to a ROM in concept; however it does
not provide full decoding of the variables and does not generates all the minterms as in the ROM.

7. Explain PROM. [Nov 2013]


PROM (Programmable Read Only Memory) It allows user to store data or program. PROMs
use the fuses with material like nichrome and polycrystalline. The user can blow these fuses by
passing around 20 to 50mA of current for the period 5 to 20µs.The blowing of fuses is called
programming of ROM. The PROMs are one time programmable. Once programmed, the information
is stored permanent.
S.K.P Engineering College, Tiruvannamalai III SEM

8. Explain EPROM. [May 2017]


EPROM (Erasable Programmable Read Only Memory) EPROM use MOS circuitry. They
store 1’s and 0’s as a packet of charge in a buried layer of the IC chip. We can erase the stored data
in the EPROMs by exposing the chip to ultraviolet light via its quartz window for 15 to 20 minutes.
It is not possible to erase selective information. The chip can be reprogrammed.

9. Explain EEPROM. [Nov 2012]


EEPROM (Electrically Erasable Programmable Read Only Memory) EEPROM also use
MOS circuitry. Data is stored as charge or no charge on an insulated layer or an insulated floating
gate in the device. EEPROM allows selective erasing at the register level rather than erasing all the
information since the information can be changed by using electricalsignals.

10. What is RAM? [May 2013]


Random Access Memory. Read and write operations can be carried out.

11. What is programmable logic array? How it differs from ROM? [Nov 2015]
In some cases the number of don’t care conditions is excessive, it is more economical to use a
second type of LSI component called a PLA.A PLA is similar to a ROM in concept; however it does
not provide full decoding of the variables and does not generates all the minterms as in the ROM.

12.What is mask - programmable? [May 2012]


With a mask programmable PLA, the user must sub mita PLA program table to the
manufacturer.
13. What is field programmable logic array? [Nov 2010]
The second type of PLA is called a field programmable logic array. The user by means of
certain recommended procedures can program the EPLA.

14. List the major differences between PLA and PAL[May 2015]
PLA
Both AND and OR arrays are programmable and Complex .Costlier than PAL AND
PAL
arrays are programmable OR arrays are fixed .Cheaper and Simpler

15. Define PLD. [Nov 2017]


Programmable Logic Devices consist of a large array of AND gates and OR gates that can
be programmed to achieve specific logic functions.

16. Give the classification of PLDs. [May 2016]


PLDs are classified as PROM (Programmable Read Only Memory), Programmable Logic
Array(PLA), Programmable Array Logic (PAL), and Generic Array Logic(GAL)

17. Define PROM. [Nov 2013]


PROM is Programmable Read Only Memory. It consists of a set of fixed AND gates
connected to a decoder and a programmable OR array.

18. Define PLA[May 2014]


PLA is Programmable Logic Array (PLA). The PLA is a PLD that consists of a
programmable AND array and a programmable OR array.
III SEM

19. Define PAL[Nov 2012]


PAL is Programmable Array Logic. PAL consists of a programmable AND array
and a fixed OR array with output logic.

20. Why was PAL developed ? [May 2015]


It is a PLD that was developed to overcome certain disadvantages of PLA, such
as longer delays due to additional fusible links that result from using two programmable
arrays and more circuit complexity.

21. Why the input variables to a PAL are buffered? [Nov 2014]
The input variables to a PAL are buffered to prevent loading by the large number
of AND gate inputs to which available or its complement can be connected.

22. What does PAL 10L8 specify? [May 2011]


PAL - Programmable Logic Array 10 - Ten inputs L - Active LOW Output 8 - Eight
Outputs

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