AN INTRODUCTION

JERROLD H. KRENZ
ELECTRONIC CONCEPTS

Electronic Concepts is a clear, self-contained introduction to modern

microelectronics. Analog and digital circuits are stressed equally from
the outset, and the applications of particular devices and circuits are
described within the context of actual electronic systems. A combina¬
tion of bottom-up and top-down approaches is used to integrate this
treatment of devices, circuits, and systems.
The author begins with an overview of several important electronic
systems, discussing in detail the types of signals that circuits are used to
process. In the following chapters he deals with individual devices such
as the bipolar junction transistor and the metal-oxide semiconductor
field-effect transistor. For each device he presents a brief physical de¬
scription and demonstrates the use of different models in describing the
device’s behavior in a particular circuit application. Throughout the
book, he uses SPICE computer simulations extensively to supplement
analytic descriptions.
The book contains over 500 circuit diagrams and figures, over 400
homework problems, and over 100 simulation and design exercises. It
includes many worked examples and is an ideal textbook for introduc¬
tory courses in electronics. It can also be used for self-study. Laboratory
experiments related closely to the material covered in the book are avail¬
able via the World Wide Web.

Jerrold Krenz received his Ph.D. from Stanford University and is Asso¬
ciate Professor of Electrical and Computer Engineering at the Univer¬
sity of Colorado, Boulder. He is the author of several books, including
Microelectronic Circuits: A Laboratory Approach and An Introduction
to Electrical Circuits and Electronic Devices: A Laboratory Approach.
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ELECTRONIC CONCEPTS

AN INTRODUCTION

JERROLD H. KRENZ
University of Colorado, Boulder

Cambridge
UNIVERSITY PRESS
PUBLISHED BY THE PRESS SYNDICATE OF THE UNIVERSITY OF CAMBRIDGE
The Pitt Building, Trumpington Street, Cambridge, United Kingdom

CAMBRIDGE UNIVERSITY PRESS

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© Cambridge University Press 2000

This book is in copyright. Subject to statutory exception

and to the provisions of relevant collective licensing agreements,
no reproduction of any part may take place without
the written permission of Cambridge University Press.

First published 2000

Printed in the United States of America

Typeface Sabon 10/13 pt. and Futura System IArEX2e[TB]

A catalog record for this book is available from the British Library.

Library of Congress Cataloging in Publication Data

Krenz, Jerrold H., 1934-
Electronic concepts : an introduction/Jerrold H. Krenz.
p. cm.
Includes bibliographical references (p.
ISBN 0-521-66282-6 (hb.)
1. Electronics. 2. Electronic circuits - Computer simulation.
I. Title.
TK7816.K73 1999
621.381 -dc21 99-30407
CIP

ISBN 0 521 66282 6 hardback

N. L. THRTELH^O LffiRARY
M-BEirrjSON COLLEGE OF EDMIO
C/^WELL.ID 83605
CONTENTS

Preface page xi

1 ELECTRONIC SYSTEMS: A CENTURY OF PROGRESS 1

1.1 Electronic Devices: An Overview 3
The Diode: 3 • The Vacuum Triode: 5 • The Transistor and
Integrated Circuits: 6
1.2 Wireless Communication: A New Era 8
Electrical Tuning; 9 • Vacuum Tube Circuits: 10 • The
Superheterodyne Receiver: 11
1.3 The Telegraph and Telephone: Wide-Scale Interconnections 13
The Telegraph: 13 • Basic Telephone System: 14 • Analog
Telephone Signals: 15 • Digital Telephone Systems: 17
1.4 Television: Time-Dependent Visual Images 19
Analog Television: 20 • Cathode-Ray Tube Display: 21 • Video
Camera Devices: 23 • Digital Television: 26
1.5 The Electromagnetic Spectrum: A Multitude of Uses 28
Frequency Spectrum: 29 • Radar: 30 • Communications
Satellites: 32
1.6 Computers: Transistors By the Millions 35
Logic Circuits: 35 • A Basic Computer: 38 • Memories: 42
1.7 Integrated Circuits: Shrinking Device Sizes and Increased
Complexity 45
REFERENCES 47
PROBLEMS 49
COMPUTER SIMULATIONS 56

2 THE SEMICONDUCTOR JUNCTION DIODE: THE BASIS OF MODERN

ELECTRONICS 59
2.1 Electrons and Conduction: A Look at Elementary Processes 60
 2.2 Semiconductors: The Role of Electrons and Holes 65
An Intrinsic Semiconductor: 67 • An n-type
Semiconductor: 68 • A p-type Semiconductor: 69
2.3 The Junction Diode: A Quintessential Semiconductor Device 72
The Built-in Potential: 75 • An External Potential: 76
2.4 The Junction Diode: Its Terminal Characteristics 77
Current of a Diode: 78 • SPICE Model: 81
2.5 A Circuit with a Diode: Dealing with a Nonlinear Element 83
Load Line: 84 • An Iterative Approach: 85 • SPICE
Solution; 87
2.6 Modeling the Junction Diode: The Role of Approximations 92
The Ideal Diode Switch Model: 92 • Constant
Forward-Biased Voltage Diode Model: 94 • Diode Model
with a Series Resistor: 95
2.7 The Photovoltaic Cell: Photon-Semiconductor Interactions 100
Photons: 100
2.8 Light-Emitting and Laser Diodes: Optical Communication 107
Light-Emitting Diodes: 107 • Light-Emitting Diode
Applications: 108
REFERENCES 116

PROBLEMS 118

COMPUTER SIMULATIONS 129

3 THE BIPOLAR JUNCTION TRANSISTOR: AN ACTIVE ELECTRONIC

DEVICE 133
3.1 The Common-Base Configuration: A Physical Description 137
3.2 The Common-Emitter Configuration: Same Device, Different
Perspective 143
Equivalent Circuit: 143 • Transfer Characteristic: 144 •
SPICE Simulation Model: 146
3.3 The Common-Emitter Equivalent Circuit: Solving Transistor
Circuits 153
An External Base Bias: 154 • An Emitter Resistor: 155 • An
Emitter-Follower Circuit: 158
3.4 Digital Logic Circuits: Static and Dynamic Characteristics 164
Transistor Operating Regions: 165 • Capacitive Load: 166 •
Logic Families: 170 • Transistor-Transistor Logic: 173
3.5 Amplifier Circuits: Small-Signal Behavior 177
Analog Signals; 178 • Capacitive Coupling: 179 •
Small-Signal Equivalent Circuit: 181 • Hybrid-jr Transistor
Model: 183

3.6 The PNP Transistor: A Complementary Device 190

Complementary Symmetry: 193

vi CONTENTS
 REFERENCES 198
PROBLEMS 199

COMPUTER SIMULATIONS 210

DESIGN EXERCISES 214

4 THE METAL-OXIDE FIELD-EFFECT TRANSISTOR: ANOTHER ACTIVE

DEVICE 217
4.1 Field-Induced Carriers: The Physics of a MOSFET Device 221
SPICE Model: 226

4.2 The Common-Source Equivalent Circuit: Applications 231

A Common-Source Amplifier: 233 • A Source-Follower
Amplifier: 235

4.3 MOSFET Logic Gates: Basic Considerations 244

An Elementary Logic Inverter: 246 • A MOSFET Inverter
Gate: 247

4.4 Integrated-Circuit Logic Gates: No Resistors 253

An Enhancement-Type Load: 253 • Substrate Bias: 255 • A
Depletion-Type Load: 257
4.5 Complementary Metal-Oxide Semiconductor Logic Gates: An
Energy-Efficient Logic Eamily 262
The p-Channel MOSFET Device: 262 • A CMOS Inverter
Gate: 264 • CMOS Logic Gates: 268
4.6 Logic Memories: The Basis of Megabytes of Storage 272
A MOSFET Bistable Circuit: 272 • A Flip-Flop Memory
Element: 274 • A Memory Array: 275 • The Dynamic
Memory Array: 278
REFERENCES 283
PROBLEMS 284
COMPUTER SIMULATIONS 295
DESIGN EXERCISES 296

5 NEGATIVE FEEDBACK AND OPERATIONAL AMPLIFIERS 299

5.1 Negative Feedback: A Key Concept 303
Decibel Notation: 304 • Reducing Distortion: 305 •
Additional Benefits of Negative Feedback: 309
5.2 Stability: Not All Amplifiers Are Equal 316
Amplifier Phase Shift: 317 • Stability: 321
5.3 Analysis of Operational Amplifier Circuits: Basic
Considerations 327
Ideal Op Amp - Input Virtual Short: 327 • Op Amp
Limitations: 331
5.4 Preemphasis and Deemphasis Circuits: Design Examples 339

CONTENTS vii
 Preemphasis Circuit: 340 • Deemphasis Circuit: 341 •
Design: 342* SPICE Verification: 344
5.5 A Wide-bandwidth Amplifier: A Design Example 346
Single-Stage Amplifier: 347 • Two-Stage Amplifier: 348 •
Three-Stage Amplifier: 349 • Einal Design: 350 • SPICE
Verification: 352
REFERENCES 355
PROBLEMS 356
COMPUTER SIMULATIONS 363
DESIGN EXERCISES 366

6 ELECTRONIC POWER SUPPLIES 369

6.1 Rectifiers: From Alternating to Direct Current 371
The Half-Wave Rectifier: 371 • Full-Wave Rectifier - A
Center-Tapped Transformer: 373 • Full-Wave Rectification -
A Bridge Rectifier: 374
6.2 Filters: Reducing Load-Voltage Fluctuations 380
Capacitor Filters - Half-Wave Rectifiers: 380 • Capacitor
Filters - Full-Wave Rectifiers: 383 • A Nonideal
Transformer: 384
6.3 Zener Diode Regulator: An Improved Output Voltage 390
6.4 An Electronic Regulator: Nearly Ideal Power Supply 396
A Basic Operational Amplifier Regulator: 396 • An Electronic
Regulator with a Zener Diode Voltage Reference: 398 • An
Electronic Regulator with a Band-Gap Voltage
Reference: 399 • The Electronic Switching Regulator: 404
6.5 Batteries: An Increasingly Important Electrical Energy Source 406

REFERENCES 411

PROBLEMS 412

COMPUTER SIMULATIONS 419

DESIGN EXERCISES 421

APPENDIX A FABRICATION OF INTEGRATED CIRCUITS 423

A.l Integrated Circuit Transistors 424
A.2 Fabrication Processes 427
Crystal Growth and Wafer Fabrication: 427 • Epitaxial
Deposition: 428 • Doping: Thermal Diffusion: 428 • Doping:
Ion Implantation: 429 • Thermal Oxidation: 429 • Optical
Lithography: 429 • Etching: 431 • Thin Films: 431
A.3 Summary 432
REFERENCES 432

viii CONTENTS
 APPENDIX B THE DESIGN PROCESS 434
B.l Bipolar Junction Transistor Circuits (Chapter 3) 435
A Single-Transistor Logic Inverter: 435 • Design: 435 •
A Single-Transistor Small-Signal Amplifier: 436 • Design: 437
B.l Metal-Oxide Field-Effect Transistor (Chapter 4) 439
Biasing a MOSFET Circuit: 439 • Design: 439
B.3 Negative Feedback and Operational Amplifiers (Chapter 5) 442
A Small-Signal Amplifier: 442 • Design: 443
B.4 Electronic Power Supplies (Chapter 6) 445
Power Supply With a Selectable Output Voltage: 445 •
Design: 445
REFERENCES 449

Index 451

CONTENTS ix
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PREFACE

The field of electronics or microelectronics today encompasses a vast quantity

of knowledge and practice. The topics that can be covered in a basic course
must, by necessity, be limited to avoid a mere encyclopedic cataloging of various
electronic circuits and systems. There are, however, a set of underlying concepts
that one needs to grasp to understand electronics. It is the goal of the author to
provide students and instructors with an accessible treatment of those modern
electronic concepts along with appropriate applications. Applications are con¬
sidered essential to grasp the utility of general concepts as well as to appreciate
their limitations. The approach used in the text is to cover a limited number of
topics well, as opposed to a cursory coverage of a very wide range of topics that
may do little more than leave one with an extensive vocabulary.
The text provides more than adequate material for a one-semester, junior-
level electronics course. A good working knowledge of linear circuits along with
a reasonable understanding of calculus and physics is required. Although there
is a progression in the complexity of the material covered, the text provides a
flexibility in selecting the material to cover. The author has attempted to provide
sufficient descriptive material to indicate not only what is being done but also to
show how a particular circuit is used. Examples with detailed solutions utilizing
analytic solutions and computer simulations conclude most sections. In addition,
numerous references are cited to allow the interested student to learn more about
a particular topic.
An unique feature of the book is its introductory chapter, which provides an
overview of several electronic systems. This chapter makes the learning task more
interesting for the students and serves to introduce them to the signals that elec¬
tronic circuits are used to process. Electronic circuits were developed to fulfill par¬
ticular needs. At the same time, the evolution of electronic systems depended on
what could be done with the electronic devices then available. The text provides a
combination of a top-down and a bottom-up approach. Systems are considered
as well as basic physical concepts that are necessary for understanding devices.
The text provides a transition from the coverage of introductory circuit theory
courses that tend to deal only with two-terminal linear devices for which simple

XI
circuit models are valid {v = iR, etc.)* Although, for circuit theory, it is seldom
necessary to distinguish between the model and the device it describes, this is
not the case for electronic devices. In Electronic Concepts, a student is gradually
introduced to the use of different models used for a single device. The particular
model employed depends on the nature of the circuit in which the device is used
and the signals involved. The treatment of circuits with nonlinear devices and
with three (and at times four) terminals is recognized as a significant conceptual
leap for students.
The second chapter. The Semiconductor Junction Diode, includes a brief qual¬
itative discussion of semiconductor physics. Although it is recognized that an
in-depth knowledge of semiconductor physics is very important, the author feels
that this can best be accomplished in a concurrent or subsequent theory course.
Electronic Concepts discusses electrons and holes moving as the result of potential
differences, thereby providing a basis for an intuitive understanding of semicon¬
ductor devices. Load lines, the diode equation, and various diode models used
to approximate the behavior of diodes are introduced. The basic principles of
photovoltaic cells and light-emitting diodes are discussed as well as important
applications.
The bipolar junction transistor is introduced in Chapter 3 before the coverage
of field-effect devices in Chapter 4. Treating field-effect devices first does have
a certain appeal because, for some applications, the field-effect models are sim¬
pler than those of bipolar junction transistors. However, the bipolar junction
transistor is a direct extension of the junction diode, and this type of transistor is
considerably more convenient for doing laboratory experiments. An understand¬
ing of individual semiconductor devices, as viewed from their terminals, as well as
the concepts related to using devices for amplification and switching is stressed.
Chapter 4 provides a brief qualitative physical discussion of MOSFET devices
and introduces approximate analytical expressions for their terminal behavior.
Although the behavior of analog circuits based on the small-signal behavior of
devices is covered, the main thrust of this chapter is digital circuits. Both the
static and dynamic behaviors of logic gates using device configurations suitable
for integrated circuits are determined. Following a treatment of bistable circuits,
semiconductor memories are discussed.
Negative feedback, along with operational amplifiers, is the subject of
Chapter 5. The feedback nature of operational amplifier circuits is stressed be¬
cause the frequently used “ideal op amp” treatment of basic circuit texts generally
glosses over the feedback nature of op amp circuits. Negative feedback, although
introducing a higher order of complexity, is shown to offer many improvements
over circuits without feedback. It is also emphasized that if feedback is not used
properly, undesirable behavior can occur. Analog design techniques using op
amps are highlighted in this chapter.
A concluding chapter on electronic power supplies treats rectifiers, filters, elec¬
tronic regulators, and batteries. A knowledge of this material, all too frequently
omitted in basic electronics courses, is necessary for the design of nearly all elec¬
tronic systems. This chapter may be covered immediately after Chapter 2 if the
electronic regulator section is omitted.

PREFACE
 Appendix A on the fabrication of integrated circuits carries one beyond the
electronics circuits emphasis of the text. It provides a glimpse of the physical
and chemical techniques used in the fabrication process and a perspective on the
actual physical structures and sizes of devices. Appendix B, The Design Process,
carries through the design of a few sample electronic circuits. Explanations are
provided for each step so that the student may appreciate the rationale for the
design decisions.
Computer simulations are used throughout the text. It is assumed that students
are familiar with SPICE, that is, that they have used it in a linear circuits course
(if not, numerous basic reference texts are available). Circuit files, common for
all versions of SPICE, are included for all simulation examples. Although the text
uses Probe (MicroSim) graphs, similar presentations can be obtained with other
programs.
Problems requiring analytical solutions as well as computer simulations are
also included. There are considerably more problems and simulations than can
be used for a one-semester course, and thus instructors can vary assignments
from semester to semester and reduce the use of solutions from previous classes.
Computer simulations are limited to circuits that can be run on personal com¬
puters with the student version of the PSPICE program. Open-ended, design-type
exercises are also included.
Laboratory experiments that relate directly to the theory of each chapter are
also available on the World Wide Web:
http://vvww.cup.org/titles/66/0521662826.html

A portable document format (.pdf extension) is used for the experiments so that
they may readily be downloaded and printed. Detailed experimental steps are
employed to guide a student through a set of measurements and observations, and
minimum effort is required on the part of the instructor. Alternatively, portions
of experiments may be used for classroom demonstrations.

Boulder, CO

PREFACE xiii
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 CHAPTER ONE

ELECTRONIC SYSTEMS: A CENTURY

OF PROGRESS

Our daily lives are shaped by electronic systems. In the home we have a myriad
of electronic accessories: radios, TVs, VCRs, hi-fis, camcorders, cassette and CD
players, telephone answering machines, microwave ovens, and personal com¬
puters. Not so obvious but just as much a part of our lives are sophisticated
electronic controls such as the microprocessor engine control of our car. We
utilize a telephone system that functions with electronic devices to amplify and
transfer telephone signals. Our conversations are carried around the world using
a combination of microwave or fiber-optic links and satellites. Electronic radar
systems are relied on for a safe flight from one airport to the next, and electronic
sensors and computers “fly” a modern jet airplane. Modern medical practice
depends on extremely complex diagnostic and monitoring electronic systems.
Moreover, the commercial and industrial sectors could no longer function with¬
out electronic communications and information processing systems. The video
monitor is a pervasive reminder of the new electronic world.
For better and at times for worse, electronics has changed our lives. Although
we are in constant touch with what is happening around the world, we are
also at the peril of weapons of unimaginable destructive power that rely on
electronic developments. An understanding of electronics is imperative not only
for designing and using electronic systems but for directing the evolution of
electronic systems so that they serve to improve the human condition.
It has been stated that to move forward we must know where we have been.
The 20th century is the era of electronics - it was only after 1900 that the de¬
vices we now describe as electronic appeared. The use of the term electron¬
ics in the current sense did not occur until 1930 (Siisskind 1966). This intro¬
ductory chapter starts with a very brief overview of electronic devices and is
followed by a discussion of wireless systems: radio. The first application of
electronic devices, the vacuum tube diode invented in 1904 and the triode in¬
vented in 1906, was for radio receivers. Radio communications was not only
nearly a decade old at the time the tube was invented, but most of the systems
of the first decade of the 1900s did not use tubes. The vacuum tube, without

1
 exaggeration, can be described as having revolutionized radio communications,
resulting in the generation of coherent transmitting signals and highly sensitive
and selective receivers. The vacuum tube, follov^ing its first telephone use in
1913, also became an important component of telephone systems. With vacuum
tube amplifiers and multiplexing circuits, long-distance telephone service greatly
expanded. With the development of digital systems made possible by the tran¬
sistor and integrated circuits in the latter half of the 20th century, telephone
switching and transmission systems were again significantly improved.
The development of electronic devices, on the one hand, depended on a knowl¬
edge of basic physical principles: the behavior of electrons in a vacuum and the
interaction of electrons with matter. On the other hand, electron devices were
frequently developed to fulfill perceived needs. The characteristics of electronic
devices dictated those applications that could be realized. Television, discussed
in Section 1.4, illustrates the interrelatedness of the development of electronic
devices and circuits with a particular application. An analog television system
was developed in the 1930s and was commercially introduced in the late 1940s.
Over the rest of the 20th century, television was based on this analog system, and
the only enhancement was the introduction of a subcarrier for color information.
At the close of the 20th century, a digital system, totally different, and therefore
incompatible with the analog system, was developed. Although this digital sys¬
tem, from a transmission perspective, is considerably more efficient, the signal
processing required is very complex. Without the development of very-large-
scale integrated (VLSI) circuits during the 1980s that could do the encoding and
decoding, digital TV would not have been possible.
The electromagnetic spectrum (Section 1.5) is used for a variety of radio, TV,
and other communications services. Although early radar systems can be traced
back to the 1930s, it was the impetus of World War II that resulted in a rapid
development of this technology. New electronic devices capable of transmitting
and detecting extremely high-frequency signals (f > 1000 MHz) were invented.
Communications satellites, first launched in the 1960s, also relied on these ex¬
tremely high-frequency (microwave) devices.
Digital electronic circuits have revolutionized computing. Early computers,
until about the mid-1960s, relied on vacuum tube circuits. These computers,
from today’s perspective, not only had minuscule processing capabilities, but,
owing to the limited reliability of vacuum tubes, were frequently down. Solid-
state devices resulted not only in a tremendous improvement in reliability but
made possible machines with much greater computing capabilities. With ultra-
large-scale integrated circuits, desktop computers emerged with a computing
capability that a decade earlier was available only in large mainframe machines.
Needless to say, electronic devices and circuits have become common for many
applications in addition to those discussed. Power electronics is dependent on
electronic switching devices and circuits. Frequency and voltage transforma¬
tions, as well as alternating-to-direct-current and direct-to-alternating-current
conversions can often be efficiently achieved using electronic systems. In medical
electronics, a variety of electronic sensing circuits have been developed along
with computer systems to process and display the data. Furthermore, electronic

2 ELECTRONIC SYSTEMS
systems, such as heart pacemakers, have been perfected to augment body func¬
tions. Electronic sensing and control systems dependent on simple micropro¬
cessors are now used in applications ranging from programmable thermostats to
automobile ignition and fuel systems. More complex sensing and control systems
involving large computing capabilities are used for automated manufacturing sys¬
tems. Although it is beyond this introductory chapter to discuss these and other
applications, it should be recognized that similar electronic devices and circuits
are often used by these different systems. A knowledge of basic concepts, the
subject of this text, is a prerequisite for understanding both the simplest and the
most esoteric of electronic systems.

1.1 ELECTRONIC DEVICES: AN OVERVIEW

The thermionic valve or vacuum tube was developed in Great Britain by Sir John
Ambrose Fleming (Pierce 1950; Shiers 1969). This tube relied on what is known
as the Edison effect, a current being produced by the hot filament of a light bulb.
Fleming, through a series of experiments with bulbs having an electrode near the
hot filament, deduced that this current was due to negative electric charges. We
now understand the current to be due to electrons emitted by the hot filament that
are collected by the electrode. To the extent that only electrons are responsible
for this current, the current to the electrode is only in one direction; in a high-
vacuum tube, a current corresponding to the movement of positive charges does
not occur.

THE DIODE
Fleming’s valve consisted of a hot filament (corresponding to the incandescent
filament of a light bulb) heated by a current produced by an external battery.
The emitted electrons were then collected by a plate surrounding the filament
(Figure 1.1). Even though the physical current is that due to electrons traveling
from the filament to the plate, the plate current ip, is, by convention, a positive
quantity because a current is defined in terms of the movement of hypothetical
positive charges. A positive plate voltage vp attracts electrons, thus increasing
the current, whereas a negative plate voltage repels electrons, yielding either

Figure 1.1: Vacuum tube diode and typical characteristic.

physical symbolic volts

representation representation typical characteristic

1.1 ELECTRONIC DEVICES: AN OVERVIEW 3

 a very small or zero current. This nonlin¬
ear effect results in a current in only one
direction {ip > 0). For significant negative
voltages, the current of a well-evacuated
+
tube is essentially zero.
At about the same time that Fleming
i—»- Vp) introduced his vacuum tube, Greenleaf
semiconductor W. Pickard was experimenting with a point-
diode symbol contact semiconductor detector (Douglas

Figure 1.2: Semiconductor diode and a typical char¬

1981). This device may be considered the
acteristic. precursor of modern solid-state devices. In
addition to the detector using silicon de¬
veloped by Pickard, a similar detector using Carborundum was developed by
Henry H. C. Dunwoody in 1906. Point-contact diodes were extensively used
until the junction semiconductor diode was introduced in the 1950s.
A semiconductor diode has a nonlinear characteristic, as does the vacuum
tube (Figure 1.2). The current of the diode io increases very rapidly with diode
voltage vd (for an ideal semiconductor diode it may be shown that the current has
an exponential dependence on the diode voltage). The rectification property of a
diode, which allows a current in only one direction, was first used for the detection
of radio signals. The detection problem provided the impetus for the development
of vacuum tube and semiconductor diodes. Represented in Figure 1.3 is a basic
radio receiver with a typical amplitude-modulated carrier signal. Although carrier
frequencies of 50 to 100 kHz were common for early communications systems,
the present radio broadcast band consists of signals with carrier frequencies of
540 to 1600 kHz. For an on-o/f system (continuous wave or CW), the carrier
is simply keyed on and off to form a pattern of dots and dashes. However,
for amplitude modulation (AM), the amplitude of the carrier signal is varied
in accordance with the modulating signal; for example, that of a voice signal
produced with a microphone.
It should be noted that the period corresponding to the carrier frequency
is generally much smaller than that associated with the time scale over which
appreciable variations in the modulating signal occur. In a radio receiver, the

Figure 1.3: An elementary diode radio detector.

4 ELECTRONIC SYSTEMS
energy received by the antenna
is coupled to the tuned circuit
which, ideally, excludes all other
signals with different carrier
frequencies. A diode rectifier is
then used to convert the carrier
signal vc(t) to a signal with a
single polarity. For the circuit
shown, the capacitor Q tefids
to smooth the detected signal. physical representation symbolic representation

Without the capacitor, a signal Figure 1.4: A triode vacuum tube.

similar to the top half of vc(t)
would result.

THE VACUUM TRIODE

The next significant development that, in effect, ushered in the electronics age,
was Lee De Forest’s addition of a control electrode or grid to Fleming’s vacuum
diode. This resulted in the triode vacuum tube. A sketch of the physical device,
which is referred to as a triode because it has three elements, is presented in
Figure 1.4. The third element, the grid, is a cagelike wire structure surrounding
the filament of the tube. An externally applied grid potential regulates the plate
current of the tube.
For normal operation, the grid is at a negative potential (relative to that of
the filament), which tends to repel electrons emitted by the hot filament. The
more negative the grid potential vg, the smaller the plate current ip for a given
plate voltage vp (Figure 1.5). Because electrons are repelled by a negative grid
potential, the grid current is essentially zero. (The exceedingly small grid current
that does occur is due to positive ions produced by ionizing electron collisions
with the air molecules of the imperfect vacuum. Although the grid current of
De Forest’s early tube may have been significant, those of later tubes with good
vacuums were truly negligible.) As a result of this essentially zero grid current, the
power utilized by the grid circuit is extremely close to zero. Herein lies the worth
of the triode vacuum tube. Its plate current and voltage are not only controlled
by the grid voltage, but essentially zero power is required to do the controlling. It
is not a perpetual-motion device (a power
Figure 1.5: The plate characteristic of a typical
source is required for the plate circuit) but, for
triode vacuum tube.
many applications, it is the next best thing!
To illustrate the utility of a vacuum tube tri¬
ode, consider the typical characteristic of Fig¬
ure 1.5 and suppose that a constant current
source of 10 mA is connected between the fil¬
ament and plate of the tube (/> = 10 mA). For
a particular value of grid voltage, the resultant
plate voltage corresponds to the intersection
of the curve corresponding to that grid volt¬
age with the 10-mA coordinate (shown as a

1.1 ELECTRONIC DEVICES: AN OVERVIEW 5

 Vp dashed line in Figure 1.5). A grid voltage of —4 V, for
example, results in a plate voltage of 180 V; a grid
voltage of —6 V in a plate voltage of 220 V, and so
forth. The transfer characteristic of Figure 1.6 is thus
obtained. Of particular importance is that a relatively
volts
small change in grid voltage results in a fairly large
change in plate voltage. The slope of the characteristic
of Figure 1.6 is approximately —20. This implies that
a 1-V change in vc results in a change of —20 V in up.
The minus sign signifies that an increase in vg results
volts
in a decrease in up. This circuit therefore has a voltage
Figure 1.6: The transfer characteristic
gain with a magnitude of approximately 20.
of the triode of Figure 1.5.
The first triode vacuum tube of De Forest was used
to detect radio signals (in place of the diode of Figure 1.3); it was initially de¬
scribed as an oscillation valve. However, because vacuum tube triodes have the
ability to amplify as well as to detect radio signals, tubes were soon used for
a multitude of applications, including the generation of high-frequency radio
signals.

THE TRANSISTOR AND INTEGRATED CIRCUITS

Solid-state devices, transistors, have replaced vacuum tubes for most, but not
all, electronic applications. The symbolic representation and typical characteristic
of a modern metal-oxide semiconductor field-effect transistor (MOSFET) are
given in Figure 1.7. For the device shown, free electrons from the source of the
MOSFET semiconductor device flow to its drain. In a manner analogous to that
of the grid of the vacuum tube, the free-electron current is controlled by the gate
potential of the MOSEET device. The gate current, like the grid current of a
triode, is essentially zero. The free electrons, however, are produced by a doped
semiconductor rather than by a hot filament, thus resulting in a much more
efficient device. Furthermore, the voltage levels required for a typical MOSFET
application are considerably smaller than those of a typical triode vacuum tube
circuit.

Figure 1.7: The metal-oxide semiconductor field-effect transistor (MOSFET).

Drain ip,

+ volts
Gate

Source
^DS
Symbolic representation

6 ELECTRONIC SYSTEMS
 In addition to MOSFET devices, the bipolar junction transistor (BJT) is also
extensively used in modern electronic circuits. Germanium bipolar junction tran¬
sistors were developed shortly after the invention of the point-contact transistor
in 1948. With the development of silicon processing techniques during the 1950s,
germanium and silicon transistors tended to replace vacuum tubes for most appli¬
cations by the 1960s. It was, however, the introduction of the integrated circuit,
a single semiconductor wafer initially limited to a few tens of transistors, that
has had the most profound effect on electronic systems. This effect has been
characterized by some as revolutionary (Noyce 1977).
Vacuum tubes generally consisted of only one, two, or possibly three electronic
devices enclosed by a single glass envelope. These tube circuits were generally
mounted on a metal chassis that had sockets relying on spring contacts to hold
the vacuum tubes. This permitted vacuum tubes to be readily replaced - an all-
too-frequent need. Connections between the sockets and other components were
achieved through hand-soldered wires. Small components, such as resistors and
capacitors, were often supported directly by their leads while forming connections
between components.
Even the earliest commercially produced transistors, introduced during the
1950s, were considerably more reliable than the vacuum tubes they replaced.
Hence, transistors could be wired directly into a circuit, thereby eliminating
the need for sockets. This led to the printed circuit board utilizing copper foil
conductors bonded to a phenolic base. Transistors, as well as other components,
were mounted directly on the printed circuit board, and a dip-type soldering
process was used for electrical connections to the copper foil. Because transistors
are much smaller than vacuum tubes and tend to dissipate considerably less
power, a much higher density of components was possible.
A batch process was soon developed in which several transistors were simul¬
taneously fabricated on a single semiconductor wafer. The wafer was then cut
to obtain individual transistors, leads were attached, and the transistors were
encapsulated in a package suitable for their application. During the assembly
process, individual transistors were tested, and faulty ones were discarded. With
the improvement of processing techniques, the yield of well-functioning devices
greatly increased.
In retrospect, it now seems obvious to question why the individual transis¬
tors of a semiconductor wafer were separated. Why not develop a process for
electrically isolating the devices from each other to replace the isolation that had
been achieved by cutting them apart? The devices could then be interconnected
on the semiconductor wafer to form what we now refer to as an integrated cir¬
cuit. At the end of the 1950s, this idea was realized (Meindl 1977). As is often
the case, several individuals working independently were involved in develop¬
ing the earliest integrated circuits. However, Jack Kilby is frequently credited
with having “invented” the integrated circuit (Kilby 1976). In 1958, he demon¬
strated a hand-fabricated phase-shift oscillator and a flip-flop using germanium
transistors. Resistors consisted of appropriately doped semiconductors, whereas
capacitors utilized reverse-biased semiconductor junctions. These demonstration
circuits established the feasibility of a concept that was rapidly exploited.

1.1 ELECTRONIC DEVICES: AN OVERVIEW 7

\
 1.2 WIRELESS COMMUNICATION: A NEW ERA
The first use of the triode vacuum tube was for wireless communication. Lee
De Forest, its inventor, described the tube as an oscillation valve — that is a
device for detecting wireless or radio signals. (As an aside, it should be noted
that Lee De Forest’s autobiography has the subtitle of Father of Radio. This
parentage is not widely accepted.) A close relationship of electronic devices to
radio characterized the first half of the 20th century. The related professional
organization in the United States was the Institute of Radio Engineers founded
in 1912. It was not until 1963 that the designation “radio” was dropped when
this organization merged with the Institute of Electrical Engineers to form the
Institute of Electrical and Electronic Engineers (IEEE).
Maxwell’s equations, the kernel of electromagnetic theory, provide the basis
on which wireless communication, that is radio, is based. James Clerk Maxwell
built on the work of Coulomb, Oersted, Ampere, Henry, Earaday, and Gauss in
formulating these now well-known equations. Through a series of experimental
observations and theoretical deductions, Heinrich Rudolf Hertz demonstrated
the validity of Maxwell’s equations. Hertz published the first text on electro¬
dynamics in 1892 Untersuchungen iiber die Ausbreitung der elektrischen Kraft
(Electric Waves, the title of an English translation by D. E. Jones). Following the
death of Hertz in 18 94, the lectures on the studies of Hertz by Oliver Joseph Lodge
laid the groundwork for a much wider understanding of electromagnetic princi¬
ples. Lodge and Ferdinand Braun were responsible for developing the concept of
resonant tuning and demonstrating the importance of having the transmitter and
receiver of a system tuned to the same frequency (Aitken 1976, Jolly 1975, Kurylo
and Siisskind 1981, McNicol 1946). Concurrently, Oliver Heaviside is credited
with putting Maxwell’s equations into their presently utilized form (Nahin 1988,
1990).
A difficulty encountered in performing early electromagnetic experiments was
that of obtaining a suitable detector of high-frequency signals. An early detector
was the coherer, basically a small glass tube filled with loosely packed metal
filings. The operation of this device relied on the nonlinear nature of the resistance
of the filings. For small currents the filings had a high resistance, whereas for
larger currents the filings tended to cohere, resulting in a small resistance. A
mechanical tapping of the coherer was necessary to restore the high resistance
after the termination of a large current. For a receiver, the alternating current
produced by an electromagnetic signal caused the filings to cohere. This effect
was detected by a low-voltage direct-current circuit connected to the coherer.
Edouard Branly developed several different coherers and appears to have been the
first to use the term radio (in this context) by proposing the name radioconductor
for the coherer.
It was Guglielmo Marconi who in 1895 refined and assembled the appro¬
priate apparatus and demonstrated that it could be used for signaling (Jolly
1972, Masini 1995). Not being successful in interesting his Italian government
in this new means of communication, he traveled to England, where the British
post office was receptive. Recognizing the commercial importance of wireless

8 ELECTRONIC SYSTEMS
 infinite R

Figure 1.8: A resonant circuit.

telegraphy, he took out patents and formed the Marconi Wireless Signal Com¬
pany. Progress was rapid: in 1901 he succeeded in sending a wireless signal across
the Atlantic.

ELECTRICAL TUNING

An important aspect of radio communication is that of tuning; that is, to

utilize a circuit that has an optimal response at a particular signal frequency.
This is generally achieved with an inductor-capacitor circuit such as that of the
parallel circuit of Figure 1.8. The resistance R is included to account for circuit
losses (the resistance of the inductor) and energy that might he radiated as a result
of an antenna connected to the circuit. Early wireless transmitters used a current
impulse is produced by a spark gap to initiate the voltage oscillations of the
circuit. Consider the case for which the circuit has previously been excited and
the current is is zero. This implies that the sum of the currents of the individual
elements must be zero, as given by the following:

is(t) = ii + ic + iR = 0
(1.1)

These two equations may be combined and then differentiated to produce a single
second-order differential equation:

1 ,
/
^dv V
V dt C——H ~ — 0
L dt R
(1.2)
dd'v 1 dv V
= 0
d^ RCdi LC
For an ideal circuit with no loss (R^ oo), a. constant-amplitude oscillating volt¬
age is a valid solution of the differential equation as follows:
1
v(t) = V^COSWo^, (Oq = —,- (1.3)

1.2 WIRELESS COMMUNICATION: A NEW ERA 9

 Hence, once this lossless circuit is excited by an external current, its voltage will
continue to oscillate indefinitely.
For a circuit with loss (finite R), damped sinusoidal oscillations occur given by

v{t) — V^e cos coot

(1.4)
1
a =
2^’
The current impulse of a spark was used for the earliest wireless transmitters.
Modern transmitters (radio and TV stations, citizens band transceivers, cellular
telephones, etc.) rely on essentially the same principle except that an electronic
exciting circuit is utilized that generally provides a current impulse for each
oscillating cycle.
How does this circuit manage to continue to oscillate when the exciting cur¬
rent no longer exists? To answer this question, we must recall that inductors
and capacitors store electrical energy. Let ec and be the instantaneous stored
energies of the capacitor and inductor, respectively.

ec = \cv\ eL = \Li^ (1-5)

Consider the idealized case {R ^ oo) for which the amplitude of the voltage is
constant (Eq. (1.3)).

1 / .
ti= — I V dt — —- sm(Z)o^
LJ (oqL
(1.6)
1 9 1,2 1
ei — ^ sin coot = -Csin coot because —j = LC
2 cjOq L 2 coq
The total energy ec + cl is constant for this circuit:

1
_ ^
Cc + (1.7)
2 (OqL

It will be noted that when the stored energy of the capacitor is a maximum, that
of the inductor is zero and vice versa (Figure 1.9).
In effect, there is an interchange of energy between the capacitor and the
inductor of the circuit. For a circuit with a finite resistance, the electrical energy
is gradually dissipated by the resistor; that is, the electrical energy is converted
to thermal energy (or radiated if the resistor represents the effect of an antenna).

VACUUM TUBE CIRCUITS

Following its invention, the vacuum tube triode was extensively improved, and
numerous electronic circuits were developed that greatly increased the tube’s util¬
ity. Armstrong’s invention of regeneration in 1912, the use of positive feedback
to increase the gain of a circuit, increased the sensitivity of receivers. For exam¬
ple, using Armstrong’s regeneration principle, it is possible to build a shortwave
receiver with but a single vacuum tube (or transistor) that is capable of receiv¬
ing signals from all over the world. A modification of this circuit was also used

10 ELECTRONIC SYSTEMS
 v{t)

energy

energy
interchange

Figure 1.9: The energy interchange of a resonant circuit.

to produce radio-frequency oscillations that allowed the replacement of radio

transmitters relying on either spark-gap or mechanical alternator generators.
Although Armstrong was the first to submit a patent application for regener¬
ation, the application was immediately challenged by De Forest. It was claimed
by De Forest that this effect was discovered a year earlier in his laboratory, albeit
the technician’s curt notebook entry for the circuit was “no good.” A lifelong
animosity surrounding legal challenges over patents ensued between these two
radio pioneers. Armstrong was initially granted a patent for regeneration and
successfully resisted the early challenges of De Forest. Eventually, however, De
Forest won through challenges that were carried all the way to the U.S. Supreme
Court. Nevertheless, Armstrong is generally accepted as the circuit’s inventor,
and the historical record indicates that Armstrong had a better understanding
of the circuit than De Forest. The Institute of Radio Engineers (IRE) honored
Armstrong for the regeneration invention with its medal of honor in 1918.
When Armstrong attempted to return the medal in 1934 after losing De Eorest’s
patent challenge, the IRE board of directors not only refused to accept the re¬
turn of the medal (a unanimous decision) but reaffirmed its initial citation (Lewis
1991).

THE SUPERHETERODYNE RECEIVER

Among Armstrong’s numerous inventions is the superheterodyne radio re¬

ceiver. His earlier regenerative receiver, although sensitive, was prone to behave
erratically (it frequently burst into oscillation). Tuned circuits, such as the paral¬
lel resonant circuit of Figure 1.8, are required to select a desired radio signal and
to reject other signals. In addition, tuned circuits are used to enhance the gain of
radio-frequency amplifiers. To tune a given circuit, its capacitance, inductance,
or both must be changed. Several amplifiers, each with a tuned circuit, are of¬
ten needed. The tuning of a radio thus required the simultaneous adjustment of
several circuits - a tuning knob was needed for each circuit.

1.2 WIRELESS COMMUNICATION: A NEW ERA 11

 antenna

mixer
intermediate-
audio
frequency detector
signal
A^{t) cos Infct >r ^mix(0 amplifier

B COS 271/igf

local
oscillator

Figure 1.10: A superheterodyne receiver.

Armstrong recognized that the carrier frequency of a signal could be changed

through a nonlinear mixing process (Figure 1,10). Consider the case for an
amplitude-modulated signal cos lit fct derived from an antenna system.
A second high-frequency signal generated by the local oscillator of the receiver,
B cos In fiot, is also required. Suppose, initially, that the mixer results in an out¬
put voltage Vmixit) that is the product of its two inputs (a standard multiplier
symbol is shown in Figure 1.10) as expressed by

i;j^;,j(^) == Am{t) cos In fct ■ B COS In fi^t

= ^Am{t)B{cosln{f\o+ /c)^-|-cos27r(/io - fc)t] (1-8)

The preceding result was obtained using the trigonometric identities for the cosine
of the sum and difference of two angles as follows:

cos(q: -|- yd) = cos a cos yd — sin a sin yd

coslo; — yd) = cosa cosyd + sina sinyd (1-9)
1
coso; cos yd = -[cos(q; + yd) + coslo; — yd)]

The output voltage of the mixer consists of two signals, one multiplied by
cosln{f\o + fc)t and the other multiplied by cos27r(^io — fc)t. These signals
are two distinct amplitude-modulated signals, one having a carrier frequency of
f\o + fc and the other of /lo — fc- The amplitude of each is proportional to the
amplitude of the original signal, that is, Am{t).
Consider the case for a typical AM broadcast receiver that might be tuned
to receive an amplitude-modulated signal with a carrier frequency of 1350 IcFlz.
Suppose that its local oscillator is generating an 1800-kHz signal. The output of
the mixer would consist of two amplitude-modulated signals, one with a carrier
frequency of 450 kHz and the other with a carrier frequency of 2250 kHz. If
the intermediate-frequency amplifier is tuned to a frequency of 450 kHz, the
component with a carrier frequency of 450 kHz would be amplified, whereas the
2250-kHz carrier signal would be lost. The 450-kHz signal would be detected
after being amplified, thus yielding an audio output signal corresponding to the
amplitude modulation Am(t) of the received signal. (A level shifting, generally
achieved with a coupling capacitor, is also necessary to recover the audio signal.)

12 ELECTRONIC SYSTEMS
 What is the advantage of a superheterodyne receiver? Again, consider the
broadcast receiver with an intermediate-frequency amplifier tuned to a fixed fre¬
quency of 450 kHz. The carrier frequency of the signal to which the receiver
responds depends on the receiver’s local oscillator frequency. To receive a signal
of 550 kHz (the lower end of the broadcast band), a local oscillator frequency of
1000 kHz is required. This results in signals with carrier frequencies of 450 kHz
and 1550 kHz being produced by the mixer. The 450-kHz signal is amplified,
and the 1550-kHz signal is rejected. To receive a 1600-kHz signal (the upper
end of the broadcast band),’"a local oscillator frequency of 2050 kHz is required,
which, in turn, produces mixer output signals with frequencies of 450 kHz and
2500 kHz. The advantage of this receiver is that tuning is achieved by changing
the local oscillator frequency (a range of 1000 to 2050 kHz is required). Al¬
though this necessitates that the inductance, capacitance, or both of the circuit
be changed, the resonant frequency of only a single circuit needs to be changed.
Even for an improved receiver, in which a tuned circuit is employed for the in¬
put of the mixer, a mechanical tracking system is used to tune the two circuits
simultaneously with a single tuning knob.

1.3 THE TELEGRAPH AND TELEPHONE:

WIDE-SCALE INTERCONNECTIONS
The telephone, invented by Alexander Graham Bell in 1876, predated electronic
devices by over a quarter of a century (Bruce 1973, Sharlin 1963, Pupin 1926).
By the time of the invention of the vacuum tube triode in 1906, the telephone
was widely used throughout urban areas. The operation of the telephone was
predicated on an earlier electrical communication system, the telegraph. Bell was
attempting to develop a multiplexing system to transmit several telegraph signals
simultaneously on a single telegraph line when he went “astray” and invented the
telephone. It is not, however, inappropriate that Bell should be associated with
the telephone because he, his father, and his grandfather were highly respected
speech specialists (elocution experts).

THE TELEGRAPH

The telegraph system of Morse, invented in 1837, depended on the earlier

work of Volta, Oersted, and Ampere, among others. Volta (after whom the volt¬
age unit is named) devised the first battery, an “electrochemical pile” consisting
of zinc and silver discs separated by brine-soaked cloth or paper. Oersted ob¬
served that an electric current produces a magnetic field, and Ampere established
the mathematical theory relating magnetic fields to electric currents. This led to
the development of the electromagnetic responder, the basis of the telegraph re¬
ceiver. An elementary telegraph system is shown in Figure 1.11. Morse’s success
depended on the then available electrical devices, which he assembled into a tele¬
graph system. His prime contribution, that for which he is generally remembered,
was a binary coding system for signaling. An on state corresponded to a current
(the key depressed), and an off state corresponded to no current. Furthermore,

1.3 THE TELEGRAPH AND TELEPHONE: WIDE-SCALE INTERCONNECTIONS 13

 telegraph key
£

telegraph line electromagnetic

sounder
battery

.ground return-

sending station receiving station

Figure 1.11: An elementary telegraph system.

on periods were broken into short and long intervals, that is, the dots and dashes
that we now refer to as Morse code.
Morse’s original telegraph system utilized a receiver consisting of a pencil
activated with an electromagnet, which made a trace on a moving strip of paper.
A telegraph operator would then decode the marks, thus recovering the original
message. Operators, however, soon discovered that they could directly decode the
message by listening to the clicks of the printer - the marked tape was unnecessary.
The electromagnetic sounder was developed to optimize the decoding, one type
click being associated with the electromagnet’s being activated and the other
with its being deactivated, thus distinguishing the off-to-on from the on-to-off
transition of the current.
A revised code, the American Morse code, was used for wired telegraph sys¬
tems in the United States, whereas a second version of this code, the International
Morse code, was adopted for wireless communication and is still extensively used
for shortwave radio communications by radio amateurs and others. The same
o«-o/jf signaling principle utilized in the early telegraph forms the basis of today’s
modern fiber-optic systems. The light from a light-emitting laser, which is turned
on and off, is transmitted through an optical fiber to a receiver, a light-detecting
diode. Not only is the speed of the fiber-optic system much greater, but the elec¬
trical signals, such as those produced by a telephone, are directly encoded into
ow-o/f signals.

BASIC TELEPHONE SYSTEM

The telephone of Figure 1.12 works on a similar principle to that of the tele¬
graph. In place of the key, a microphone is used to modulate the current of the
circuit. Bell initially utilized a microphone that consisted of a diaphragm attached
to a needle immersed in an acidic solution. The motion of the needle, the result
of sound waves striking the diaphragm, caused the resistance of the circuit to

Figure 1.12: A basic telephone system.

14 ELECTRONIC SYSTEMS
fluctuate. The fluctuating resistance, in turn, resulted in circuit current fluctua¬
tions. As for the telegraph system, an electromagnet was used for the receiver. In
place of metallic contacts to produce the clicks of a sounder, an iron diaphragm
acted upon by a magnetic field was used. A permanent magnet and an electromag¬
net energized by the fluctuating current of the telephone circuit jointly produced
the magnetic field.
An improved telephone microphone in which carbon granules were used in
place of the acidic solution was soon introduced. The motion of the microphone’s
diaphragm produced pressure fluctuations on the granules, which, in turn re¬
sulted in a fluctuation in resistance. Although modified versions of the carbon
granule microphone have been introduced, this type of microphone is still used
for phones over 100 years after being first introduced.
The circuit of Figure 1.12 is bidirectional, with two transmitters and receivers,
so that either party can transmit while the other listens. In place of the earth
ground return of the telegraph system, a second wire is used to complete the tele¬
phone circuit. A ground return, although reducing the amount of wire required,
resulted in erratic and unpredictable effects. Today, a pair of wires is universally
used for all local telephone connections (for example, to connect one’s home
phone to the telephone office). With a two-wire circuit, interference (cross talk)
caused by electric and magnetic coupling between different telephone circuits is
greatly reduced.
In addition to radio applications, early triode vacuum tubes were also used
for long-distance repeater telephone amplifiers. As a result of insulation and wire
losses, telephone signals are attenuated, that is, they become weaker as the length
of the telephone line is increased. Before the advent of the vacuum tube amplifier,
a mechanical-type amplifier was developed that consisted of a tightly coupled
telephone receiver and a carbon granule microphone. Unfortunately, it badly
distorted the telephone signal. The triode vacuum tube amplifier, first used as a
telephone repeater in 1913, was the ideal solution for extending long-distance
telephone service. Triode vacuum tube amplifiers were used in 1915 for the first
U.S. transcontinental telephone line, although a set of mechanical-type amplifiers
were held in reserve (Fagen 1975).

ANALOG TELEPHONE SIGNALS

The basic telephone system of Figure 1.12 is an analog system because the
voltage differences of the circuit may take on any value within a set of prescribed
limiting values. Circuit voltages fluctuate in accord with the audio signal pro¬
duced by the speaker’s microphone. This differs from the telegraph system in
which signaling depends only on an on-off voltage condition.
An important characteristic of analog signals is their frequency spectrum (Fig¬
ure 1.13). A sinusoidal signal has only a single frequency component, its periodic
frequency, whereas a nonsinusoidal periodic signal has a fundamental frequency
component as well as a set of harmonic components. The amplitude and phase
of each frequency component depend on the periodic waveform of the signal: the
more rapid the variations of the signal, the larger the harmonic amplitudes. From
an information perspective, a periodic signal is not very interesting because, if

1.3 THE TELEGRAPH AND TELEPHONE: WIDE-SCALE INTERCONNECTIONS 15

 1 12 3 4
T T T T T
sinusoidal periodic speech

Figure 1.13: Time-dependent signals with the relative amplitudes of their frequency spec¬
trum.

one has “seen” one period of the signal, one has “seen” them all. The nonperi¬
odic speech signal has a frequency spectrum that tends to be continuous. As a
result of electrical limitations of a telephone system, those that are unavoidable as
well as those intentionally introduced, the frequency spectrum of telephone sig¬
nals is generally limited. For the U.S. system, a spectrum of approximately 300 to
3400 Hz is utilized, and frequency components outside this range are filtered out.
An electronic system, such as an amplifier, must be capable of responding to
all desired frequency components of a signal. Because a signal may be consid¬
ered to be composed of a multitude of sinusoidal signals (based on a Fourier
series representation of a periodic signal or a Fourier transform of a nonperiodic
signal), an electronic system may be designed to reproduce sinusoidal signals
faithfully. Furthermore, testing is usually done with sinusoidal signals, and oper¬
ating specifications are given in terms of sinusoidal signals. For the speech signal
of Figure 1.13, an electronic system must have a uniform frequency response
over the frequency spectrum of the signal and be capable of responding to the
amplitude range of the signal without significant distortion.
Generally, a dedicated pair of wires is used to connect a subscriber’s telephone
to a local telephone switching office. If the subscriber is calling a second sub¬
scriber connected to the same office, a direct connection is established through
the switching equipment of the telephone office. Until the 1970s, switching was
primarily through mechanically positioned contacts. For a subscriber calling a
different office, for example an individual in another city, an interoffice con¬
nection was necessary. Depending on the circumstances, this may have required
intermediate switching connections to reach the final destination.
In addition to amplifying signals, electronic systems are used for multiplex¬
ing telephone signals. A single pair of wires, or any other type of transmission
system, is generally used to carry several telephone signals simultaneously. This,
before the advent of digital telephone circuits, was achieved by translating the
frequency spectrum of individual telephone signals (Figure 1.14). This process
is similar to that employed for radio systems in which a high-frequency carrier
is used to “carry” a lower-frequency modulating signal. The modulating signals

16 ELECTRONIC SYSTEMS
 Ht) |Fi(/)l

frequency-m u 1 tiplexed
signal

individual signals and spectrums

Figure 1.14: Frequency multiplexing of telephone signals.

are the individual telephone signals. In the United States, Bell Telephone Labora¬
tories was responsible for much of the early improvements in vacuum tubes and
vacuum tube circuits (Fagen 1975). Hence, a parallel, simultaneous development
of electronic systems occurred for both early telephone and wireless systems.

DIGITAL TELEPHONE SYSTEMS

Although an analog connection is still generally used for connecting a sub¬

scriber and a telephone office, digital signals are used within switching offices and
for transmitting telephone signals between offices. Analog-to-digital and digital-
to-analog converters are used at each subscriber’s office connection. With digital
signals, switching by entirely electronic means is readily achieved, thereby elimi¬
nating erratic connections that may occur with mechanically activated contacts.
With the development of specialized integrated circuits, the wide-scale usage of
all-electronic digital telephone systems is now common.
As indicated in Figure 1.15, a sampling process is used to convert an analog
signal to a digital signal. The U.S. telephone system uses 8000 samples per second;
that is, the telephone signal is sampled every 125 /ts. The resultant samples are

Figure 1.15: Sampling of a telephone signal.

1.3 THE TELEGRAPH AND TELEPHONE: WIDE-SCALE INTERCONNECTIONS 17

 samples

binary
‘ A \
\ \
\ _
'
V _'
'

\V \V \
''
^ X \ '

- I I I M MM M I I I M M I l'- I M M M M M I t m'* I I I‘I‘IM1I m'* I III > t

8 bits/sample

Figure 1.16: The conversion of sample amplitudes to a binary coded sig¬

nal. An expanded time scale has been utilized for clarity.

a set of amplitudes that represent the analog signal. It may be shown that if the
sampling rate is at least twice the highest frequency component of the analog
signal, the samples contain all the information of the original analog signal; that
is, the samples may be used to regenerate the original analog signal without error.
For the U.S. telephone system, the sample amplitudes are converted to a set
of eight binary quantities. The normalized range of ±1 for the samples of v{t) of
Figure 1.15 is divided into 256 (2^) discrete levels, and each sample is assigned
the level to which it is the closest. A nonuniform set of levels is utilized so that
high-level and low-level signals tend to be reasonably well preserved. The digital
representation of the signal of Figure 1.15 is indicated in Figure 1.16. Because
8 bits are used for each sample, the bits have to be squeezed into the 125-/zs
(1/8000 s) sampling interval. This results in a time interval of 15.625 pis being
available for each bit, which corresponds to 64,000 bits per second. Although
the digital signal requires a much higher transmission rate than the analog signal
it represents, only an o«-o/f condition needs to be transmitted.
Two digital signal paths, one for each direction of the telephone connection,
are required. Electronic logic circuits are utilized for “switching” these signals.
A modern digital telephone office is, in essence, a specialized computer with a
very large number of input and output connections. Efficient modern telephone
transmission systems utilize time-multiplexed digital signals. The time of each
group of 8 bits representing a sample of a signal is reduced. For a 50-percent
reduction in time, the bits of a second signal, similarly modified, could be inserted
between the bits of the first signal. At the end of the transmission system, the
signals that occur at different time intervals can be separated.
A typical first-level time-multiplexing system combines 24 digital telephone
signals. One frame of the resultant digital signal consists of the 8 bits corre¬
sponding to a single sample of each signal (a total of 192 bits) plus one framing
bit used to identify the frame. If an on-off sequence {on one frame, off the next,
etc.) is used for the framing bit, the beginning of a frame may be readily identified
at the receiving end of a time-multiplexed transmission system. The overall bit
rate of the time-multiplexed 24 telephone signals is therefore 1,544,000 bits per

18 ELECTRONIC SYSTEMS
second (193 x 8000/s). For higher capacity systems, such as fiber-optic transmis¬
sion lines, first-level groups are combined to produce higher-level groups, and
these groups in turn are combined with similar higher-level groups to produce a
super-level group. Transmission rates as high as one billion bits per second can be
carried by modern high-capacity systems. Over 15,000 simultaneous telephone
conversations can be carried by a system having a capacity of one billion bits
per second. Alternatively, other digitally encoded signals, such as produced by
television systems, can be time-multiplexed with the telephone signals.

1.4 TELEVISION: TIME-DEPENDENT VISUAL IMAGES

Although it was not until the 1950s that commercial television broadcasting
became common, the research on which television is based was initiated in the
1920s (Abramson 1987; Fink 1952; Fisher and Fisher 1996; Zworykin and Mor¬
ton 1940). Two approaches were tried: a mechanical system using a set of rotating
scanning disks and a totally electronic system. Only the electronic system proved
successful. Vladimir K. Zworykin, the inventor of the first television pickup tube,
the iconoscope, is responsible for many of the early electronic television develop¬
ments. Although several television systems were demonstrated in the late 1930s,
commercial broadcasting in the United States began only after World War II.
The conversion of an optical image to an electronic signal is considerably
more complex than that for sound waves. A microphone, such as that of the
telephone system of Figure 1.12, produces a varying voltage and current. The
varying component of the voltage (or current) is proportional to the fluctua¬
tions in atmospheric pressure caused by the sound waves that impinge on the
diaphragm of the microphone. Hence, if p{t) is the fluctuation in pressure, the
microphone voltage v{t) is proportional to p{t), that is

audio signal: v{t) oc p(t) (1.10)

A telephone or radio system needs only to transmit a replica of this time-dependent

voltage.
An image has a spatial as well as a time dependence. Hence, its brightness is
a function of three quantities:

image signal: b{x,y,t) (1.11)

One approach to dealing with the spatial dependence would be to divide the
image into a set of discrete elements, as indicated in Figure 1.17. Each element
could be designated by its row m and column n coordinate, and its time-dependent
brightness bmn{t)- For each element, a voltage might be developed as follows:

vn(t) oc bn{t)

Vfnni^) OC bffifi{t) (1.12)

VMN(t) OC ^Mn(0

1.4 TELEVISION: TIME-DEPENDENT VISUAL IMAGES 19

 n /..
1 2 3 • • • / N

original image reproduction of image

Figure 1.17: A video image decomposed into a set of finite elements.

A total of M X N separate voltages would thus be needed. Because a standard-

resolution television image corresponds to approximately 350,000 elements (pix¬
els), this many time-dependent voltage signals would be required. This approach
is not only impractical but is totally unnecessary.
The instantaneous time dependence of each picture element, as implied by
Eq. (1.12), is not needed. Motion pictures (introduced commercially at the be¬
ginning of the 20th century) rely on a mechanical projection process. Following
the projection of a single image, the screen is darkened while the film advances
to the next image. Therefore, one views a succession of fixed images, 24 images/s
being the commonly used rate. The brightness of a particular element changes in
discrete steps from one frame to the next rather than continuously. Hence, for this
system, a set of only 24 brightness values per second is required for each image
element. Although this process does not provide an exact replica of the original
image, it is, from a viewer’s perspective, adequate. A higher image projection rate
is not generally perceived as a significant improvement.

ANALOG TELEVISION

Because discrete time elements are acceptable for reproducing elements of an

image, a sequential transmission of the brightness of individual elements achieved
with a scanning process may be used. Imagine that a brightness detector is moved
across an image that is to be transmitted. For the solid scanning line, a-to-b of
Figure 1.18, corresponding to a left-to-right movement, the brightness remains
uniformly constant (white). When the detector reaches the end of the trace (right
side of the image), it is rapidly moved back to the left side of the image. For this
segment, the retrace, the brightness signal b{t) is set to a black value (a zero signal
value of Figure 1.18). The brightness varies for the next scanning trace, c-to-d,
and the center portion of the trace corresponds to the light gray of the outer box
of the image pattern. In general, a different time-dependent brightness pattern is
obtained for each scanning trace.
Although, for the sake of clarity, only 10 scanning traces are indicated in
Figure 1.18, a much larger number of traces are obviously necessary to form a
high-quality television image. The North American system utilizes a field con¬
sisting of 262.5 scanning traces. Only about 240 of these traces form part of
the visible picture; the other traces occur during a vertical retrace. A second set

20 ELECTRONIC SYSTEMS
 bit)
a b c d e / g h i i
white
gray
black ■
^ l I
M D
"blacl.er than black" synchronizing pulses
x{t)
right edge
center
left edge

Figure 1.18: A video scanning process and corresponding video signal.

of 262.5 scanning traces falls between the tracings of the first field (a scanning
process known as interlacing). A complete picture frame consists of 525 lines and
is accomplished in 1/30 s. This results in a horizontal scanning rate of 15,750
lines per second (30 frames/s x 525 lines/frame). The scanning of each line and
its retrace is thus accomplished in approximately 63.5 fis. Because the brightness
of an image could vary many times from bright to dark over a single scanning
line, the scanning signal b{t) could vary extremely rapidly.

CATHODE-RAY TUBE DISPLAY

For an electronic video system, the brightness is converted to a varying voltage.

In addition to the brightness signal, synchronizing pulses (“blacker than black”)
are added to the signal. These pulses control the sweep generators of a receiver
used to reproduce the image. In 1929, Zworykin demonstrated an all-electronic
receiver television picture tube. Except for the color feature of modern picture
tubes, this 1929 invention incorporated essentially all basic features of modern
television picture tubes and computer monitors. The television display is the
descendant of the cathode-ray tube invented by Ferdinand Braun in 1897 (Kurylo
and Siisskind 1981). Although Braun shared the 1909 Nobel Prize in physics
with Marconi for his contribution to the invention of the radio, it is the former
invention for which he is most frequently remembered (in German, a cathode-ray
tube is known as a Braunsche Rohre). These tubes rely on a screen that gives off
visible light when struck by an electron beam (Figure 1.19). An electron beam
is used to write on the screen, that is, to reproduce the scanning traces used to
generate the video signal.
A cathode, heated by a hot filament, is the electron source. Through a set of
electrodes constituting an electron gun, the electrons are accelerated and then
focused into a very small-diameter beam by means of an axial magnetic field
produced by an external focusing coil. After leaving this region of the electron
gun, the electron beam is further accelerated by an anode potential of 10,000 to
30,000 V connected between the cathode and the metallized internal surface of
the tube. Through variations in the potential of a control electrode next to the
cathode of the electron gun, the current of the beam and hence the intensity of the
spot it produces can be varied. In order to write on the screen, that is, to generate
the scanning traces used to produce the video signal, the electron beam needs to

1.4 TELEVISION: TIME-DEPENDENT VISUAL IMAGES 21

 electron gun
cathode, control
and focusing
electrode

vertical
deflection

Figure 1.19: A monochrome cathode-ray tube with magnetic focusing and deflection.

be suitably deflected. Although either electric or magnetic deflection fields may be

used for this purpose, television tubes utilize a set of orthogonal magnetic fields
produced by an external set of coils (analog oscilloscope tubes use a set of electric
fields produced by a set of internal deflection plates). The two coils with a vertical
axis, one above and the other below the tube, produce a vertical magnetic field.
Because the electron beam has an axial velocity, the electrons will experience
a horizontal force (F = —ev x B, a cross-product relationship). As a result of
this force, a horizontal deflection of the beam occurs that is proportional to the
current of the coil. The set of coils with a horizontal axis produces a horizontal
magnetic field, which, in turn, produces a vertical deflection of the electron beam.
Hence, the instantaneous spot position is dependent on the instantaneous values
of the currents of the coils, and the spot’s intensity is dependent on the control
electrode voltage.
As the beam moves across the screen, the beam current, and thus the bright¬
ness of the phosphorescence, is varied in accordance with the video brightness
signal. The synchronizing pulses are used to control oscillators that produce the
appropriate deflection currents. At a given instant, the electron beam produces
but a single spot. However, as a result of the persistence of the screen phosphor,
the screen continues to give off light after the beam has moved on. Furthermore,
a viewer’s persistence of vision gives the impression of a complete image with a
continuous time dependence.
A color television display tube uses three separate electron beams that strike
different screen phosphors to produce the three primary colors of red, green,
and blue. Two systems are common. In the delta-type tube, the electron guns
are aligned so that their individual axes form a triangle about the center line of
the tube, whereas in the in-line tube the electron guns are in a horizontal line
with the center gun (“green”) coinciding with the axis of the tube. Both systems
utilize a picture tube with an internal metal mask about 1 cm from the screen.
The mask restricts an individual electron beam to striking only a single color
phosphor.

22 ELECTRONIC SYSTEMS
 mask screen
color aperture mask

three electron guns i

"blue" __ i

"green"-

"red"

electron beams

(a) color tube (b) color aperture mask and screen

Figure 1.20: A delta-type color television tube with a detail showing its color aperture
mask and screen phosphors.

A delta-type color television tube is depicted in Figure 1.20. Included is a de¬

tailed drawing of its color aperture mask and its three color phosphorus dots.
The three electron beams of the tube, the intensity of each associated with a pri¬
mary color, are simultaneously accelerated, focused, and deflected by electrodes
and coils, which are not shown. The beams are so aligned that they converge
at the plane of the aperture mask. On passing through the mask, an individual
beam is defined so that it will strike only a single color phosphorus dot on the
inside of the screen. Hence, the three dots (a triad) will have emission intensities
corresponding to the primary colors. The dots, because they are extremely close
to each other (within about 0.1 mm), are perceived as a single colored emis¬
sion. Three video signals, one for each primary color, are required to control the
currents of the individual electron beams. An in-line tube uses three side-by-side
electron guns in a horizontal plane and a mask with a set of vertical slots adjacent
to a screen having vertical phosphor stripes.

VIDEO CAMERA DEVICES

Following the invention of the picture tube by Zworykin in 1923, numer¬

ous camera pickup devices were developed (Hashimoto, Yamamoto, and Asaida
1995; Weimer 1976). The iconoscope relied on the photoemission of electrons
by alkali metals. Visible light consists of photons with wavelengths A, of 0.38 to
0.78 Atm. The energy of a photon is given by hf, where h is Planck’s constant
(6.625 X 10“^"^ J • s) and f is the frequency of the light. Because the product of
frequency and wavelength is equal to the velocity of light {fX = c), the following
is obtained for the energy of a photon:

A = 0.55 /xm
Epho.o„ = hf = hc/k = 3.61 X 10-1’ J (1.13)

£photon/e = 2.26 V
A photon with a wavelength of 0.55 /tm, the wavelength for which the sensitivity
of the eye is the greatest, has an energy of 2.26 eV. For the cesium and potassium
alkali metals used in iconoscope tubes, this photon energy is sufficient to liberate
an electron (electron photoemission).
An iconoscope utilizes a mosaic of photosensitive elements deposited on an
extremely thin mica insulating sheet (Figure 1.21). Each element of the mosaic is

1.4 TELEVISION: TIME-DEPENDENT VISUAL IMAGES 23

 mica insulated from its neighbors as
secondary
well as from the conducting plate
electron
I deposited on the backside of the
conducting plate
mica insulation. The light image
photon C is focused on the photosensitive
mosaic by a set of lenses. When
+
video photons forming the image strike
focusing photo-
scanning signal a photosensitive element, elec¬
system sensitive
electron mosaic trons are emitted, leaving the ele¬
beam
ment positively charged. An elec¬
tron beam is used to scan the
Figure 1.21: A video iconoscope.
mosaic. The positively charged el¬
ements (those that have been illuminated) will absorb electrons from the beam
thus being discharged. Because the element and the conducting plate form a ca¬
pacitor, a capacitive current to the plate occurs at this instant. As a consequence,
a video voltage is developed across a resistor connected between the plate and
ground.
An early improvement on the original iconoscope was the image orthicon.
This tube uses an electrode to accelerate the photoemission electrons. When these
accelerated electrons strike their target, several secondary electrons are emitted.
Hence, an “electron gain” is achieved, increasing the illumination sensitivity of
the tube. Magnetic coils are used to focus the photoemission electrons and to
deflect the beam used to scan the target.
Modern camera pickup devices no longer rely on vacuum-type devices. Instead,
large-scale integrated circuits with photosensitive devices are used to generate
video signals. A photon of visible light (Eq. (1.13)) has a very high likelihood of
generating an electron-hole pair of charges when absorbed by a semiconductor
such as silicon. These charges, if generated in the vicinity of the transition region
of a junction diode, will be physically separated, resulting in charges that can
produce a voltage or current in an electronic circuit that depends on the intensity
of the incident light. In essence, a light-sensitive integrated circuit consists of a
mosaic of photodiodes, one for each picture element of the video image. A typical
rectangular camera detector designed to produce a conventional TV signal has
a diagonal dimension of approximately 1 cm and consists of about 350,000
photodiodes.
Although one photodiode is used for each picture pixel, a direct wire connec¬
tion to each diode is not practical. The “reading” of the diodes is accomplished
with an array of charge-coupled devices functioning on the same principle as the
MOSFET device of Figure 1.7. This circuit detects the light-produced charge of
each diode through a sequential process. A simplified schematic of a commonly
used camera pickup device, an interline-transfer charge-coupled device, is indi¬
cated in Figure 1.22. For the standard-resolution North American TV system (this
system will be assumed for the numerical quantities of the discussion that fol¬
lows), an array of approximately 500 horizontal rows and 700 vertical columns
of diodes along with MOSFET charge-transfer switches and charge-coupled de¬
vices (CCDs) are required. In addition, a set of horizontal charge-transfer devices

24 ELECTRONIC SYSTEMS
 video horizontal
output transfer

1:

2:

3:

transfer

Figure 1.22: An image array of photodiodes, MOSFET switches, and CCDs. In this
interline-type device, only the photodiodes are exposed to the incident light because opti¬
cally produced electron-hole pairs would interfere with the operation of the other devices.

is needed to combine the outputs of the vertical CCDs. Precise timing of the gate
voltages of the MOSFET devices and the control signals of the charge-coupled
devices (not shown in Figure 1.22) is required. The output of this circuit is a
single time-dependent video voltage.
The photodiodes are charge-integrating devices, that is, their charge accumu¬
lation depends on the intensity of the light and time interval over which they are
allowed to charge. Charging of a photodiode occurs during the interval when
its MOSFET device is inactive, which corresponds to a low-level gate voltage.
When the MOSFET device is activated, the charge generated by the photodiode
is transferred to its adjacent vertical CCD. After this transfer, the diode will again
generate charge at a rate dependent on its incident light intensity. Approximately
one field interval, 1/30 s, is available for this charge-generation process.
To explain the operation of the image device of Figure 1.22, a time corre¬
sponding to the beginning of a frame will be assumed. The MOSFET devices of
the odd-numbered rows having voltages of v\, V3, and so forth, are activated,
transferring the charge generated by each of the photodiodes of these rows to the
adjacent vertical column of CCDs. During the next 1/60 s, the discrete charges are
moved up the vertical column of CCDs in a step-by-step fashion. These devices,
when operated in this fashion, are frequently referred to as a “bucket brigade”
circuit. At the top of the integrated circuit, the charges of each vertical column
of CCDs are transferred to the horizontal line of devices. Again, the individual
charges are transferred in a step-by-step fashion by the horizontal row of CCDs
to produce the video output signal. To obtain the video signal of the second field
corresponding to the interlaced lines of a standard frame, the MOSFET devices
of the even-numbered rows are activated, and the process is repeated.

1.4 TELEVISION: TIME-DEPENDENT VISUAL IMAGES 25

 Figure 1.23: A video image considered as a sequence of frames composed
of individual picture elements or pixels.

Many modifications of the basic image device of Figure 1.22 are used. For
a color system, an array of three photodiodes, each with an on-chip lens filter
for the three primary colors, is used for each pixel. Three video signals, each
corresponding to a primary color, are thereby produced. The array size depends
on the application. For example, approximately 20,000 pixels are adequate for a
video telephone, and as many as 2 million pixels are needed for a high-definition
TV camera device.

DIGITAL TELEVISION
The development of very-large-scale digital integrated circuits has not only
made digital encoding of TV images possible, but it has made possible very
complex encoding techniques inconceivable with analog systems. As a result,
digital-encoded TV signals can be transmitted much more efficiently than analog-
encoded signals. Not only do high-definition TV (HDTV) systems rely on digital
technologies but also the transmission of limited-quality images over conven¬
tional telephone networks (videophones).
As indicated in Figure 1.23, a video image may be treated as a sequence of
individual picture frames occurring at discrete, equally spaced time intervals.
Each frame is composed of an array of pixels. Only an intensity quantity needs
to be specified for each pixel of a monochrome image, whereas an intensity and
a set of color quantities needs to be specified for a color image. For a basic digital
encoding system, two quantized numbers to represent the intensity and color
might be assigned to each pixel. Suppose, for example, that two 8-bit numbers
were used; each pixel would require 16 bits of data. For a system with 350,000
pixels per frame and 30 frames per second, a data bit rate of 168 x 10^ bits/s
(168 Mb/s) would be required. This is not only an inordinately high bit rate -
only a single or at most a few TV signals could be transmitted by a single optical
fiber - but is totally unnecessary. With digital processing, the bit rate can be
reduced to a much more acceptable value.
From an information perspective, the preceding 168 Mb/s digital system is
similar to an analog system. Each pixel is treated as having an intensity and color
that is not only independent of the quantities of adjacent pixels of the same frame
but also independent of the quantities of a similarly located pixel of the frames
that occur before and after its frame. This, of course, is not the case for a typical

26 ELECTRONIC SYSTEMS
video signal. An image generally consists of small-size regions that have either
identical pixels or have pixels that differ only slightly from each other. Only for
an abrupt transition between two visual objects do pixels differ significantly from
their neighbors. Regions of each frame (typically 8x8 pixels) can be encoded as
a group, and thus very little information is required if a region is uniform. Often
one entire frame may be the same as the previous frame or differ only slightly from
it. If, for example, a frame is identical to the previous frame, from an information
perspective it is only necessary to transmit “ditto,” or if it differs only slightly,
“ditto” except for new values of those pixels that are different. To achieve this
encoding, which significantly reduces the bit rate required for transmitting a TV
image, extensive digital memory and processing capabilities are required.
Associated with each pixel frame is a set of arrays of quantized data rep¬
resenting the intensity and color (generally one luminance and two chromi¬
nance components). These arrays may be obtained through a sampling of a
conventional video signal or from a charge-coupled image sensor such as that of
Figure 1.22 followed by an analog-to-digital output converter. A digital-encoding
system converts the data of the logic arrays to a single unambiguous bit stream
that is adequate to regenerate the arrays at the receiving end. These regenerated
arrays, when appropriately scanned, produce the output video display. Because
multiple logic data arrays are used, it is not necessary to transmit the data at a
uniform rate as is the case for an analog system.
The digital encoding and decoding techniques utilized are extremely complex;
they reflect the complexity of the logic functions that can be achieved with very-
large-scale integrated circuits (Anastassiou 1994; Netravali and Haskell 1995;
Netravali and Lippman 1995; Schafer and Sikora 1995). Variable-length coding
is used for the color values of each pixel because not all color combinations are
equally likely. The resultant chrominance array and luminance array are then
divided into regions corresponding to blocks of 8 x 8 pixels. Transformed val¬
ues using a discrete-cosine transform are then obtained for each region. If the
region should happen to be uniform, only one of the 64 transform values will
exist - all others will be zero - and thus only a single quantity needs to be en¬
coded and transmitted. Even for a more general case, many of the transform
values will either be zero or sufficiently small that they may be ignored without
a significant degradation of the video image. A variable-length coding scheme
is then employed to encode these coefficients into a minimum-length set of bi¬
nary bits (entropy coding). At the receiving end of the transmission system, the
digital signal must be decoded to obtain the transformed values followed by an
inverse transform operation to recover the original luminance and chrominance
quantities associated with each pixel.
A temporal correlation between sequential video frames generally exists. As
a consequence, the sequential frames are not treated identically, as is the case
for an analog system. A complete set of encoded values is transmitted only for
certain frames - frames designated as being intracoded (I frames). In between,
there are predictive-coded frames (P frames). The P frames have regions that are
determined by a previous intracoded frame or a previous predictive-coded frame.
A difference of the transformed values of the two frames is used to specify each

1.4 TELEVISION: TIME-DEPENDENT VISUAL IMAGES 27

 region. In addition, an encoding scheme that accounts for a motion of the scene is
also utilized. Finally, sandwiched between the I and P frames are bidirectionally
predictive, interpolated frames (B frames). The values of the data for these frames
are determined from either the closest earlier or later I or P frame or from both an
earlier and a later frame. The precise manner in which the sequential frames are
encoded is determined during the encoding process. Sufficient control data are
transmitted to allow the decoder at the receiving end to interpret the data stream
properly.
With digital encoding, a standard television picture and audio signal can be
transmitted with a bit rate as low as 1.5 Mb/s (Motion Picture Experts Group-1,
MPEG-1, standard). The transmission of high-definition TV using a conventional
“over-the-air” channel is dependent on a very efficient digital encoding of the
video signal. The Grand Alliance System for U.S. broadcasting will provide a TV
image with twice the resolution of a conventional image and a 16 x 9 format (16
units wide by 9 units high), which corresponds to motion picture inputs. This
system achieves a basic bit rate of slightly less than 20 Mb/s.

1.5 THE ELECTROMAGNETIC SPECTRUM: A MULTITUDE OF USES

An electromagnetic wave propagating through the atmosphere or space is char¬
acterized by an oscillation frequency and a wavelength. At a given point in space,
the amplitude of its electric and magnetic field oscillates in time with a frequency
that is that of the transmitting oscillator. Wavelength relates to the spatial de¬
pendence of the electromagnetic wave. At a given instant (as if one were to take
a snapshot of the wave), the electric and magnetic fields have a periodic spatial
dependence. The wavelength of the radiation is the distance over which the wave
tends to repeat itself.
Eor a plane wave (electric and magnetic fields in a common plane perpendicular
to the direction of propagation), the product of frequency f and wavelength X is
equal to the velocity of light c:

fX — c = 3 X 10^ m/s
f^c/X or X = c/f

A signal with a frequency of 1.0 MHz, for example, has a wavelength of 300 m
(100 MHz, 3 m; 10,000 MHz or 10 GHz, 3 cm). The higher the frequency, the
shorter the wavelength.
The early electromagnetic experiments and demonstrations by Hertz and Lodge
used radiation with wavelengths of a few meters or less so as to conform to the
confines of a laboratory or lecture room. However, it was discovered by Mar¬
coni and other early pioneers that longer-wavelength radiation gave better results
for long-distance communication (A > 1000 m ox f < 300 kHz, judging from
descriptions of the apparatus used; techniques for measuring frequency or wave¬
length were not available). The early “wisdom” at the beginning of the 20th
century was that only radiation having wavelengths of greater than 200 m is of
value for long-distance communication. However, as equipment was improved,
it was discovered that shorter-wavelength radiation (A < 200 m) is also of value.

28 ELECTRONIC SYSTEMS
 ionosphere

/ < 2 MHz 2 < / < 30 MHz / > 30 MHz

X > 150 m 150 >A,>10m A,<10m
ground-wave ionospheric skip straight-line

Figure 1.24: Radio propagation modes.

At present, with the exception of the AM broadcast band (540 < f < 1600
kHz, 556 > X > 187.5 m), almost all communications systems use these shorter
wavelengths.

FREQUENCY SPECTRUM

The frequency of a radiated signal tends to influence how it is propagated.

Low-frequency, that is, long-wavelength signals such as used for AM broadcast¬
ing, tend to follow the curvature of the earth (Figure 1.24). Although daytime
distances of up to 100 km may result, much longer nighttime distances can oc¬
cur as a result of ionospheric refraction. Higher-frequency, shorter-wavelength
signals tend to be reflected from the earth’s ionosphere, frequently returning to
the earth several thousand kilometers from the transmitter. Although this makes
long-distance communication possible, the transmission mode (ionospheric skip)
depends on highly variable ionospheric conditions. The properties of the iono¬
sphere that influence the reflection of signals not only vary between night and day¬
time, but they depend on sunspot activity. Higher-frequency, shorter-wavelength
signals, such as used for television broadcasting and cellular phones, tend to
travel in straight lines, providing line-of-sight communication.
The electromagnetic spectrum utilized for communications systems is indi¬
cated in Figure 1.25. Audio signals may contain frequency components up to

Figure 1.25: The electromagnetic spectrum. Logarithmic scales have been used for
frequency and wavelength.

to to
.s .S
(/) (/)
cd cd
u u
T3
cd (d radar
o
u u and
Xi Xi
satellite
< tin
lOlO 12
/ Hz 1 10^ 10^ 10® 10® 10
—I- —I-

X m 10 10 10 10^ 10 " 10,-4

<-audio signals-j.
q; > > microwave
<-video signals
H H
Ui Ph
u
o
X X
X, > X
</)

1.5 THE ELECTROMAGNETIC SPECTRUM: A MULTITUDE OF USES 29

 approximately 20 kHz (the upper frequency response of the human ear). On the
other hand, analog video signals have frequency components up to approximately
4.5 MHz.
A carrier frequency is required for a communications system, depending on the
propagation of electromagnetic waves. In addition, a spectrum width is required
for the transmission of information such as an audio or video signal. The width
of an AM broadcast signal is limited to 10 kHz; that is, ±5 kHz about the carrier
frequency of a signal. As a result, 106 stations can fit into this band. Because of the
limited range of these stations (especially during daylight hours), a large number
of broadcast stations is possible. Within the United States, stations are assigned
frequencies by the Federal Communications Commission. The electromagnetic
spectrum is treated as a public good to be used by commercial interests on a
shared basis. Stations are separated by 10 kHz and have carrier frequencies evenly
divisible by 10 kHz.
Shortwave (10m< X < 150 m) broadcasting occupies the frequency spectrum
above the AM broadcast band up to approximately 30 MHz. Although very long
distances can be achieved under favorable conditions, transmission conditions
can be erratic. Furthermore, only fairly narrow bandwidths, such as those used
for AM broadcasting, can be utilized.
Frequency-modulated (FM) broadcasting utilizes much higher carrier frequen¬
cies (88-108 MHz in the United States) and requires a much wider spectrum
width than AM broadcasting. A much higher-fidelity audio signal having fre¬
quency components of up to 20 kHz is transmitted. In addition, a wide-bandwidth
modulation system is used to reduce the effects of noise. The result is that a spec¬
trum width of 200 kHz is utilized. Although only 5 such signals could fit in
the AM broadcast band, 100 signals fit in the 20-MHz-wide FM band (carrier
frequencies are separated by 200 kHz).
A 6-MHz spectrum width is utilized for U.S. commercial TV broadcasting.
Channels 2 through 6 are between 54 and 88 MHz, and channels 7 to 13 are
between 174 and 216 MHz. These are the VHF (very-high-frequency) channels.
The UHF (ultrahigh-frequency) channels of 14 through 69 occupy a frequency
range of 470 through 806 MHz. Interspersed with the TV channels and FM
broadcast bands are a myriad of communications services (aircraft, police, fire,
etc.). Cellular phones use carrier frequencies above 806 MHz.

RADAR

An important application of high-frequency, short-wavelength radiation is

radar (radio detection and ranging) (James 1989). Early radar systems were
developed in the 1930s using transmitting frequencies of 30 MHz or less (Page
1962; Swords 1986). A basic system is indicated in Figure 1.26. Radiation from
a high-power pulsed transmitter is directed (beamed) toward an object to be de¬
tected. A small amount of the radiation incident on the object will tend to be
reflected back to the receiver (an echo). A cathode-ray tube is frequently used for
the receiver display. A linear horizontal sweep is used for a time axis, and the
vertical deflection is the instantaneous output of the receiver. The first pulse of

30 ELECTRONIC SYSTEMS
 Figure 1.26; An elementary radar system.

the display indicated in Figure 1.26 is the transmitted signal, whereas the second
is the received echo, which occurs at a later time.
The process of ranging depends on the finite propagation velocity of the elec¬
tromagnetic radiation. In 1 s, radiation travels 3 x 10^ m; in one /xs, 300 m.
Therefore, if the reflecting object is at a distance of 300 m, 1 fis will be required
for the radiation to reach the object, whereas another 1 /xs will be required for
the echo to return to the receiver. Hence, the echo on the display will occur 2 /xs
after the transmitted pulse (therefore, each l-/xs delay corresponds to a range of
150 m).
The direction of an object can be ascertained if a well-focused, narrow beam is
used. This also increases the range of the system because less energy is “wasted.”
Optimal antenna sizes depend on the wavelength of the radiation. For an AM
broadcast station, a quarter-wavelength vertical antenna is common {X/A — 75 m
for a 1-MHz carrier frequency). An antenna that has a dimension comparable
to the wavelength of the signal it is radiating tends to have little directivity; its
radiation tends to be uniformly distributed. To concentrate the radiation pattern,
an antenna that is large compared with the wavelength of the radiation is neces¬
sary. Hence, practical-sized radar antennas that have narrow beams and that can
be mechanically or electrically oriented require very short microwave radiation
(A. < 0.3 mot f > 1000 MHz).
Conventional electronic devices, both vacuum tubes and transistors, tend to
perform very poorly (if at all) at microwave frequencies. For a frequency of
1000 MHz, the period is only 1 ns. This requires that the response time of the
electronic device be considerably less than 1 ns. The finite transit time of the
electrons of these devices imposes an upper limit to the frequency at which these
devices may be used.
The klystron amplifier and oscillator invented by Russell and Sigurd Varian
provides a source of extremely high-frequency radiation (Ginzton 1976). Its op¬
eration depends on the very effect that limits the performance of conventional
devices, that is, the finite transit time of electrons. Through the use of a cavity
resonator (in place of a conventional LC circuit), electrons of a high-velocity elec¬
tron stream are velocity modulated - the velocity of some electrons is increased,
whereas that of others is decreased. The electron stream is allowed to drift, thus

1.5 THE ELECTROMAGNETIC SPECTRUM: A MULTITUDE OF USES 31

 allowing the faster electrons to catch up with slower electrons (bunching). What
was initially a stream with electrons uniformly distributed becomes a stream con¬
sisting of bunches of electrons. The bunched electrons are then used to interact
with the electric fields of a second cavity, producing an amplified version of the
signal used to excite the first cavity. An alternative type of klystron uses a static
reflecting electric field to return the bunched electrons to the original cavity. The
electron stream, for proper conditions, results in positive feedback (regeneration)
and sustained oscillations.
Shortly after the invention of the klystron in the United States, John Randall
and Henry Boot invented the cavity magnetron in Great Britain (Boot and Ran¬
dall 1976). This tube, which also depends on electron transit times, utilizes a
circumferential arrangement of resonant cavities around a cylindrical cathode.
An axial magnetic field is used to force electrons emitted by the cathode into cir¬
cumferential trajectories. Even the earliest tubes proved to be ideally suited for
providing pulses of microwave radiation of very high power (as much as 500 kW
at a frequency of 3000 MHz and 100 kW at 10,000 MHz).
For a radar system such as that of Figure 1.26, the same antenna can be used
for transmitting and receiving because, ideally, the received echo occurs after the
transmitter is switched off. A direct connection of the transmitter and receiver
to a common antenna is obviously not possible, for the high-power signal from
the transmitter would destroy the sensitive receiver circuits (literally burn them
out). An extremely rapidly switching transmitter-receiver circuit, faster than can
be achieved with a mechanical switching system, is needed. Gaseous plasma dis¬
charges initiated by the high-power pulses of the transmitter, however, can have
a sufficiently rapid response. Plasma discharges are generally used in conjunction
with a set of resonant circuits to “connect” the transmitter to the antenna and to
reflect the transmitted signal simultaneously from the receiver. When the transmit¬
ter is switched off (at the end of its pulse), the discharge is dissipated. Instead of the
near short circuits caused by the discharges, open circuits now occur. For an ap¬
propriately constructed circuit, the receiver is directly connected to the antenna.
An alternative echo indicator, the position-plan indicator, is also common. This
indicator utilizes a timing line that originates at the center of the screen of the
cathode-ray tube and sweeps outward. The line is simultaneously rotated as the
orientation of the antenna is changed. The received echo is used to increase the
intensity of the line at a distance from the center corresponding to the delay in
the echo. With a long-persistence screen, a two-dimensional picture of the radar
echoes is formed. A familiar example of this type of system is the radar image
formed by reflections of storm clouds that is presented on television weather
reports.

COMMUNICATIONS SATELLITES

One of the first serious proposals for using artificial earth-circling satellites for
relaying electromagnetic messages was by the well-known science fiction writer
Arthur C. Clarke (Clarke 1945; Pierce 1968). Clarke proposed placing satel¬
lites in an equatorial, geostationary orbit, an orbit that is at a distance from the
surface of the earth of approximately 36,000 km, thereby resulting in the

32 ELECTRONIC SYSTEMS
satellite’s remaining over the same polar
spot on the earth (the satellite and
the earth are thus rotating at the
same angular velocity). Such an or¬
bit is now frequently referred to as
a Clarke orbit (see Figure 1.27).
A detailed technical proposal for
communications satellites was put rg = 6380 km ^Sat = 42,160 km
forth in 1955 by John R' Pierce Figure 1.27: A satellite with a geostationary equatorial orbit.
of Bell Telephone Laboratories
(Pierce 1955). (Pierce was also a science fiction writer under the pseudonym
J.J. Coupling.)
It was not until 1957 that the first artificial satellite, Sputnik, was launched
into a low-earth orbit, causing it to circle the earth approximately every 90 min.
Its 20-MHz beacon transmitter fascinated listeners around the world. The first
successful experimental communications satellite. Echo - a joint venture of Bell
Telephone Laboratories and the National Aeronautics and Space Administration
(NASA) - was launched in 1960. This satellite consisted of a passive 100-ft-
diameter reflecting balloon that was inflated when the satellite reached its orbit.
As with all early satellites, it was in a low-earth orbit.
The Telstar I satellite with an active electronic repeater, launched in 1962,
may be considered the predecessor of modern communications satellites. Al¬
though this satellite was not in a geostationary orbit (it had a 158-min orbit),
Telstar I, followed by Telstar II, demonstrated the feasibility of using satellites for
long-distance communication. A signal with a carrier frequency of 6390 MHz
was beamed from the earth to the satellite. At the satellite, the signal from the
earth was amplified, translated to a new carrier frequency of 4170 MHz, and
radiated back to the earth. Electronic circuits using transistors and a single mi¬
crowave traveling-wave-tube amplifier were utilized. In addition, semiconductor
photovoltaic cells were used for the electrical power source. The wide-bandwidth
repeater system of Telstar provided the first experimental trans-Atlantic live tele¬
vision transmission (Bell System Technical Journal 1963; O’Neill 1985; Solomon
1962).
Before the advent of communications satellites, coaxial cable and microwave
relay systems were used for the long-distance transmission of wide-bandwidth
communications signals such as television. Because a set of earth-based mi¬
crowave relay stations was limited to line-of-sight distances, over 100 relay
stations were necessary to span the continental United States. No such system
was available for crossing oceans. Ocean telephone cables with built-in repeater
amplifiers (the first set of Atlantic cables, designed for 36 telephone conversa¬
tions, was laid in 1956) had a bandwidth inadequate for television transmission
(O’Neill 1985).
Geostationary communications satellites in an equatorial orbit, a Clarke orbit,
are now widely used to relay television transmissions as well as numerous other
communications services. An electronic repeater amplifier similar to that of the
Telstar satellites is common (Figure 1.28). It will be noted that a mixer is used to

1.5 THE ELECTROMAGNETIC SPECTRUM: A MULTITUDE OF USES 33

 yup J\o r _ / ^
mixer y ^ /down “/up /lo

Figure 1.28: A satellite repeater amplifier.

translate the carrier frequency of the uplink signal. This frequency translation is
imperative for a satellite repeater amplifier because an extremely large amplifica¬
tion of the signal is required. If the uplink signal frequency were not translated,
even a minuscule amount of leakage of the transmitted signal back to the re¬
ceiver antenna could result in positive feedback and oscillations. Translating the
carrier frequency using a mixer, as in a superheterodyne receiver, along with an
appropriate set of frequency-selective filters, eliminates this problem.
As an illustration of a repeater amplifier, consider the communications satel¬
lites used for relaying U.S. television transmissions, which are frequently received
using 2- to 3-m-diameter dishes (Baylin and Gale 1986; Easton and Easton
1988; Fthenakis 1984). For channel 1 of this system, /up = 5,945 MHz and
— 3,720 MHz. This requires that the satellite repeater have a local oscil¬
lator frequency of 2225 MHz. However, because /up — /down has been chosen
the same for all the channels of this band, which are relayed by a single satellite,
only a single local oscillator and wide-bandwidth receiver are required (a backup
receiver is available should a failure occur). Separate filters and amplifiers are
used for each channel - an output power from the traveling-wave-tube amplifier
of 10 W is typical. Although each channel corresponds to a different frequency,
an overlapping of channels is achieved by using different circular electric-field
polarizations (clockwise or counterclockwise), thus conserving spectrum space.
On the earth, highly directional antennas (which, as a consequence, have high
gains) are used to receive these satellite signals. Although there are many satellites
in an equatorial orbit, they are located at different longitudes and can thus be
selected by pointing the earth-based receiving antenna in the appropriate direc¬
tion. Highly directional antennas, along with high-power transmitters, are used
to beam the uplink signal to the appropriate satellite.
Another satellite repeater system uses uplink frequencies in the 14-GHz band
and downlink frequencies of 11-12 GHz. These satellites are frequently used for
relaying European television transmissions (Stephenson 1991). A combination
of a moderate satellite transmitter power («i50-100 W) and a rather narrow
transmitting beam providing a “country size” pattern results in signals that can
be received using relatively small receiving dishes (60-cm diameter or less). Such
antennas mounted on the south side of buildings are now common in Europe (as
opposed to the 2- to 3-m diameter dishes in the United States).

34 ELECTRONIC SYSTEMS
 A more recent satellite system, introduced in the mid-1990s, uses multiplexed
digitally encoded TV signals (Elbert 1997). These satellites have downlink fre¬
quencies in the 12-GHz range and can be received using a small-diameter dish.
As a result of very efficient digital encoding and multiplexing, a single satellite
is capable of relaying hundreds of TV signals. In addition, data channels are
available for controlling subscriber access to the channels.

1.6 COMPUTERS: TRANSISTORS BY THE MILLIONS

A desire to replace energy consumptive and fragile vacuum tubes provided the
impetus for the applied research that resulted in the transistor. Not only has
the transistor replaced vacuum tubes in most applications, but, as is frequently
the case for a new invention, it gave rise to a new and unforeseen application:
large-scale digital computers. Although the earliest electronic computer (ENIAC)
and its immediate successors relied on vacuum tubes, present computers using
integrated circuits (including the personal computer, without which most of us
would now be lost) would be inconceivable without the transistor.
Although large-scale electronic digital computers are a relatively recent devel¬
opment, the concepts on which they are based are much older (Goldstine 1972;
Shurkin 1984; Slater 1987). The 17th-century mechanical adding machine of
Blaise Pascal, an adaptation of the ancient abacus, gave rise to the mechanical
multiplier and other calculating machines that were widely used until the intro¬
duction of electronic calculators in the 1970s. It was in the 19th century that
Charles Babbage set forth the basic concepts on which modern computers are
based. His initial Difference Engine was soon followed by a more advanced An¬
alytical Engine. He was able to visualize very clearly a set of separate computing
units working together in a synchronized manner to carry out a sequential set of
operations. Unfortunately, his designs could not be realized physically at the time.
Babbage’s conception included an arithmetic unit, an input reader for punched
cards, an output device, an internal memory, and external memory storage (an
attendant who would insert a set of punched cards was to be summoned by a
bell). It was not until 1943 that Howard Aiken achieved an electromechanical
realization of Babbage’s concepts in the Mark I computer at Harvard.
A second type of computer, also based on concepts from the 17th century,
utilized the principle of logarithms that was originally introduced by John Napier.
An understanding of logarithms led to the slide rule, which relies on an analog
process to add or subtract logarithms, thus multiplying or dividing numbers.
This approach to computing evolved into the Differential Analyzer developed
by Vannevar Bush in the 1930s and to the analog computer using electronic
amplifying and integrating circuits. These computers have now been superseded
by analog simulation programs that can be run with considerably less effort on
digital computers.

LOGIC CIRCUITS
Although one would not presently consider using electromechanical relays for
performing logic functions in a computer (as in Aiken’s Mark I computer), relays

1.6 COMPUTERS: TRANSISTORS BY THE MILLIONS 35

 OR gate: C = A+B

AND gate: C = AB

Figure 1.29: Electromechanical logic gates using relays.

are extensively used for numerous control systems that are based on a limited set
of logical operations. Furthermore, an understanding of relay circuits that have
either open or closed contacts one can clearly visualize is invaluable for under¬
standing electronic logic circuits. The electromagnet of a relay is either energized
or not; for a logic application it is only momentarily in an “in-between” state.
Its switch contacts are therefore either closed (conducting) or open (nonconduct¬
ing). This corresponds to the logic system expounded by George Boole in 1854 in
which variables took on but one of two states. Nearly a century later, Claude E.
Shannon applied this logic system, now generally described as Boolean algebra,
to relay and switching circuits (Shannon 1938).
Consider the relay circuits of Figure 1.29. A relay will be assumed to be ener¬
gized if its coil voltage (va or ub) is equal to Vi and not energized for a zero input
voltage. Using positive logic, A = 1 if ua = Vi and A = 0 if ua = 0- Voltage
values other than zero and Vi are excluded from consideration. For the AND
gate, the output voltage vc is equal to Vi if both relays are energized and zero
otherwise. If one associates the Boolean variable C with the output, C = AB. A
parallel relay connection of the second circuit of Figure 1.29 results in an OR
operation.
Semiconductor diodes, each with a characteristic such as that of Figure 1.2,
may also be used to construct logic gates. When the diode is conducting (id > 0),
its voltage, vd, is relatively small, whereas when it is not conducting (vd < 0), its
current is essentially zero. The diode may therefore be treated as either conducting
or nonconducting, reverse biased. For many applications, the diode behaves as a
switch that is either closed (conducting) or open (reverse biased).
The diode circuits of Figure 1.30 perform the Boolean OR and AND opera¬
tions. If both inputs of the OR gate, va and vb, are zero, the output voltage vc
will also be zero. If, however, one input is equal to Vi (for example, va = Vi,
corresponding to A = 1), the output voltage vc will be equal to Vi — ud- To the
extent that vd can be ignored, vc is nearly equal to Vi, corresponding to C = 1.
If both inputs are equal to Vi, the output will remain equal to approximately Vi.
Hence, a logic OR operation results, and C = A -f B. A battery with a potential
of Vi corresponding to a logic 1 signal is required for the diode AND gate of
Figure 1.30. If either input is zero (a logic 0), the output voltage is equal to the
small diode voltage, a value close to zero corresponding to a logic 0. Only if both

36 ELECTRONIC SYSTEMS
 OR gate: C = A+B AND gate: C = AB

- + 14 R
Vi
H>l— + 14 +
yg R

A B < CAB C
Figure 1.30: Logic gates using diodes.

inputs are equal to Vi (A = B = 1) is the output voltage vq also equal to Vi

(C = 1). This corresponds to the AND operation C = AB.
A relay with a set of normally closed contacts may be used to form a NOT
gate (Figure 1.31). When va = 0 (A = 0), the relay is not energized and vb = Vi
{B = 1). Energizing the relay (va= Vi, corresponding to A = 1) opens the relay
contacts, and vb = 0 (B = 0). Hence, B = A. Also shown in Figure 1.31 is a
circuit using a MOSFET device such as that of Figure 1.7. When va = 0 {A = 0),
the drain current io of the MOSFET device is zero, resulting in vb = Vl (JS = 1).
On the other hand, when va = Vi (A = 1), the drain current /'d will be large. For
a well-designed circuit, a large voltage will be developed across R, namely ioR-,
and only a small voltage will be developed across the MOSFET device. For vb
small, the output will be interpreted as a logic 0. Hence B =A for both circuits.
Although combinations of AND, OR, and NOT gates can perform many
logic functions, memory gates are also needed for a digital computer. An elec¬
tromechanical relay memory gate might be used for a simple control application.
A memory gate using MOSFET devices is shown schematically in Figure 1.32.
Consider, initially, the condition for which the input signals vr and vg are zero.
Because the drain currents of the devices with these inputs are zero, these devices
will not affect the behavior of the remaining circuit. The middle transistors with
gate-to-source voltages of ua and vb form a set of NOT gates; the input gate-to-
source voltage of one device is equal to the output drain-to-source voltage of the
other. If the gate-to-source voltage ub of the left-hand device is sufficiently small,
its drain-to-source voltage va will be equal to Vi. For a properly designed circuit,
this will result in a sufficiently large current of the right-hand device to cause
its drain-to-source voltage vb to be small. Hence, A = 1 and B — 0. The other

Figure 1.31: Electromechanical and transistor NOT gates.

1.6 COMPUTERS: TRANSISTORS BY THE MILLIONS 37

 memory state corresponds to va
being small and = Vi (A = 0
and B = 1). Hence, the memory
has two stable states. Now con¬
sider the effect of the R and S in¬
puts. IfVA is small (A = 0), an
Q=A Q=B input of vr = Vi will have only
the negligible effect of reducing
Figure 1.32: A transistor flip-flop memory. tO an even smaller voltage.
The voltage vg will remain equal to Vi. Only if va is initially equal to Vi will an
input of Vr — Vi have an effect, namely, changing the state of the memory so
that Va is small (A = 0). An input vs = Vi will change the state of the memory,
if necessary, so that va = V\ {A = 1).

A BASIC COMPUTER
Logic gates using MOSFET or other electronic devices may be combined to
produce a set of elementary logic functions (Figure 1.33). Both the NOR and
NAND functions, having outputs that are the complements of OR and AND
gates, respectively, can be obtained from a circuit modification of the basic MOS¬
FET NOT gate of Figure 1.31. The OR and AND functions are obtained with an
additional NOT gate. A buffer function may be achieved using two NOT gates.
Although this realization does not result in a change of logic levels, it is often
used to restore the voltage levels of a logic signal that may have been degraded by
a logic system. The buffer shown in Figure 1.33 has an enable input. When this
input is at a high level, the logic output of the buffer is that of its input, whereas
for a low-level enable input, the output is an open circuit. For an open-circuit
condition, the logic level at the output will depend on the other devices shar¬
ing its output. When MOSFET devices are used, a simple buffer implementation
consists of a single MOSFET device in series with the input and output termi¬
nals (this realization will not restore degraded logic levels). The series MOSFET
device behaves as an open or closed switch in accordance with its controlling
gate-source voltage.
An RS memory element, again often realized using MOSFET devices, is also
indicated in Figure 1.33. This memory, having a clock input, is an enhancement of
the basic flip-flop circuit of Figure 1.32. Synchronous logic systems are generally

Figure 1.33: Symbols used for basic logic functions.

T> I> -O" R Q

OR AND NOT

S Q
I> enable —'
clock

memory
NOR NAND
buffer

38 ELECTRONIC SYSTEMS
 data

Aq Ai
logic implementation of a register

data
bus

register

read -
clock -
write -
symbolic representation

Figure 1.34: A data register and bus. As a result of the input and output gates of the
memories, a memory may either read the logic level of the line to which it is connected or
write the level of its output to the line. Although only two memory elements are shown, the
number of individual memories is equal to the number of lines of the data bus, that is, its
width.

used for computers. A clocked memory has an internal response to its inputs
during one condition of the clock signal but does not change its output state,
if required by the inputs, until a later condition of the clock signal. Often, the
leading or falling edge of the clock signal is used to separate in time the output
response of the memory from that required by its inputs.
The operation of a computer relies on data registers sharing a common data
bus (Figure 1.34). The data bus, as its name implies, is used to transfer data
between different logic units of a computer. For this type of system to function
properly, it is imperative that only one logic circuit attempt to write to the data
bus at any instant. A register consists of a group of memories functioning as a
unit that may either read data from or write data to the bus. It is the logic buffer
at the output of each memory that will cause a register to write to the bus when
its enable input is at a high level. On the other hand, the input AND gates, when
their read inputs are high, produce a set of inputs for each memory. An inversion
bubble is indicated for the input of the AND gate connected to the R input of the
memory - an indication that a NOT gate is in series with the input connection.
One memory element is required for each data line of the bus, and bus widths
from 4 to 64 lines are common.
An accumulator register, a modified data register, is depicted in Figure 1.35.
The operation of this register is determined by the content of the instruction

1.6 COMPUTERS: TRANSISTORS BY THE MILLIONS 39

 register, the content being interpreted by the
controller that provides the appropriate
logic control signals to the accumulator.
accumulator Consider, initially, a very limited accumu¬
register
lator, the data register of Figure 1.34, with
its controlling inputs provided by the con¬
timing controller troller. The three functions of the data regis¬
clock ter (doing nothing, reading, and writing) are
determined by the content of the accumula¬
instruction
tor register. For example, if a 4-bit instruc¬
register
tion is utilized, 0000 might correspond to
Figure 1.35: An accumulator register controlled by doing nothing, 0001 to reading, and 0010
an instruction register. The single “line”between the to writing. The controller would translate
accumulator and the controller represents a set of these logic words into appropriate read and
logic control signals. write signals for the accumulator register.
The read operation followed at some later
time by a write operation might be used to save a data word on the bus at the
read time while the bus is used for other data transfers.
More complex accumulator functions can be obtained through modifications
of a basic data register - enhancements achieved with additional logic elements
(Taub 1982). It is desirable to be able to “clear” the output of all memories, that
is, to set each to a low level, Q = 0. A high-level signal at each memory’s reset
input R will achieve this. If these inputs are through an OR gate, the functioning
of the memory for other inputs will be unchanged. For the example suggested, an
instruction register word of 0011 might be used to implement a clear operation.
Another useful operation is that of complementing the content of each memory
of the register. A set of logic gates that transfers the outputs of each memory
back to its inputs could be used, the Q output to the R input and the Q to
the 5 input. This could correspond to an instruction register of 0100. If it is
desired to set the register, that is, change all memory outputs to a high level,
Q = 1, a clear operation could be followed by a complement operation. Another
important function is to shift in a forward direction the contents of memories,
that is, move that of Aq to Ai, that which was originally in Ai to Aj, and so forth.
Alternatively, a shift in the reverse direction might be desired. Furthermore, when
shifting the contents of the memories, the content of the last memory might either
be discarded or moved to the first register. Again it is the word of the instruction
register that determines if a shifting will occur, its direction, and the possible
destination of the last memory.
Only one data word is stored and operated on by an accumulator. As such, it
is not possible to compare two data quantities (for example to test if they are the
same) or to combine two data quantities (for example, add them together if they
represent numbers). An arithmetic-logic unit (ALU) indicated for the elementary
computer of Figure 1.35 is required for these type of operations. The operation
of the ALU, which shares a common data bus with an accumulator as well as
other registers, is determined by the content of the instruction register through
the controller. The ALU contains additional registers that it can use, for example.

40 ELECTRONIC SYSTEMS
 Figure 1.36: An elementary computer. For small computers, the central processing unit is on a
single integrated circuit, a microprocessor. The data bus is that connected to the buffer of the
central processing unit, the CPU.

when adding quantities as well as registers that it can set according to certain
results called flags. Furthermore, as a result of the data bus, the ALU may access
systems external to the processing unit as well as registers associated with other
memory systems of the computer. This unit represents a significant step in logic
complexity over that of an accumulator register.
The information processing capability of the computer is achieved by its central
processing unit (CPU), albeit additional processing is generally performed by the
individual systems shown at the top of Figure 1.36. In addition to the data bus,
the computer of Figure 1.36 has an address bus. Each register that may write to
the data bus has a unique address, an address represented by a set of logic levels
of the individual lines making up the address bus. It is in this fashion that the
CPU communicates with the other logic systems of a computer - for example, a
keyboard or a screen display.
Of importance is the programmable nature of a computer. When the elemen¬
tary computer of Figure 1.36 is running a program, instructions are transferred,
one-by-one, to the instruction register from a memory of the computer. At each

1.6 COMPUTERS: TRANSISTORS BY THE MILLIONS 41

 step, the program counter is incremented so that it will address the next instruc¬
tion. An instruction could call for reading a data word that might be at the next
memory location, or, alternatively, might be at some other location. For the lat¬
ter case, a new address, specified by the instruction, is transferred to the address
bus. If it is desired, for example, to add two quantities, these quantities would
first need to be obtained, one transferred to the accumulator and the other to
the ALU. Following the instructions that accomplish these moves, an instruc¬
tion to perform the add operation would be required. At the completion of the
addition, the sum that might be in the accumulator register would need to be
transferred to an external memory location unless it would be used for the next
operation.
An extremely elementary set of instructions, that is, a machine language pro¬
gram, is required by the CPU. These instructions might be generated from an
assembly language program providing a set of detailed symbolic instructions,
whereas memory locations and the actual machine code are generated by an as¬
sembler program. Alternatively, a higher-level program might be used which, in
turn, would generate the machine code. Even the simplest operations, it will be
noted, tend to require a lengthy sequence of elementary machine instructions. It
is only because of the rapid response of modern processing units that complex
computational procedures can be realized.

MEMORIES
Flip-flop circuits using vacuum tubes, similar to the circuit of Figure 1.32 us¬
ing MOSFET devices, were used for the internal memory of the CPUs of early
electronic computers. Owing to the cost and complexity of vacuum tube circuits,
another type of memory circuit was required for the memory arrays of these
computers. These circuits included crystal-excited mercury delay tubes and spe¬
cial cathode-ray tube storage units (costs as high as $l/bit were common). While
working on the Whirlwind computer at MIT, Jay W. Forrester put forth the idea
of using a three-dimensional system of ferrite core elements, which became the
standard for computers produced during the 1960s (Forrester 1951).
A ferrite core memory element with two windings is depicted in Figure 1.37.
Its operation depends upon the magnetic material of the core having a mag¬
netization curve (magnetic flux density B versus magnetizing force H) with a
hysteresis loop. Because the magnetizing force H is proportional to the current i,
the flux density B versus the current / displays a similar hysteresis characteristic.
If, for the characteristic shown,
the current is reduced to zero
Figure 1.37: A magnetic ferrite core memory element.
after having had a value of Iq
B or —Iq, the resultant magnetic
flux density will be Bq or —Bq,
respectively. This magnetic re¬
tention, the same principle on
which a permanent magnet is
based, gives the core its mem¬
voltage ory capability. One direction of

42 ELECTRONIC SYSTEMS
the magnetic flux density, say Bq, may be associated with a Boolean logic value
of 1 and the other direction, —Bq, with 0.
The state of the core depends on the most recent value of current, either Iq or
— Jo (a 1 or 0 if a Boolean designation is used for the current). In contrast to most
other memory elements, including commonly used semiconductor memories, a
magnetic core memory will retain its data when the computer is shut off. A
voltage-sensing winding is used to determine the magnetization of the core, that
is, its logic state. The winding’s induced voltage vs depends on the time rate of
change of the winding’s flux’" linkages. For a nonchanging current, including i
remaining zero, the voltage is zero regardless of the value of the magnetic flux
density. For a voltage-sensing winding with N2 turns, the flux linkage is N2A2,
where X2 is the total flux.
dX2
Vs = N2 (1.15)
dt
The flux linkage X2 is the surface integral of the flux density B over the cross-
sectional area of the core:

= N./ BdA^BA cross section (1.16)

If the flux density can be approximated as being uniform over the cross section
of the toroid, the flux is simply B multiplied by the area Across section- Because the
voltage depends on a time derivative, it is necessary to interrogate the memory
with a current pulse to ascertain the memory state. Consider the situation for
which B — Bq for i = 0. A current pulse of Iq will have very little effect on the
magnetic field, and hence vs will be very small. If, on the other hand, the initial
value of magnetic flux density was —Bq, a. current pulse of Iq will change the flux
density to Bq. This results in a large change in flux density (from — Bq to Bq) and
hence a much larger voltage vs- Thus the voltage, when the current is pulsed,
provides the indication of the original state of the memory.
A complication arising from using a current to ascertain the original state of
the memory is that the state of the memory might be changed in the process. For
the positive current pulse considered, the magnetic flux is changed to Bq if it was
originally —Bq. Hence, if the voltage indicates that the memory was changed, it
is necessary, if it is assumed to be desirable to preserve the original data, to reset
the memory, that is, to apply a pulse of —Iq to the current winding.
Although magnetic core memories are no longer used, magnetic storage us¬
ing a moving magnetic media is still extensively used for external data storage.
Magnetic tapes and disks (both flexible diskettes and hard drives) rely on the mag¬
netization of a ferrite material (Figure 1,38). For magnetic tape systems, either a
single read-write head or separate read and write heads are used. Furthermore,
several parallel tracks, each having its own head or set of heads, are utilized to
increase the data-recording density. A tape head consists of a soft-iron circular
magnetic circuit with a small gap that is either in direct contact with the tape or
separated from the tape by a very thin moving air layer. A current produces a
fringing magnetic field at the gap of the magnetic circuit that magnetizes the tape.
Unlike the magnetic core memory, for magnetic tape systems an interrogating

1.6 COMPUTERS: TRANSISTORS BY THE MILLIONS 43

 read/write

tape with magnetic surface layer disk with magnetic surface layer

Figure 1.38; Magnetic tape and disk systems.

current is not needed to read previously recorded data. As the tape passes the
tape head, a changing magnetic flux produced by the motion of the tape results
in an induced voltage. This voltage can, in turn, be correlated with the stored
data. Reading the data, it should be noted, does not change the recorded data.
A disk memory storage system works in a similar fashion to that of a tape
system, except that data are recorded on a set of circular tracks. A floppy disk
consists of a plastic disk with a thin ferrite surface layer. The spinning motion of
the disk produces a changing magnetic flux, which, in turn, produces a voltage
in the winding of the head. A hard-disk memory uses a set of aluminum disks
mounted on a common spindle shaft. The disks have ferrite surfaces on both
sides. In disk systems, data are recorded in a serial fashion, that is, bit by bit,
filling a complete sector of a track. It is therefore necessary, when reading data,
to read the complete data string of a sector.
Very-large-scale integrated circuits are now used for the CPU of smaller com¬
puters as well as most of a computer’s peripheral tasks. The difficulty of memory
storage, which limited the capacity of early computers, has been largely mitigated
by integrated circuit memories. One type of memory uses an array of individ¬
ual flip-flops such as that of Figure 1.32, a memory system described as a static
memory. It is not only possible to read the memory without altering its state, but
the memory element will remain in a particular state as long as it is adequately
powered.
A much simpler memory element is possible, namely, an elementary capac¬
itor. A capacitor, if charged to a given potential, will tend to retain its stored
charge and hence retain its voltage. This principle was first used by John Atana-
soff in a special-purpose early electronic computer; a memory prototype was
demonstrated in 1939 (Mackintosh 1988). Atanasoff used a rotating disk mem¬
ory consisting of individual capacitors connected between a common conductor
at the center of the disk and individual outer contacts. The electronic memory
circuit was successively connected to each capacitor as the disk rotated. As for
modern integrated circuit memories using capacitor storage, a regenerating cir¬
cuit was needed because, as a result of dielectric losses, a charge leakage occurred.
It is necessary to read a capacitor memory element periodically and restore the
capacitor’s voltage to its original value.
An integrated circuit capacitor type of memory (generally designated as a dy¬
namic memory) consists of a two-dimensional array of capacitors connected by

44 ELECTRONIC SYSTEMS
means of a transistor to a read-write bus. For this circuit, only a single transistor
is required for each memory element (for each bit of storage) - an internal transis¬
tor capacitance serves as the memory capacitor. For a flip-flop memory element,
at least three transistors are required for each memory element (generally four
are used). Flence, for a large memory array, a dynamic memory system requires
the smallest number of transistors even though a regenerating (refresh) system is
needed. As a result, memory costs per bit of storage capacity have fallen dramat¬
ically from the early costs of $l/bit (by a factor on the order of one million in
inflation-adjusted dollars).

1.7 INTEGRATED CIRCUITS: SHRINKING DEVICE SIZES

AND INCREASED COMPLEXITY
Since the invention of semiconductor devices and integrated circuits, the evolu¬
tion of electronics has been toward ever smaller devices (Riordan and Floddeson
1997). As a result, the number of devices formed on a single integrated circuit
has been steadily increasing, whereas the overall average cost of a typical inte¬
grated circuit has not changed greatly. Hence, the cost of a single transistor of an
integrated circuit has been steadily declining - its present cost can be expressed
in millionths of a cent.
The first integrated circuits, consisting of a few semiconductor devices and
resistors, performed basic functions such as that of a logic gate or an elemen¬
tary amplifier. The next step in the complexity of integrated circuits resulted
in circuits that accomplished basic small-scale system functions such as a logic
adder or an operational amplifier. Now ultra-large-scale integrated circuits with
device counts in the millions, which include dynamic random-access memories
and microprocessors, are common. Besides the possibility being able to put more
devices on a single integrated circuit, greatly improved electrical characteristics
have been obtained as a result of the smaller device sizes. With smaller devices
and shorter interconnecting leads, circuit capacitances are reduced. Therefore,
smaller charge quantities need to be moved to produce a desired voltage change,
thereby reducing device currents. As a result, not only is the power dissipated
by individual devices reduced, but logic circuits can be operated much more
rapidly.
When commercially produced integrated circuits were being introduced in
1965, Gordon Moore, then of Fairchild Semiconductor, predicted a very rapid
increase in the number of devices that could be crammed onto a single inte¬
grated circuit (Moore 1965). At that time, the largest integrated circuit had only
64 components (a combination of diodes, transistors, and resistors) with each
transistor, on the average, occupying an area of approximately 50 x 50 /zm. By
today’s standards, these integrated circuit transistors would be described as mon¬
strous. On the basis of the scant record of the previous 6 years, from a single
planar transistor in 1959 to integrated circuits with 64 components in 1965,
Moore predicted that the number of components per integrated circuit would
double each year for at least the next 10 years. This prediction implied that inte¬
grated circuits with (1024) times as many devices would be possible in 1975.

1.7 INTEGRATED CIRCUITS: SHRINKING DEVICE SIZES AND INCREASED COMPLEXITY 45

 Indeed, an integrated circuit with
approximately 65,000 transis¬
tors was produced in 1975, prov¬
ing Moore correct.
Transistors per integrated circuit

The planar process of produc¬

ing transistors made it possible
to form interconnections by
evaporating metal-film conduc¬
tors onto the semiconductor
wafer. Another major improve¬
ment was the use of photogra¬
phic techniques to place intricate
masking patterns on the semi¬
conductor so that after a mask
is formed, dopants can be intro¬
duced with a diffusion process. A
succession of masks and appro¬
Figure 1.39: Transistors per integrated circuit of dynamic random
priate diffusion steps are used to
access memories (DRAM) and Intel microprocessors.
form semiconductor devices and
other components. These processes have come to be characterized by extremely
high levels of accuracy and reliability. Concurrently, as the result of automated
techniques, the cost per individual integrated circuit remained small even with
the increased levels of complexity.
In 1975, Moore predicted that the number of devices per integrated circuit
would continue to increase but at a somewhat slower rate with a doubling time
of approximately 18 months (Moore 1976; Noyce 1977).* As can be seen in
Figure 1.39, this has been nearly the case, and the doubling times since 1975
for dynamic random-access memories as well as for microprocessors have been
just under 2 years (Schaller 1997). In 1998, memory chips with approximately
269 million transistors, one for each stored bit, and microprocessors with 10 mil¬
lion transistors, were available.
How long will this trend continue? When will the doubling every l-to-2 years
of the number of transistors (modern digital integrated circuits tend to use only
transistors) on an integrated circuit end? It seems to be generally accepted that the
present fabrication technologies will be extended so that this trend will continue
to about 2010. However, experts do not agree on the extent that this trend can
be pushed beyond 2010.
For a particular technology, physical barriers limit the size to which devices
can be reduced (Service 1996). Optical lithography is presently being used for
ultra-large-scale integrated circuits. This process is utilized to form a pattern or
mask on a sheet of glass with a thin coating of light-absorbing metal. Ultraviolet
light is then shone through the mask and focused with a series of lenses onto
the semiconductor. The surface of the semiconductor is coated with a photore-
sistant material, and a change in its chemical structure occurs for those portions

* By this time, Moore, one of the founders of Intel, was its president.

46 ELECTRONIC SYSTEMS
struck by light photons. By means of a chemical process, either the chemically
altered or original photoresistant surface material is removed so that what re¬
mains forms a mask for doping or other fabrication steps used to form devices
and interconnections. The size of the semiconductor features that can be ob¬
tained in this fashion is comparable to the wavelength of the light source used.
With short-wavelength ultraviolet light, features as small as 0.13 jxm are ex¬
pected to be possible. Unfortunately, this may be the limit for optical lithography
because, for the wavelengths needed to produce smaller features, conventional
quartz lenses can no longer be used. Quartz lenses absorb, rather than transmit
photons with shorter wavelengths. Although X-ray lithography utilizing photons
with considerably shorter wavelengths is a possibility, producing the patterning
masks presents a formidable challenge. One problem associated with producing
ultra-large-scale integrated circuits that have millions of extremely small tran¬
sistors is the capital cost of the fabrication facilities. Because the cost of these
facilities increases with the complexity of the integrated circuits, this is likely to
be another limiting factor.
Even if new technologies are developed that make it possible to fabricate de¬
vices with smaller dimensions, other fundamental limitations can be foreseen
(Keyes 1992). The behavior of transistors is premised on electrons behaving in
a well-ordered fashion. When devices are large compared with the quantum-
mechanical wavelength of the electrons involved, classical concepts of charge,
current, and voltage apply. As dimensions are reduced, a quantum “fuzziness”
occurs because electrons are able to tunnel through barriers that are intended
to confine their movement. These effects tend to occur when device dimensions
shrink to approximately 10 nm (an order of magnitude smaller then the limit
imposed by optical lithography). This limitation for conventional devices, how¬
ever, opens new device possibilities that depend on only a single or possibly
a few electrons. The quantum-mechanical properties of an electron can be ex¬
ploited with a conducting island that is sufficiently small to permit only a single
electron to occupy an island (Ferry and Goodnick 1997; Glanz 1997; McEuen
1997; Service 1997). The repulsive force of an electron inhibits a second electron
from sharing the island. Transistor-like devices have been proposed in which a
semiconductor island, a quantum dot, is used to control the current of a device.
Single-electron devices, should they prove practical, will offer a fabricating chal¬
lenge in producing devices with nanometer dimensions. If this fabrication hurdle
is overcome, integrated circuits with possibly trillions of devices on a single chip
will be possible.

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PROBLEMS
1.1 Consider the plate characteristic of Figure 1.5. Obtain the transfer char¬
acteristic of Figure 1.6 for plate currents of 5 and 15 mA.

PROBLEMS 49
 1.2 Assume that the plate voltage of the triode of Figure 1.5 is supplied by
a constant voltage battery. Determine the current transfer characteristic
(a graph similar to that of Figure 1.6 except that ip is the dependent
variable) for plate potentials of 100, 150, and 200 V.
1.3 The drain characteristic of a typical MOSFET device is given in Figure
1.7. Determine the voltage transfer characteristic (similar to that of the
triode vacuum tube) for drain currents of 2, 4, and 6 mA.
1.4 Assume that the drain voltage of the MOSFET device of Figure 1.7 is
held constant. Determine the current transfer characteristic for drain po¬
tentials of 2, 6, and 10 V.

Drain

+
Rd 1 kQ Figure PI.5
DD
^DD 10 V

Source

1.5 Consider the case for w^hich the drain circuit of the MOSFET device of
Eigure 1.7 consists of a resistor Rd and a battery Vdd (Eigure PI.5). As a
result of the load circuit (Rd and Vdd), vds — Vdd — wRd- Alternatively,
Id — (Vdd — vds)/Rd- If the straight line corresponding to id is drawn
on the drain characteristic of Eigure 1.7, the drain current id and drain-
to-source voltage vds tnay be obtained for any particular value of gate-
to-source voltage, vgs- Obtain curves of id and vds versus vgs for the
circuit.
1.6 Repeat Problem 1.5 for Vdd = 8 V and Rd = 2
1.7 A parallel LC circuit, similar to that of Figure 1.8, is frequently used
to tune an AM radio’s input circuit. Consider the case in which a fixed
inductor is used along with a variable capacitance that has a minimum
capacitance of 50 pF (this includes the unavoidable capacitance of the
circuit to which it is connected).

a) What is the inductance required if the circuit is to be resonant at

the upper end of the broadcast band (1600 kHz) with the minimum
capacitance?
b) What is the maximum value of capacitance required if the circuit
is to be able to tune to the lowest frequency of the broadcast band
(550 kHz)?
1.8 As in Problem 1.7, a parallel LC circuit is to be used for an AM radio. A
circuit with a maximum capacitance of 150 pF is to be used. Determine
the value of L and the minimum value of capacitance required to tune
the broadcast band of 550 to 1600 kHz.
1.9 The input circuit of an FM receiver is tuned to a frequency of 100 MHz. A

50 ELECTRONIC SYSTEMS
 resonant circuit similar to that of Figure 1.8 is used that has a capacitance
of 30 pF.

a) What is the inductance required for the circuit?

b) What are the minimum and maximum values of capacitance required
for tuning an FM band of 88 to 108 MHz?
c) An approximate formula for a simple air-core inductor is L(/xH) =
0.04w^r, wherer is the radius expressed in centimeters. What is the
approximate number of turns of wire n required for a coil with a
radius of 0.25 cm?
1.10 Verify that Eq. (1.4) is indeed a valid solution of Eq. (1.2).
1.11 Obtain a solution of Eq. (1.2) that has an initial voltage {t = 0) of
and an initial derivative that is zero.
1.12 Assume that Eq. (1.4) is the desired solution of Eq. (1.2). Obtain expres¬
sions for the capacitive and inductive stored energies ec and e^.
1.13 Consider the telegraph system of Eigure 1.11 and assume that a current
of 2 mA (/on) is required to activate the sounder. However, once activated,
the sounder will remain on until its curent falls below 1 mA (/off). Assume
a sounder resistance of 1 a wire resistance of 20 f2/km, a capacitance
of 5 nE/km, and a line length of 200 km. Ignore the ground resistance.

a) Determine the potential of the battery Vb required to achieve a solenoid

current of 2/on after the key has been closed for a long time interval.
b) An estimate of the dynamic behavior of the circuit may be obtained
by assuming that a single capacitor with a capacitance equal to that
of the entire length of line is located at its center and that half of
the total line resistance is located on each side of the center. Use the
battery potential determined in part (a), to estimate the time after the
key is closed that the sounder is activated (when its current reaches
/on). Assume the line was initially uncharged.
c) Estimate the time required for the solenoid current to reach 90 percent
of its final value, that is, 1.8/on-
d) Assume the key has been closed for a very long time and that it is
suddenly opened. Estimate the time required for the sounder to be
deactivated, that is, for its current to fall to /off. (Note: These times
set a limit to how fast code, that is, information can be sent.)
1.14 Repeat Problem 1.13 but assume a ground resistance equal to that of the
telegraph line.
1.15 Assume a telegraph line pair is used for a telegraph system (as for the
telephone line pair of Figure 1.12). Other than for a larger capacitance,
a wire-to-wire capacitance of 20 nF/km, assume that the parameters of
Problem 1.13 apply. Repeat Problem 1.13 for this condition.
1.16 Repeat Problem 1.15 for lengths of 100 and 400 km. Are the times
obtained linearly related to the length of the telegraph line?
1.17 Submarine cables using coaxial conductors are characterized by a fairly

PROBLEMS 51
 large capacitance. Repeat Problem 1.13 for a center-wire resistance of
2 f2/km and a capacitance of 0.1 /xF/km. The resistance of the outer
conductor may be ignored.
1.18 Repeat Problem 1.17 for the 2,000-mile trans-Atlantic cable.

Rl = lkQ
Figure PI. 19
Vb = 4.5 V

1.19 Consider the carbon granule microphone circuit of Figure PI.19. The re¬
sistor Ri represents the other parts of a telephone system, the earphones,
the telephone lines, and the other microphone. Assume that as a result
of an external sound wave, the following occurs for the resistance of the
microphone:

— Rq + Ri sin (ot
Ro = 100 Q, Ri^lOQ

a) Determine expressions for i{t) and viit).

b) Show that vi{t) Vo + sina)^.
c) Determine numerical values of Vq and Vi.
d) The approximate average signal power delivered to the load resistor
Ri is Vl/{2Ri). Determine this quantity.
1.20 Repeat Problem 1.19 for Ri — 100 Q.
1.21 Using the circuit and parameters of Problem 1.19, determine the value
of Ri for which the approximate average signal power delivered to the
load resistor is a maximum. What is the value of the power for this con¬
dition?
1.22 A particular earphone has been found to have a nominal resistance of
50 The following subjective data were obtained for its response for a
sinusoidal voltage with a frequency of 800 Hz:

Audio signal Voltage (peak-to-peak)

perceptible 1 mV
soft 20 mV
medium 200 mV
loud 1.5 V

What are the electrical powers associated with each of the responses?
1.23 A small loudspeaker with a nominal resistance of 8 ^2, when excited by
a sinusoidal voltage with a frequency of 500 Hz, was found to produce
the following subjective response data (at a distance of 1 m):

52 ELECTRONIC SYSTEMS
 Audio signal Voltage (peak-to-peak)

perceptible 2 mV
soft 50 mV
medium 400 mV
loud 6V

What are the electrical powers associated with each of the responses?

telephone Figure PI.24

line

1.24 A large-amplitude sinusoidal signal is generally used for “ringing” tele¬

phones. Consider a ringing frequency of 20 Hz. A series LC circuit
(preelectronic telephones) is used in which the inductance of the elec¬
tromagnet of the bell is the inductor of a resonant circuit, as shown in
Figure PI.24.

a) Consider the case for which L — 5 H. What is the value of C that

results in the maximum magnitude of ringer current?
b) When the receiver is removed, this circuit is disconnected from the
line. However, the ringer circuit of other telephones (extension tele¬
phones or telephones sharing a party line) are still connected to the
line. What is the complex impedance of the ringer circuit for an audio
signal with a frequency of 1 kHz? Assume an inductor resistance of
250 Q.
1.25 Consider the video scanning system of Figure 1.18. Sketches of the in¬
tensity signal b{t) are desired for the following test patterns:
a) A centered black vertical bar with a width of approximately that of
the black square of Figure 1.18. The remainder of the screen is white.
b) A similar centered horizontal black bar.
c) A pattern with both bars.
1.26 Repeat Problem 1.25 with the white and black regions interchanged.
1.27 Suppose that the display of Figure 1.18 consists of two diagonal black
bars (corner-to-corner) with widths of approximately that of the center
black square of the original figure. Sketch the intensity signal b{t) for this
condition.
1.28 The North American TV system uses a horizontal scanning rate of 15,750
lines/s. Assume that 90 percent of the horizontal scan period is associated
with the active display and the remaining 10 percent corresponds to the
off-screen portion and the retrace. Consider a test pattern of 10 equal-
width vertical black bars separated by equal-width white spaces.

a) Sketch the video signal for a single horizontal sweep.

b) What is the time interval of the active display?

PROBLEMS 53
 c) What are the period and frequency of the square-wave video signal
that produces the vertical bars?
d) Suppose a sinusoidal signal were to be used with the same peak-
to-peak amplitude instead of the square-wave signal to produce the
pattern. How would the pattern change?
1.29 Repeat Problem 1.28 for 100 vertical black bars.
1.30 The vertical resolution of a television display is limited by the number
of scanning lines used. For the North American system of 525 lines, this
limits the display to approximately 250 horizontal black lines (separated
by white lines). For an aspect ratio of 4:3 (33 percent wider than high
display), (4/3)(250) vertical lines would correspond to a comparable hor¬
izontal resolution. If it is assumed that 90 percent of the horizontal scan
period is associated with an active display, determine the period and fre¬
quency of the corresponding portion of the video signal. Why would the
display appear nearly unchanged if a sinusoidal rather than a square-wave
voltage were to be used for the video signal? Because a horizontal resolu¬
tion greater than the vertical resolution would not appreciably contribute
to the quality of the picture, the frequency determined for the display is
the upper frequency response required by a TV system.
1.31 The European TV system uses a vertical scanning frequency of 50 Hz (the
same frequency as that of the European electric power system). Eor 625
interlaced lines per frame, this results in a horizontal scanning frequency
of 15,625 lines/s. With appropriate assumptions, repeat Problem 1.30
for this system.
1.32 A half-wavelength dipole is commonly used for a transmitting antenna.
Determine the length of the dipole for each of the following:

AM broadcast 1.0 MHz

Shortwave 10 MHz
Citizens band 27 MHz
FM broadcast 100 MHz
VHF Television - channel 2 57 MHz
- channel 13 213 MHz
UHF Television - channel 14 473 MHz
- channel 69 803 MHz
Satellite TV - channel 1 3720 MHz
X-band radar 10,000 MHz

Eor an AM broadcast transmitter, a vertical quarter-wavelength antenna

is common (a ground “image” provides the other quarter-wavelength
section). A parabolic reflector is often used to concentrate the radiation
of microwave antennas.

1.33 To generate high-frequency signals, it is generally necessary that the re¬

sponse time of an electronic device be small compared with the period
of the signal. Assume a response time that is 10 percent of the period

54 ELECTRONIC SYSTEMS
 that is required. What are the required response times for the signals of
Problem 1.32?

1.34 Capacitance is unavoidable in all circuits. For an electronic circuit using

discrete devices, a stray capacitance of 10 pF from a node to the common
node of the circuit is typical. Determine the reactance introduced by a
10-pF capacitance for each of the following signals:

Audio signal - middle C 262 Hz

- upper limit 20 kHz
AM broadcast carrier 1.0 MHz
Video signal 4.5 MHz
Citzens band carrier 27 MHz
FM broadcast carrier 100 MHz

What is the rms value of the current for an rms voltage of 1.0 V?
1.35 Repeat Problem 1.34 for an integrated circuit with a stray capacitance
of only 0.1 pF.

1.36 Consider the satellite repeater of Figure 1.27 with a “global beam.” As¬
sume that the satellite uses a transmitter with an output power of 10 W,
that the power is radiated uniformly within the beam, and that it is zero
outside the beam.

a) What is the incident power density at the equator of the earth?

b) What is the incident power density at 45° north or south latitude?
1.37 A relay circuit (such as that of Figure 1.29) has two inputs, A and B, and
an output of C. The output is to be Vi for either input equal to Vi and
zero if both inputs are zero or Vi (an exclusive OR operation). Design a
relay system to accomplish this. Assume that relays with normally on as
well as normally off contacts are available.
1.38 The exclusive OR function of the relay circuit of Problem 1.37 is that
used for controlling a single light (or set of lights) with two switches
(generally referred to as a three-way circuit). Design a circuit using
single-pole, double-throw switches to accomplish this. No relays are
required.
1.39 Repeat Problem 1.37 for a comparator function; that is, the output is Vi
if both inputs are the same.
1.40 A relay logic system has three inputs. A, B, and C and a single output D.
The output is to be high, Vi, if, and only if, a single input is high. Design
a circuit to achieve this. Relays with multiple contacts are available.
1.41 Repeat Problem 1.40 for an output that is to be Vi if, and only if, two
inputs are equal to Vi.
1.42 A relay depends on a magnetic field to move its armature, thus moving its
contacts. Assume that a current of /on is required to achieve this. Once the
armature is activated, an iron magnetic path exists and a much smaller
curent will continue to keep the armature activated. Consider a relay

PROBLEMS 55
 that is turned on for a current of /on (or greater) but remains on for a
current greater than /off. For this relay, /off = 0.5/on. Suppose a periodic
triangular wave is used for an exciting current and that Ip = lion- Assume
that the relay responds essentially instantly to its current /.
a) Determine the fraction of a period for which the relay is activated for
the current of Figure PI.42(a).
b) Determine the response of the relay for the current of Figure PI .42(b).
Assume the relay has a response that depends on the magnitude of its
current.
1.43 Repeat Problem 1.42 for sinusoidal signals that have the same peak am¬
plitudes Ip.

COMPUTER SIMULATIONS

Cl.l Consider the telegraph system of Problem 1.13 in which R is the total
resistance of the wire and C is the total capacitance of the line. Instead of
approximating the system with two resistors of JR/2 and one capacitor
of C at the center of the line, use five T-type circuits to approximate the
line (Figure Cl.l). Obtain a transient solution for the transmission line
and sounder. Assume an input step function voltage with a peak value
of 20 V. Obtain on a single graph the voltages across each capacitor and
the sounder. What are the times necessary for these voltages to reach 50
percent of their final values.^ (Note: A transient time increment of 10 /ts
and an overall duration of 5 ms should be adequate.)

K/10 K/10 R/10 R/10

—wv ^w—
X c/5
X
Figure Cl.l

Cl .2 The model of the transmission line used for Simulation Cl.l ignored the
effect of the inductance of the line. As a result of magnetic field lines
that loop the wire, an actual line has a series inductance that affects its
behavior. Assume the transmission line of Simulation Cl.l has a series
inductance of 10 mH/km. The behavior of this line can be modeled by

56 ELECTRONIC SYSTEMS
 adding one-tenth of the total inductance of the line to the R/10 resistance
of each T section of Figure Cl.l. Repeat Simulation Cl.l for a series
inductance.
Cl.3 Consider the resonant circuit of Figure 1.8 with L — 100 fuH, C =
253 pF, and R = 20 k^2. A circuit with these component values has a res¬
onant frequency fo of approximately 1 MHz (l/27rv'TC). The behavior
of this circuit for a single exciting current pulse is(t) that has an ampli¬
tude of 1.0 mA and a duration of 0.5 jlls is to be determined. A transient
time increment of 10 ns is appropriate for a solution. An overall dura¬
tion of 10 periods, that is, 10 /as, will show the decay of the oscillation
amplitude. Obtain a graph of v{t). Also, on a second graph, obtain plots
of the energy stored by the inductor, the energy stored by the capacitor,
and the sum of these two quantities.
Cl.4 For a particular application, it is found that an audio signal can be ap¬
proximated by a voltage source consisting of the following four sinusoidal
terms:
= Vi sinljtfit + Vz sinln fzt 4- V3 sin27r/3^ + Y4
Vi = 1 V, V2 = 1 V, V3 = 0.5 V, V4 = 0.2 V
fi = 400 Hz, fz = 1 kHz, /3 = 2.5 kHz, /4 = 3.5 kHz
This voltage source has a Thevenin equivalent resistance Rj of 100 k^2
and is connected to a load capacitance Cl of 2 nF. As a result of the
resistance and capacitance, the voltage across the capacitance vc{t) is a
distorted and delayed version of vs(^).
a) Obtain vc{t) for a time duration of 10 ms. To ensure sufficient res¬
olution of the output voltage, a transient time step of 5 /xs or less is
recommended.
b) Estimate the time by which vc(t) is delayed from vs{t). From a plot
of both quantities, the delay time can be estimated by averaging the
time difference of the zero crossings.
c) Using a trial and error method, determine the maximum capacitance
Cl yielding a voltage vc{t) that looks reasonably like a subjective
decision will be necessary.
CT.5 A logic OR gate using semiconductor diodes is indicated in Figure 1.30.
For a SPICE simulation, diodes with default parameters may be used.
This requires two SPICE circuit lines:
D1 5 6 MYDIDDE
.MODEL MYDIODE D
The first line specifies a diode, a D-type element. The diode indicated
points from the first node number, 5, to the second node number, 6,
and has been assigned the arbitrary model name MYDIODE. The .MODEL
statement references this model name and specifies a diode model D. All
diodes of the circuit can use the same model name; only a single . MODEL

COMPUTER SIMULATIONS 57
 statement is then necessary. Determine the dependence of vc on the one
input voltage wa (0 > U/i < 5 V) for values of 0, 2.5, and 5 V for
vb- Assume R = 1 The response for all three values of ub may be
obtained simultaneously by using three independent circuits, each with
a different constant voltage source for vb.
Cl.6 Repeat Simulation Cl.5 for the diode AND gate of Figure 1.30. The
voltage Vi is a constant voltage of 5 V.

ELECTRONIC SYSTEMS
 CHAPTER TWO

THE SEMICONDUCTOR JUNCTION DIODE:

THE BASIS OF MODERN ELECTRONICS

Although the invention of the transistor at Bell Telephone Laboratories in 1947

was destined to revolutionize the field of electronics, the initial response to the
public announcement on June 30, 1948, was anything but overwhelming. The
New York Times carried the news in its daily column “The News of Radio,”
which dealt with new radio shows. Near the end of the column appeared the
following {New York Times 1948):

A device called a transistor which has several applications in radio where a vac¬
uum tube ordinarily is employed, was demonstrated yesterday at Bell Telephone
Laboratories, 463 West Street, where it was invented.

Three additional brief paragraphs completed the announcement. A more fitting

debut of the transistor was provided by three letters to Physical Review directed
toward the scientific and technical community (Bardeen and Brattain 1948; Brat-
tain and Bardeen 1948; Shockley and Pearson 1948). “The Transistor-A Crystal
Triode” appeared as the cover article of the September 1948 issue oi Electronics
(Fink and Rockett 1948). Although the terms crystal triode and semiconductor
triode were used to describe the transistor, by way of analogy with the vacuum
tube triode (Figure 1.4), the name transistor has prevailed. The term transistor,
that is transfer resistor, is attributed to John R. Pierce (already mentioned in
relation to satellite communication) (Shockley 1976). Thus commenced the era
of solid-state electronics in which transistors not only play an important role but
within which entirely new electronic devices have been developed.
The roots of the solid-state electronics era reach back to the 1920s with the
development of quantum theory (Weiner 1973). A. H. Wilson developed a theo¬
retical model for semiconductors in which he introduced the concept of a “hole,”
that is, an absence of a valence electron (Wilson 1931). William Shockley, who,
along with John Bardeen and W. H. Brattain shared the 1956 Nobel Prize in
physics for the invention of the transistor, published the seminal treatise on semi¬
conductors, Electrons and Holes (Shockley 1950), which provides an overview
of the theory. The development of the transistor also depended on fabrication

59
 techniques developed in the 1930s and 1940s. An extremely difficult task was
that of obtaining highly pure semiconductor samples - a purity much beyond
that required for essentially any other need.
To describe the internal functioning of a transistor, an understanding of a
semiconductor junction diode is necessary. A bipolar junction transistor (BJT),
for example, consists of two interacting diodes, whereas a metal-oxide field-
effect transistor (MOSFET) is fabricated from two noninteracting diodes. Only a
limited physical description will be presented, for a rigorous theoretical develop¬
ment would require a book-length treatment. This physical description, however,
should prove adequate for gaining an appreciation of the basic mechanisms of
semiconductor devices. A more thorough subsequent study of semiconductor
physics is encouraged.

2.1 ELECTRONS AND CONDUCTION: A LOOK

AT ELEMENTARY PROCESSES
An understanding of electron devices requires a knowledge of the behavior of elec¬
trons, which are influenced by electric and at times magnetic fields. The movement
of electrons in a vacuum determines the characteristics of vacuum tubes, whereas
the movement of electrons in semiconductors, a process considerably more com¬
plex than in a vacuum, determines the characteristics of semiconductor devices.
In addition, an understanding of the conduction process for metals is necessary.
The charge of an electron, even though very minute, has been directly mea¬
sured, the earliest measurement being performed by Millikan in his classic oil
drop experiment of 1906. For electrons to contribute to the current of a mate¬
rial, they must have sufficient energy to be free from the electron valence shell of
an atom (Figure 2.1). In metals, electrons have sufficient energy for this to occur
at normal temperatures. On the other hand, this is not the case for insulators,
which have nearly complete valence shells. Because the charge of an electron is
very small, the quantity of electrons necessary to produce a significant current is
extremely large. Consider, for example, a current of 1 A, that is, a charge flow
of 1 C/s. If individual charges of 1.6 x 10“^^ C (the magnitude of the electron’s
charge) are to produce a current of 1 A, the following relation, where N is the
number of charges per second, must be satisfied;

1.6xlO-^^N=l (A)
1
N = — ^ iQ-19 ~ ^ (electrons/s) (2.1)

Figure 2.1: The ionization of an atom.

atom ion electron

+ energy
-o positively
+ e

negative
neutral charged electronic
atom charge

60 THE SEMICONDUCTOR JUNCTION DIODE

Over one billion-billion electrons per second are thus cross-sectional area A
required. Even for a current of 1 nA (10~^ A), a cur¬
rent that is about as small as may be readily mea¬
sured, 6.25 X 10^ electrons per second are required. P-
Although the behavior of individual electrons of a de¬
vice will be discussed, it should be kept in mind that
Figure 2.2: A sample of material used for
millions and more likely billions of electrons will be calculating conductance.
involved.
A macroscopic parameter^that distinguishes a metal or insulator from a semi¬
conductor is its conductivity a (or its reciprocal, resistivity, p). Consider the
sample of homogeneous material of Figure 2.2 that has a cross-sectional area of
A and a length of d. The conductance of the sample G (or its resistance R), may
be expressed in terms of its physical dimensions and its conductivity a as follows:

G^aA/d {S), R=1/G{Q) (2.2)

Conductance (or resistance) depends on the physical size and shape of a material,
whereas conductivity is an innate property of the material. It should be noted
that the longer the sample, the smaller its conductance (the larger its resistance),
whereas the larger its area, the larger its conductance (the smaller its resistance).
Using the mks system of units in which dimensions are expressed in meters,
conductivity a has the dimensions of S/m.
Materials used for electronic devices may be classified into three broad, general
categories of metals, semiconductors, and insulators according to the conductiv¬
ity of the material (Table 2.1). Metals such as silver, copper, aluminum, or alloys of
these and other elements, are characterized by high values of conductivity. These
elements have valence electrons that, for most chemical reactions, are “lent” to
other elements. In a metal, these electrons, as a result of their thermal energy,
become free of the atom to which they were originally bound. As a result of the
large number of free electrons, metals are very good conductors - sufficiently
good conductors that for many circuit applications their conductivity is treated
as being infinite (for example, the zero-resistance wire).
Although electrons tend to be free to move about within a metal, their move¬
ment is characterized by numerous collisions with the atoms of the metal. As a

TABLE 2.1 CONDUCTIVITY OF MATERIALS

Material Conductivity, a (S/m)
/ Silver 6.3 X 10^
1 Copper 5.8 X 10^
Conductors <
1 Aluminum 3.5 X 10^
Other > 10^

( Doped silicon or germanium 10-3 to 10^

Semiconductors < Intrinsic silicon 4.7 X 10-'*
f Intrinsic germanium 2.2

Insulators 10-36 to 10-^

2.1 ELECTRONS AND CONDUCTION: A LOOK AT ELEMENTARY PROCESSES 61

 ^ E result of their thermal energy, electrons
tend to move with relatively large ve¬
locities. However, at each collision, the
direction of an electron’s velocity tends
to change in a random manner (Figure
2.3(a)). Owing to this random process, a
(a) no electric field (b) electric field
particular electron tends to move away
Figure 2.3: The motion of an electron in a metal. from its original position. If, however, all
electrons of a small finite volume are con¬
sidered, the number that move to the right, for example, will be about the same
as the number that move to the left. Hence, as a result of thermal motion and
collisions, the average drift velocity of an ensemble of electrons is zero. (This
random motion, however, results in very small current fluctuations that limit the
sensitivity of electronic devices.)
An electric field produced by an external potential (such as a potential ap¬
plied between the ends of the sample of Figure 2.2) modifies the motion of the
individual electrons (Figure 2.3(b)). During each movement between collisions,
the electron is slightly accelerated in the direction of the force produced by the
electric field (F = —eE). For the electric fields that are common for electronic
devices, the effect of the acceleration is small, the motion of the electrons remains
primarily due to thermal processes as in the case without an electric field. But,
because, in the presence of an electric field, each electron will tend to drift slightly
in the direction of the force, when all electrons are considered, an average drift
velocity will be observed in the direction of the force produced by the electric
field. For electric fields that are not abnormally large, the average drift velocity
Vd may be shown to be proportional to the electric field E. Because the drift
velocity for electrons is in the opposite direction of the electric field, a minus sign
is required:

Vd = -M«-E (m/s) (2.3)

The proportionality constant /z„ is known as the mobility. Because velocity has
the dimensions of meter per second and the electric field of volt per meter, mobility
has the dimensions of meter squared per volt second.
The conductivity of a material such as a metal depends on the mobility and
the number of electrons that take part in the conduction process, that is, the
number of free electrons. An increase in either of these quantities increases
the conductivity of the material. Consider the sample of Figure 2.4 in which
the number density of free electrons is He (number/m^). Assume that an elec¬
tric field is applied to the sam¬
Figure 2.4: A sample used for determining conductivity.
ple that results in a free electron
E area A drift velocity of Vd- The special
rig free case for which the center region
electrons/m"' I
has a length oivd{l s) is of inter¬
est. If only the drift mechanism
is considered, an electron start¬
-J Vd (1 s) k ing at the left edge of the center

62 THE SEMICONDUCTOR JUNCTION DIODE

region will in 1 s reach the right edge of the center region. Not only will this
electron reach this edge, but all free electrons within the center region will cross
into the right-hand region. For a free electron density of this is rtgVdA (density
X volume) electrons. The charge will be this quantity times the charge of an
electron, namely —e. Because a time interval of 1 s was assumed, the current is
numerically equal to the charge.

I — —engVdA
j = IjA = -eUgVd (A/m^)

A macroscopic quantity, a current density /, has been introduced. Using the

expression for mobility, an equation for the current density in terms of the electric
field is obtained as follows:

j = -eng(-fx„E) = engjXnE =aE

G = engiXn

Because current density and electric field are related by the conductivity of a
material (the basic definition of conductivity), an expression for conductivity in
terms of electron density and mobility results.
As a result of having a large number of free electrons, metals have a large con¬
ductivity. On the other hand, insulators do not, for normal conditions, have many
free electrons. Insulators are characterized by atoms that have nearly complete
(or in the case of inert elements, complete) electron valence shells. In chemi¬
cal reactions, these elements tend to accept valence electrons from other atoms.
For normal temperatures, thermal energies are insufficient to produce free elec¬
trons in these materials. However, by the application of extremely large electric
fields, valence electrons may gain sufficient energy to escape from valence bonds
and contribute to a current. Although this breakdown condition results in a
current, it is usually destructive and is not (intentionally) utilized for electron
devices.
Semiconductors consist of atoms whose valence shells have neither as many
free electrons as metals nor are as nearly complete as insulators. Compounds of
atoms in the center of the periodic table have valence shells that are only half
filled (or half empty) and are therefore used to produce semiconductors. It is
from these materials that the array of solid-state electronics devices, including
integrated circuits, are formed.

EXAMPLE 2.1
Consider a length of AWG 22 (American Wire Gauge) copper wire that might
be used in the laboratory for a connection to an experimenter board (AWG
22 wire has a diameter of 0.64 mm). The wire is conducting a current of 1 A.
What is the conductance and resistance of the 1-m length of wire? What is the
drift velocity and the mobility of the free electrons?

2.1 ELECTRONS AND CONDUCTION: A LOOK AT ELEMENTARY PROCESSES 63

SOLUTION Equation (2.2) may be used to determine the conductance and resis¬
tance of the wire.

A=-d^ = -(0.64 X 10-^ m)^ = 3.22 x 10“^ m^

4 4
G = aA/d = (5.8 X 10^ S/m)(3.22 x 10“^ m) = 18.7 S
1/G = 0.054 ^2
For a current of 1 A, the potential difference is 0.054 V and, for a wire length
of 1 m, the magnitude of the electric field E is 0.054 V/m. Copper has an
atomic mass of 63.5 g and a density of 8.96 g/cm^. Because one atomic mass
contains Avogadro’s number of atoms (6.02 xlO^^), the number of atoms of
1 cm^, n', is readily determined as follows:

, (6.02 X 10^^ atoms)(8.96 g/cm^)

n =- = 8.49 X 10^^ atoms/cm^
63.5 g
n = 8.49 X 10^^ atoms/m^

If one free electron for each copper atom is assumed, Ug = 8.49 x 10^^/m^.
Equation (2.4) yields the drift velocity:
_ -1 C/s
~ eUgA ~ (1.6 X 10-19 0(8.49 x 102Vm3)(3.22 x 10-^ m2)
= —2.29 X lO"”"^ m/s (opposite direction to E)
Equation 2.3 may be used to determine the mobility of the free electrons
through the previously determined value of E as follows:

/X = -vd/E = (-2.29 X 10-4 m/s)/(-0.054 V/m)

= 4.24 X 10“^ m^/V • s

EXAMPLE 2.2
Compare the drift velocity of Example 2.1 with that associated with the ther¬
mal motion of the free electrons. Assume a temperature T of 300 K (27°C).

SOLUTION The average thermal energy of an electron is {3/2)kT (where k is the

Boltzmann constant, 1.38 x 10“^^ J/K).
3kT
m

An electron with this energy will have a speed ^typical of V^.

/(3)(1.38 X 10-23 J/K)(300

•'.ypic.i-y ^ -y 57107 X kg-

= 1.16 X 10^ m/s

For this case \vd/'Vxyp\Qg\\ — 1.97 x 10 that is, the drift velocity is only about
two billionths of the thermal speed of an electron with an average enersv of
{3/2)kT.

THE SEMICONDUCTOR JUNCTION DIODE

 TABLE 2.2 SEMICONDUCTOR ELEMENTS
Z
Atomic Number
Element
Atomic Weight
Electron Configuration
m IV V

5 6 7
B Boron C Carbon N Nitrogen
10.8 12.0 14.0
2-3 2-4 2-5

13 14 15
A1 Aluminum Si Silicon P Phosphorus
27.0 28.1 31.0
2-8-3 2-8-4 2-8-5

31 32 33
Ga Gallium Ge Germanium As Arsenic
69.7 72.6 74.9
2-8-18-3 2-8-18^ 2-8-18-5

49 50 51
In Indium Sn Tin Sb Antimony
115.8 118.7 121.8
2-8-18-18-3 2-8-18-18-4 2-8-18-18-5

2.2 SEMICONDUCTORS: THE ROLE OF ELECTRONS AND HOLES

It is elements of columns III, IV, and V of the periodic table, those elements
with 3, 4, or 5 valence electrons, respectively, that are utilized to produce semi¬
conductors (Table 2.2). Most semiconductors are fabricated from the crystalline
form of these elements, and amorphous and polycrystalline forms used for lim¬
ited applications. The crystalline form of carbon, the diamond, is a structure
with extremely tightly bound electrons that has no value as a semiconductor.
However, silicon and germanium, each with four valence electrons, are valuable
semiconductors in their crystalline forms. Germanium is primarily of interest
from a historical perspective - the earliest commercial semiconductor devices
were fabricated from germanium. It was not until improved technologies were
developed that silicon devices and integrated circuits replaced those of germa¬
nium. The electrical characteristics of silicon semiconductors, including their
ability to operate at higher temperatures, are generally preferable to those of
germanium.
Rather than lending valence electrons (as do metals) or borrowing valence
electrons (as do insulators), the crystalline forms of silicon or germanium tend to
form covalent bonds similar to organic compounds of carbon. These elements,
which have four valence electrons and a nucleus with the remaining nonvalence

2.2 SEMICONDUCTORS: THE ROLE OF ELECTRONS AND HOLES 65

 e

(a) atom (b) crystal structure

Figure 2.5: Symbolic representation of a tetravalence semicon¬

ductor. The symbol e represents the negative electronic charge of an
electron.

electrons, may be represented symbolically, as in Figure 2.5(a). The nucleus of

protons and neutrons along with the nonvalence electrons will have a net positive
charge of +4 unit electronic charges. This charge, combined with the four nega¬
tive unit electronic charges of the four valence electrons, results in a neutral atom.
If silicon (melting point of 1415 °C) or germanium (937 °C) is slowly cooled
from its liquid state, a crystalline form of the element can be obtained. Each atom
forms four covalent bonds with its four equally distant neighbors, resulting in a
structure that is repeated uniformly throughout the crystal. A two-dimensional
representation is given in Figure 2.5( b).
It should be emphasized that a three-dimensional model in which each atom
is equally distant from the four atoms with which it forms a covalent bond is
necessary to represent the actual crystal. In addition, the number of the atoms
involved in any device of reasonable size is immense. A silicon crystal, for exam¬
ple, contains 5.0 x 10^^ atoms/m^. A cube 1 mm on a side, such as might be used
for a discrete device, contains 5.0 x 10^^ atoms.
Conduction occurs when valence electrons gain sufficient energy to break their
covalent bonds, thus becoming free electrons. At room temperature (approxi¬
mately 300 K or 27 °C) the average thermal energy of a valence electron is very
small compared with that needed to break a bond. Thermal energy, however,
is not distributed uniformly among the electrons - some electrons have more
and some less than the average quantity. As a consequence, a few electrons have
sufficient energy to break their covalent bonds and become free electrons. This
quantity of electrons is very small compared with the total number of valence
electrons. For silicon, at room temperature, the free-electron density is about
1.5 X 10'^ per cubic meter, that is, one free electron for each 1.33 x 10^^ valence
electrons. This quantity, which depends on thermal energies, increases rapidly
with increasing temperature. The symbol n, is used to designate the number of
free electrons, and the subscript i stands for intrinsic. Intrinisic silicon (or ger¬
manium) is used to designate an extremely pure semiconductor.

66 THE SEMICONDUCTOR JUNCTION DIODE

 AN INTRINSIC SEMICONDUCTOR

As for metals, the free electrons contribute

to the conduction process when an electric
field is present. For a mobility of /u,„ (the sub¬
script n is used to denote electrons, negative
charges), the current density due to the free
electrons may readily be calculated by free electron
and hole
free electrons
/„ = -etiiVd — enuxnE

This current density is not, as for the case

Figure 2.6: Symbolic representation of a semicon¬
of metals, the total current density. For each
ductor with a thermally generated electron-hole pair.
free electron there is an incomplete valence
bond (Figure 2.6). The deficiency of an electron that would otherwise form a
covalent bond is known as a hole. A valence electron that is part of an adjacent
bond may readily move into the vacancy or hole, leaving an incomplete valence
bond, a hole, behind. Once a vacancy or hole exists, valence electrons may, as a
result of their thermal energy, continually reorder themselves, giving rise to what
appears to be a motion of the vacancy or hole. With an electric field, valence
electrons will drift in a direction opposite to that of the electric field, resulting in
a drift of the hole in the direction of the field, that is, the hole behaves as if it were
a particle with a positive charge. As for electrons, the drift velocity of the hole
is found to be proportional to the electric field. The symbol fjip (the subscript p
stands for positive owing to the positive-charge-like behavior of a hole) is used
for its mobility:

vd — iipE holes
(2.7)
jp — eriiVd — eriifXpE

Because holes drift in the direction of the electric field, no minus sign is re¬
quired - unlike for the free electrons. Furthermore, for pure or intrinsic material,
one hole exists for each free electron.
The total current density, that is, the current density that gives rise to an
external current, is the sum of that due to the free electrons and that due to the
holes and is given by

/ = jn + ip = en,{iin + Atp) (2-8)

The current density / is related to E by the conductivity of the semiconductor as
follows:

j — aE
a = eriiiiXn-E [Xp) (2.9)

As a result of thermal processes, free electron-hole pairs are continually being

generated. The generation rate of free electron-hole pairs depends on the av¬
erage thermal energy of the valence electrons and hence on the temperature of
the crystal. Their number density, however, does not continually increase be¬
cause, concurrent with the generation process, free electrons and holes are “lost”

2.2 SEMICONDUCTORS; THE ROLE OF ELECTRONS AND HOLES 67

 through recombination. Recombination
depends primarily on the density of free
electrons and holes - the greater their den¬
free electron sity, the more likely it is that a free electron
without a hole and hole will approach each other and re¬
combine. As a result of the temperature
dependence of the generation rate, the in-
trinisic density ni is also extremely temper¬
Figure 2.7: Symbolic representation of a semiconduc¬
ature sensitive. In silicon, for example, w,
tor with a donor atom impurity.
tends to double for each 11 C° tempera¬
ture increase. Consequently, the operation of semiconductor devices may be very
sensitive to temperature changes that occur not only as a result of ambient tem¬
perature changes but also as a result of electrical power being dissipated by the
devices (the conversion of electrical energy to thermal energy).
Conduction in intrinisic semiconductors is the result of equal numbers of two
types of carriers: free electrons and holes. Electronic devices, however, are usually
constructed from semiconductors in which conduction for a particular region of
the device is due primarily to a single type of carrier that is either free electrons
or holes but not both. Such materials are obtained through a process of doping
in which selected impurities are introduced into the crystal lattice of intrinisic
material. These materials are designated as extrinisic semiconductors.

AN n-TYPE SEMICONDUCTOR
Consider the case in which a silicon atom of a crystal is replaced by an atom
with five valence electrons such as antimony (Figure 2.7). Four valence electrons
will be used to complete the covalent bonds with their neighbor atoms. The
fifth electron is not only not needed for a bond, but very little thermal energy is
necessary to free this electron from its pentavalent atom. Once free, this electron
may migrate throughout the crystal and become indistinguishable from the other
free electrons (in fact, all electrons are “indistinguishable” from each other).
Although this electron contributes to the conduction process, it leaves behind a
positively charged, albeit immobile, nucleus. Because a free electron is contributed
by the pentavalent atom, this atom is known as a donor atom {Nd is used to
designate the density of donor atoms). In addition to antimony, both arsenic and
phosphorus (each with five valence electrons) are used as donor atoms.
In addition to free electrons donated by donor atoms, there are the electrons
and holes that can be associated with the intrinisic material. The number of
free electrons increases as donor atoms are added to a semiconductor, which, in
turn increases the probability that free electrons will combine with holes. As the
doping density is increased, the equilibrium density of the holes is reduced as a
result of recombination. If n and p are used to designate the number density of
free electrons and holes, it may be shown that the following is valid:

= n] (2.10)

The product np is constant and is, as would be expected, equal to the value
of np for an intrinsic semiconductor.

68 THE SEMICONDUCTOR JUNCTION DIODE

 For a density of donor atoms much
larger than w/ (N^ ^ w^), the density of
free electrons will be approximately equal
to the density of donor atoms (n = N^). hole without
This implies that the density of holes will a free electron

be very small:

p — nj/n Hi forn » w/ (2.11)

Figure 2.8: Symbolic representation of a semiconduc¬
Hence, for this condition, corfduction will
tor with an acceptor atom impurity.
primarily be the result of free electrons,
that is,

; = jn + ip = in for P < Hi
= eiinNdE (2.12)

Because free electrons are primarily responsible for conduction, this type ma¬
terial is known as an w-type (negative) semiconductor.

A p-TYPE SEMICONDUCTOR
In a similar fashion, a semiconductor in which conduction is primarily due to
holes may be formed. Consider the case in which a silicon atom of an intrinsic
silicon crystal is replaced by an atom with three valence electrons such as boron
or aluminum (Figure 2.8). Only three valence bonds of the original silicon atom
will be completed - an incomplete bond occurs as a result of the trivalence atom.
For normal conditions, adjacent valence electrons will have sufficient energy to
move into the incomplete bond. Hence, a hole that is free to migrate throughout
the crystal will be produced by each trivalent atom introduced into the crystal.
Because these atoms tend to accept valence electrons, they are known as acceptor
atoms {Na is used to specify their density).
As the doping density of acceptor atoms is increased, the additional holes will
tend to combine with free electrons, thus reducing the free electron density. For
the case in which the acceptor atom density is much larger than ni {Na ni),
the density of holes will be approximately equal to the density of donor atoms
{p — Na). Hence, the free electron density n will be very small:

n = nf/p<^ni for p > n/ (2.13)

For this condition, conduction will be primarily the result of holes.

/ = in + ip = ip for n «: Hi
= epipNaE (2.14)

Because it is primarily holes that are responsible for conduction, this type of
material is known as p-type (positive) semiconductor.
With appropriate doping, one can produce either n- or p-type semiconductors
in which it is either free electrons (negative charges) or holes (the equivalent of
positive charges) that are primarily responsible for conduction. It is the transition
from one type of semiconductor to the other type within a single crystal that is
of interest for fabricating useful semiconductor devices.

2.2 SEMICONDUCTORS; THE ROLE OF ELECTRONS AND HOLES 69

EXAMPLE 2.3
An w-type silicon semiconductor at a temperature of 300 K has a donor atom
density of 10^^ atoms/cm^.
a. What is the ratio of donor to silicon atoms?
b. What is the conductivity of the semiconductor?
c. What is the resistance of a sample with a cross-sectional area of 1 mm^
and a length of 0.1 mm?
d. Compare the results of parts (b) and (c) with that for intrinsic silicon semi¬
conductor {[In = 1500 cm^W -s, jXp = 450 crn^fV ■ s).

SOLUTION A silicon crystal has 5.0 x 10^^ atoms/m^ (no).

a. Nd/no = (10^^/m^)/(5 x 10^^/m^) = 2 x 10“^°. There is only one donor
atom for each 5 x 10^ (5 billion) silicon atoms (no/Nd).
b. Assume a free-electron density n equal to the donor density Nd of 10^^/m^
(Nd nj). Equation (2.12) yields the following:

/ = e/XnNdE
a = eiXnNd = (1.6 x 10“^^ C)(0.15 m^N ■ s)(10iW) = 0.24 S/m

c. If the conductivity of the semiconductor is known, the conductance and

resistance of the sample may be determined as follows:

G = a A/d
= (0.24 S/m)(1.0 X 10“^ m^)/(0.1 x 10“^ m)
= 2.4 X 10“^ S
R= 1/G = 417^2

d. Both holes and free electrons contribute to the conductivity of an intrinsic

semiconductor (Eq. (2.9)):

a = endiin -f Mp)
= (1.6 X 10“^^ C)(1.5 X 10^Vm^)[(0.15 + 0.045) m^V • s)]
= 4.68 X 10-4 S/m

O^doped _ 0.24 mho/m _

^intrinsic 4.68 X 10 ^ mho/m

The conductance of the intrinsic sample is 4.68 x 10“^ S, and its resistance
is 214 k^2. Only one donor atom for each 5 billion silicon atoms has a
significant effect!

EXAMPLE 2.4
Consider a p-type silicon semiconductor at a temperature of 300 K.
a. What is the acceptor atom density necessary for a sample to have the same
conductivity as the «-type semiconductor of Example 2.3?
b. What is the ratio of the acceptor to silicon atoms?

THE SEMICONDUCTOR JUNCTION DIODE

SOLUTION The mobility of holes is considerably less than that of free electrons.
a. Using Eqs. (2.12) and (2.14), the following is valid for semiconductors
having equal conductivities:

^„Nd (n-type) = iXpNa(p-type)

Na/Nd = = (0.15mVV • s)/(0.045mVV • s) = 3.33
Na = 3.33 X lO^Vm^

b. This corresponds to on^ acceptor atom for each 1.5 x 10^ silicon atoms
{no/Na).

EXAMPLE 2.5
Assume that Wf of silicon doubles for each 11 C° temperature change. What is
«, for temperatures of 0, 50, 100, and 150 °C?

SOLUTION Let Td equal the temperature change for which rii doubles (11 C°). If
w/o is the value of for T = Tq, the following applies for any other tempera¬
ture:

rti = Hio (2)U—'Jo)/Tb

For an 1 C° change, w, doubles; for a 22 C° change, rij quadruples; for a 33 C°

change, rti is eight times its original value, etc. Alternatively, an exponential
relationship can be written for ni as

If Hi = ttii for T = Ti and w/ = na for T — Ti, the following is obtained:

nn =
na =
^ ^ ga{Ti-Tx)
n,\
Let Ti — Ti = Td, the temperature increment for doubling.

nn
In 2 0.693
= 0.063/C°
^~lh ~ iic°
If a is known, the density for any temperature may be calculated. Because only
a temperature difference is involved, either Celsius or absolute temperatures
may be used.
T = 0°C, n, = (1.5 X ioi6)^(o.063/c»)[(o-27)cq

= 2.74 X lO^Vm^

T = 50°C, w, = 6.39 X lO^Vm^

T = 100°C, ni = 1.49 x lO^Vm^
T = 150°C, ni = 3.49 x lO^^m^

2.2 SEMICONDUCTORS: THE ROLE OF ELECTRONS AND HOLES 71

 EXAMPLE 2.6
Consider a semiconductor with donor doping. If is much larger than rij, it is
reasonable to assume that n = Nj. This, however, is not valid if the inequality
Nd » rii is not valid. Use the assumption that charge neutrality prevails and
obtain an expression for n and p for any value of Nj.

SOLUTION Charge neutrality implies the following:

Nd + p — n = 0
Each pentavalent donor atom is responsible for one excess positive electronic
charge. Through Eq. (2.10), which also applies, the following is obtained:

np = nj, p^n^jn

Nd + n] / n — n = 0
rp- — nNd — nj = 0

n = Nd/1 ± ^{Nd/2)^ + nf

Only the plus sign of the square root applies because n must be positive. If
Nd » rii, then n ^ Nd and, for Nd = 0, n = rti, as expected. An expression
for holes may also be obtained as follows:

n = nf /p

Nd + p-nj/p^O

p^ + pNd -nj — 0

p = -Nj/2 ± ^{Nj/2p + nf

Again, because p is greater than zero, the positive sign for the square root
applies.

2.3 THE JUNCTION DIODE: A QUINTESSENTIAL

SEMICONDUCTOR DEVICE
An understanding of the theory and operation of a junction diode is basic to the
understanding of essentially all semiconductor devices and integrated circuits. As
a result of their nonlinear characteristic, junction diodes are used extensively in
modern electronic circuits. A semiconductor diode has a current-versus-voltage
characteristic that results in a large current for a very small voltage of one polarity
but essentially zero current for a potential of the opposite polarity (Figure 1.2).
This property is of value for rectification and detection in analog circuits and
for performing logic functions in digital circuits. Furthermore, a semiconductor
junction diode is a basic element used in fabricating active semiconductor devices,
bipolar junction transistors, and field-effect transistors as well as integrated cir¬
cuits.
A junction diode with an abrupt transistion from p-type to «-type semicon¬
ductor material will be considered (Figure 2.9). The p-type material is the result

72 THE SEMICONDUCTOR JUNCTION DIODE

 metallic abrupt metallic
contact junction contact

p n
r-lL-l
+ _
+ Vd -

Figure 2.9: A semiconductor junction diode.

of a doping with acceptor atoms {Na nj), whereas the n-type material is doped
with donor atoms (Nj ^ w/). For this diode, a positive value of external poten¬
tial V£) results in a movement of the holes of the left-hand region to the right
and free electrons of the right-hand region to the left. Because electrons have a
negative charge, the crossing of the junction by both types of carriers results in a
positive diode current iu. Only a relatively small external potential (1 V or less)
is needed to produce an appreciable current. On the other hand, there are few
carriers that contribute to a current in the opposite direction (free electrons in the
p-type material and holes in the «-type material). As a result, the diode current
for a negative external potential tends to be very small.
The doping, along with a convenient coordinate system, is indicated in Fig¬
ure 2.10. It should be stressed that the entire diode is a single crystal - it is only
the doping that differs on each side of the junction {x = 0). Metallic contacts
are included at each end of the diode to provide a connection to an external
circuit. At a sufficient distance from the junction (in a typical diode, junction
effects extend at most only a few microns from the junction) the density of car¬
riers, holes, and free electrons depends on the doping densities. In the p-type
material, p = Na, and in the «-type material, n = Nd (Figure 2.10(c)). Mi¬
nority carriers are also present in drastically
Figure 2.10: Doping and carrier densities (loga¬
reduced quantities: n = nf/Na in the p-type rithmic scales) of a semiconductor junction diode.
material and p — nj/Nd in the n-type ma¬
terial. Logarithmic scales have been used in
Figure 2.10 to show this. In silicon, for exam¬ (a)
ple, if Nd = lO^Vni^) P = lO^Vni^ and n =
2.25 X lO^Vm^ because n, = 1.5 x 10^^/m^.
Flence, njp — 2.25 x 10“^®. It will initially be
assumed that there is no external connection doping
in
(b) density
to the diode, that is, the diode current to is
N,
zero.
To gain an understanding of a distribution
of charge carriers that occurs in the region
of the junction, it is instructive to imagine a carrier
distribution that does not actually exist. This (c) density
imagined distribution is of value because it V N,
allows us to obtain the distribution that ac¬
tually does exist for an equilibrium condi¬ nf/Na
nf/Nd
tion; furthermore, it serves to demonstrate the

2.3 THE JUNCTION DIODE: A QUINTESSENTIAL SEMICONDUCTOR DEVICE 73

 physical mechanism that gives rise to this distribution. Suppose that the density
of holes is Na throughout the p-type material to the left of the junction and
that the density of free electrons is Nd throughout the region to the right of the
junction. For this condition, charge neutrality exists throughout the diode, each
acceptor atom has a hole in its immediate vicinity (a charge-neutral pair), and
each donor atom has a free electron in its immediate vicinity. As a consequence
of charge neutrality, there would not be an electric field within the crystal. A
drift of carriers, which depends on an electric field as discussed in the previous
section, would therefore not occur.
Diffusion is another mechanism resulting in the ordered motion of holes and
free electrons in a semiconductor. Consider the case of holes just to the left of
the diode junction. As a result of their thermal energies, some holes will move to
the left away from the junction. But, holes that move from the left-hand p-type
region toward the junction will tend to compensate for this movement. Other
holes near the junction will tend to move to the right and cross the junction. Two
important events occur as a result. To the right of the junction, the density of
free electrons («-type material) is very large. Hence, the holes that entered this
region will have a high likelihood of recombining with free electrons and thus
being “lost” as carriers. Secondly, as a result of the minute density of holes on
the right of the junction, few holes will diffuse across the junction in the opposite
direction. The net effect is that holes diffuse from the p-type region on the left of
the junction to the right of the junction, where they tend to recombine.
A similar situation occurs for the free electrons on the right side of the junction.
They diffuse across the junction, where they tend to recombine with holes. The
diffusion of the free electrons across the junction results in a transfer of negative
charges to the left of the junction. Concurrently, the diffusion of holes across
the junction results in a transfer of positive charges to the right. As a result of
recombination, there are donor atoms on the right of the junction lacking free
electrons to balance their charge, and accep¬
Figure 2.11: Charge density (linear scale), elec¬ tor atoms on the left of the junction lacking
tric field, and potential profile of a junction diode. holes to balance their charge. The result is a
charge net charge density on each side of the junction
(a) density (Figure 2.11(a)).
The charge density in the vicinity of the junc¬
+
tion gives rise to an electric field. Suppose that
a positive test charge is placed at the junc¬
J L- depletion region tion of the diode (x = 0). The test charge
will be repelled by the positive charges on its
(b)
right and attracted by the negative charges on
its left. The test charge experiences a force in
the negative x direction corresponding to an
electric field Ex with a negative value (Fig¬
potential ure 2.11(b)). Because the crystal was initially
(c)
Fu..;
built-in neutral, the total positive charge on the right
side of the junction must be equal to the mag¬
X nitude of the negative charge on the left side

74 THE SEMICONDUCTOR JUNCTION DIODE

of the junction. Hence, sufficiently removed from either side of the junction, the
electric field will vanish because the net charge “seen” by a test charge will be
zero.
Let us return to a consideration of the diffusion of holes and electrons across
the junction. As a result of the electric field, a hole crossing the junction from
the left to the right experiences a force that retards its motion. Similarly, a free
electron that crosses the junction in the opposite direction also experiences a
retarding force because the force on an electron is in the opposite direction. The
electric field, therefore, retards the movement of holes and electrons across the
junction until an equilibrium condition is established. The condition of a uniform
density of holes on the left and free electrons on the right that was originally
postulated does not occur.

THE BUILT-IN POTENTIAL

The electric field in the vicinity of the junction gives rise to a potential difference
defined by

V=-jE:cdx (2.15)

For convenience, the arbitrary constant of integration has been assumed to be

such that the potential is zero at the left of the junction where Ex vanishes
(Figure 2.11(c)). The built-in potential across the junction, the potential on the
right-hand side where Ex vanishes, is designated as Vbuilt-in* The region near the
junction in which a charge density and electric field exists is depleted of mobile
charges (holes or free electrons) that would otherwise neutralize the charges of
doping atoms. This region is known as the depletion region of the diode.
One who has carefully followed the development up to this point might be
tempted to suggest that the potential difference of the junction Vbuiit-in be used
to power an external circuit (Figure 2.12). The result would be a semiconductor
battery. The terminal potential vb, however, is not VbuOt-in “ h is zero. This may
be established by drawing on elementary thermodynamics principles. Suppose
that a potential did exist (i;^ # 0; the assumed polarity is not important). If
this were the case, a current would exist, and electric power would be delivered
to the load resistor, which might represent a small electric motor. Useful work
could therefore be obtained from the junction diode. The diffusion process of the

Figure 2.12: Junction diode with a resistor load.

metallic abrupt metallic

contact junction contact
*0 - 0

^0 = 0

2.3 THE JUNCTION DIODE: A QUINTESSENTIAL SEMICONDUCTOR DEVICE 75

potential junction diode that gives rise to the potential differ¬
Vjj<0 reverse bias ence of Vbuilt-in is a thermal process - it is “powered”
^built-in by the thermal energy of the diode’s surroundings.
Up > 0 forward bias Hence, a diode producing work does not violate the

—♦ X
first law of thermodynamics; energy is conserved.
It is the thermal energy of the diode’s surroundings
Figure 2.13: Potential profile of a junction
that would be converted to work. Unfortunately,
diode with an external potential.
this assumed effect violates the second law of ther¬
modynamics: the impossibility of producing work through the use of a single
thermal source. A conventional heat engine rejects heat to a lower temperature
sink. Because this does not occur for the diode being considered, one must con¬
clude that the external potential for a resistor load is zero (ud = 0, W — 0)-
A useful junction diode has external metallic contacts (Figures 2.9 and 2.12).
As a result of the junction of dissimilar materials (a metal and doped semicon¬
ductor), each of these junctions not only gives rise to a potential difference, but
the two potential differences precisely cancel the potential of the junction diode.
Hence, for a zero diode current, /’d = 0? the diode voltage is zero {vd = 0)-

AN EXTERNAL POTENTIAL
An externally applied potential pp has a direct effect on the potential difference
across the junction of the diode (Figure 2.13). For small currents, the potential
differences across the metal-to-semiconductor contacts will tend to remain con¬
stant, and if the potential difference across the n- and p-type regions is negligible
(large conductivities), the external potential will, depending on its polarity, either
directly add or subtract from the built-in potential of the diode.
Consider the case for which pp is positive, that is, the situation for which
the potential difference of the junction is reduced. It was the original potential
difference that inhibited the movement of majority carriers (holes on the left
and free electrons on the right) from crossing the junction. A reduced potential
difference will allow majority carriers to cross the junction more readily, thus
resulting in a positive external diode current (ip > 0). As pp is increased, thus
reducing the potential difference across the junction, the external current tends
to increase rapidly (Figure 2.14).
On the other hand, a negative value of pp tends to increase the potential differ¬
ence across the junction of the diode, thus reducing the already extremely small
current due to majority carriers. The resultant diode current /p, although very
small in magnitude, is not zero. For negative
Figure 2.14: Current versus voltage characteris values of pp, there is a small negative current
tic of a junction diode.
due to the crossing of the junction by the mi¬
nority carriers. The minority carriers, the free
electrons of the p-type material and the holes of
the n-type material, regardless of the potential
difference, readily cross the junction. For sig¬
nificant negative values of pp, the diode cur¬
rent ip tends to reach a negative value that
minority carriers is independent of pp. It should be noted that

76 THE SEMICONDUCTOR JUNCTION DIODE

the magnitude of the current for this condition is extremely small for most
diodes.
To summarize, a positive value of vd can result in a large diode current. Fur¬
thermore, this current will tend to increase very rapidly with only a very small
increase in vd- This is the forward-biased condition in which the diode current is
primarily due to majority carriers. A negative value of vd (vd < 0) results in an
extremely small magnitude of current, a current that is primarily due to minority
carriers. For many applications, this current, corresponding to the reverse-biased
condition, is extremely small.'
Although the qualitative description of a junction diode presented here pro¬
vides a physical feel for the operation of a diode, numerous materials are avail¬
able for those wishing to gain a better quantitative perspective of diodes (Adler,
Smith, and Longini 1964; Gray et al. 1964; Kittel 1996; Milnes 1980; Muller and
Kamins 1986; Neudeck 1989; Pierret 1988; Streetman 1990; Sze 1981; Weaver
1986; Wolfe, Holonyak, and Stillman 1989).

2.4 THE JUNCTION DIODE: ITS TERMINAL CHARACTERISTICS

An idealized physical shape, essentially a rectangular block (Figures 2.9, 2.10,
2.12), has been referred to when discussing junction diodes. Structures typical of
a discrete diode and an integrated circuit diode are presented in Figure 2.15. For
the diodes shown, the transition in doping was achieved by the process of diffus¬
ing doping atoms into a semiconductor crystal (other processes are also used).
The p-type region of the discrete diode could be, for example, the result of a high-
temperature diffusion of boron atoms into a silicon crystal that had been previ¬
ously grown from a silicon melt with donor atoms (an n-type semiconductor).
Although the p-type region has both donor and acceptor atoms, it behaves
as p-type material for an acceptor density that is much larger than the donor
density. How can acceptor atoms cancel the effect of donor atoms? Suppose that
a crystal has equal densities of donor and acceptor atoms. For this condition,
the free electrons (the result of donor atoms) will tend to combine with the
holes (the result of acceptor atoms). If it is assumed that the doping densities
are not excessively high, the net result will be a crystal that behaves as intrinsic
material, that is, its density of holes and free electrons will be «/. Additional
acceptor atoms (N^ > Nj) will result in a density of holes that is in excess of the
available free electrons. The net result is a p-type semiconductor. This result may
be quantitatively shown (Example 2.7).

Figure 2.15: Discrete and integrated circuit junction diodes.

p-type

n-type

metallic
contact

(a) discrete diode (b) integrated circuit diode

2.4 THE JUNCTION DIODE: ITS TERMINAL CHARACTERISTICS 77

 A similar molecular diffusion process may be used to fabricate the integrated
circuit diode of Figure 2.15(b). For the integrated circuit shown, all devices
are formed within the p-type substrate. The lower n-type region is the result
of a diffusion of donor atoms into the substrate. A second diffusion process in
which acceptor atoms are diffused into the «-type region is used to form a diode.
Through a series of masking operations and oxidizing steps, the geometry of the
diode can be very precisely controlled. It will be noted that two junction diodes
have been formed, an upper diode (that which will be used as a circuit element)
and a lower «-to-p-type substrate diode. For normal operation of the integrated
circuit, all potentials are greater than (or possibly equal to) the substrate poten¬
tial. Therefore, the current of the lower diode, which is reverse biased, will be
extremely small. The lower diode is used, in essence, to “insulate” the circuit
element from the substrate. An alternative type of integrated circuit can be fab¬
ricated using an n-type substrate; it is then necessary that all circuit potentials be
less than that of the substrate.

CURRENT OF A DIODE
The terminal current of a junction diode is the sum of two current components:
one due to minority carriers and the other due to majority carriers (Figure 2.16).
A quantitative theoretical treatment of an idealized junction diode results in the
following theoretical dependence of current on voltage:

io = - Is

where

Is — reverse saturation current, A

e — electronic charge,!.6 x
k = Boltzmann constant,!.38 x !0“^^ J/K (2.16)
T = absolute temperature, K
n = dimensionless ideality factor (size of ! to 2)

Figure 2.16: Current components of a junction diode.

metallic abrupt metallic

contact junction contact

invariant current holes from the ;7-type semiconductor

due to minority carriers free electrons from the p-type semiconductor

voltage dependent current_^ holes from the p-type semiconductor

due to majority carriers free electrons from the «-type semiconductor

THE SEMICONDUCTOR JUNCTION DIODE

The —Is component of current is due to minority carriers; it does not depend on
I’D- On the other hand, the exponential component of current that depends on
majority carriers is strongly influenced by the external diode potential. Because
the ability of majority carriers to cross the diode junction depends on their ther¬
mal energies, a current relationship that depends on ev^/kT is not surprising.
The exponential dependence arises as a result of the carrier’s thermal energy dis¬
tribution. Finally, the dimensionless ideality factor depends on fabrication details
of the diode. Values of 1 to 2 are typical for discrete devices, and a value fairly
close to 1 is common for modern silicon integrated circuits. It will be noted that
/£) = 0 for dd = 0 as expected on the basis of the thermodynamic arguments of
the previous section.
It is convenient to introduce a thermal potential for kTfe:

Vt = kT/e (2.17)

This quantity does indeed have the dimension of volts, that is, kT, an energy
expressed in joules, divided by e, a charge expressed in coulombs (potential is
joules per coulomb). For T = 293 K (20 °C), a value of approximately 25 mV is
obtained for Vr as follows:

Vt = 0.0253 W ^15 mV for T = 293 K (2.18)

For convenience, it will be assumed in this text that Vj = 25 mV unless an

alternative temperature has been explicitly specified.
The diode current may be written in terms of Vt as

- 1) (2.19)

For a typical diode, the terminal potential vd must be fairly large compared with
hVt for an appreciable current. A typical discrete low-power silicon junction
diode might require a potential of 0.7 V to result in a current of 1 mA. If n = 1,
then vd/vt = 28, and = 1.45 x 10^^. This implies an extremely small value
for Is. By ignoring -1 compared with the following is obtained:

7, = = 6.9 x 10'^^ A (2.20)

Flence, the value of Is is microscopic compared with the forward current of the
diode. The following approximations are therefore appropriate for the current
of the diode:

iQ = -Is VD^O, reverse-biased (2 21)

= Vd ^ nVT, forward-biased

The reverse-biased current for the diode considered, -Is, is for most applications
negligible - it is generally too small to be measured by conventional techniques.
In Figure 2.17 the current-versus-voltage characteristic of a typical discrete
silicon junction diode is given (h = IQ-^^ A, n = 1). The logarithmic current
scale of Figure 2.17(b) results in a straight-line relationship for a forward-biased

2.4 THE JUNCTION DIODE: ITS TERMINAL CHARACTERISTICS 79

 mA mA

(a) (b)

Figure 2.17: Linear and logarithmic current scales for a forward-biased junc¬
tion diode.

diode as follows:

log Id = log Is + log e (2.22)

nVj
— log Is + 0.434i;£)/nVT

The slope of the characteristic for a logarithmic current scale is thus 0.434/«V7’
if it is assumed that base 10 logarithms are used. For the diode considered, its
current increases by a factor of 10 for each 57.6 mV increase invo (« Vt/0.434 =
0.025/0.434 = 0.0576 V). This occurs regardless of the initial value of current as
long as the idealized current expression is valid. A deviation from this behavior
occurs for excessively large currents that result in a significant voltage being
developed across the semiconductor material on each side of the junction.
A convenient quantity to know for a junction diode is the increase in terminal
voltage vd required to double its current when forward biased. Let ioi and vdi
represent one current-voltage set and and ud2j a second current-voltage set
as follows:

(2.23)

For tDi/ ioi —2, a doubling, the following is obtained for vdi — vdi-
g(VD2—1’Di)/«Vt _ 2

vd2 — ^Di = wV7’ln2 = 0.693nV7 ^ ^

If n = 1, vd2 — Vdi = 17.3 mV {Vj = 25 mV). An increase of 17.3 mV doubles

the current, an increase of 2 x 17.3 mV = 34.6 mV quadruples the current, an
increase of 3 x 17.3 mV = 51.9 mV results in a current eight times the original
value, and so forth. Very small changes in voltage result in rather large changes
in current. Concurrently, even a modest change in current has only a small effect
on the diode voltage.

80 THE SEMICONDUCTOR JUNCTION DIODE

 The theoretical expression for diode current (Eq. (2.16)) has an explicit tem¬
perature dependence. In addition, the quantity Is also depends on temperature
because it depends on the availability of minority carriers. The density of minor¬
ity carriers, it will be recalled, depends on nj (Figure 2.10(c)). If n, changes owing
to change in temperature, so too will Ig change. For silicon, rij tends to double for
each 11 C° temperature increase. This implies that the concentration of minority
carriers quadruples for each 11 C° temperature increase. As a consequence, a
quadrupling of Ig occurs for an increase of approximately 11 C° in temperature.
A doubling of Ig occurs for each approximately 5.5 C° temperature increase.
For the reverse-biased condition, the ideal diode’s current is —Ig. However, if
the magnitude of the reverse-bias voltage is excessive, a breakdown condition will
occur, which, depending on the circuit in which the diode is used, can result in an
excessive current. Often, a breakdown current will destroy the diode, resulting
in a near short circuit for the diode (a very small resistance).

SPICE MODEL

A SPICE (Simulation Program with Integrated Circuit Emphasis) computer

simulation provides a convenient means of illustrating the temperature depen¬
dence of a junction diode (Figure 2.18). It should be noted that the value of Ig
specified in the .MODEL statement (10“^^ A) is interpreted by the program to be
the value of Ig for a diode temperature of 27 °C (unless the nominal temperature
of the program has been changed). The . TEMP statement causes Ig to be evaluated
for each temperature, taking into account the change in the concentration of mi¬
nority carriers of the diode. The . TEMP statement results in a set of simulations.
First, T is set equal to 0 °C, and the . DC statement is processed. This is followed
by setting T equal to 50°C, and the .DC statement is again processed. A set of
solutions, one for each temperature specified, is thus obtained.
The MicroSim PSPICE program for personal computers will be used for the
simulation examples of the text (Tuinenga 1995). With a .PROBE statement in
the circuit file, a set of data is produced from which the Probe graphics postpro¬
cessor will generate graphical displays of data. When the current of the diode is
requested, the plot of Figure 2.19 is obtained. It should be noted that the circuit
of Figure 2.18, although suitable for a numerical simulation, is impractical for
a laboratory determination because excessively large diode currents occur. For
example, a current of nearly 10 A is obtained for T = 150 °C and vd = 0.85 V.
This current would most likely destroy a diode that had a value of 10“^^ A for
Ig. A vertical scale modification was used to limit the current to 10 mA.

Figure 2.18: A SPICE circuit file for a junction diode.

Diode Temperature Dependence

VI 1 0
D1 1 0 DIODE
.MODEL DIODE D IS=1E-15 N=1
.DC VI .4 .85 .001
.TEMP 0 50 100 150
.PROBE
.END

2.4 THE JUNCTION DIODE: ITS TERMINAL CHARACTERISTICS 81

 Diode Temperature Dependence As the temperature of the diode
Temperature: 0.0, 50.0,100.0, 150.0 is increased, so too is its current
for a given value of vo. If the cur¬
rent of the diode is held constant,
the diode’s terminal voltage de¬
creases as the junction tempera¬
ture is increased. On the basis of
the data of Figure 2.19, the diode
displays a voltage sensitivity of
about—1.5m y/C° for a fixed cur¬
rent. Although a junction temper¬
ature of 150 °C may seem much
beyond that which might be en¬
I(D1) countered, a junction temperature
VI
considerably higher than the am¬
Figure 2.19: SPICE solution.
bient temperature often occurs as
a result of the diode’s dissipating
electrical power. To limit the temperature of the junction of a diode to a safe level,
a maximum power dissipation limit that depends on the physical construction
of the diode is generally given.

EXAMPLE 2.7
Consider a semiconductor that has both acceptor and donor doping. Assume
Na ^ Nd and that each dopant atom results in one charge carrier.
a. Obtain a solution for the density of holes using the method of Example 2.6,
which is based on charge neutrality.
b. Show that this expression yields p = n = Uj for Nj = Ng.
c. Show that p ^ Na — Nj for Na — Nj ^ n,.
SOLUTION
a. Charge neutrality implies the following:
Nd-Na + p- n = 0
From Eq. (2.10), the following is obtained:
np = nj, n = nfjp
Nd - '!^a + p-nj/p^O
+ {^d - Na)p -nj = 0
P = (N, - Nj)/2 ± ^[{K-m/lp+nf
Because p must be positive, only the plus sign of the square root applies.
b. If Na = Nd, then p = rii and n = n]/p = ni.
c. If Na - » Hi, then n} may be ignored in the square-root term.
p^iNa- Nd)/2 + (Na- Nd)/2 = {Na - Nd)

82 THE SEMICONDUCTOR JUNCTION DIODE

Figure 2.20: Logarithmic plot of data of Ex¬ VD = 0.74 V
ample 2.8.
fo = 1-0 mA

EXAMPLE 2.8
The following experimental data were obtained for a discrete silicon junction
diode:

w VD tD VD

8.0 mA 0.79 V 0.80 mA 0.72 V

2.5 mA 0.78 V 0.40 mA 0.70 V
1.25 mA 0.76 V 0.10 mA 0.68 V

It is desired to do a SPICE simulation for a circuit using this diode. Determine

values of Is and n suitable for . MODEL parameters.

SOLUTION Figure 2.20 is a plot of the logarithm of the current versus voltage.
A best fit straight line is indicated that has a slope of 12.4 per V (81 mV per
decade). From Eq. (2.22), the following is obtained:

slope = 0.434/«Vx
nVr = 0.434/slope = 35 mV

If it is assumed that Vj = 25 mV, a value of 1.4 is obtained for n. Using a

point on the best fit straight line (not an actual data point), the following is
obtained:

«Vr = 35mV, fD = l-0mA, iid = 0.74 V

_ l^gVD/nVr

= ^^q-3^)^(-0.74V)/(0.035V) ^ ^ ^^0-13 ^

2.5 A CIRCUIT WITH A DIODE: DEALING

WITH A NONLINEAR ELEMENT
Basic circuit theories, namely Kirchhoff’s current and voltage laws, apply for
circuits with linear as well as nonlinear elements. Other circuit concepts, including
superposition and Thevenin and Norton equivalent circuits, are not applicable
when nonlinear elements are present. This does not imply that these powerful

2.5 A CIRCUIT WITH A DIODE: DEALING WITH A NONLINEAR ELEMENT 83

 linear circuit concepts are of no value for
linear resistor analyzing electronic circuits (i.e., that they
K = v-q!
may now be set aside). Linear circuit con¬
cepts will be used for those parts of cir¬
cuits with linear elements. In addition, it
is frequently possible to approximate the
behavior of a nonlinear element over some
limited range of voltage and current as a
combination of linear elements; techniques
IVd to treat a nonlinear element as a piecewise
Figure 2.21: Current versus voltage for a junction linear element will be developed. Thus, one
diode {n—\, Vj — 25 mV) and a linear resistor. can fully utilize linear circuit concepts for
determining the behavior of an electronic
circuit over a restricted range of voltages (or currents).
Only a very small increase in the terminal voltage of a forward-biased junction
diode (0.693 nVj) will double its current (Figure 2.21). Suppose that a particular
terminal voltage of dd (approximately 0.7 V for a silicon diode) results in a
current of io- An increase of only 17.3 mV {n = 1, Vj = 25 mV) doubles its
current to 2/d- Compare this to the behavior of the linear resistor of Figure 2.21,
which for a voltage of vd also has a current of to (R = VD/io)- To double its
current, a voltage oHvd (for example, approximately 1.4 V) is required.
An elementary series circuit consisting of a battery, resistor, and junction diode
will be used to illustrate a set of approaches for solving a diode circuit. On the
basis of Kirchhoff’s voltage law, the circuit of Figure 2.22 yields the following:

VA = iDR + VD (2.25)

If Va > 0, the diode is forward biased, and the following is obtained, if it is

assumed that vd ^ tiVt:

Id = forward-biased diode

This is a transcendental equation in terms of vd, which does not yield an

analytical solution for v^. Alternatively, an equation in terms of in can also be
obtained as follows:

VD = nyT\n{io/Is)

Va = /d1^ + nVTln(/D/fs)
This too is a transcendental equation that does not yield an analytic solution
for io. Only if explicit values for Va, R, and the diode parameters are speci-
Figure 2.22: A series circuit with a hcd can a numerical solution of Eqs. (2.26) or (2.27) be
diode. obtained.
R
LOAD LINE
VW
Before proceeding with a numerical solution, it is in¬
structive to pursue an alternative approach that can not
only simplify the numerical process but will suggest a

84 THE SEMICONDUCTOR JUNCTION DIODE

 R
AAiV +
load line
^'d

(a) circuit (b) linear relationship

Figure 2.23: The linear circuit external to the diode.

set of simplifying approximations that will eventually be utilized. As a first step,

consider the linear circuit of the battery and resistor (Figure 2.23). Primed quan¬
tities for the diode terminal voltage and current have been introduced because
only when the diode is in the circuit is the solution vd and /‘d- The following can
be written for the circuit:

Ta — ^ D ^ T
(2.28)
in = ( Va — ^b)/R
Because the circuit is linear, a solution for /’b is linear with respect to v'j^. This
linear (straight-line) relationship is shown in Figure 2.23(b). It will be noted that
/'b = 0 for ub = Va and — VA/Riot ub = 0. This type of circuit response will
be repeatedly encountered when working with electronic circuits; the straight-line
relationship of Figure 2.23(b) is generally referred to as a “load line” (nonlinear
load lines will also be encountered). The battery and resistor circuit external to
the diode requires that the solution for the circuit with the diode fall on the load
line.
A current-versus-voltage relationship is also known for the diode. This non¬
linear relationship is plotted on the graph with the load line (Figure 2.24). The
diode curve gives the locus of points for which the current and voltage satisfy the
diode characteristic. Hence, at the intersection of the diode curve and the load
line, the current and voltage simultaneously satisfy the diode characteristic and
the battery-resistor circuit. The intersection is therefore the desired solution, the
actual voltage and current of the series circuit, namely, vd and io-

AN ITERATIVE APPROACH
Figure 2.24: Diode characteristic and load
Although a graphical approach may not neces¬
line.
sarily be convenient (it requires an accurate plot¬
ting of the junction diode characteristic), the con¬
ceptual process, in which one thinks in terms of a
graphical solution, is extremely helpful in obtain¬
ing a numerical solution. This can be illustrated
with a numerical example. Suppose Va = 3 V,
R = 300 f2, and the diode has parameters of T =
10-^^ A and n=l (the diode of Figure 2.17).

2.5 A CIRCUIT WITH A DIODE: DEALING WITH A NONLINEAR ELEMENT 85

 This results in the load line and diode charac¬
teristic of Figure 2.25. If one looks at the graph
(which has been accurately drawn), it may be
seen that vd ~ 0.8 V and io ^ mA. An itera¬
mA
tive numerical solution may now be used to ob¬
tain a more accurate diode voltage and current.
The voltage of a forward-biased diode is not very
sensitive to rather large changes in diode current
(this is obvious looking at Figure 2.25). Flence,
Figure 2.25: Diode characteristic and load line
(V^ = 3V, R = 300 Q).
let us assume a value of 7 mA for the diode cur¬
rent of the first iteration. On the basis of this
estimated value of current ioi, a corresponding value of diode voltage udi may
be calculated:

vdi = nVrln(/Di/fs) = 0-743 V (2.29)

This value of diode voltage may now be used to calculate a corrected value of
current ioi by utilizing the external battery-resistor circuit as follows:

fD2 = (VA-i;Di)/J^ = 7.52mA (2.30)

Continuing, one can obtain a new value of diode voltage vdi'-

V£)2 — ^Vx ln(z£)2/fs) = 0.741 V (2.31)

With this value of voltage, the next iteration may be carried out as follows:

iD3 = (Va - ud2)/-R = 7.53 mA (2 32)

^03 = wV7’ln(/£)3/fs) = 0.741 V

This voltage is the same voltage of the previous iteration (to the nearest millivolt)
and is thus the desired numerical solution:

VD = 0.741 V iD = 7.53 mA (2.33)

A rapid numerical convergence occurred; only three iterations were needed to

obtain a voltage with an error of less than 1 mV.
Although a more accurate solution (for example, to the nearest microvolt) is
possible, such a solution would be, from a practical perspective, meaningless. In
the first place, Va may not be known this precisely. But, more importantly, the
diode’s terminal voltage is temperature sensitive. On the basis of the Figure 2.19
data, a temperature change of only 1 C° results in a voltage change of approxi¬
mately — 1.5 mV for a constant diode current. If typical temperature fluctuations
are taken into account, for example ±10 C°, a variation of ±15 mV would be
expected for the diode voltage, yielding a comparable variation in the solution
for vd- Hence, a solution accurate to even 1 mV is rarely justified.
As is well known, iterative numerical solutions will not necessarily converge
rapidly or may not converge at all. To illustrate this, consider an alternative
attempt to obtain a numerical solution for the diode circuit. Let us start by
assuming a value of 0.8 V for the diode voltage (vd\) and use this to calculate a

86 THE SEMICONDUCTOR JUNCTION DIODE

corresponding diode current, io as follows:

tDi = = 79.0 mA (2.34)

From the graph of Figure 2.25, it can be seen that this estimate of current is
totally unreasonable. Nevertheless, let us continue (as would be the case of a
“nonthinking” numerical algorithm routine that might be used). The battery-
resistor circuit yields a new estimate for the diode voltage:

vd2 ^ Va-^diR^-20.7 V (2.35)

For this voltage, the diode is reverse biased, and its current {—Is) is essentially
zero. This approach does not yield a solution, for the numerical values are di¬
verging.

SPICE SOLUTION
In the preceding numerical example, the potential source Va was assumed to
be constant (a battery). For many electronic applications it is often the case that
the functional dependence of circuit voltages and currents on an independent
voltage (or current) source is desired. This is the case, for example, if the voltage
source has a time dependence. A set of solutions is thus required, one solution
for each value that the voltage source might have (in practice, a series of closely
spaced voltages). A SPICE simulation is ideally suited to obtain this type of
solution. The circuit file of Figure 2.26 will produce a solution for va with a
range of ±5 V (0.05-V increments).
The SPICE solution using . PROBE is indicated in Eigure 2.27. It will be noted
that the solution for the diode voltage vd tends to consist of two straight lines:

^ jvA for Va < 0.7 V

(2.36)
f0.7V for Va > 0.7V

A similar approximation applies for the voltage across the resistor vr as follows:

fuA —0.7 V for Da > 0.7 V

(2.37)
|0 for Va < 0.7 V

These results are not surprising if one recognizes that the diode characteristic,
for the forward-biased condition, could be approximated by a vertical straight
line (Eigure 2.28).

Vd — VD(on) if Id > ^ (2.38)

ijA = 0 if Dd > UD(on)

Figure 2.26: SPICE circuit for a junction diode circuit.

Diode Response
VA 1 0
R1 1 2 300
D1 2 0 DIODE
.MODEL DIODE D IS=1E-15 N=1
.DC VA -5 5 .05
.PROBE
.END

2.5 A CIRCUIT WITH A DIODE: DEALING WITH A NONLINEAR ELEMENT

 Diode Response
Temperature: 27.0

Figure 2.27: SPICE solution of a diode

circuit.

VA

This is a piecewise linear approximation for the diode - a type of approximation

that is extensively used in obtaining solutions for electronic circuits with diodes
as well as other nonlinear elements.
Several load lines, each corresponding to a different value of va, are indicated
on the graph with the piecewise linear diode approximation. As may be seen from
this graph, if va > vpion), then vd = VD(on), whereas if va < FD(on), then vd = va-
This yields the approximate solution for vd and vr (= va — vd) of Figure 2.29.

88 THE SEMICONDUCTOR JUNCTION DIODE

 Is = 10-13 A
n = 1.2
Ra — Rb = Rc — 1 kr2
yA = 4v

Figure 2.30: Diode circuit of Example 2.9.

To summarize, the current expression with an exponential voltage dependence

is generally used for comput&r simulations of diode circuits. Hence, the diode
parameters Ig and n need to be known. However, for an analytic circuit solu¬
tion, a piecewise linear approximation is often used to approximate the diode
characteristic. Depending on the nature of the circuit, either the approximation
used in this section to produce the result of Figure 2.29 or a more complex
approximation, which will be discussed in the next chapter, may be used.

EXAMPLE 2.9
A junction diode with the parameters indicated is used in the circuit of Fig¬
ure 2.30. Using an iterative approach, determine the diode voltage and current.

SOLUTION The linear part of the circuit, Va, Ra, Rb, and Rc, may be replaced
by a Thevenin equivalent circuit (Figure 2.31) as follows:

RbVa
VTh = = 2V
Ra + Rb
R-Th = + Rc — 1.5 k^2
A value of 0.7 V will be assumed for the initial estimate of the diode voltage.
This yields the following for ioi and the corresponding voltage vdi‘

ioi = (Vxh - 0.7 V)/RTh = 0.867 mA

vdi = wVxln(/Di/Is) — 0.686 V
A new value of diode current ioi and its corresponding voltage may now be
obtained as follows:

ioi = (kxh - edi)/Rjh — 0.876 mA

vd2 — nVjln(/x)2/A) = 0.687 V
A corrected diode current of 0.875 mA and a diode voltage of 0.687 V are the
desired solution (to the nearest millivolt for xd)-

Figure 2.31: Thevenin equivalent circuit of Example 2.9.

Ra Rr ^Th

+ -wv—-r—WVV— +
+ +
7/ Txh v'd
—
Rb ^

2.5 A CIRCUIT WITH A DIODE: DEALING WITH A NONLINEAR ELEMENT 89

 ^Th /p'

-Wv—^— Figure 2.32: Diode circuit of Example

+ +
2.10(a).
^Th ” /q = 2/d

EXAMPLE 7L10
a. Repeat Example 2.9 for two diodes in parallel.
b. Repeat Example 2.9 for two diodes in series.

SOLUTION
a. The Thevenin equivalent circuit of Eigure 2.32 will be used.

i'o = VD = nVr ln(;i,/2/,)

Again, an initial value of 0.7 V will be assumed for the diode voltage as
follows:
= (VTh-0.7 V)/RTh = 0.867 mA
VDi = nVrlnii'j^i/lIs) = 0.707 V

This yields the following for a new current ^^id voltage vdi-

^D2 = (^h - vdi)/Rjh — 0.862 mA

V£)2 = wVp ln(/Q2/2fs) = 0.666 V

The next iteration yields the following:

^3 = (^Th - UDzV-Rxh = 0.889 mA

fD3 = ^VTln(/Q3/275) = 0.666 V
Hence, io = ^03/^ — 0.445 m A and vd = 0.666 V.
b. The circuit of Eigure 2.33 applies.
io = ^ InVTlniio/Is)

Because the circuit has two diodes in series, a voltage of 1.4 V will be
assumed for the initial value of v'd-
Wi — (Tfh — 1.4 V)/Rjh = 0.400 mA
p'di = InVj \n(iDi/Is) = 1.327 V

Figure 2.33: Diode circuit of Example 2.10(b).

'^Th u'd = 2vd

90 THE SEMICONDUCTOR JUNCTION DIODE

 These values will be used for the next iteration as follows:

ioi = (Vrh - = 0.449 mA

= 2«VTln(iD2//5) = 1.334 V

The next iteration yields the following:

hs = (Vth - t^D2)/j^Th = 0.444 mA

i;'d3 = 2«yTln(/D3/f5) = 1-333 V
<

A final iteration yields io — 0.445 mA and v'j^ = 1.333 V. Hence, the diode
voltage is 0.667 V.

EXAMPLE 2.1 1
Determine and sketch the dependence of four on uin for the circuit of Fig¬
ure 2.34 with two diodes. Assume that the diodes may be approximated as
having a constant potential difference of i’D(on) when forward biased.

SOLUTION An input voltage of at least VD(on) is necessary to forward bias Di.

Hence, for uin < fD(on)? the current of Di is zero and four = 0. Consider the
case for which vin > fDion) but sufficiently small that uouT < ^D(on)- The cur¬
rent of Di is zero, and diode Di can be replaced by a battery with a potential
of WD(on) for this case (Figure 2.35). Superposition may be used to determine
i^ouT by

RlVjN RlVDi on)

l^OUT = = (VIN - l’D(on))/2
R\ + Ri Ri + Ri

Figure 2.34: Diode circuit of Example 2.11.

R. ^D(on)

Figure 2.35: Equivalent diode circuit for i^in > vcxon] and uour <
l^D(on) *

^OUT

Figure 2.36: Solution of Example 2.11.

2.5 A CIRCUIT WITH A DIODE: DEALING WITH A NONLINEAR ELEMENT 91

 When Dour reaches i>D(on), diode Di conducts and dout is limited to VD(on)- As
may be seen from the preceding expression, this occurs for tijN > 3uD(on)- The
following is therefore obtained for dout:

{0 for UIN < VD(on)

(din — r)D(on))/2 for DD(on) < r’IN < 3DD(on)

VD(on) for Din > 3DD{on)

2.6 MODELING THE JUNCTION DIODE: THE ROLE

OF APPROXIMATIONS
In the previous section an exponential current-versus-voltage relationship was
used for semiconductor junction diodes to solve circuits with diodes as given by

= (2.39)

This relationship, which may be derived from a theoretical analysis of an ide¬

alized semiconductor junction, does fairly well in predicting the behavior of ac¬
tual diodes. An exponential relationship, however, tends to require numerical,
iterative-type circuit solutions. Fortunately, sufficiently accurate solutions can
often be obtained by approximating the behavior of the diode with a relatively
simple circuit model. The exponential relationship tends to be used only for
computer simulations; approximate circuit models are nearly always used for
“pencil-and-paper”-type analyses. Approximate circuit models not only simplify
calculations, but, more importantly, they provide a much better conceptual un¬
derstanding of the behavior of diode circuits. In addition, the design of diode
circuits relies on one’s ability to conceptualize the behavior of diodes.

THE IDEAL DIODE SWITCH MODEL

An approximate diode model, suitable for some applications, is that of a circuit
element generally referred to as an ideal diode. It has the idealized characteristic
of Figure 2.37. The voltage across an ideal diode, when it is forward biased
(/'d > 0), is zero, and its current, when reverse biased (dd < 0), is zero. This
model can be used to replace an actual semiconductor diode in a circuit when
the voltages of the circuit are large compared with the small forward voltage of
an actual diode.
Because either the voltage or current of an ideal diode is zero, the diode
may be treated as the ideal switch of Figure 2.38. The switch is either open.

Figure 2.37: Actual and idealized characteristics of a diode.

h h
<^Vd = 0

io - 0

J
actual diode idealized diode

THE SEMICONDUCTOR JUNCTION DIODE

 open switch for Up < 0 closed switch for > 0

Figure 2.38: Simulating the behavior of an ideal diode with a switch.

corresponding to a reverse-biased condition, or closed, corresponding to a for¬

ward-biased condition. The condition of the switch depends on its voltage or cur¬
rent which, in turn, depends on the other elements of the circuit. It is necessary to
make a binary logic decision as to the condition of the switch (decide if it is open
or closed). The difficulty is that of ascertaining the correct condition. For some
circuits, the choice may be obvious, whereas for others, especially if a circuit has
several diodes, the choice may not be so obvious. If the decision is not obvious,
it is necessary to guess and proceed using a trial-and-error solution. One solves
the circuit for the initial decision; a simple analytic solution is generally possible
if there are no other nonlinear elements. If it was assumed that the diode was
reverse biased (an open switch), its resultant voltage must be negative. Therefore,
if the circuit yields a positive voltage, the decision was in error. Similarly, if the
diode was assumed to be conducting (closed switch), a positive diode current is
necessary; a negative current implies the decision was in error. If the circuit has
more than a single diode, an open or closed decision is required for each diode.
However, only one set of decisions will tend to yield a circuit solution that is valid
for each diode. If the resultant diode current and voltage are both zero, then either
diode condition is valid and they both yield the correct circuit solution.
To illustrate the process of obtaining a solution for a circuit in which ideal
diodes are used to simulate the behavior of actual diodes, consider the elementary
logic circuit of Figure 2.39. Although the actual logic levels might be 0 and 5 V
for this circuit, suppose a solution is desired for ug = 3 V, an intermediate voltage
level. Assume = -5 V. To start, an initial guess that both diodes are reverse
biased, that is, that they behave as open switches, will be tried. It is obvious
that fc = 0 for this condition. Furthermore, because the diode currents are zero,
vdi = va = 5 V and vd2 = vb = 3 V. This is not a valid solution because the
diode voltages must be negative for the reverse-biased condition.
To continue, let us make the guess that both diodes are forward biased, that is,
they behave as closed switches (Figure 2.40). Summing the currents at the center
mode results in the following solution for uc:

Figure 2.39: Diode logic circuit.

Ra — Rb — 1 kS2

3V Rc = 10k^2

2.6 MODELING THE JUNCTION DIODE: THE ROLE OF APPROXIMATIONS

 5V

Figure 2.40: The equivalent circuit for Figure 2.39 on the assumption
that both diodes are forward biased.

F4 - Fg - FC _

/I 1 1 \ _ VA . Vb
(2.40)
Rc) ^ Ra^ Rb
VC = 3.81V

This implies the following for the diode currents:

ioi — (vA ^c)/Ra =1.19mA (2 41)

ioi = {vb — Fc)/Rb = —0.81 m A
Because the current of D2 is negative, the initial assumption of both diodes
being forward biased (closed switches) is obviously not valid. One diode must
be forward biased and the other reverse biased. Suppose it is assumed that D\ is
conducting (a closed switch) and that Di is reverse biased (an open switch):

ioi = 0
ioi = yA/(RA + Rc) — 0.455 mA, vq — 4.55 V (2.42)
VD2 ^Vb- -1.55 V

This is a valid condition, and it may readily be shown that the alternative as¬
sumption for the diodes is not valid. Solving the circuit for this last condition,
however, is not necessary because only one set of assumptions for the conditions
of the diodes will yield a valid solution for this circuit (unless both the current
and voltage are zero).

CONSTANT FORWARD-BIASED VOLTAGE DIODE MODEL

The reader might be tempted to argue that, from a practical perspective, the
ideal diode model is of limited value. For the potentials of the circuit just con¬
sidered (Figure 2.39), the forward voltage of a typical semiconductor junction
diode is not negligible. A better approximation for the diode, introduced in the
previous section, was the assumption of a constant forward-biased voltage of
^D(on) (^ 0.7 V for silicon diodes). A circuit model consisting of an ideal diode
in series with a battery having a potential of FD(on) results in this characteristic
(Figure 2.41). Again, after this model is substituted in the circuit for the actual
diode, the circuit can readily be analyzed by assuming either an open or closed
condition for the switch associated with the ideal diode of the model.
Let us again consider the diode logic circuit of Figure 2.39, but this time a
diode model that results in a forward-biased voltage of UD(on) = 0.7 V will be

94 THE SEMICONDUCTOR JUNCTION DIODE

used (Figure 2.42). The diode condi¬ 2d 2d
tions (open or closed switch) for the
+
circuit in which ideal behavior of the D Ideal
diodes was assumed is a reasonable
^D
starting point. There is a high likeli¬
hood (but not a certainty) of the solu¬ J ^D(on)

tion with ideal diodes being the cor¬ ^D(on)

rect set of conditions for the modified (a) modified characteristic (b) circuit model
diode model. Therefore, it will be as¬
Figure 2.41: The constant forward-biased voltage diode
sumed that Di Ideal is forward biased model.
(closed switch) and that Dz ideal is re¬
verse biased (open switch).

ioi = 0
ioi = {va-VD{on))/(RA+Rc) = 0.391 mA, vc = 3.91V (2.43)
vd2 = vb - VC — -0.91 V
For this solution the current of D\ is positive, and the voltage of Dz is less
than VD{on), as required. Although it is this diode model that is extensively used
for analyzing electronic circuits, a further improvement is necessary for some
applications.

DIODE MODEL WITH A SERIES RESISTOR

The diode model just considered (Figure 2.41) yields a forward-biased diode
voltage that is independent of the current of the diode (/'o > 0)- Although the
change in voltage of a semiconductor junction diode is small for modest changes
in current, a knowledge of this small change is at times important. This suggests
a diode model that incorporates an equivalent diode resistance. Consider the
diode characteristic of Figure 2.43 with the approximation indicated. Instead of
a vertical straight line for the diode current, a straight line with a slope a that
approximately matches that of the exponential is introduced:

a{VD - ^y) for VB > Vy

(2.44)
0 for VB < Vy
The condition vb > Vy results in the following:
vb= Vy + ib/ol = Vy + iB^d (2.45)

The equivalent diode resistance rd is thus the reciprocal of the slope of the straight
line used to approximate the exponential behavior of the diode. When the ideal

Figure 2.42: A circuit using the constant forward-biased voltage diode model.

^A
5 V 3V

2.6 MODELING THE JUNCTION DIODE: THE ROLE OF APPROXIMATIONS 95

 diode of Figure 2.43 is forward
biased (a closed switch), the diode
-slope = a voltage is that given by Eq. (2.45).
21d\ However, when vd < the ideal
Ideal
diode of the model is reverse biased
h"
and it behaves as an open circuit.
'^D
This model, although providing a
Ev ^ V ViD
more accurate solution than the pre¬
Figure 2.43: A diode model with an equivalent resistance. vious models, will not result in the
same solution as the exponential
diode relationship unless the solution happens to fall at the point at which the
curves coincide (either cross or are tangent).
The problem that must be addressed when using this model is that of de¬
termining values for the parameters of Vy and rd- Unfortunately the appropri¬
ate values of the parameters depend on the circuit in which the diode is to be
used, that is, on the resultant current. Consider the exponential current-versus-
voltage relationship for a forward-biased junction diode in which —Is may be
ignored:

= — (2.46)
dvjT) nVj hVt
As may be seen from the expression for the derivative of id, it is not possible to
associate a unique slope with a diode characteristic.
Consider the case for a particular diode voltage and current Vd and Id (note
the capital letters). At this point, the slope of the diode characteristic is loInVj.
A diode model consisting of a straight line that is tangent to this point will be,
for values of Id and vd that are close to Id and Vd, appropriate. The equivalent
resistance of the model rd is thus hYt/Id- For a current of 1 mA, rd — 25 Q
(Vt = 25 mV and n — 1). The equivalent voltage Vy, is readily obtained using
the slope of the tangent line as follows:

slope = 7d/«Vt =/d/(Vd - Vy)

VD-Vy=nVT, Vy^VD-nVT ’

Hence, the voltage Vy is very near to Vd (only 25 mV removed for Vj = 25 mV

and n = 1). It should be noted that for Id = 21 d, the diode model predicts a
diode voltage of Vd + nVj, whereas the exponential expression yields a slightly
smaller voltage of Vd + 0.693«Vr.

EXAMPLE 2.12
Assume that the behavior of the diodes of the circuit of Figure 2.39 can be
approximated with ideal diodes. The voltage va varies over the range of 0
to 5 V with the extremes of 0 and 5 V corresponding to valid logic levels.

96 THE SEMICONDUCTOR JUNCTION DIODE

 Rji = Rg — 1 kf2
Vb = 0
= 10k^2

Determine the condition of^the diodes (reverse or forward biased) as a function

of va for the following values of vg:
a. vg = 0 V.
b. Vg = 2.5 V.
c. Vg = 5.0 V.

SOLUTION
a. The circuit of Figure 2.44 applies. For vc > 0, Dz ideal is reverse biased (an
open switch) and Diueai is forward biased (a closed switch). This occurs
for Va > 0.
b. The circuit of Figure 2.45 applies for vg = 2.5 V. If Dj ideal is reverse biased
(an open switch), vc is determined by vg and is independent of va-

Rcvg
VC = = 2.273 V
Rg + Rc

Hence, Diueai is reverse biased for va < 2.273 V. For both diodes forward
biased (closed switches), the following is obtained:

VA — VC VB — Vc _

Ra Rb Rc
vc = Va/2.1 + i;b/2.1 = 0.476i;a + 1.190 V

This condition is valid only if > 0.

IDI — (vb — Vc)/Rb

= 1.310 — 0.476ua mA

This implies va < 2.752 V. To summarize,

Va < 2.273 V; Di yeaiteverse-biased, D2 ideal forward-biased

2.273 V < i;a < 2.752 V; both diodes forward biased
Va > 2.752 V; Di idealforward-biased, D2 ideal^everse-biased

c. Vg = 5.0 V. If Di Ideal is reverse biased, the following is obtained for vc:

Figure 2.45: Circuit for Example 2.12(b).

2.6 MODELING THE JUNCTION DIODE: THE ROLE OF APPROXIMATIONS

Volts

Figure 2.46: Voltage transfer characteristic of Ex¬

ample 2.13.

Therefore, this condition applies for va < 4.545 V. For va > 4.545 V, both
diodes are forward biased.

EXAMPLE 2.13
Determine the voltage transfer characteristic vc as a function of va for Example
2.12 (i;b = 0, 2.5, and 5.0 V).

a. For VB 0,

VC = 0.909va
Ra
b. For vb = 2..
Va < 2.273 V, vc = 2.273 V
2.273 V < t;A < 2.752 V, vc = 0.476^^ + 1.190 V
t;A > 2.752 V, t;c = = 0.909va
Ra + Rc
c. For Vb = 5.0 V,

VA < 4.454 V, uc = 4.545 V

Va - Vc Vc vc
VA > 4.545 V,
Ra Rb Rc
vc^0A76va + 23S1 V

EXAMPLE 2.14
Junction diodes are often used in integrated circuits to produce a desired volt¬
age level that is nearly independent of the supply voltage of the integrated
circuit. The circuit of Figure 2.47 results in a voltage of approximately 1.4 V.

98 THE SEMICONDUCTOR JUNCTION DIODE

 Rs 6kQ

Figure 2.47: Diode circuit of Example 2.14.

Rg 6kQ ^Th
AAV
Figure 2.48: Thevenin equivalent cir¬ -I-
cuit of Example 2.14.
^Supply ^Th
lOV

R^h 1'^

Figure 2.49: Equivalent circuit using a diode model with a -i-

resistance. -
^Load
2.75 V

Determine the variation in load voltage ppoad for a ±1 V variation in supply

voltage, \^upply Assume UD(on) = 0.7 V, n = 1, and Vp = 25 mV for the diodes.

SOLUTION With the exception of the diodes, the circuit of Figure 2.47 may be
replaced by a Thevenin-equivalent circuit (Figure 2.48) as follows:

Vjh = = 2.50 V, Rn = RlIIRs = 1.50 kn

Using the constant forward-biased voltage model for the diodes, a diode cur¬
rent Id can be obtained for A^upply = 10 V.

Vxh = loRrh + ^VD{on)

Id = {VTh- lvD(on))/Rjh = 0.733 mA

The load voltage is 1.40 V for this condition. To determine the effect of a
change in supply voltage, a diode model with an equivalent resistance is re¬
quired. It will be assumed that the diode current remains close to 0.733 mA
(Id).

rj = nVjflo = 34.1 ^2

If the diode voltage Vd is assumed to be equal to VD(on) for a current of Id,

then Vy = VD(on) - 0.025 V = 0.675 V. For Vsuppiy = 11 V, a -l-l-V change,
Vph = 2.75 V. The ideal diodes of Figure 2.49 have been assumed to be forward
biased (closed switches).

tD = (Vrh - 2Vy)/(RTh + 2rd) = 0.893 mA

^Load = + 2Vy = 1.411 V

2.6 MODELING THE JUNCTION DIODE: THE ROLE OF APPROXIMATIONS 99

 The load voltage increased by 11 mV (less than 1 percent). For Vsuppiy — 9 V,
— 1-V change, Vph = 2.25 V.

io — 0.574 mA, t>Load = 1-389 V

This results in a load voltage decrease of 11 mV.

2.7 THE PHOTOVOLTAIC CELL: PHOTON-SEMICONDUCTOR

INTERACTIONS
A photovoltaic cell converts the energy of photons from an external source (such
as the sun) to an electrical current. Willoughby Smith is credited with the discov¬
ery of the selenium photoconductor in 1873 (Wolf 1981). Selenium photovoltaic
cells, even though less than 1 percent efficient in converting visible light to elec¬
trical energy, have been used for photographic light meters throughout the 20th
century. It was not until 1953, a few years after the invention of the transis¬
tor, that the junction diode photovoltaic cell was developed (Chapin, Fuller, and
Pearson 1954; Smits 1976). Even the earliest of these silicon photovoltaic cells
achieved efficiencies as high as 6 percent, a considerable improvement over sele¬
nium photovoltaic cells.

PHOTONS
A photovoltaic cell relies on the interaction of photons of visible radiation,
or of radiation of adjacent spectral bands, with the valence electrons of the
semiconductor from which it has been fabricated (Figure 2.50). The relative
spectral intensity of the sun is a maximum for a wavelength of approximately
0.5 fim (the same wavelength for which the response of the human eye is at a
maximum). The visible spectrum, it will be noted, is relatively narrow (about
0.38 to 0.78 /rm). For semiconductor interactions, it is the energy of individual
photons that is of particular importance.

^photon — l^f — hc/X J

= hc/qk — 1.242/A.^ni eV

Figure 2.50: Relative spectral intensity of sun and photon energy.

>O)
(fi
CQJ
OJ
C
QJ OJ
c
o
JS 4.*
o
% X.
k a

wavelength gm wavelength gm
(a) relative spectral intensity (b) photon energy
of the sun

100 THE SEMICONDUCTOR JUNCTION DIODE

where
h =Planck’s constant, 6.625 x J•s
f = frequency, Hz
c = velocity of light, 3 x 10^ m/s (2.48)
A. = wavelength, m
= wavelength, jxm

The photon’s energy expressed in electron volts is equivalent to its energy ex¬
pressed in joules divided by the electronic charge q (1.6 x 10“^^ C).
The band-gap energy of a semiconductor Eg is the energy required for a valence
electron of an intrinsic semiconductor to break its bond and form an electron-
hole pair. For silicon, this energy is 1.1 eV. Hence, a photon with an energy of
1.1 eV or more has the potential of producing a free electron-hole pair through
an interaction with a valence electron of a silicon semiconductor. As may be
seen from Figure 2.50(b), radiation with wavelengths of less than 1.13 jxm. (this
includes the entire visible spectrum of the sun) consists of sufficiently energetic
photons.
During the development of the transistor it was recognized that energetic pho¬
tons could produce free electron-hole pairs near the surface of the semiconductor.
For a photovoltaic cell, this effect is optimized by fabricating a junction diode
with a very large surface area. An n- on p-type photovoltaic cell is illustrated in
Figure 2.51. For this device, an extremely thin «-type region is diffused into a
heavily doped p-type substrate. Very narrow metallic contacts are used to pro¬
vide the electrical connection to the n-type region and an antireflection coating
is used to reduce optical losses.
The operation of a photovoltaic cell is dependent upon photons generating
electron-hole pairs in the vicinity of the semiconductor junction. Consider the
case for which photons traverse the thin n-type region (typically only a fraction of
a micron thick) and interact with valence electrons of the p-type region to produce
free electrons and holes. For the heavily doped p-type semiconductor, the effect of
the additional holes will not be significant. However, the generation of additional
free electrons, minority carriers in the p-type region, will have a significant effect
if it occurs near the junction. As a result of the potential difference across the
semiconductor junction, minority carriers readily cross the junction and give rise
to the reverse-biased current -Is of a conventional junction diode. The photon¬
generated free-electron minority carriers of the p-type region will also tend to

Figure 2.51: Silicon photovoltaic cell.

Fphoton

antireflection
/////// metallic contact
coating ^
I
n-type
p-type
C +
metallic backing
physical structure symbol

2.7 THE PHOTOVOLTAIC CELL: PHOTON-SEMICONDUCTOR INTERACTIONS 101

 h cross the diode junction, thus contributing to the reverse-
biased diode current. A similar situation occurs when
photons interact with valence electrons of the thin n-type
region, except it is now holes that are minority carriers.
These holes will also contribute to the magnitude of the
reverse-biased current of the junction.
The illumination of a photovoltaic cell can therefore
be accounted for in the current expression of a junction
diode with a current component —/photon-
Figure 2.52: Current versus voltage
/photon (2.49)
of a photovoltaic cell.

The current /photon depends on the intensity of the

illumination and its spectral distribution. Furthermore, the current depends on
the optical properties of the semiconductor. The current-versus-voltage charac¬
teristic of Eq. (2.49) is indicated in Figure 2.52. For a practical photovoltaic
cell, the photon generation rate of minority carriers must be very much larger
than the rate minority carriers are generated by thermal processes. This implies
that /photon is very much larger than Is (the —Ig term of Eq. (2.48) can therefore
be ignored). The characteristic of Figure 2.52 is particularly interesting because
the product of io and vd is negative in the III quadrant of the graph. A negative
value of idvd implies that electrical power is being supplied by the photovoltaic
cell in much the same manner that a battery supplies electrical power (the prod¬
uct of the current into a battery’s positive mode and its voltage is negative for
a passive resistive load). It is not surprising, therefore, that “solar battery” has
been used to describe this device (Raisbeck 1955).
Consider the situation in which a photovoltaic cell is used to supply electrical
power to a resistor load Rl. The diode of Figure 2.53 is a junction diode with
a characteristic corresponding to the dark response of the photovoltaic cell. The
current source /photon accounts for the effect of the photon-generated minority
carriers. For illuminating radiation with a fixed spectral distribution, /photon tends
to be linearly proportional to the power density of the incident radiation. The load
line for the resistor is a straight line through the origin of the diode characteristic.

= —Uq/jRl load line of resistor (2.50)

The minus sign accounts for the direction used for the current in Figure 2.53. As
for the case of the diode circuits considered in the previous section, the intersec¬
tion of the load line and the photovoltaic cell characteristic results in a solution
for the circuit (Figure 2.54).
Because fo is a negative quantity, the power delivered to the load resistor is
positive. Energy of the illuminat-
Figure 2.53: Equivalent circuit of a photovoltaic cell.
ing radiation (generally that from
the sun) is converted to electrical
energy. Because not all photons

±
generate minority carriers (long-
photon Rl
wavelength photons have insuffi¬
cient energy) and many photons

102 THE SEMICONDUCTOR JUNCTION DIODE

have excessive energy (greater than Eg), a concurrent
thermal heating of the diode occurs. This thermal energy
is removed through the ambient environment of the pho¬
tovoltaic cell. An increase in temperature of the junction,
it will be noted, has the undesirable effect of increas¬
ing the reverse saturation current of the diode, E, which
tends, for a given circuit, to decrease the diode’s terminal
voltage. Figure 2.54: Photovoltaic cell char¬
Two quantities, Isc and Vqc, the short-circuit current acteristic and load line.
and open-circuit voltage, respectively, are indicated in
Figures 2.52 and 2.54.

4c = fphoton because i;d = 0 (2.51)

An expression for the open-circuit voltage Voc is obtained from Eq. (2.48) by
setting iD = 0 and assuming 4 «: /photon-

0 — — /photon

Voc =VTln(/photon/4) ^ ^

As may be seen in Figure 2.54, [/dI < 4c and vq < Voc- Therefore, the electrical
power supplied by the photovoltaic cell |/d|i^d, is less than /^cl^c- The easy-to-
calculate quantity Isc Voc is useful for estimating the upper limit of the power that
a photovoltaic cell might supply.
A numerical iterative type solution may readily be obtained for a photovoltaic
cell with a load resistor (Figure 2.55). This is readily accomplished by transform¬
ing the current source /photon and the load resistor Ri, to a Thevenin equivalent
circuit (Figure 2.55(b)).

Rjh — Rl, Tph = /photon (2.53)

Using this circuit, the diode voltage vd may readily be obtained by the procedure
of the preceding section. Once ud is known, the original circuit of Figure 2.55(a)
may be used to calculate the electrical power supplied to the load {v^/Ri) or any
other quantity of interest. It should be noted that the Thevenin equivalent circuit
of Figure 2.55(b) cannot be used to calculate the current of Ri or the power that
it dissipates.
Photovoltaic cells have not only been extensively used to power communica¬
tion satellites, but a major research and development effort has been directed
toward utilizing these cells for terrestrial applications. Besides providing electri¬
cal power in remote locations (for example, to power communications repeaters).

Figure 2.55: The equivalent circuit for a photovoltaic cell with a load resistor.

^Th

-f
--1 + - Wy-

-^1^ Iphoton C

(a) original circuit (b) Thevenin equivalent circuit

2.7 THE PHOTOVOLTAIC CELL: PHOTON-SEMICONDUCTOR INTERACTIONS 103

 Photovoltaic cell
11 0 1 50M
D1 1 0 DIODE
RLl 1 0 RLOAD 1
12 0 2 lOOM
D2 2 0 DIODE
RL2 2 0 RLOAD 1
13 0 3 200M
D3 3 0 DIODE
RL3 3 0 RLOAD 1
.MODEL DIODE D IS=1E-11 N=1
.MODEL RLOAD RES(R=0)
.DC RES RLOAD(R) .1 20 .1
.PROBE
.END
Figure 2.56: The circuit and SPICE file of Example 2.15.

large arrays of photovoltaic cells have been used on an experimental basis for
producing electrical power that would otherwise be produced through the com¬
bustion of fossil fuels. Although solar radiation is essentially free (a zero fuel
cost), the cost of collecting it remains high. Intricate fabricating processes and
the need for highly purified semiconductor materials account for the high cost of
photovolatic cells.
There has been a concerted effort to improve the efficiency of photovoltaic cells
through the use of alternative semiconductor materials, multiple layer junctions,
and solar concentrating systems. In addition, alternative fabricating techniques
along with polycrystalline and amorphous semiconductor materials have been
used to reduce costs. It is expected that photovoltaic cells will eventually play a
significant role in the generation of electrical power (Hubbard 1989).

EXAMPLE 2.1 5
A small photovoltaic cell at different illumination levels has currents of 50,
100, and 200 mA for /photon- The cell has parameters of A = 10~^^ A and
n = 1.
a. Determine Ac, Voc, and Ac, Vqc of the cell for each of the illumination levels.
b. Use SPICE to determine the load resistance Ri that results in a maximum
electrical power output for each level of illumination. What is the diode
voltage, as well as the load current and power for each of these conditions?

104 THE SEMICONDUCTOR JUNCTION DIODE

 Photovoltaic cell
Temperature: 27.0
120mW

100mW

80mW

Figure 2.57: SPICE solution for Example

60mW
2.15.

40mW

20mW

OmW
05 10 15
= I(RL1)*V(1) .|(RL2)*V(2) . I(RL3)*V(3)
R

SOLUTION
a. Isc = 50,100, and 200 mA for the three illumination levels. Equation (2.52)
yields the open-circuit voltage Voc (Vj = 0.025 V).

Voc = 0.558 V, /photon = 50 mA

= 0.576 V, /photon = 100 mA
= 0.593 V, /photon = 200 mA

The products Isc, Voc are 27.9, 57.6, and 118.6 mW.
b. Three circuits, each with a different independent current source, will be
used to determine the output power. A sweep of the load resistance, which
has been specified through a .MODEL statement, results in the follow¬
ing . PROBE graph for power:

/photon Rtimax) FL(max) VD tL Voc/ Isc

50 mA 10.5 Q 23.8 mW 0.513 V 45.8 mA 11.2 Q

100 mA 5.4 Q. 49.2 mW 0.516 V 95.5 mA 5.76 ^
200 mA 2.80 Q 102 mW 0.534 V 191 mA 2.97 Q

It will be noted that Vodhc yields a fairly accurate value of for the
maximum output power (within 7 percent). Furthermore, the values of
IscVoc are within 15 percent of the maximum powers.

EXAMPLE 2.16
To increase the output power of a photovoltaic system, photovoltaic cells are
generally assembled into an array. Consider the case in which cells with the
parameters of Example 2.15 are used and the illumination results in /photon =
200 mA.

2.7 THE PHOTOVOLTAIC CELL; PHOTON-SEMICONDUCTOR INTERACTIONS 105

 +

array

Figure 2.58: Equivalent circuit of 12 photovoltaic cells connected in series.

array

+
Figure 2.59: Modified equivalent circuit of Example
array
2.16(a).

, array

array t array

12 f,photon
array array

Figure 2.60: Equivalent circuit of Example 2.16(b).

a. Suppose that 12 cells are connected in series to increase the terminal voltage
of the array. Determine the open-circuit voltage and short-circuit current of
the array. What is the value of the load resistance that results in a maximum
power? What is the power and terminal voltage?
b. Suppose that the cells are connected in parallel to increase the output cur¬
rent. Repeat part (a) for this condition.

SOLUTION
a. A series circuit results in the equivalent circuit of Figure 2.58 where Rlarray
is the load resistance. For identical photovoltaic cells, the currents of each
of the diodes of the equivalent circuit will be equal. Hence, the currents of
the horizontal connections between the current sources and the diodes will
be zero. This results in the equivalent circuit of Figure 2.59.

fsc array ~ fphoton =^200 mA

Vo.array = 12 Vj ln(/photon/4 ) = 12Vo, = 7.1 V

Maximum power will be obtained for /^l array being equal to 12 times the
resistance that resulted in a maximum for a single cell.

/^Larray = llRlimSiX) — 33.6 ^2, ^Larray = 12PL(max) = 1.22 W

106 THE SEMICONDUCTOR JUNCTION DIODE

 b. Connecting the cells in parallel results in the following equivalent circuit:

fsc array = 12,fphoton = 2.4 A, array = = 0.593 V

To obtain maximum output power, J^Larray = jRL(niax)/12 = 0.233 Q and

TLarray = 12?L(max) = 1.22 W.

2.8 LIGHT-EMITTING AND LASER DIODES:

OPTICAL COMMUNICATION
In a photovoltaic semiconductor diode, electron-hole pairs are generated as a
result of an interaction of incident photons with the semiconductor lattice. The
complementary reaction can also occur, that is, the energy released when a free
electron and hole recombines can be given off as a photon. Although this latter
process does not occur in silicon junction diodes, it does occur for diodes fabri¬
cated from other semiconductors such as gallium arsenide and gallium phosphide.
In 1907, British scientist Henry J. Round observed the emission of light (lu¬
minescence) from a point-contact silicon carbide crystal diode of the type he was
using for the detection of radio signals (Loebner 1976; Round 1907). Electrolu¬
minescence, was “rediscovered” in the Soviet Union in 1922 by Oleg V. Lasev. It
was not, however, until 1951 that this low-voltage behavior of a forward-biased
silicon carbide diode was explained by a U.S. scientist, Kurt Lehovec (Lehovec,
Accardo, and Jamgochian 1951). Lehovec recognized that the electrolumines¬
cence of these diodes was due to the recombination of carriers that had crossed
the semiconductor junction, that is, photons were being emitted when electrons
and holes recombined. Practical light-emitting diodes (LEDs) were developed in
the late 1960s and were first used for displays of calculators and other scientific
instruments in the early 1970s.

LIGHT-EMITTING DIODES
A set of typical forward-biased current-versus-voltage characteristics of low-
power LEDs having different wavelength emissions is given in Figure 2.61. It may
be seen that considerably greater forward-bias voltages are required for these
diodes than for the silicon junction diodes that have been previously considered.

Figure 2.61: Typical terminal characteristics of low-power LEDs.

2.8 LIGHT-EMITTING AND LASER DIODES: OPTICAL COMMUNICATION 107

 This should not be surprising. It will be noted, for example, that yellow light cor¬
responds to a wavelength of approximately 0.59 jxm. On the basis of Eq. (2.48),
this implies a photon energy of approximately 2.1 eV. This energy corresponds
to the band-gap energy of the semiconductor, the energy required to produce
an electron-hole pair, and, consequently, to the energy that is given off when
an electron and hole recombine. A larger band-gap energy (that of silicon is
only 1.1 eV) translates into a larger forward-bias voltage. Furthermore, a direct
recombination process, which does not occur in silicon, is required for the emis¬
sion of a photon. The energy given off when an electron and hole recombine
in silicon is transferred to the crystal lattice as thermal energy (a simple heating
occurs).
To produce semiconductors with the band-gap energies required for visible
and near-infrared emissions, crystals of III-V compounds are generally used (see
Table 2.2). A gallium (III) arsenide (V) crystal, for example, consists of a lat¬
tice in which half of the atoms are gallium with three valence electrons and the
other half are arsenic atoms with five valence electrons. The semiconductor crys¬
tal has a band-gap energy of 1.43 eV, whereas a crystal of gallium phosphide
(phosphorous also has five valence electrons) has a band-gap energy of 2.26 eV.
Semiconductors with band-gap energies between 1.43 and 2.26 eV (correspond¬
ing to photon wavelengths of 0.87 to 0.55 iim) can be produced by using a
mixture of arsenic and phosphorus for the valence five atoms. For near-infrared
emissions (A 0.9 /u-m), a smaller band-gap energy is required. This is obtained
with other semiconductor alloys as well as semiconductors produced from II-VI
compounds.

LIGHT-EMITTING DIODE APPLICATIONS

The earliest utilization of LEDs was the single “spot” indicator replacing in¬
candescent pilot lamps. This was followed by the seven-segment LED display for
the readout of numerical values that replaced much more expensive gaseous dis¬
charge tubes. Each segment in this display is a separate light-emitting diode that
can be activated with a forward-biased current (Figure 2.62). Individual resistors
are used for each diode to limit the diode current (alternatively a current-limited
driver could be used). For the red diode of Figure 2.61, a current of 10 mA pro¬
vides a reasonably intense emission. A terminal voltage of approximately 1.8 V is
required. Thus, if the logic output voltage is 5 V, a resistor of 320 ^2 (3.2 V/10 mA)
is required. For other voltage levels, such as a transistor-transistor-logic gate with

Figure 2.62: Seven-segment LED display.

a
logic b
input
c

108 THE SEMICONDUCTOR JUNCTION DIODE

 Figure 2.63: Multiplexed seven-segment numerical display.

a high output voltage of approximately 3.7 V, a different resistor value would be

required.
A light-emitting display of several numerical digits such as used for early calcu¬
lators posed an interesting engineering challenge (McWhorter 1976). A 10-digit
display, for example, consists of 70 individual LEDs that would, in addition to
a common connecting conductor, require 70 connections or wires (additional
connections are required for diode decimal points). A multiplexing scheme (Fig¬
ure 2.63) is frequently used to get around the wiring problem, albeit a more
complex integrated circuit driver for the display is required. To understand its
operation, assume that the output of the seven-segment decoder is such as to
produce a given numerical digit (for example, if all inputs are high an “8” is
obtained). If vm that is associated with digit Sm. is high, none of the diodes con¬
nected to it will conduct (they will either have a zero voltage or be reverse biased);
thus, all segments will remain dark. If, however, ^ 0, then the diodes con¬
nected to high-output lines will be forward biased and will be lit. The inputs
of the inverters may be used to activate the numerical digits sequentially. In se¬
quencing from one digit to the next, the output of the seven-segment driver must
change appropriately. It should be noted that this multiplexing scheme is depen¬
dent on the diode property of the display segments; it would not work, for ex¬
ample, if the display elements behaved as simple resistors. For the circuit shown,
the diodes of each seven-segment display have a common negative (cathode) ter¬
minal. Alternatively, the diodes could have a common positive (anode) terminal,
which would require a different external circuit.
Another common application of LEDs
is as a signal-level display such as is fre¬ Figure 2.64: LED level indicator.
quently used on tape recorders and hi-fi
audio amplifiers. Assume the on voltage of -1- R2 <
/?o <: >
the LEDs of Figure 2.64 is VD{on) (approx¬
\\

imately 1.6 V if the red diodes of Figure

2.61 are used). When uin reaches VD(on),
the first diode. Do, will become forward

2.8
[H
LIGHT-EMITTING AND LASER DIODES: OPTICAL COMMUNICATION
+

109
 < ^^OUT
Figure 2.65: An LED transmitter and
photodetector receiver.
light-emitting photo- + -
diode detector V^Bias
transmitter receiver

biased, thus emitting light for pin > ED(on)- As a result of the biasing voltages of
the other two diodes, their current will remain essentially zero (no emissions).
However, when pin exceeds PD(on) + the current of Di will increase, thus
turning on Di. The circuit of D2 will remain essentially zero for pin < P’D(on) +
El {El > E\). It will turn on for pin > r’D(on) + Ei; all three diodes will be
on for this condition. For an audio-level indicator, the controlling voltage pin
could be obtained using a rectifier and filter circuit, the output of this circuit
being proportional to the amplitude of the audio signal. An improved audio¬
level indicator uses a set of electronic comparators for activating the LEDs. For
this circuit, the diodes, if they are activated, will have a uniform brightness.
Although only three diodes are shown in Figure 2.64, six or more diodes, each
being activated at a different input level, are common.
Another application of an infrared LED is the ever-present remote control (TV,
VCR, etc.). An infrared photodetector of the unit being controlled is used to detect
the signal of the remote control. A photodiode operates on essentially the same
principle as a photovoltaic cell except, to enhance its sensitivity, the photodiode is
reverse biased with an external circuit. Generally, a photovoltaic diode has a much
smaller area than a photovoltaic cell. Consider the transmitter-receiver circuit of
Figure 2.65. When pin exceeds the forward bias required for a significant diode
current (approximately 1.2 V for the infrared diode of Figure 2.61), an infrared
emission occurs. If properly directed, a portion of the emission will be absorbed
by the photodetector, and the generation of electron-hole pairs will result in an
external current. This yields a small output voltage of the receiver pqut-
The operation of this system is complicated by background infrared radia¬
tion, primarily that which accompanies visible radiation ( both natural and that
produced by lamps). The photodetector responds to the signal of the infrared
transmitter of the remote control as well as to that of the background radiation.
To distinguish the transmitted signal from that produced by the background ra¬
diation, an ow-o/jf modulation of the current of the LED and hence its radiated
signal is utilized (Figure 2.66). Even if the transmitted signal is small compared

Figure 2.66: Modulation of a remote control light-emitting diode.

^IN ^OUT signal from transmitter

/
background
radiation
> t
transmitter receiver

110 THE SEMICONDUCTOR JUNCTION DIODE

with the background radiation level, its presence may be readily detected. To the
extent that the background signal is nonvarying (or only slowly varying), it may
be eliminated with a simple high-pass filter (for example, a circuit with a series
capacitor). In addition, a band-pass filter is also used to reduce the effect of the
background radiation further.
Consider the case for a square wave with a periodic frequency of 40 kHz,
which is a frequency used for numerous remote controls. The output voltage
of the receiver vouT may be treated as consisting of a Fourier series of terms.
The largest-amplitude sinusoidal term has a fundamental frequency of 40 kHz.
Smaller-amplitude harmonics are also present (because a square wave has only
odd harmonics, these terms will have frequencies of 120, 200 kHz, etc.). The
output of a detector following the filter may be used to indicate the presence or
absence of a signal.
To accomplish the various control functions (for a TV control, for example,
power, mute, channel selection, etc.), a coding system is required. A commonly
used system utilizes 0.5-ms bursts of the 40-kHz square-wave signal - each burst
is thus 20 periods of the 40-kHz signal. Either a single or double burst (double
bursts are separated by 0.5 ms) is used to transmit a sequence that may be
interpreted by the receiver as a logic 0 or 1. A sequence of single or double bursts
may be used to transmit a binary-coded word corresponding to a particular
control function (Figure 2.67). The code word, after an extended off interval, is
repeated as long as the control is activated.
Closely related to the development of the LED was the introduction of the
semiconductor junction laser (an acronym for light amplifiction and stimulated
emission of radiation). Whereas the radiation of an LED lacks spectral and
spatial coherence, the radiation of a laser is highly coherent. The radiation
of a laser consists of an extremely narrow spectrum of wavelengths with a
highly directed spatial radiation pattern. The laser is an outgrowth of an ear¬
lier device, the maser (microwave amplification and stimulated emissions of ra¬
diation) invented by Charles H. Townes and his coworkers in 1954 (Gordon,
Ziegler, and Townes 1954; Schawlow 1976). Townes, along with Schawlow,
also developed the first laser in 1958 (Bromberg 1988; Schawlow and Townes
1958).

single-burst
expanded time scale
> t
' V

i
signal 10 110 10 100 1 repeat

Figure 2.67: Example of coding used by a remote control (power control

function for a particular TV set is shown).

2.8 LIGHT-EMITTING AND LASER DIODES: OPTICAL COMMUNICATION 111

p-type Figure 2.68: Basic structure of a junction
n-type diode laser.

optically flat
mirror surfaces

A laser relies on an optical resonator, generally a Gabry-Perot mirror cavity, for

its operation. A structure similar to that of an LED’s is used for a semiconductor
junction laser (it is also known as an injection laser). As is the case for many
inventions, the idea for a semiconductor laser was not unique to a single re¬
search group. Three groups nearly simultaneously demonstrated the operation
of a gallium-arsenide laser in 1962 (Hall 1976). There was Robert Hall and
his coworkers and General Electric (Hall et al. 1962), Marshall Nathan and his
colleagues at IBM (Nathan et al. 1962) and T.M. Quist at MIT’s Lincoln Labo¬
ratory (Quist et al. 1962). Although the first laser diodes were cooled with liquid
nitrogen and were limited to intermittent pulsed operation, efficient laser diodes
that operated continuously at room temperature and higher were introduced in
the 1970s.
The basic structure of a semiconductor laser is shown in Eigure 2.68. A laser
relies on an optical resonator, generally a Gabry-Perot mirror cavity, for its op¬
eration, and a semiconductor structure similar to that of an LED’s is used for a
junction laser. At low junction currents, the device tends to behave as an LED
except that its radiation tends to be trapped within the diode structure. How¬
ever, as the diode current is increased, a threshold current is reached at which
radiation reflected from the mirrors is sufficient for laser operation to occur. Eor
normal operation, a curent larger than the threshold current is required. As a
result of the mirror at one end being slightly transparent, radiation is obtained
from one end of the diode. To reduce the threshold current, heterojunction de¬
vices with very thin junction regions in which the laser interaction occurs have
been developed.
The coherent radiation of semiconductor lasers is used for several applica¬
tions in which the radiation of LEDs would not be suitable. The reading of a
compact disc (audio or data) requires a laser source that can be focused to a
sufficiently small beam necessary for detecting a binary bit pattern that has di¬
mensions only slightly larger than the wavelength of visible light. Only a laser
can provide sufficiently coherent radiation to accomplish this. Another appli¬
cation of semiconductor lasers is fiber-optic communication systems (Agrawal
1992; Hecht 1987; Palais 1992). Although LED transmitters could be used for
short-distance, low-capacity systems, it is the semiconductor junction laser that is
used for long-distance, high-capacity systems. Although numerous long-distance
wire-type communications systems are still being utilized, all the new systems are
fiber-optic systems.

112 THE SEMICONDUCTOR JUNCTION DIODE

 fiber-optic _
transmission line
laser transmitter photodetector receiver

Figure 2.69; A fiber-optic communications system.

A semiconductor laser is basically an on-off ty^e. device that is not well suited
for the direct transmission'of analog signals but is ideally suited for digital signals.
Except for the analog connection between an individual subscriber and the tele¬
phone office, all modern telephone systems utilize digital signals. It is a digital
telephone signal that is routed through a telephone office, and, if necessary, is
transmitted over short- and long-distance transmission systems. Hence, telephone
signals are ideally suited for fiber-optic systems using semiconductor lasers.
A communications system using a fiber-optic transmission line is shown in
Figure 2.69. The optical fiber is a very-small-diameter, low-loss glass filament
that generally has a graded refraction index that confines the light rays to the
center of the fiber. Because losses of 0.2 dB/km and less can be achieved, a
50-km-long optical fiber has a loss of only 10 dB, that is, 10 percent of the
initial optical signal is available at the end of fiber. Regenerative repeaters in
which the weak optical signal is detected, amplified, and used to drive a semi¬
conductor laser coupled to the next section of fiber are used for long-distance
systems.
It is the high rate at which semiconductor diode lasers can be pulsed that results
in the high capacity of fiber-optic systems. Consider the case of a typical telephone
system (Bigelow 1991). The analog signal produced by a subscriber’s telephone is
sampled at a rate of 8000 samples per second, and each sample is quantized to one
of 256 discrete levels. Therefore, to transmit each sample with a binary code, 8
bits (2^ = 256) are required. Hence, a single telephone signal requires a transmis¬
sion of 64,000 bits/s (8000 samples/s x 8 bits/sample). If only a single telephone
signal were to be transmitted (which would never be done with a fiber-optic sys¬
tem), a time interval of 15.625 /xs (1/64,000 s) could be used for transmitting each
bit. Commonly used electronic digital systems, however, work with much shorter
bit times - times measured in nanoseconds rather than microseconds. Hence, each
bit can be transmitted in a much shorter time interval than 15.625 /xs. If this is
done, the intervening time between the “compacted” groups of eight bits may be
used for other telephone signals - a process known as time multiplexing. High-
capacity fiber-optic systems with bit rates of 400 Mbits/s, that is, a time interval
of 2.5 ns for each bit, are common. For this bit rate, 6000 simultaneous telephone
conversations can be transmitted along with additional framing pulses that are
required for separating the individual signals at the end terminal of the system.
Because a fiber-optic system works only in one direction, two systems are used
for a normal two-way telephone system. Fiber-optic “cables” generally consist
of bundles of many fibers; hence, numerous two-way circuits are carried by each
cable.

2.8 LIGHT-EMITTING AND LASER DIODES: OPTICAL COMMUNICATION

 EXAMPLE 2.1 7
Consider the level indicator of Figure 2.64 that uses yellow light-emitting
diodes with UD(on) = 2.0 V.

Ro = Ri = R2 = 200 El = 2.0 V, £2 = 4.0 V

a. Determine and sketch the currents of the diodes (0 < uin < 10 V).
b. Design a diode-limiting circuit that will limit the currents of the LEDs to
5 mA. Assume that diodes with an on voltage of 0.7 V are available.

SOLUTION
a. Consider the diodes individually (Figure 2.70).

Do : vd < 2.0 V, /‘do = 0

vd > 2.0 V, /'do = (fD — VD{on))/Ro = 5(vd — 2) mA
Di : Vd < 4.0 V, /di = 0
Vd > 4.0 V, /'di = {vd — VD{on))/R! = 5(vd — 4) mA
Di : Vd < 6.0 V, /‘di = 0
Vd > b.O V, iDi = {vd — fD(on))/R-i = 5{vd — 6) mA
b. A shunt diode-battery circuit may be used to limit the current of the LEDs.
Suppose two 100 series resistors are used for Rq, Ri, and Ri. A current
of 5 mA implies a voltage of 0.5 V across each of these series resistors.
Therefore, a limiting voltage of 2.5 V (0.5 V -t- i’D(on)) is required for Dq.
This implies a diode in series with a 1.8-V battery (Figure 2.71). Series
voltages of 3.8 and 5.8 V are required to limit the currents of Di and D2,
respectively.

Figure 2.71: Zener diode limiting for level indicator of Example 2.17(b).

114 THE SEMICONDUCTOR JUNCTION DIODE

 iit)

i{t) isit)
V ipn
/p/2
t -/p/2 -I
T/2 T

Figure 2.72: Equivalent circuit of diode for Example 2.18.

EXAMPLE 2.18
Consider the infrared transmitter and receiver of Figure 2.65. The response of
the receiver circuit is limited by the capacitance of the diode and circuit. Sup¬
pose that the effect of the diode capacitance (a nonlinear quantity) and that of
the circuit can be accounted for with a single capacitor Cl of 20 pF connected
in parallel with Rl. Assume the peak photodetector current is 1 /xA and that
it has a frequency of 40 kHz (Figure 2.66). Assume no background radiation.
a. Determine and sketch i'out(/) for Ri — 1 M^2.
b. Repeat for Ri = 100 k^2.

SOLUTION
a. The current pulses of the diode i(t) may be treated as the sum of two terms,
a constant of Ip/2 and a symmetrical square-wave signal ^(t). By superpo¬
sition, the constant current term of Ip/2 results in a component of IpRi/2
for the output voltage (because \^ias is in series with the current sources, it
has no effect on uout)- To determine the effect of is{t), the current source
and Rl may be replaced by a Thevenin equivalent circuit (Figure 2.73). If
Cl were zero, the component of output voltage due to is{t) would be equal
to ts{t)RL (a voltage with a square-wave form). The capacitance results in

Figure 2.73: Thevenin equivalent circuit for is(t) solution.

Rl
t
+ + ^ -IpRl/2 -I

Cj : ^out(0
^out(/)
/p/^L/2
> t
m T/2
T

2.8 LIGHT-EMITTING AND LASER DIODES: OPTICAL COMMUNICATION 115

 (a)
Figure 2.74: Solution of Example 2.18.

a distortion of the voltage (Figure 2.73). Because is symmetrical

about zero volts, the same symmetry would be expected for for
a steady-state response. The voltage Uout(^) i^'JSt satisfy the differential
equation of the circuit:

^ p r I ../ IpRi
OUT’

^v'
“‘^OUT
riv'
_|_ “‘^OUT
0 <t < T/2
dt RlCl IRlC

The following may be shown to satisfy the differential equation and result
in an initial voltage of (a yet-to-be-determined quantity):

KoutI') = Vp/2 -{Vp/2 +

This voltage must be equal to at ^ = T/2.

= Vp/2 - {Vp/2 + y„)c-^/2R,c,

y,„(l + = yp/2(l -
/yp\ 1
y^
VT; l + e-T/2RiCL

For this circuit, RlCi = 20 pLS and T/2RiCl = 0.5.

Vp/2 = 50 mV, Vm = 12.2 mV

This corresponds to a peak-to-peak value of 24.4 mV for Uout(^) well as

for foutI^)- For no capacitance, the peak-to-peak value would be 100 mV.
The output voltage, vomit), is equal to Fout(^) P^us 50 mV (Figure 2.74).
b. For Rl = 100 k^2, Vp/2 = 5 mV, RpCi = 2.0 /zs, T/2RlC = 5, and
Vm = 4.93 mV. The peak-to-peak value of uout(^) is 9.87 mV, nearly the
10 mV that is obtained for Cl = 0. The output voltage i>out(0 is equal to
Vout(^) ^ rnV-

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116 THE SEMICONDUCTOR JUNCTION DIODE

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Lehovec, K., Accardo, C. A., and Jamgochian, E. (1951). Injected light emission of silicon
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McWhorter, R. W. (1976). The small electronic calculator. Scientific American, 234, 3, 88-

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Milnes, A. G. (1980). Semiconductor Devices and Integrated Electronics. New York: Van
Nostrand Reinhold Co.
Muller, R. S. and Kamins, T. I. (1986). Device Electronics for Integrated Circuits (2d ed.).
New York: John Wiley & Sons.
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PROBLEMS

2.1 A current of 1 A is used to charge a 12-V battery. What is the number

of electrons transferred to (and from) the battery over a time interval of
20 h?

2.2 AWG 12 (American Wire Gauge) copper wire is common for residential
wiring (AWG 12 has a diameter of 2.05 mm). Consider the case for a
current of 10 A.

a) What is the current density of the wire?

b) What is the drift velocity of the electrons?
c) What is the resistance per meter length of wire?
2.3 Repeat Problem 2.2 for aluminum wire. Assume three free electrons are
available for each atom (aluminum has a density of 2.70 g/cm^).
2.4 A two-conductor extension cord with a length of 25 m is used to supply
a current of 12 A for an electric heater. The cord has AWG 12 copper

118 THE SEMICONDUCTOR JUNCTION DIODE

 wire and the supply voltage is 120 V.

a) What is the overall series resistance of the cord?

b) What is the resultant voltage across the heater?
c) What is the efficiency of the system, that is, the fraction of the input
power supplied to the electric heater?

2.5 Repeat Problem 2.4 for extension cords having AWG 14, AWG 16, and
AWG 18 (diameters of 1.63, 1.29, and 1.02 mm, respectively) copper
wire.

2.6 An inductor is wound with AWG 24 enamel-covered (negligible thick¬

ness) copper wire (diameter of 0.51 mm). The inductor has an inner
diameter of 1 cm, an outer diameter of 2 cm, and a length of 2 cm.
Assume a packing factor of 0.90 for the round wire.

a) What is the number of turns of the inductor?

b) What is the resistance (static, dc) of the inductor?

2.7 Aluminum is used to interconnect components of a silicon integrated

circuit. Assume a connecting strip with a width of 25 jxm and a thickness
of 2 jxm. What is the resistance per centimeter length of the strip?
2.8 A particular 12-V automobile electric starter motor requires a current
of 100 A. Suppose that a 1-m length of copper wire is used to connect
the battery to the starter and that the maximum allowable voltage drop
across the wire is 1 V. What is the minimum diameter of wire that can
be used?
2.9 Aluminum wire is generally used for outdoor electric power lines. Con¬
sider the case for a 50-m length feed and 50-m return wire from the
power pole to a house. What is the minimum diameter wire that can
be used if the total voltage drop is not to exceed 5 V for a current of
100 A?
2.10 A sample of intrinsic silicon has a cross-sectional area of 0.1 mm^ and a
length of 1 cm. What is the resistance of the sample for a temperature of
27 °C?
2.11 What is the resistance of the silicon sample of Problem 2.10 for temper¬
atures of 50, 100, and 150 °C?
2.12 Repeat Problem 2.10 for intrinsic germanium (w, = 2.4 x 10^^/cm^ at
27 °C, jin = 3900 cm^/V • s, jXp = 1900 cm^/V- s).
2.13 The intrinsic density of germanium doubles for each 16 °C increase in
temperature. Repeat Problem 2.12 for temperatures of 50 and 100°C.
2.14 Gallium arsenide, a III-IV semiconductor compound, is used to fabricate
specialized electronic devices («/ = 1.8 x 10^/cm^, //.„ = 8500 cm^/V • s,
fXp = 400 cm^/V-s). What is the resistance of a sample with a 1-mm
diameter cylindrical cross section and a length of 1 cm?

PROBLEMS 119
 2.15 Assume that for a particular application an acceptor atom concentration
in a silicon semiconductor that results in a conductivity that is 50 percent
greater than that of intrinsic material is acceptable. What is the acceptable
concentration of acceptor atoms? What is the ratio of acceptor atom
density to the silicon atom density?
2.16 Repeat Problem 2.15 for a donor atom impurity.
2.17 Repeat Problem 2.15 for a germanium semiconductor.
2.18 A silicon semiconductor with a resistivity of 1.0 • m is desired.
a) What is the donor atom density required for this resistivity?
b) What is the acceptor atom density required?
2.19 Repeat Problem 2.18 for a resistivity of 0.15 • m.
2.20 A silicon semiconductor with a resistivity of 1.0 • m is desired. Owing
to a prior doping it has a donor density of 10^"^ atoms/cm^.
a) What is the acceptor atom density that would result in «-type material
with a 1.0 • m resistivity?
b) What is the acceptor atom density that would result in a p-type ma¬
terial with a 1.0 ^2 • m resistivity?
2.21 A silicon semiconductor has a donor atom concentration of 100 «, at a
temperature of 27 °C.

a) What is the ratio of free electrons to holes (w/p) of the semiconductor

at 27 °C?
b) At what temperature is n/p = 10?
2.22 Repeat Problem 2.21 for an initial donor concentration of 10'^ .
2.23 Repeat Problem 2.21 for a germanium semiconductor (w, doubles for a
temperature change of approximately 16 C°).
2.24 An n-type semiconductor with a free-electron concentration of 10^^/cm^
is desired.

a) Compare njp for silicon and germanium semiconductors for a tem¬

perature of 'll °C.
b) What are the temperatures at which n/p = 10 for the silicon and
germanium semiconductors? (Assume doubling temperatures of 11 C°
and 16 C° for n, of silicon and germanium, respectively.)
2.25 A junction diode has the charge density distribution of Figure 2.11(a).
Assume that the two regions (marked -1- and -) are rectangular and
that the negative region has a width of Xp (0.052 pm) and the positive
region has a width of ocn (0.13 pm). The diode has an acceptor doping of
10^^/cm^ and a donor doping of 4 x 10^^/cm^.

a) Use Gauss’s law to determine Exatx = 0 {€r = 11.5, consult a physics

text if necessary).
b) Write expressions for Ex within the depletion region.
c) Using the expressions for Ex, determine Vbuih-in of the diode.

120 THE SEMICONDUCTOR JUNCTION DIODE

2*26 For a given set of eloping densities, the size of 4 depends on the cross-
sectional area of a junction diode. The area of a diode is generally chosen
according to the current it may be required to conduct. Assume that
I’D = 0.75 V for different diodes having currents of 1 /xA, 1 mA, 1 A,
and 100 A. What are the corresponding values of Ig for these diodes
{n = 1, Vt = 25 mV)?
2.27 Repeat Problem 2.26 for diodes with n — \ A.

2.28 For a given silicon inunction diode it is found that io — 10 mA for vd =

0.75 V and that io = 1 rnA for vd = 0.65 V. What are n and Ig of the
diode (T = 27°C, Vt = 25 mV)?
2.29 Suppose that the data of Problem 2.28 were obtained at a temperature
of 60 °C. Determine n and Ig for the diode at a temperature of 60 °C.
What would Ig be if the temperature of the diode were reduced to 27 °C?

4 = 10“^^ A Figure P2.30

n = 1.4

2.30 A silicon junction diode with a current source is used in the circuit of
Figure P2.30. Determine vi for ii = 0 and for ii — 9 mA. What is the
variation in vi for this current range?
2.31 Repeat Problem 2.30 for a circuit in which the single diode is replaced
by five series-connected diodes.

1 kf2

Ig = 10-14 A Figure P2.32

Vl = VD
Va
n = 1.0
5V

2.32 A silicon junction diode with a voltage source is used in the circuit of
Figure P2.32. What is vi for 11 = 0 and for /’l = 4 mA? What is the
variation in vi for this current range?
2.33 Replace the diode of Problem 2.32 with four identical series diodes and
increase Va to 8 V. What is vl for ii = 0 and for ii = 4 mA? What is
the variation in vl for this current range?

= 10 1^ A Figure P2.34

n = 1.2

PROBLEMS 121
 2.34 A series silicon junction diode is used for the circuit of Figure P2.34. The
input voltage uin has a sinusoidal time dependence as follov^s:

sin (wt V^ = 1.0V

a) What is uqut for (jot = 0, 7r/4, nil, and 37r/4?

b) Over what fraction of a period is uouT essentially zero (ul 1-0 mV)?

2.35 Repeat Problem 2.34 for Vm — 1-5 V.

2.36 Repeat Problem 2.34 for V,„= 10 V. Suggest an approximation for vd
that would yield a reasonably accurate result for uouT while simplifying
the calculations.
2.37 Suppose Vm of Problem 2.34 is 100 V. For this condition, the approxi¬
mation that Vd = 0 for /'d > 0 is reasonable.
a) Sketch i>ouT for this condition. What is its peak value?
b) What is the time average value of uqut?
c) What is the rms value of uqut?
d) What is the average power dissipated by Rl?
2.38 Repeat Problem 2.37 for Vw = 50 V.

Figure P2.39

2.39 In the circuit of Figure P2.39, the diode voltage may be assumed to be
0.7 V (vD(on)) for a current that is greater than zero.
a) Sketch uouT -versus-wiN for the circuit.
b) Suppose DIN is a sinusoidal function of time.

vif,i — Vm sin In ft, \^ = 10 V, f = 60 Hz

Determine the rise and fall times of the approximate square waveform
of Dour-
2.40 Rise and fall times of 100 jus are desired for dout of Problem 2.39.
Determine the value of Vm required.
2.41 Suppose that djn of Problem 2.39 is a symmetrical triangular wave with
a peak amplitude of 10 V (Vm). Repeat Problem 2.39 for this input
voltage.
2.42 Repeat Problem 2.39 for each diode replaced by two series diodes.

R IN 10 kQ

Figure P2.43

122 THE SEMICONDUCTOR JUNCTION DIODE

2.43 In the circuit of Figure P2.43, the diode voltages may be assumed to be
0.7 V (i>D(on)) if the diode current is greater than zero.

a) Sketch uour -versus-uiN for the circuit.

b) Suppose viN is a sinusoidal function of time.

viN — Vm sin iTift, Vw = 10 V, f = 60 Hz

Determine the rise and fall times of the approximate square waveform
of UOUT-

2.44 Repeat Problem 2.43 for = 5 V and f = 1 kHz.

2.45 Repeat Problem 2.43 for D\ replaced by two series diodes.

Figure P2.46

2.46 Consider the diode circuit of Figure P2.46 with the input voltage indi¬
cated.

Vp — 10 V, tp — 10 jJLS

Assume a diode voltage i;D(on) of 0.7 V and that uouT = 0 at t = 0.

a) Determine and sketch i»ouT as a function of time.

b) Determine and sketch Ir as a function of time. What is its peak value?
c) Determine and sketch ic as a function of time. What is its peak value
and over what time interval does it occur?
d) Determine and sketch /‘in as a function of time.
2.47 Assume that the increasing voltage segment of Problem 2.46 (0 < ? < tp)
consists of a portion of a sinusoidal signal.

ujN = Vp sm{nt/2tp), Vp = 10 V, tp = 10 ^is

Repeat Problem 2.46 for this input voltage.

Figure P2.48

2.48 Consider the diode circuit of Figure P2.48.

a) Determine uqut versus uin (-5 to -t-5 V) with ideal behavior of the
diodes assumed.
b) Determine uoux versus win with PD(on) = 0.7 V assumed.
2.49 Repeat Problem 2.48 with the polarity of the diode reversed.

PROBLEMS 123
 Figure P2.50
+

2.50 Consider the diode circuit of Figure P2.50.

a) Determine uqut versus uin (—5 to +5 V) with ideal behavior of the

diodes.
b) Determine uouT versus uin with UD(on) = 0.7 V assumed.
2.51 Repeat Problem 2.50 with the polarity of Di reversed.
2.52 Suppose that diode Di of Figure P2.50 is connected across both resistors.
Discuss the behavior of the circuit, with UD(on) assumed to be 0.7 V. What
would be the effect of uin = 3 V on the circuit?

Figure P2.53

2.53 Consider the diode circuit of Figure P2.53.

a) Determine uouT versus uin (—5 to +5 V) with ideal behavior of the

diodes assumed.
b) Determine four versus din with D£)(on) assumed to be 0.7 V.
2.54 Repeat Problem 2.53 with the polarity of the diode reversed.
2.55 Repeat Problem 2.53 for a second diode connected in parallel with D
but with the opposite polarity.

1
{> - +
Figure P2.56
^OUT
^3

10 kQ 10kS2

2.56 Consider the diode circuit of Figure P2.56.

a) Determine dout versus din (-5 to +5 V) with ideal behavior of the

diodes assumed.
b) Determine dqut versus din with DD(on) assumed to be 0.7 V.
2.57 Repeat Problem 2.56 with the polarity of the diode reversed.
2.58 Repeat Problem 2.56 for a second diode connected in parallel with D
but with the opposite polarity.

124 THE SEMICONDUCTOR JUNCTION DIODE

 D

Figure P2.59

2.59 Consider the diode circuit of Figure P2.59.

a) Determine uout versus uin (—5 to +5 V) with ideal behavior of the
diode assumed.
b) Determine r>ouT versus uin with VD(on) assumed to be 0.7 V.
2.60 Determine the voltage of the battery E of Figure P2.59 that results in the
following for uout:

four = 1° for uiN < 0

for Din > 0

Assume DD(on) = 0.7 V. What is the value of k}

DouT

2.61 Consider the diode circuit of Figure P2.61.

a) Determine dqut versus djn (—10 to +10 V) with ideal behavior of the
diodes assumed.
b) Determine dqut versus din with DD(on) assumed to be 0.7 V.
c) Determine dout versus din with a constant diode equivalent resistance
rj corresponding to a current of 0.25 mA assumed. Assume DD(on) =
0.7 V.
2.62 Repeat Problem 2.61 for a 1 resistor in series with the diode. Is the
effect of the diode’s resistance of part (c) significant for this circuit?

Figure P2.63

2.63 Suppose that the output of the circuit of Figure P2.63 were to be used as
the input of a second circuit.
a) Determine dout versus din (-10 to +10 V) with an open circuit for
the second circuit assumed. Assume DD(on) = 0.7 V.
b) Determine two Thevenin equivalent circuits that can be used to predict
Dout when the second circuit is in place. One circuit is to apply for the

PROBLEMS 125
 diode having zero current whereas the other is for the diode forward
biased.
c) What is the range of uout over which each of these circuits applies?

Figure P2.64

2.64 Consider the modification (Figure P2.64) of the diode OR gate discussed
in the text. With ideal behavior of the diodes assumed, determine uoUT
for the following input voltages:
a) ua = 0 V vb — OV
h) VA^ 5 W VB^OV
c) va^5Y ub = 2.5 V
d) i;a = 5 V UB = 5 V
2.65 Suppose that in building the circuit of Figure P2.64 the polarity of Di
was accidentally reversed. Repeat Problem 2.64 for this condition.
2.66 Repeat Problem 2.64 with UD(on) assumed to be 0.6 V for the diodes.

Figure P2.67
+

Vb

2.67 Consider the diode AND gate of Figure P2.67. Assume ideal behavior of
the diodes. Determine vc versus va for the following values of vb:
a) Vb — 0 V.
b) VB = 2.5 V.
c) UB = 5 V.

2.68 Repeat Problem 2.67 with VD(on) assumed to be 0.6 V for the diodes.
2.69 Assume that a 10 resistor is connected in parallel with the output
of the diode AND gate of Problem 2.67. Repeat Problem 2.67 for this
condition.

2.70 Assume that a 50 resistor is connected in parallel with the output

of the diode AND gate of Problem 2.67. Repeat Problem 2.67 for this
condition.

2.71 Assume va = vb = 0 for the circuit of Figure P2.67. Determine a set of

Thevenin equivalent circuits for the output terminals of the circuit (vc).
Note: Owing to the symmetry of the circuit, only two equivalent circuits
are needed: one for the diode currents being zero and the other for the

126 THE SEMICONDUCTOR JUNCTION DIODE

 diodes being forward biased. Assume VD(or\) = 0.6 V and determine the
range of vc over which each circuit is valid.
2.72 Repeat Problem 2.71 for va = vb — 5W.

2.73 Consider the diode voltage regulator of Example 2.14 (Figure 2.47).
Determine the variation in ULoad for a variation of Ri from 1.5 to
4 Assume Vsuppiy remains equal to 10 V.

Toad Figure P2.74

^Supply

5V

2.74 Three junction diodes are used in the voltage regulator circuit of Fig¬
ure P2.74, which supplies a load current of /Load- Assume that for the
diodes VD{on) — 0.7 V,n — 1, and Vr = 25 mV.
a) What is the maximum load current for which the diode voltages re¬
main equal to 0.7 V?
b) What is the maximum load current for which the current of the diodes
remains 1 mA or greater?
c) Determine the variation in ^Load for a variation of load current from
zero to that determined in part (b).
2.75 Assume zToad = 1-5 mA for the circuit of Figure P2.74. Determine the
variation in VLoad for a ±1 V variation in Vsuppiy
2.76 Repeat Problem 2.74 for a circuit with four series diodes.
2.77 A silicon photovoltaic cell in bright sunlight produces a short-circuit
current Igc of 1 A and an open-circuit voltage Vqc of 0.60 V. At a reduced
illumination level (cloud cover), Jsc = 0.1 A and Vqc — 0.50 V.
a) What are the parameters of the diode T and n {Vt — 25 mV)?
b) Assume that the cell is in bright sunlight. What will be the electrical
output power of the cell for Rl = Vodlsc^
2.78 The open- and short-circuit measurements of Problem 2.77 are for a tem¬
perature of 27 °C. What would Isc and Vqc be for the same illumination
levels but for a temperature of 60°C?
2.79 A silicon photovoltaic cell at a temperature of 27 °C has parameters of
T = 10“^ A and n = 2. For a particular illumination level /photon =
25 mA.
a) What are the open-circuit voltage and short-circuit current of the cell?
b) What is the output power for Rl = VodIsd
c) To ascertain whether Rl is close to an optimal value, determine the
electrical output power for values of Rl that are 10 percent greater
and smaller than that used in part (b).
2.80 A series connection of three photovoltaic cells results in a short-circuit

PROBLEMS 127
 current Isc of 100 mA and an open-circuit voltage Voc of 1.55 V when
the cells are in bright sunlight. For overcast conditions = 15 mA and
Vo, = 1.46 V.
a) What are the individual diode parameters A and n (Vr = 25 mV).^
b) What is the power supplied to a load resistor of Ri = Vodhe for
bright sunlight conditions?

Dr R 2Q
—hi—
+ Figure P2.81

” 6V

2.81 Sixteen series-connected photovoltaic cells are to be used to charge a

nickel-cadmium battery with a nominal voltage of 6 V (Figure P2.81).
A series silicon junction diode is used to prevent the battery from being
discharged by the photovoltaic cell when the cell is not illuminated.

Da: Is = 10“^® A, n=l

Db: Is = a, n=l

The series resistor R accounts for the resistance of the battery and circuit
components.
a) Estimate the battery charging current for fphoton = 0.1 A. (Hint: As¬
sume for an initial iteration that the current is equal to /photon-)
b) Estimate the battery current for /photon = 0.5 A.
2.82 Consider a multiplexed seven-segment display of Eigure 2.63 with eight
digits (N — 7). Assume that the output voltages of the logic drivers are
either 0 or 5 V and that the LED segments may be treated as diodes with
VD(on) = 1-75 V. For static conditions, a current of 5 mA is required for
a desired brightness level, and for pulsed operation it is found that the
brightness of a segment is proportional to its average current.
a) Determine the diode current required if a segment is to be on one-
eighth of the time.
b) What is the value required for the series resistors?
c) What is the current that the individual inverters must be designed to
sink?
d) What is the power utilized by the circuit to display all zeroes? All
ones? All eights?

R 100 Q

—-r--1 •

Ri si Ri <i
100i2 > 100i2 > Figure P2.83

red green

128 THE SEMICONDUCTOR JUNCTION DIODE

2.83 A red and a green LED of Figure 2.61 are used in the circuit of Fig¬
ure P2.83. For convenience, assume a constant forward-biased voltage
VD{on) for the diodes corresponding to a current of 2.5 mA. Determine
and sketch the dependence of the diode currents /'di and im, on the
input voltage din (0 to 5 V). Hint: First determine the current of D\
for iQ2 = 0. When Di is conducting, a Thevenin equivalent circuit for it
along with the resistances and djn may be used to determine the current
of Di.
2.84 Consider the photodiode of Example 2.18. Assume Cl = 20 pF and Rl
is such as to result in a time constant of T/2, that is, 12.5 /xs. Determine
fouT(^) for this condition.
2.85 Consider the photodiode of Example 2.18. Determine the fundamental
Fourier component of fouT(^) for both parts of the example. Hint: Utilize
the fundamental Fourier component of is(t) for the input of the RlCl
circuit rather than attempting to extract the fundamental component
from DQuj(f). Compare the peak-to-peak values of the sinusoids with
those obtained in the example.

COMPUTER SIMULATIONS

C2.1 Determine the temperature dependence of a diode with n = 1.4, obtain¬

ing a set of curves similar to those of Figure 2.19 (0 to 10 mA for io)-
Assume 4 = 2 x 10“^^ A. What is the voltage sensitivity for currents of
1 mA and 10 mA?
C2.2 Repeat Simulation C2.1 for n = 2.0 and 4 = 10“^ A.
C2.3 Consider the diode circuit of Figure 2.22. Use your favorite programming
langauge to write a program for solving the circuit using an iterative
process. The element values, Va and R and the diode parameters 4 and
n are input quantities ( Vt = 25 mV). A diode voltage within 1 mV of its
true value is desired. Obtain numerical values for the following:
a) Va = 2.5 V, R = 1 kQ, Is = lO-^^ A, « = 1.
b) Va = 5 V, R= 100 Q, Is 10-^° A, n = l.
=

c) Va = 5 V, R = 10 Q, Is = lO-^® A, n = 1.4.
d) Va = 1 V, R = 10 kQ, Is = 10-^^ A, n=l.
e) Va = 0.7 V, R = 10 k^^, 4 = 10“^^ A, n=l.
C2.4 Use SPICE to determine Id and vd for the circuit of Figure 2.22 for
the conditions of Simulation C2.3. If Simulation C2.3 was performed,
compare results.
C2.5 Repeat Simulation C2.3 for the case of two parallel diodes (same ori¬
entation as original diode). Assume diode paramters of 4i and 42 and
that ni—n2 = l. For this circuit, an iterative process in which the cur¬
rents are obtained after assuming a diode voltage will be required. A
sum of currents at the node of the resistors that has a magnitude that

COMPUTER SIMULATIONS 129

 is less than 10 of Va/R is desired. Obtain solutions for the following
conditions:
a) Va = 2.5 V, R^lkQ, 7,i = Isi = A.
b) Va = 5 V, R= 100 Q, Isi = 10-10 A, Ai = 2 x 10-1° A.
c) Va = 5 V, R = 10 kCl, /,i = lO-i^ A, ki = lO-i^ A.
d) Va = 0.7 V, R = 10 k^, Ai = lO-i^ A, h = lO”!^ A.

C2.6 Use SPICE to determine {vd = vqi = vqi), /di and im for the con¬
ditions of simultion C2.5. If Simulation C2.5 was done, compare the
results.
C2.7 Repeat Simulation C2.3 for the case of series diodes (same orientation as
original diode). Assume = W2 = 1- For this circuit it will be necessary
to assume a diode current and then sum the voltages across the two
diodes. A sum of diode voltages that is within Va is desired. Obtain
vd2 and iu {= ioi = ioi) for the conditions of Simulation 2.5.
C2.8 Use SPICE to determine vdi, and in (= Wi = ioi) for the conditions
of Simulation C2.5.
C2.9 Determine the behavior of the circuit of Figure 2.34 using a SPICE sim¬
ulation. Assume the diodes have an ideality factor w of 1.0 and that R is
such as to result in a diode voltage of 0.7 V for a diode current of 1.0 mA
(Vt = 25 mV). Obtain a plot of uout for —5 < ujn < 5 V. Also obtain
plots of the diode voltages.

+
Is = 10-11 A
^OUT Figure C2.10
^IN
n — 1.4

C2.10 The series diode circuit of Figure C2.10 is frequently used to rectify a
voltage uiN- As a result of the diode, the current of the circuit and hence
the load voltage will never be negative.

a) Using a .DC solution obtain a plot of uout versus uin for -10 < uin <
10 V.
b) Consider the case for which din is a sinusoidal voltage with a peak
amplitude of 10 V and a frequency of 60 Hz (a voltage that could be
obtained from a 60-Hz power line). Obtain a transient solution for
DouT and the diode voltage for two periods of the input voltage. What
are the peak and average values of dout during the second period of
the simulation?
C2. n A capacitor Cl = 100 /xF is connected in parallel with Ri of Figure C2.10.
Repeat Simulation C2.10 for this circuit. Also obtain plots of the currents
of the diode and the capacitor.
C2.12 Use the circuit of simulation C2.11 to determine the effect of the value of
Cl on the ripple output voltage, that is, the difference of the maximum

130 THE SEMICONDUCTOR JUNCTION DIODE

 and minimum output voltages after the first period. Use a range of 20 to
500 fiF. From the data of the simulations, plot the ripple voltage versus
Cl.

Rs 1000Q

Is ^ 10 A Figure C2.13
n = 1.0

C2.13 The three silicon diodes used in the voltage regulator of Figure C2.13
result in a load voltage, when the diodes are conducting, of approximately
2 V. Assume the load is a resistance Ri of 1

a) Determine the dependence of vi on the input voltage, vs {0 < vs <

10 V). What are the values of vl for vs — 5 and 10 V?
b) The current-versus-voltage characteristic of the diodes depends on
their temperature. Repeat part (a) for a temperature of 100 °C. What is
the variation of vi for the temperature increase (vs = 5 and
10 V)?
C2.14 Consider the situation for which the input voltage of the regulator of
Figure C2.13 is constant, vs — 10 V. A variation in the load current
results in a variation in the load voltage - an effect that may be simulated
by using a current source for the load.

a) Determine the dependence of vl on the load current (0 < /’l < 10 mA).
What is the maximum load current for which vl remains within 0.1 V
of its value for ii — 0}
b) Repeat part (a) for a temperature of 100 °C.
C2.15 A SPICE simulation of the diode circuit of Figure 2.44 for ideal diodes
as well as for actual silicon diodes is desired.

a) The behavior of ideal diodes may be simulated by using an extremely

small value of ideality factor for the diodes. Assume n = 0.001 and
A = 10“^^ A for the diodes. Obtain curves of vc versus va lor vb — 0,
2.5, and 5 V. A nested voltage sweep may be used to obtain this
result with a single simulation run. Also obtain plots of the diode
currents.
b) Assume n = 1 and Is — 10“^^ A for the diodes, a set of parameters
corresponding to a silicon diode. Repeat part (a) for these diodes.
C2.16 A particular photovoltaic cell has Ac = 1 A, Vqc = 0.6 V, and n = 1.
Determine the load resistance for which the power supplied to the load
is a maximum.
C2.17 Repeat Simulation C2.16 for n = 2.

COMPUTER SIMULATIONS 131

 C2.18 A SPICE simulation of the circuit with LEDs (Figure 2.71 of Exam¬
ple 2.17) is desired.
a) Estimate the diode voltages of the yellow LED for currents of 1 and
10 mA (Figure 2.61). From these quantities, values of 4 and nVr may
be obtained for the diode. For the default SPICE temperature of 27°C,
Vj = 0.0259 V. Obtain the value of n and perform a simulation to
obtain the current-versus-voltage characteristic of the diode (check to
verify that it is indeed approximately that of Figure 2.61).
b) Obtain a plot of the LED currents similar to that of Figure 2.71. If the
ciruit is functioning properly, a current limiting should occur. Assume
Is = 5 X 10“^^ A and n = 1.0 for the limiting diodes.

132 THE SEMICONDUCTOR JUNCTION DIODE

 CHAPTER THREE

THE BIPOLAR JUNCTION TRANSISTOR:

AN ACTIVE ELECTRONIC DEVICE

Several types of transistors are used in modern electronic systems, both individ¬
ually as discrete devices and in conjunction with other transistors in integrated
circuits. Transistors have three or more terminals and, as is the case for junction
diodes, transistors are nonlinear elements. The bipolar junction transistor (BJT)
that will be discussed in this chapter, as well as the field-effect transistor of the
next chapter, are active devices. Electronic amplifying circuits in which a small
input voltage, current, or both, produces a larger output voltage, current, or both
depend on active devices. Amplification is required for nearly all electronic sys¬
tems. The analysis of transistor circuits is considerably more difficult (a greater
challenge) than that of circuits with two-terminal passive elements - resistors,
capacitors, and inductors.
The history of active electronic circuits dates from the invention of the vac¬
uum tube (the audion) by Lee De Forest in 1906 (De Forest 1906). From the very
beginning the challenge was to develop circuits to utilize this new device. Edwin
H. Armstrong was foremost among the early designers of electronic circuits that
were initially used to improve wireless communication (Armstrong 1915). The
junction transistor, developed in 1950 (following the invention of its predecessor,
the point-contact transistor, in 1948), and other transistors, have replaced vac¬
uum tubes for most (but not all!) applications. These applications, however, tend
to rely on electronic circuits similar to those initially used with vacuum tubes
{Electronics 1980).
A bipolar junction transistor consists of two junction diodes fabricated from a
single semiconductor crystal (Figure 3.1). The w-type regions, the emitter and col¬
lector, are separated by a very thin p-type base region (an NPN-type transistor).
Normal operation of this device depends primarily on free electrons of the emit¬
ter region crossing the forward-biased base-emitter junction (the effect of other
carriers will be considered in the next section). These free electrons diffuse across
the very thin base region and cross a normally reverse-biased base-collector
junction. Because the base-collector junction is reverse biased, the collector cur¬
rent depends primarily on these free electrons from the emitter. Hence, for the
 Collector Collector
reverse- r'c
biased ^ n free
electrons Figure 3.1: Physical model and symbol
Base — P Base fl ^C£
from of a bipolar junction transistor in the nor¬
forward- ^ n emitter mal mode of operation.
'^BE

Emitter Emitter
simplified physical model symbol

device of Figure 3.1, the base-emitter junction’s forward bias tends to control the
collector current. For a properly fabricated transistor, a small current controls a
much larger collector current.
The static terminal properties of a transistor may be specified by a set of
graphical characteristics such as those of Figure 3.2. It will be noted that the
collector current ic depends on the collector-emitter voltage vce and the base
current /'b, and the base characteristic is essentially that of a forward-biased
diode (the base-emitter junction diode of the transistor). As long as the base-
collector junction diode remains reverse biased, the effect of the collector-emitter
voltage on the base characteristic tends to be extremely small and can, for most
applications, be neglected. Hence, the base current of the transistor depends only
on the external circuit connected to the base.
To gain an appreciation for the concept of amplification, consider the transistor
with the characteristic of Figure 3.2 that is used in the circuit of Figure 3.3.
Individual load lines, as were used for junction diode circuits, may be drawn for
both the input and output circuits of the transistor (Figure 3.4). For a particular
value of Pin, a base current is may be determined from the intersection of the load
line and the base characteristic. This current, in turn, determines the particular
curve (or intermediate “interpolated” curve) of the collector characteristic. The
intersection of this curve with the load line determines the collector current ic
and collector-emitter voltage vce- From a set of closely spaced input voltages, a
transfer characteristic pqut (= i’ce) versus pin may be obtained (Figure 3.5).
Two important points may be drawn from the transfer characteristic. First, if
circuit components are properly chosen, a small change in input voltage pjn can

Figure 3.2: Base and collector characteristic of a typical low-power bipolar

junction transistor.

50
40
pA 30
mA
20
10
0 -
0
J -h-f Pbb
.5 1.0
volts volts
base characterisitic collector characteristic

134 THE BIPOLAR JUNCTION TRANSISTOR

Figure 3.3: A bipolar junction transistor
amplifier circuit. 5V

Figure 3.4: Base and collector characteristic with load lines for a transistor
amplifier.

^OUT

Figure 3.5: Transfer characteristic of a basic transistor amplifier. volts

0 1 2 3 4 5
volts

result in a much larger magnitude of change in output voltage uour- Although the
ratio of these changes is negative (an increase in ujn results in a decrease of four)?
this inverting of the input signal is not important for many applications (such as
amplifying an audio signal). Furthermore, if a second amplifier is connected to
the output of the first, it will produce an output that follows the input signal.
The second important point relates to the input and output currents of the circuit
iB and ic, respectively. For the transistor of Figure 3.2, the base current is much
smaller than the collector current. Hence, the power supplied by pin could be
much smaller than that which might be extracted from the amplifier. This is
possible because power is supplied to the circuit by the battery Vcc-
The transfer characteristic of Figure 3.5 is typical of an elementary basic am¬
plifier. For a signal Vs(t) such as that of Figure 3.6, an offset voltage is necessary
for amplification because, for input voltages near zero, pout does not change
(pout remains equal to 5 V in Figure 3.5). An offset voltage of Vbb ( Vbb ^ 1.5 V
would work fairly well for the circuit of Figure 3.3) is included for the circuit

THE BIPOLAR JUNCTION TRANSISTOR 135

 ^in(0 of Figure 3.7 in which Vs{t) is
the signal voltage that is to be

^s(0
BB amplified.
The output signal of the am-
. t plifier is the variation of four
about its midvalue. For a prop¬
Figure 3.6: Shifting the level of an input signal Vsit). erly functioning amplifier, the
output signal is an inverted and
enlarged version of the input signal. Several circuit schemes are available for
eliminating the output offset voltage (a coupling capacitor will work for many
applications). Large voltage and current gains, such as needed for many electronic
applications (radio, TV, etc.) are achieved with several cascaded amplifiers, each
producing an amplified version of its input signal, which then serves as the input
of the next amplifier.
The circuit of Figure 3.3 with the transfer characteristic of Figure 3.5 may also
be used as an active logic inverter gate. For this gate, uouT^5 V for uin < ^ow
and vouT is small but not quite zero for din > ^igh (Figure 3.8). Of importance
is that, for din < Vlow? the output corresponds to a logic low input, and, for
I’iN < Fnigh, the output corresponds to a logic high input. Precise logic levels of the
input voltage are not necessary; it needs only to be less than \low and greater than
%igh to be interpreted properly by the gate. It will be noted that the magnitude
of the slope of the characteristic for the intermediate region of the characteristic
is greater than 1. Both analog and logic circuits generally require amplification.
To analyze and design circuits using bipolar junction transistors, it will be nec¬
essary to develop a better understanding of the physical operation of a transistor

^out(0

Figure 3.7: Amplification of a signal.

^OUT

Figure 3.8: A transistor logic inverter.

^IN

136 THE BIPOLAR JUNCTION TRANSISTOR

and to devise equivalent circuit models that can be used for analytic solutions and
computer simulations. This will be followed by a consideration of a few basic
bipolar junction transistor circuits used in analog and digital electronic systems.

3.1 THE COMMON-BASE CONFIGURATION: A PHYSICAL DESCRIPTION

A three-terminal device such as the bipolar junction transistor of Figure 3.1 has
three currents — one associated with each terminal. Only two currents, however,
are required to describe thej^ehavior of the device; the third current depends on
the other two. As a consequence, one may arbitrarily choose which two to use.
In the introduction to the chapter, the base and collector currents were used,
leaving the emitter to be treated as the common terminal of the device. The
voltages of the base and collector were referred to the emitter.
The currents and voltages of a bipolar junction transistor are indicated in
Figure 3.9. By convention, currents are defined as being directed into the terminals
of the device; if the physical current is in the opposite direction, the numerical
value of the current will be negative. When Kirchhoff’s current law is applied to
the device, the currents must sum to zero as follows:

tB + ic + lE — 0, Vbe + VCB = t^CE (3.1)

If this did not occur for the currents, the device, over time, would accumulate or
be depleted of charge. Summing the voltages around the device yields the voltage
relationship of Eq. (3.1).
Although the common-emitter configuration of a bipolar junction transistor is
generally (but not always) employed to describe a transistor’s behavior using an
appropriate equivalent circuit model, the common-base configuration lends itself
to developing an understanding of the behavior of the device based on physical
considerations (Figure 3.10).
For normal operation, the collector-base junction of a transistor is reverse
biased. In Figure 3.10, an external potential Vcc is used to achieve this. A
forward-biased base-emitter junction is necessary to produce the free electrons
responsible for the operation of the transistor. The free electrons of the emit¬
ter that cross the junction are injected into the base region. In a conventional
diode, the injected free electrons would eventually recombine with the plen¬
tiful holes of the p-type region. Recombination, however, is not an instanta¬
neous process; a finite time is required for the thermal wandering of a free
electron before it comes within the vicinity of a hole and
recombines. While this is occurring, the injected free elec¬ Figure 3.9: Current and voltages of
trons diffuse across the very thin base region of a transis¬ a bipolar junction transistor,
tor. That the diffusion of minority carriers in a semicon¬ collector

ductor could indeed result in a current was established h

I
by the Haynes-Shockley experiment. A reading of this ^CB
+
classic paper describing the experiment (Shockley, Pear¬ base ^CE
+
son, and Haynes 1949) is highly recommended. The free
^BE
electrons that reach the base-collector junction readily t.
*E
cross this junction. It will be recalled that, although the emitter

3.1 THE COMMON-BASE CONFIGURATION: A PHYSICAL DESCRIPTION 137

 built-in electric field of a junction diode in¬
hibits majority carriers from crossing the
junction, the field has an attractive effect on
minority carriers. Therefore, the free elec¬
trons that have diffused across the base may
Rr
be thought of as “falling down” the potential
difference of the base-collector junction.
A few of the injected electrons, regardless
of how thin the base region might be, are lost
Figure 3.10: Common-base configuration for de¬ through recombination. This is indicated in
termining a transistor’s behavior based on physical Figure 3.11(a) as an equivalent flow of elec¬
considerations.
trons out of the base. Simultaneously, holes
of the base region of the transistor cross the
base-emitter junction to the emitter. Because these carriers do not contribute
to the collector current, the current due to those holes is minimized in a well-
designed transistor. This is achieved with a heavily doped emitter region, a doping
that is much larger than the base doping. Hence, many more free electrons from
the emitter cross the junction than holes from the base with a lower doping.
Other carriers, the conventional minority carriers, also cross the junctions and
contribute to the terminal currents of the device. At nominal temperatures, the
currents due to these carriers tend to be negligible and can generally be ignored,
but at elevated temperatures they may be significant.
Because currents are defined in terms of positive charges, the conventional cur¬
rent is in the opposite direction of the electron flow. Hence, the base and collector
currents of Figure 3.11(b) are positive, and the emitter current is negative. For
a first approximation, the collector current of a transistor with a reverse-biased
base-collector junction {vqb > 0) is proportional to the emitter current as given by

ic = -aptE (3.2)

The quantity otf is the common-base current gain, which is a positive quantity
because the relationship of Eq. (3.2) has a negative sign. The F subscript im¬
plies the forward direction of the transistor; a subscript R is used for the reverse
direction when the roles of the emitter and collector are interchanged. If recom¬
bination of the injected free electrons did not occur, and if the hole current of the

Figure 3.11: The role of majority carriers of a bipolar junction transis¬

tor.

base base
emitter collector emitter collector

free electrons - I 1
from emitter _ ^ Cl

holes
from base
j J y=J

(a) carriers (b) conventional current

138 THE BIPOLAR JUNCTION TRANSISTOR

base-emitter junction were zero,

I
emitter collector
then ap would equal 1 (negligi¬ + +
ble effect of minority carriers). -apip
^EB ^CB
For high-quality transistors, ap
is very close to, but less than 1,
base-emitter base-collector
and values greater than 0.98 are diode diode
common.
Figure 3.12: Equivalent circuit of common-base transistor config-
The current relationship of
uration.
Eq. (3.2) suggests an equivalent
circuit with a dependent current
source. By taking into account •• ^EB %4
the junction diodes of the de¬ ^El hi
hi hi
vice, the equivalent circuit of
hi ^El
Figure 3.12 is obtained. Only h4 ^CB
when vpB is negative will the emitter characteristic collector characteristic
base-emitter diode conduct
Figure 3.13: Emitter and collector characteristic of a com¬
{ip < 0). When vcb is positive,
mon-base transistor configuration.
the base-collector diode is re-
verse biased, that is, its current is negligible. However, when vqb is negative,
the base-collector diode is forward biased, thus reducing the collector current
(Figure 3.13). The point at which ic = 0 (an open collector circuit condition),
implies that the current due to the injected free electrons from the emitter, —apip,
is equal to the diode current.
The equivalent circuit model of Figure 3.12 will be used to predict the behavior
of the common-base amplifier circuit of Figure 3.14 that uses a silicon junction
transistor. The first step is to draw the overall circuit with the transistor replaced
by its equivalent circuit (Figure 3.15). It is convenient initially to consider the case
for no signal, that is, for Vs{t) — 0. For the biasing voltage Vpp, the base-emitter
diode will be forward biased. A constant-voltage diode model having a forward
voltage of vpB{on) (~—0.7 V) will be assumed. Summing the voltages around the
emitter loop yields the following:

Vpp VpB{on) + ^eRe = 0

tE — —{VeE + VpB(on))/RE (3-3)
= -(2 - 0.7)/(0.22 k^2) = -5.909 mA
From the emitter current, a numerical value of the collector current, if it is
assumed that the base-collector diode is reverse biased, will be obtained. Let
ap — 0.99, a typical value.

ic — —apip = 5.850 mA (3*4)

The collector-base voltage vcb can now be determined because the collector
current is known:

VCB = Vcc — icRc — 9.15 Y (3.5)

The voltages and currents for no signal are often referred to as quiescent values
(quiet being associated with no signal).

3.1 THE COMMON-BASE CONFIGURATION: A PHYSICAL DESCRIPTION 139

 Re 220 Q

volts

/?£ 220Zg

Ve£ 2V Vqc 15 V

Figure 3.15: Equivalent circuit for the common-base amplifier.

Figure 3.16: Collector-base voltage of the common-base

amplifier.

The presence of a signal may readily be taken into account. i

Vee + VEB(on) + tERE — Vs{t) — 0

tE = -{Vee + VEB{on) - Vs(t))/RE (3.6)

When Vs(t) is equal to its maximum value of 0.5 V, the following is obtained:

tE = -(2 - 0.7 - 0.5)7(0.22 k^) = 3.636 mA

EcB = kcc + ap/ERc = 11-4 V (3-2)

In a like manner, a solution can be obtained for Vs{t) being equal to its minimum
value of —0.5 V:

/£ =-8.182 mA, VCB-6.9V (3.8)

This implies that the peak-to-peak value of vcb is 4.5 V compared with a peak-
to-peak value of 1 V for Vs{t). The voltage gain is thus 4.5. The instantaneous
values of vcb and Vs(t) are shown in Figure 3.16.

EXAMPLE 3.1
Consider the common-base transistor circuit of Figure 3.14 having an in¬
put signal Vs{t) with a peak-to-peak amplitude variation of 1 V. Estimate the

140 THE BIPOLAR JUNCTION TRANSISTOR

 Eg = 4.231 D
Figure 3.17: A series resistance equivalent circuit for the forward-
_
biased base-emitter diode of a transistor.
^£B —1r+ ^
-

peak-to-peak variation in the emitter-base voltage veb for this signal. Assume
nVr —25 mV for the diode of the transistor equivalent circuit. What is the
emitter-to-collector voltage gain of the circuit?
/•

SOLUTION The quiescent emitter current (vsit) = 0) was found to be -5.909 mA

(Eq. (3.3)). Because this current corresponds to a forward-biased diode current
of 5.909 mA, the equivalent resistance of the diode, is wVr/(5.909 mA)
or 4.231 ^2. For the forward-biased diode voltage of 0.7 V, the equivalent
diode circuit has a parameter Vy that is hYt {15 mV) less than 0.7 V. Hence,
Vy = 0.675 V. From the circuit of Figure 3.17, the following is obtained for
the emitter current:

lE = -(Vee -Yy - '^s{t))/{RE +re)

When Vs(t) = 0.5 V, /’e = — 3.679 mA, and when Vs{t) — — 0.5 V, Ie = —8.139
mA. These currents differ but slightly from those obtained using a constant
emitter-base voltage of VEB{on) (—0.7 V). The emitter-base voltages corre¬
sponding to these currents may now be obtained as follows:

VBE — tE^e — Vy

For Vs{t) — 0.5 V, Veb = —0.691 V, and for Vs{t) — —0.5 V, veb = —0.709 V.
The peak-to-peak variation of veb is thus 18 mV, a very small quantity. For
a peak-to-peak collector-base variation of 4.5 V, this implies an emitter-to-
collector voltage gain of 250, a rather large quantity. (It may readily be veri¬
fied that the new emitter currents result in essentially the same peak-to-peak
variation in ucb-)

EXAMPLE 3.2
The circuit of Figure 3.14 requires a “floating” input signal source, that is, a
source that does not have one of its terminals connected to the common or
ground point of the amplifier. From a practical perspective, an amplifier that
utilizes an input signal source with a common terminal is preferable. Consider
the circuit of Figure 3.18, a modification of the basic common-base circuit.

Rs 220Q

Figure 3.18: A modified common-

base amplifier circuit.

3.1 THE COMMON-BASE CONFIGURATION: A PHYSICAL DESCRIPTION 141

 emitter

base

Figure 3.19: A Thevenin equivalent input circuit.

a. Determine the biasing voltage Ve^ required to achieve the same quiescent
emitter current as in Figure 3.14.
b. Determine the voltage gain of this circuit using the input signal of
Figure 3.14.

SOLUTION
a. To determine the behavior of the circuit, a Thevenin equivalent circuit
will be used for the elements connected to the emitter (Figure 3.19). By
superposition, a Thevenin equivalent source dependent on the signal UTh(^)
and a nonvarying voltage dependent on the biasing battery Vph may be
obtained as follows:

Rjh = Rs\\Re = 180 ^2

vjhit) = = 0.820vs(t)

Vxh = = O.ISOVee
Re + Rs
The voltage of Figure 3.19 may be associated with the quiescent emitter
current by

^Th = -{hR-Th + VEB(on))

For a current of -5.909 mA (Eq. (3.3)) a voltage (Vxh) of 1.764 V is

required. Hence, Vee = 9.798 V.
b. The Thevenin equivalent circuit of Figure 3.19 may be used to determine
the emitter current when a signal is present as follows:

-Vxh + Vjhit) = /eRtH + '^EB(on)

iE = - (Vxh + VEB(on) - Vjhit)) / Rj^

The following is obtained for Vs(t) = ±0.5 V:

Vs(t) ’^Th(^) lE ic VCB

0.5 V 0.41 V —3.633 mA 3.597 mA 11.4 V

-0.5 V -0.41 V -8.189 mA 8.107 mA 6.9 Y

The peak-to-peak collector-base voltage remains 4.5 V, resulting in a volt¬

age gain of 4.5.

142 THE BIPOLAR JUNCTION TRANSISTOR

3.2 THE COMMON-EMITTER CONFIGURATION: SAME DEVICE,
DIFFERENT PERSPECTIVE
The physical operation of an NPN bipolar junction transistor was discussed in
the previous section. For normal operation, the collector current of the device
was found to be approximately equal to the current out of its emitter, that is —ig
or \iE\. Therefore, the base current is much smaller than the collector current or
the magnitude of the emitter current. This suggests using the base terminal with
its small current for the input of a transistor circuit and the emitter terminal as
the common terminal. A cotnmon-emitter transistor configuration will have, if
used in a properly designed circuit, both a voltage and a current gain.

EQUIVALENT CIRCUIT
If the collector-base voltage of a transistor remains positive, the base-collector
diode of the equivalent circuit will be reverse biased, and its current will tend to
be negligible (except at elevated temperatures). Hence, the simplified equivalent
circuit of Figure 3.20(a) applies if vqb > 0. To obtain a common-emitter config¬
uration, it is simply necessary to redraw the equivalent circuit of Figure 3.20(a)
using the emitter as the common terminal. Although the corresponding common-
emitter equivalent circuit (Figure 3.20(b)) has a new set of terminal voltages, it is
not convenient to have a current generator that depends on the emitter current
ig, the current of the common terminal. An explicit dependence on ig, however,
is readily obtained as follows:

tB + ic + = 0> = —iclocg
(3.9)

The quantity ^g is the common-emitter current gain of the transistor given by

(3.10)

Because ag is close to unity, the denominator of the right-hand side of Eq. (3.10)
is small, and fig is large (Table 3.1). Values of 100 and larger for pg are not
uncommon for modern bipolar junction transistors.

Figure 3.20: Common-base and common-emitter transistor equivalent cir¬

cuits.

,-— collector
collector A +

base emitter
(a) common-base (b) common-emitter

3.2 THE COMMON-EMITTER CONFIGURATION: SAME DEVICE, DIFFERENT PERSPECTIVE

 TABLE 3.1 COMMON-BASE AND COMMON-EMIHER CURRENT GAINS

ap 0.96 0.97 0.98 0.985 0.99 0.995

fip 24 32.3 49 65.7 99 199

From the result of Eq. (3.9), the common-emitter equivalent circuit of Figure
3.21(a) is obtained. It will be noted that the base-emitter voltage vbe depends
on the current of the diode, namely (1 + )fB. If this diode is replaced by a new
diode that has a smaller value of reverse saturation current, namely a value that is
1/(1 + ;Sb) of its original value, the equivalent circuit of Figure 3.21(b) yields the
correct base-emitter voltage. The current of the diode of the simplified circuit of
Figure 3.21(b) is only /'b; the current of the dependent current source PfIb does
not go through the diode of this circuit. Concurrently, the new connection for
the lower end of the dependent current source will have no effect on either ic or
vcE (an ideal current source results in a current that is independent of its voltage
difference).
It is the circuit of Figure 3.21, or modification of this circuit, that will generally
be used for analyzing bipolar junction transistor circuits. When using this circuit,
however, one must keep in mind that it is valid only for vce ^ vbe, the condition
for which the base-collector diode is reverse biased. A further refinement of this
circuit has additional capacitances between the terminals of the transistor to
account for the behavior of the charges associated with the junction diodes. In
addition, there are small parasitic resistances in series with each terminal, the
equivalent resistance of the metal-semiconductor connection. Furthermore, for
an integrated circuit transistor the junction capacitance between the transistor’s
collector and its substrate would also be included.

TRANSFER CHARACTERISTIC
The common-emitter equivalent circuit will be used to determine the behavior
of the transistor circuit of Figure 3.22, which is essentially the amplifier circuit
of Figure 3.3 considered in the introduction to the chapter. The first step of a
solution is redrawing the circuit by inserting the equivalent circuit model for the
transistor.

Figure 3.21: Common-emitter equivalent circuits.

-— collector
base collector
h ic
Vqe

he he/(I + ^f)
(a) basic circuit (b) simplified circuit

144 THE BIPOLAR JUNCTION TRANSISTOR

Figure 3.22: Common-emitter transistor circuit.

Figure 3.23: Equivalent circuit of a common-emitter transistor cir¬

cuit.

The circuit of Figure 3.23 may readily be analyzed using a constant forward-
biased voltage diode model VBE(on) ^ 0.7 V. This results in the following expres¬
sion for the base current:

0 for Din < vbe{ on)

h (3.11)
(din — VBE{on))/Rb for Din > VBE(on)

The right-hand side of the equivalent circuit may now be used to determine dout
as follows:

EOUT = Vcc — ^FIbRc (3.12)

From the expressions for ig, the following is obtained:

Vcc for Din < vbe{ on)

EOUT = (3.13)
Vcc - (I'IN — VBE(on))PFRc/RB for Din > VBE(on)

The solution is indicated in Figure 3.24.

On the basis of the result of Eq. (3.13), negative values of dqut result for large
values of din (the dashed line of Figure 3.24). This invalid response is a result
of ignoring the base-collector diode of the common-base equivalent circuit. As
a result, the common-emitter circuit of Figure 3.21(b) is strictly valid only for

^OUT

Figure 3.24: Transfer characteristic of a common-emitter

circuit.

3.2 THE COMMON-EMITTER CONFIGURATION: SAME DEVICE, DIFFERENT PERSPECTIVE 145

 VCE > VBE- In practice, however, it is found that this circuit tends to be valid for
vcE down to a few tenths of a volt because the current of the equivalent base-
collector diode remains negligible. A useful transistor approximation is that the
circuit is valid for vce greater than a saturation voltage vcE{sat) and that vce =
r’C£(sat) if the circuit predicts a voltage less than yc£(sat)- This approximation was
used for the characteristic of Figure 3.24. Because the behavior of many circuits
is not critically dependent on the precise value of vce lor the saturated condition,
a voltage of 0.3 V is frequently assumed for vcE(sat)-

SPICE SIMULATION MODEL

Computer simulation programs include algorithms for active electronic de¬
vices. The bipolar junction transistor algorithm is based on a modification of the
equivalent circuit of Figure 3.21(b). A forward-biased base-emitter diode of the
model results in the following for the base current:

gVBE/npVT (3.14)
1+ /
The collector current for vce > ^be is Ppis-

\ ^VBElnpVT _ j^gVBElnfVr (3.15)

Vl + /
A new parameter, known as the transport saturation current Ig has been intro¬
duced. This quantity is similar to the reverse saturation current of a junction
diode. Equation (3.15), however, yields the collector current of the transistor,
not the diode current. An expression may be obtained for the base current ib in
terms of Ig and the common-emitter current gain as follows:

ifi = (3.16)

Both Ig and ^p are generally specified for a SPICE simulation (unless one is willing
to accept built-in default values).
Simulation algorithms account for a forward-biased base-collector junction
that occurs for small values of collector-emitter voltage. A built-in set of default
parameters for this effect is generally acceptable for most applications (a discus¬
sion of these, the reverse parameters of a transistor, will be deferred to a later
time). It should be stressed that simulation programs utilize a set of numerically
related quantities to determine currents and voltages of a device rather than an
explicit equivalent circuit model such as used for analytic solutions.
A close examination of the collector characteristic of Eigure 3.2 or an ex¬
perimentally determined collector characteristic of a transistor reveals that the
collector current for a particular value of base current tends to increase by a small
amount as the collector-emitter voltage increases. This is known as the Early ef¬
fect, a phenomenon first explained by J. Early (1952). As vce is increased, the
reverse bias of the base-collector junction of the transistor increases. This results
in an increased charge separation of the diode, that is, an increased depletion
width. Hence, the effective width of the very thin base region is decreased, thus

146 THE BIPOLAR JUNCTION TRANSISTOR

 Collector Characteristic
IB 0 1
2 k VCE 2 0
Q1 2 1 0 TRAN
.MODEL TRAN NPN IS=1E-12
+BF=200 NF=1.2 VAF=100
.DC VCE 0 30 .2
+IB OU lOOU lOU
.PROBE
.END
Figure 3.25: Circuit and SPICE file for determining a collector characteristic.

tending to increase the rate at which injected free electrons diffuse across the base.
Although the Early effect is usually ignored for analytic solutions, it is readily
included for computer simulations through an Early voltage parameter Vaf as
follows:

ic = ^ vce/Vaf) (3.17)

If, for example, Vaf = 100 V, the collector current will be 10 percent larger for
PC£ = 10 V than if the Early effect were ignored. Ignoring the Early effect is
equivalent to setting Vaf equal to infinity - the default value used by SPICE if
Vaf is not specified.
To illustrate the use of a SPICE simulation of a bipolar junction transistor
circuit, a collector and base characteristic will be obtained for a transistor with
the following parameters:

;6f=200, 4 = 10“^^ A, nF= 1.2, Vaf = 100 V (3.18)

Values of base currents up to 100 /xA and collector-emitter voltages up to 30 V

are desired for the characteristic. The SPICE circuit and file of Figure 3.25 will
be used for the collector characteristic. The bipolar junction transistor has an
element label of Q, and three nodes are specified; collector, base, and emitter
(in this order), followed by an arbitrary model name. The corresponding model
statement has an NPN specification (in contrast to an alternative PNP transistor
type). If no other parameters were to be specified, a SPICE simulation would use
a set of built-in default values rather than those of Eq. (3.18). The .DC state¬
ment results in a set of base currents of 0 to 100 fiA in steps of 10 /lA. With
the nested specification, the collector-emitter voltage VCE is swept from 0 to
30 V (0.2 V increment) for each value of base current. The collector character¬
istic of Figure 3.26 is obtained where the effect of the Early voltage is readily
apparent.
The circuit and SPICE file of Figure 3.27 will be used to determine the base
characteristic of the transistor for collector-emitter voltages of 0,1, 5, and 20 V.
Although this could be achieved with a nested sweep specification, it is not pos¬
sible to distinguish readily on a PROBE graph which base current corresponds to
which collector-emitter voltage. A common base-emitter voltage source VBE is
used for the four circuits.
It should be noted that large values of base-emitter voltage will result in ex¬
cessive device currents. The circuits of Figure 3.27 would not be used for a

3.2 THE COMMON-EMITTER CONFIGURATION: SAME DEVICE, DIFFERENT PERSPECTIVE 147

 Collector Characteristic
Temperature: 27.0

Figure 3.26: SPICE-generated col¬

lector characteristic for the circuit of
Figure 3.25.

■ IC(Q1)
VCE

laboratory experimental determination of the base characteristic because the ex¬

cessive currents would most likely burn out the device. A resistor in series with
the base connection would be used to limit the base current. The justification
for this circuit is that, with a voltage source connected directly between the base
and emitter of the device, the simulation will produce a set of characteristics
with a common voltage scale (Figure 3.28). Although devices are not destroyed
in simulation programs, regardless of how excessive the voltages and currents,
it would be of value if simulation programs had a “burn out” algorithm that
would remind one of necessary practical laboratory precautions. It will be noted
that, except for vce = 0? the base characteristic is essentially independent of the
collector-emitter voltage of the transistor.

Figure 3.27: Circuit and SPICE file for determining a base characteristic.

Base Characteristic
VBE 1 0
Q1 0 1 0 TRAN
Q2 2 1 0 TRAN
VCEl 201
Q3 3 1 0 TRAN
VCE5 305
04 4 1 0 TRAN
VCE20 4 0 20
.MODEL TRAN NPN IS=1E-12 BF=200 NF=1.2 VAF=100
.DC VBE .3 .75 .002
.PROBE
.END

148 THE BIPOLAR JUNCTION TRANSISTOR

 Base Characteristic
Temperature: 27.0

Figure 3.28: SPICE-generated base char¬

acteristic for the circuit of Figure 3.21.

VBE

EXAMPLE 3.3
Consider the common-emitter transistor circuit of Figure 3.29.
The input source is a voltage with a sinusoidal time dependence as follows:

= \^sin27^/^^, = 0.5 V

A transistor with a common-emitter current gain of 150 and a base-emitter

voltage VBE(on) of 0.7 V is used in the circuit.
a. Determine values for Vbb and Rb that result in an output voltage with a
quiescent value of 5 V and a peak-to-peak value of 8 V.
b. Determine and sketch vout(^)-
c. Suppose that the transistor of the circuit with the values of Vbb and Rb
determined in part (a) is replaced with a transistor having a current gain
of 100. Determine and sketch fouTi^) for this condition.
d. Repeat part (c) for a transistor with = 200.

SOLUTION The circuit of Figure 3.30 is obtained when the transistor is replaced
with its common-emitter equivalent circuit. For Vbb + Vs{t) > VBE{on) the

Figure 3.29: Common-emitter transistor amplifier of

Example 3.3.

3.2 THE COMMON-EMITTER CONFIGURATION: SAME DEVICE, DIFFERENT PERSPECTIVE 149

 Vsii) lOldi

Figure 3.30: Equivalent circuit for Example 3.3.

following is obtained:

is = ( Vbb + Us(^) - VBE(on))/Rb

l^OUT = ^CC ~ icRc = ^CC ~ {VeB + Vs{t) — VBE{on))PF Rc/Rb
= Vcc - (Vbb - VBE{on))PFRc/RB - (^F Rc/RBW^sinlTt ft

a. Because the input voltage has a peak-to-peak value of 1 V, an output voltage

with a peak-to-peak value requires that fp Rc/Rb = 8.

Rb — /SbRc/8 = 187.5 kf2

A quiescent collector voltage of 5 V implies a collector current of 0.5 mA

and a base current of 0.5 mA/150 = 3.33 /t-A.

Vbb = ibRb + VBEion) = 1-325 V (quiescent value)

b. The expression for uout(^) yields the following:

Pout = 5 — 4 s'mlTT ft V

This is shown in Figure 3.31.

c. fp — 100. The base current of the circuit will not be affected if VBE(on) of
the new transistor remains equal to 0.7 V. Hence, ic = fptB = 0.333 mA,
and vcE — 6.67 V for quiescent conditions. The following is obtained for
Vomit) (Figure 3.31):

Pout = 6.67 — 2.67 sin Ijrf? V

d. j8f — 200. The transistor will have a quiescent collector current of 0.677 mA
and a collector-emitter voltage of 3.33 V. The expression for uouT(f) yields

Figure 3.31: Output voltages of Example 3.3.

^out(0 ^out(0

150 THE BIPOLAR JUNCTION TRANSISTOR

 the following:

^ouT = 3.33 — 5.33 sin Ijtft V

This relationship is obviously not valid because it results in values of collector-

emitter voltage that are less than uc£(sat)- This is a result of the equivalent base-
collector diode being ignored. Given that vqe > uc£(sat) ^0.3 V is required,
the following is obtained for vomit) (Figure 3.31):

r3.33 — 5.33 s'lnlTt ft for 3.33 — 5.33 smlnfi > 0.3 V

^OUT [0.3 V otherwise

EXAMPLE 3.4
It is often necessary to cascade transistor circuits to achieve a desired response.
Identical transistors with — 50 and VBE(on) = 0.7 V are used in the two-
stage logic buffer of Figure 3.32. Determine the overall transfer characteristic
i^ouTi versus uin of the circuit.

SOLUTION The transfer characteristic of stage 2, uouTi versus uoutIj is that of

Figure 3.24 with Vcc = 5 V and a transition with a slope of —^p Rc/Rb = —3.
This is indicated in Figure 3.33 with uc£(sat) = 0-3 V. The input current of
stage 2, that is, ipi, must be taken into account when determining the transfer
characteristic of stage 1. For t;c£i > 0.7 V, the equivalent circuit diode of Qi

Figure 3.32: Two-stage transistor circuit of Example 3.4.

Figure 3.33: Transfer characteristic of the individual transistor stages.

^OUTl ^OUT2

3.2 THE COMMON-EMITTER CONFIGURATION: SAME DEVICE, DIFFERENT PERSPECTIVE 151

 can be replaced with a voltage source of VBE(on)- The circuit external to the
collector of Qi may be replaced by a Thevenin equivalent circuit (Figure 3.34):

f^Th — — 0.909
y _ Rb Vcc Rcbbe{ on)
= 4.61 V
Rb + Rc Rb + Rc
The slope of the transition is —fifRTh/RB = —4.55, and the maximum value
of fouTi is 4.61 V (Figure 3.33). The response of stage 1 for the Thevenin
equivalent circuit is valid for vcei > 0.7 V, that is, while the base-emitter
voltage of Qj is VBE(on)- For vcei < 0.7 V, ibi = 0, and the external collector
circuit consists of only Rc and Vcc- However, from a practical perspective,
the impact of this effect on the transfer characteristic for 0.3 < vcei S 0.7 V is
negligible - it cannot be seen on the graph with the resolution of Figure 3.33.

Figure 3.34: Collector circuit of stage 1.

Vcc = 5V

^OUT2
5.0 ;

slope ~ 23 Figure 3.35: Overall transfer characteristic of Example

3.4.

0.3 - ^IN
volts \
1.353 1.560

TABLE 3.2 TRANSFER

CHARACTERISTIC OF A
TWO-TRANSISTOR CIRCUIT
vinV VOUTlV t^ouraV
0 4.61 0.3
0.7 4.61 0.3
1.353 1.64 0.3
1.560 0.7 5.0
5.0 0.3 5.0

152 THE BIPOLAR JUNCTION TRANSISTOR

 A point-by-point procedure may be used to determine the overall trans¬
fer characteristic. For uin < 0.7 V, fouTi =4.61 V, and because this is greater
than 1.64 V, uoi]T2 = 0.3 V. For 0.7 < ujn < 1.65 V, uouTi will linearly de¬
crease from 4.61 V to 0.3 V. However, uouTi will remain equal to 0.3 V until
^ouTi falls below 1.64 V. On the basis of the transfer characteristic of stage 1,
uiN = 1.353 V for this condition. The output vouT2 will reach 5 V when
i^ouTi = 0.7 V. This occurs when uin = 1.560 V. These data are summarized
in Table 3.2 and shown in Figure 3.35.

3.3 THE COMMON-EMITTER EQUIVALENT CIRCUIT: SOLVING

TRANSISTOR CIRCUITS
The transfer characteristic, that is, the dependence of an output voltage on an
input voltage of bipolar junction transistor circuits has been discussed. A sin¬
gle transistor can serve as a logic inverter or, if a suitable input offset voltage is
provided, a linear amplifier. Only the most basic of circuits has been considered.
Numerous modifications of a single-transistor circuit may be used to achieve a de¬
sired characteristic. Alternatively, additional transistors may be used to achieve
results not obtainable with a single device. From an analysis and design per¬
spective, a transistor is considerably more difficult to treat than a resistor with
a linear voltage-versus-current relationship. However, a transistor generally re¬
quires a smaller chip area than a resistor when an integrated circuit is fabricated.
As a consequence, circuit configurations that tend to rely primarily on transistors
are preferred for integrated circuits. Fortunately, computer simulation tools are
available that make the design and analysis of circuits with large numbers of
transistors manageable.
A voltage transfer characteristic provides only a partial description of the
behavior of a circuit. A knowledge of the input current and the ability of the
circuit to supply or sink an output current is also of importance. These con¬
siderations are generally perceived in terms of impedance levels (for a static
condition, only resistance quantities are required). Because a transistor is a non¬
linear device, a degree of caution is necessary in applying an impedance con¬
cept. For example, consider the basic common-emitter circuit of Figure 3.22
with the equivalent circuit of Figure 3.23. The current of ujn is zero for uin less
than VBE(on) (an infinite input resistance for this condition). For djn greater than
VBE(on), the input consists of the resistor Rb in series with a voltage of VBE{on)-
The input Thevenin equivalent resistance is thus Rb. From these considerations,
one can conclude that, if the resistance of an input source is small compared
with Rb, it will have only a small effect on the transfer characteristic of the
circuit. On the other hand, a source with a resistance comparable to Rb will
have significant effect on the transfer characteristic. A similar situation exists
for the output of the transistor circuit. The Thevenin equivalent output resis¬
tance of the circuit is Rc, provided the output is not saturated {vce > vc£(sat))*
When saturation occurs, the equivalent output circuit is a constant voltage of
UC£(sat)-

3.3 THE COMMON-EMITTER EQUIVALENT CIRCUIT: SOLVING TRANSISTOR CIRCUITS 153

 base

emitter

actual circuit Theveniri equivalent circuit

Figure 3.36: Common-emitter circuit with an input offset voltage.

Several modifications of the basic common-emitter circuit will be considered

in this section. An understanding of these circuits is necessary to appreciate the
operation of more complex logic and amplifier circuits that will be treated in
the following sections. Concurrently, the circuits will provide opportunities to
increase one’s ability in using the common-emitter equivalent circuit for ana¬
lyzing circuits. Only the static behavior of transistor circuits will be considered;
a treatment of the dynamic effects of charge storage by transistors and circuit
capacitances will be deferred.

AN EXTERNAL BASE BIAS

An external voltage source Vbb is frequently used to shift the transfer char¬
acteristic of a transistor circuit (Figure 3.36). Because pin, Rbi, Rb2, and Vbb
are linear elements, they may be replaced by the Thevenin equivalent circuit in¬
dicated in the figure. This results in the equivalent circuit of Figure 3.37, which
yields the following:

RbiRb2
^Th = Rbi II Rb2 — (3.19)
Rbi + Rb2

Rb2Vin + Rbi Vbb

If < ’^BEion),
Rbi + Rb2
then iB = 0, ic = 0, uqut = Vqc,
{ Rb2Vin + Rbi Vbb
otherwise Ib — ~ VBE(on) / f^Th- (3.20)
V Rbi + Rb2
When the output circuit is not saturated (vce > nc£(sat)), the following is obtained

Figure 3.37: Equivalent circuit of Figure 3.36.

^B2^IN
+ ^B2

^BI^bb
^B1 + ^B2

154 THE BIPOLAR JUNCTION TRANSISTOR

for the output voltage:

l^OUT = VCE = Vcc - PfIB^C

f Rbivi]^ + RbiVbb \ PfRc (3.21)
= ■ [—Rb, + Rs2-j ^
The slope of the characteristic during the transition is readily obtained from
Eq. (3.21) as folloAvs:

Rbi^f Rc
slope = —^fRc/Rbi (3.22)
{Rb\ +

This is the same result as that obtained without a biasing voltage Vbb and a
second resistor Rbi.
The voltage and the resistance Rbi may be used to change the input voltage
over which the output voltage transition occurs. For convenience, let win on be
the input voltage that corresponds to the onset of the transition of the output
voltage (wouT = Tcc). This voltage, win on? is the largest input voltage for which
the inequality of Eq. (3.20) applies.

f^B2t^iNon + Rbi Vbb

Rbi + Rb2 ~ (3.23)
l^INon = (1 + RBl/RB2)VBF(on) “ {Rbi/Rb2)VbB

It is instructive to consider the special case of Rb\ = Rb2-

VlNon = 2wg£(on) — Vbb (3.24)

This results in the transfer characteristics of Figure 3.38 (it has been assumed
that VBF(on) = 0.7 V).
Equal values of Rbi and Rb2 are not necessary. When designing a circuit of this
type, the value of Rbi may be chosen to achieve a desired slope for the output
voltage transition. Both Rb2 and Vbb can then be used to establish the input
voltage at which the transition occurs. Very likely, a circuit voltage source from
some other part of the circuit will be used for Vbb (some characteristics can be
achieved with Vbb = 0).
The equivalent input circuit when the transistor is not conducting is Rbi and
Rb2 in series with Vbb- When the transistor is conducting (ig > 0), the input
is a resistance of Rgi in series with a voltage of VBF(on)- Hence, an input source
with a series-equivalent resistance that is
small compared with Rgi is required if Figure 3.38: Transfer characteristic of the circuit of Fig¬

the transfer characteristic is not to devi¬ ure 3.36.

^OUT
ate appreciably from that predicted with
only Rbi in the circuit. When the transis¬
tor is not saturated (vcf > vcF(sat)), the
output resistance is Rc.

AN EMITTER RESISTOR
Another modification of the common- -1--1-1—
emitter circuit is the circuit of Figure 3.39 -1.4 0 1.4 2.8

3.3 THE COMMON-EMITTER EQUIVALENT CIRCUIT: SOLVING TRANSISTOR CIRCUITS 155

 actual circuit equivalent circuit

Figure 3.39: Common-emitter circuit with an emitter resistor.

with an emitter resistor Re. The addition of this resistor (generally much smaller
than Rc) to the circuit could have a large effect on the circuit’s transfer charac¬
teristic and its input impedance. The voltage across Re depends on the collector
current of the transistor. This voltage, however, is in series with the input source
and therefore affects the base current of the transistor - a mechanism known as
feedback. Feedback of this type is used extensively in electronic circuits.
From the equivalent circuit of Figure 3.39, it may be seen that the current of
Re is (1 -b /df )/b for vce > i^C£(sat)- This results in the following for the base
current:

UlN = IbRb + VBE{on) + (1 + ^F)iBRE for UiN > VBE(on)

■ _ - VBEjon) (3.25)
Rb + (1 + fiF)RE

The output voltage is readily obtained for these conditions by

i^ouT = Vcc — PeibRc

_ y _ Pe (t^IN - VBE(on))Rc
(3.26)
Rb + {1 + ^f)Re
The slope of response depends on Re:

^fRc
slope of uouT = (3.27)
Rb + (1 + Pf)Re
As a result of the emitter resistor, the collector-emitter voltage and the output
voltage are no longer equal.

Vce — t»ouT - (1 + PF)iBRE (3.28)

This expression is valid only for vce > i^C£(sat)- From the expressions for is and
uouT, the following is obtained:

/ ^f(Rc + Re) + Re
VCE — Vcc — (uiN - VbE( on))
V Rb + (1 + ^f) Re
(3.29)
_ Pf{Rc + Re) + Re
slope of Vce -
Rb + {^ + ^f) Re

156 THE BIPOLAR JUNCTION TRANSISTOR

The expression for vce may be used to determine the ^OUT
onset of saturation, the value of djn for which vce =
vcE{ssit)- The response of the circuit, on the basis of the
above results, is indicated in Figure 3.40.
For an input voltage greater than that corresponding
to the onset of saturation, uiNsat, the equivalent circuit of
Figure 3.39 is no longer valid because the collector volt¬
age remains equal to fc£(sat)- This suggests the equivalent
circuit of Figure 3.41. Because this circuit is valid only
for ig > 0, the equivalent base-emitter diode has been Figure 3.40: Transfer characteristic
replaced by a voltage source of VBE(on)- This circuit is of the circuit of Figure 3.39.
valid, provided the collector current that it predicts, /’c? is less than ^Fh-
From the equivalent circuit of Figure 3.41, an expression may be obtained for
uouT when ujn is greater than uiNsat- However, for typical component values that
are used in a circuit of this type, the dependence of uqut on ujn is found to be
very slight. Hence, the approximation that uouT is equal to its value determined
for uiNsat for values of uin greater than uiNsat is generally justified.
The voltage across the emitter resistor of this circuit affects the current that is
supplied by uin- For the transition region of the response, that is, for win > VBE{on)
and Vce > i^C£(sat)5 the following is obtained from Eq. (3.25):

l^IN = fB£(on) 4- -f (1 -h Pf)Re] = VBE(on) + ^B^^q

■Req = Rb + (1 + Pf)Re
The input circuit is thus a battery vgEion) in series with an equivalent resistance
of Rcq. Because ySp for most transistors is large (50 or greater), this equivalent
resistance, for typical values of Re, is much larger than Rg.
A zero value of Rg is acceptable for this circuit; the input source may be
connected directly to the base of the transistor. On the basis of Eq. (3.27), the
following is obtained for the slope of uouT versus uin in the transition region:

slope of uouT ^ ^ for;Sf»l (3.31)

(1 + Pf) ^£ Re
This approximate result is particularly interesting in that it does not depend on
the common-emitter current gain of the transistor Stated in pragmatic terms,
the response of this circuit does not depend on the particular transistor that might
happen to be used. This is an important consideration when designing circuits
because a large variation in ^f gen¬
erally occurs between “like” transis¬ Figure 3.41: Equivalent circuit for the transistor being sat¬
tors (same part number for discrete de¬ urated.
vices; same fabrication procedure for Rb fg
integrated circuits). \w— + +
The behavior of this circuit may be ^CE(sat)
^BE(on) Rr
modified by connecting Re to an emit¬
ter offset potential Vee- Although the
^IN
O h + ic I R,
^OUT +

T E,cc
slope of the resultant characteristic
in the transition region will remain

3.3 THE COMMON-EMITTER EQUIVALENT CIRCUIT: SOLVING TRANSISTOR CIRCUITS 157

 actual circuit equivalent circuit

Figure 3.42: Emitter-follower configuration and equivalent circuit.

unchanged, the input voltage over which the transition occurs will depend on
Vee- As for the circuit with a base voltage Vbb, the voltage Vee may be used in
place of an input offset voltage for an amplifier.

AN EMITTER-FOLLOWER CIRCUIT

The output terminal of the previous circuits has been the collector of the tran¬
sistor. Alternatively, the voltage across the emitter resistor of Figure 3.39 could
also be used for the output - a collector resistor is not necessary for this config¬
uration (Figure 3.42). If the input and output voltages were specified relative to
the positive terminal of Vcc rather than relative to its negative terminal, the col¬
lector of the transistor of this circuit could be considered as the common terminal
(common-collector configuration). This configuration is generally designated an
emitter-follower circuit - a designation that is derived from the tendency of the
output voltage to follow the input voltage.
The procedure for obtaining a solution for this circuit tends to follow that
for a circuit with an emitter and collector resistor. For uin < VBE{on), h = 0 and
I’OUT = 0. For Win > VBE{on), the base current of the transistor is the same as that
given by Eq. (3.25) {vce > vc£(sat)):

— VBE(on)
tB (3.32)
Rb + {1 + ^f)Re
Because the current of Re is Ib + ic, the following is obtained for uour:

N- D - VBE(on))RE
(3.33)
vour = il + M^BRE = ^^^rirT^

^CE

^OUT

Figure 3.43: Transfer characteristic of emitter-

follower circuit of Figure 3.42

158 THE BIPOLAR JUNCTION TRANSISTOR

Figure 3.44: Input and output voltages of an emitter follower
(Rb = 0).

By noting that vqe — Vqc — vout, an expression is readily obtained for vce as
follows: '

Pf (t^iN - VBE{ on ))^£

^CE = Vcc — (3.34)
-Rb + (1 + Pf)Re
The transfer characteristic of this circuit, pqut versus bin, along with the de¬
pendence of VCE on Bin is indicated in Figure 3.43. This solution is valid for
^CE > uc£(sat); and even for Rb — 0, this condition is valid for bin < Vqc-
A particularly simple result is obtained for Rb — 0.

l^OUT

(3.35)
~ Bin - VBE(on) for » 1

For this condition, the output voltage follows the input voltage, that is, it is
always VBE{on) less than the input voltage. This is indicated in Figure 3.44 for a
time-dependent input voltage with an appropriate offset voltage.
Because the slope of bout versus bin is unity, it is reasonable to ask what is
the value of this circuit or what possible use could it serve? The answer lies not
with the voltage transfer characteristic but with the current transfer characteristic
of the circuit. Although the current supplied by bin is is, the current of Re is
(1 -h )iB- If Re is considered as the load resistance of the circuit, the current
of the load is (1 + Pf) times the current supplied by bin- Even though voltage
gain of an emitter-follower is unity or less, its current gain is generally large.
Alternatively, an emitter-follower circuit may be viewed as an active impedance
transformer. The equivalent resistance of the input of the circuit R^q is (l+^p) Re
for Rb = 0. Hence, a source with a much larger resistance can be used with this
circuit than if the source were to be connected directly to the load Re .

EXAMPLE 3.5
Consider the common-emitter transistor circuit of Figure 3.45. With an ap¬
propriate input offset voltage, this circuit could be used as an amplifier. The
slope of the transfer characteristic for the transition region of the circuit is
—Pf Rc/Rb- To increase the magnitude of the slope (that is, to increase the
magnitude of voltage gain), one is tempted to reduce the resistance of the base
resistor Rb. On the basis of the preceding expression for the slope, -oo is
obtained for Rb = 0. This result, however, is not valid because it is premised

3.3 THE COMMON-EMITTER EQUIVALENT CIRCUIT: SOLVING TRANSISTOR CIRCUITS 159

 ySp = 100
Is = 10-1^ A
Figure 3.45: Common-emitter transistor
np = 1.0
circuit of Example 3.5.

on the base-emitter voltage vpE remaining constant and equal to VBE(on)- For
small values of Rb, it is necessary to account for the dependence of the base
current on the base-emitter voltage.

This relationship is extremely temperature sensitive; both Is and Yp depend

on temperature. Although small values of Rb will result in a very abrupt tran¬
sition in fouT, these circuits tend to be impractical because of the temperature
dependence of the response. To show this, consider the circuit of Figure 3.45
along with a circuit in which Rb ~ 0. Determine, using SPICE, the dependence
of four on vin for temperatures of 27 °C (normal default temperature) along
with elevated temperatures of 50 and 100 °C.

SOLUTION If the input voltage uin is swept from 0 to 5 V, a zero value for
Rb would result in inordinate base currents. Therefore, to limit the current

Figure 3.46: SPICE circuit and file for Example 3.5.

Common-Emitter Transistor VIN 1 0

RB 1 2 lOOK
Q1 3 2 0 QNPN
RCl 4 3 4.7K
VCC 4 0 5
RB2 1 5 10
Q2 6 5 0 QNPN
RC2 4 6 4.7K
.MODEL QNPN NPN IS=1E-15 NF=1 BF=100
.DC VIN 0 5 .01
.TEMP 27 50 100
.PROBE
.END

160 THE BIPOLAR JUNCTION TRANSISTOR

 Common-Emitter T ransistor
Temperature: 27.0,50.0,100.0

Figure 3.47: SPICE solution for Example

3.5. Eor each value of Rg, the traces, from
left to right correspond to temperatures of
100, 50, and 27 °C.

. . .V(3). , .V{6)
VIN

without an appreciable effect on the results, a value oi Rb = 10 ^2 will be used

for the “zero” solution (Figure 3.46). The result of the simulation is indicated
in Figure 3.47. Consider the case for Rb — 100 kf2. An offset voltage of 1.23 V
results in four = 2.5 V for a temperature of 27 °C. At a temperature of 50 °C,
^^OUT = 2.33 V, and at a temperature of 100 °C, wour = 1-96 V for this offset
voltage. These small changes in uouT would be, for most applications, accept¬
able. This is not the case for Rb = 10 ^2. For a temperature of 27 °C, an input
offset voltage of 0.698 V results in four = 2.5 V. At the elevated temperatures,
the offset voltage of 0.698 V results in uout ~ 0 V. Only a slight increase in
temperature {T — 40 °C) results in a saturation of the circuit r>ouT ^ 0. To
utilize the steep transition obtained for Rb ^ 0 for amplification, a different,
more sophisticated offset biasing scheme is required.

EXAMPLE 3.6
In the transistor amplifier circuit of Figure 3.48, an emitter voltage source Vee
is used in place of an input offset voltage. Assume Vs(t) is a sinusoidal signal
(Vi,jsincL)7) with a peak-to-peak amplitude of 1.0 V.
a. Determine the value of Vee required to obtain an output voltage of 5 V
for Vs{t) = 0.
b. Determine the maximum and minimum values of uout(^)- Sketch the re¬
sultant voltage.
c. The rationale for an emitter resistor is that the dependence of the voltages
and currents on is reduced. Use the value of Vee determined in part (a)
and repeat part (b) for a transistor with = 100.

SOLUTION The equivalent circuit of Figure 3.49 applies for an emitter offset
voltage of Vee ih > 0). The following is obtained for this circuit:

Vs(t) = IbRb + VBE(on) + (1 + PF)iB'^E + Vee

3.3 THE COMMON-EMITTER EQUIVALENT CIRCUIT: SOLVING TRANSISTOR CIRCUITS 161

 ycc = 'lOV

PF 200 Figure 3.48: Common-emitter tran-

j \T sistor amplifier with an emitter offset
VBE(on) voltage.

Vs{t) - Vee - VBE{on)

Rb + {1+Pf)Re
Four = Vcc — ^cRc = VcC — PEtB^C
a. A quiescent value of uqut = 5 V requires a collector current of 0.5 mA.
Because /’b = icIPf, a quiescent base current of 2.5 /zA is required.

Vee = —'VBE(on) — h[RB + (1 + ^f)Re] = —1.58 V

b. Because the peak-to-peak value of Vs(t) is 1.0 V, ¥^ = 0.5 V. Hence, for

Vs(t) — 0.5 V,iB — 3.93 jxA, fc = 0.785 mA, and bout = 2.15 V. For Vs{t) =
—0.5 V, fB = l-08 fiA, /c = 0.216 mA, and bout = 7.84 V. It should be
noted that Eq. (3.27) yields a slope of —5.69, a result that may be shown to
be independent of Vee- The calculated values of bout for Vs{t) = ±0.5 V
yield a peak-to-peak amplitude of 5.69 V, which is precisely that expected
for a slope of —5.69 (Figure 3.50(a)).
c. Current-gain /Se = 100. For B5(r)==0, /b = 4.37 /xA, ic — 437 mA, and

Figure 3.50: Output voltage of Example 3.6.

162 THE BIPOLAR JUNCTION TRANSISTOR

 i’out = 5.63 V (a shift of 0.63 V in the quiescent value of woui)- For
Vs{t) = 0.5 V, = 6.85 /xA, ic = 6.85 mA, and uout = 3.15 V. For Vs(t) =
—0.5 V, tB = 1.89 /xA, ic = 0.189 mA, and uqut = 8.11 V (Figure 3.50(b)).

EXAMPLE 3.7
The circuit of Figure 3.51 with an LED is used to indicate when the input
voltage uiN exceeds a prescribed value. Because the equivalent series resistance
of the input voltage source^ jRin is very large (1 MQ), a two-transistor circuit is
required. Transistor Qi is used in an emitter-follower configuration, whereas
Q2 is used in a common-emitter configuration. The transistors have identical
parameters.
a. Determine the dependence of ici on vjn (0 < i>in < 5 V).
b. The LED requires a current of 1.0 mA to produce a noticeable light emis¬
sion. What is the value of ujn required to achieve this diode current?
c. Suppose Qi is omitted from the circuit, that is, Rin is connected directly
to the base of Qi* What is the value of uin required for a noticeable light
emission (io =1.0 mA)?

SOLUTION
a. Both Qi and Q2 will be replaced by their equivalent circuits (Figure 3.52).
For UIN < 2vBE{on), hi = 0, hi = 0, and ici — 0. An input volt¬
age, uiN, greater than 2vBE{on) is required for nonzero transistor currents.
For uiN > 2vBE(on) and with neither transistor saturated, the following is

Figure 3.51: Circuit of Example 3.7 with an LED.

Ecc = 5V

^ LED
/ Pe 100
VBE(on) 0.7 V
^C2
180 D VCE(sat) 0.3 V

Q2 VD{on) 2.0 V

Figure 3.52: Equivalent circuit for Example 3.7.

3.3 THE COMMON-EMITTER EQUIVALENT CIRCUIT: SOLVING TRANSISTOR CIRCUITS 163

 - *C2
15.0 : - saturation

Figure 3.53: The dependence of diode current on vjn for Ex¬

mA
ample 3.7.

0 .
1.4 2.89

volts

obtained:

flN = +2i;B£(on)> = (^IN ” 2BB£(on))/^IN

hi = (1 + ^F)hl
ici = /Sf(l + /3£)/bi = )(fIN “ 2BB£(on))/^IN
= 10.1 (bin — 1.4) mA
From the collector current of Qi, fc2? hs collector-emitter voltage can be
determined (bd = FD(on) for the LED).

VcC = FD{on) + iciRci + VCE2

vcE2 — 3.0 — 1.818 (bjn — 1-4 V) V

This expression is valid if vce2 > vcE{s^t) = 0-3 V. A value of bin = 2.89 V
(or greater) results in a saturation of Qi- The collector current of Q2 is
15.0 mA when the transistor is saturated (Figure 3.53). It should be noted
that the collector-emitter voltage of the emitter-follower transistor Qi re¬
mains equal to Vcc “ VBE(on) = 4.3 V regardless of ic\ {ici > 0)-
b. For ic2 = 1.0 mA, bin = 1-50 V.
c. With Rin connected directly to the base of Q2, the following is obtained
for Bin > VBE{on)-

Id = ic2 = fB2 = Pf (r^IN - FB£(on))/^^N

= 0.1 (bin-0.7 V) mA

To obtain a noticeable light emission, an input voltage of 10.7 V is required.

3.4 DIGITAL LOGIC CIRCUITS: STATIC AND DYNAMIC CHARACTERISTICS

The earliest integrated-circuit digital logic gates utilized bipolar junction transis¬
tors in circuits that were modifications of the basic common-emitter configura¬
tion that has previously been considered. These circuits evolved into standardized
integrated circuits containing several transistors and resistors that performed nu¬
merous logic functions. An advanced family of integrated circuits introduced in
the 1960s, the transistor-transistor-logic (TTL) family, is not only still widely
used, but its terminal characteristics have dictated the design of more advanced

164 THE BIPOLAR JUNCTION TRANSISTOR

gates (TTL compatibility). The earliest IBM personal computer (1981) was de¬
signed to use off-the-shelf standardized TTL integrated circuits and other compo¬
nents (Cringely 1993). Through the development of very-large-scale integrated
circuits using metal-oxide field-effect transistors (MOSFETs), the logic functions
of arrays of TTL gates were achieved with a single integrated circuit. A modern
personal computer using these large-scale integrated circuits appears “empty”
compared with the earliest personal computers that were literally packed full of
integrated circuits.
Two basic considerations must be taken into account when designing logic
circuits. One is the circuit’s static transfer characteristic, and the other is the
dynamic behavior of the circuit. Achieving a desired static voltage (or current)
transfer characteristic is usually not difficult. The challenge is obtaining the short
response time required by modern systems. This is generally referred to as the
“speed” of a gate, which is the rate at which a gate will respond to a set of
changing input signals.
There is an old addage, “haste makes waste,” which is closely related to the
thermodynamic concept of reversibility. The “waste” of an electronic circuit is
the electrical energy dissipated by the components and devices of the circuit.
To increase the rate at which a particular circuit will operate, it is generally
necessary to modify circuit components and devices, that is, decrease resistances
and increase the currents of devices. This increases the electrical energy dissipated
by the circuit. Electrical energy is converted to thermal energy, which is removed
from the integrated circuit by conduction, thus increasing the temperature of the
components and devices. Because the characteristics of semiconductors depend
on temperature, an upper operating temperature limit restricts the rate at which
electrical energy (power) can be dissipated.
Both capacitive and inductive effects influence the dynamic behavior of cir¬
cuits. For most logic circuits, however, it is capacitive effects, that is, charge stor¬
age, that is the main factor. Capacitances are unavoidable and, although they can
be reduced with improved designs, they can never be reduced to zero. It should be
noted that charge storage, for example, by an ideal capacitor, is not dissipative in
that electrical energy is conserved. However, to change the voltage of a capacitor,
its stored charge must be changed (v — Q/C). This requires a current (/ = ^),
and the faster the voltage is changed, the larger the current that is required. Larger
currents necessarily increase the electrical power dissipated by a circuit. It is also
desirable to minimize the difference in the voltages corresponding to high and
low logic levels. Voltage differences smaller than the standard “O-to-5 V” TTL
voltage change are therefore used for very rapidly responding circuits.

TRANSISTOR OPERATING REGIONS

Three distinct regions of operation, namely, cutoff, active, and saturation, can
be identified for the basic transistor circuit of Figure 3.54. Cutoff is the region
for which the device currents are zero. This occurs for negative values of base-
emitter voltage as well as for positive values (forward bias) that are insufficient
to result in a significant junction current. For silicon devices, this is usually the
case for base-emitter voltages that are less than approximately 0.5 V. In the

3.4 DIGITAL LOGIC CIRCUITS: STATIC AND DYNAMIC CHARACTERISTICS 165

 ^OUT
^cc

Figure 3.54: Regions of operation for a basic common-emitter transistor con¬

figuration.

TABLE 3.3 BIPOLAR JUNCTION TRANSISTOR - REGIONS OF OPERATION

Base-emitter Base-collector
junction junction
Region Currents and voltages bias bias
a
o'

O
.

Cutoff Reverse
II

II

Active ic = VCE > l^C£(sat) Forward Reverse

Saturated ic < fipiB, VCE = fC£(sat) Forward Forward

“Reverse or insufficient forward bias for significant curent.

^or modified by Early effect.

active region, the base current controls the collector current, that is, ic ^ Ppis-
The base-emitter junction is forward biased, whereas the base-collector junction
is reverse biased. This is the region of operation in which amplification can be
obtained. Finally, there is the saturated region in which the collector voltage
remains very small, vcE{sat), regardless of the base current {ic < fiph)- Both
junctions of the transistor are forward biased for these conditions. The regions
of operation are summarized in Table 3.3.
For saturated transistor logic circuits (these include TTL integrated circuits),
the cutoff and saturation regions correspond to static logic levels. It is, however,
necessary for the device to make a transition through its active region when
changing its logic levels. It is the change from one region to another, as well as
the transition through the active region, that limits the rate at which logic levels
of a circuit can be changed.

CAPACITIVE LOAD

The behavior of the circuit of Figure 3.55 with an output load capacitance
Cl will be determined for abrupt changes in the input voltage. The load capac¬
itance includes the capacitance to which the circuit is connected (e.g., a data
bus). It also includes the equivalent capacitances of the devices along with the
parasitic capacitance of the leads and devices to the substrate of an integrated
circuits. To determine the dynamic behavior of this circuit fully, other capaci¬
tances, voltage-dependent capacitances of the transistor, need to be taken into
account. In addition, the charge carriers of the transistor result in a charge storage

166 THE BIPOLAR JUNCTION TRANSISTOR

Figure 3.55: A basic common-emitter circuit with a
capacitive load.

within the device that must also be accounted for. To include all these effects, it is
generally necessary to use a computer simulation to obtain an accurate dynamic
result, albeit reasonable estimates can be obtained with a “charge-controlled”
transistor model and a judicious set of analytic approximations.
Despite the foregoing considerations, it is of value to consider the elementary
circuit of Figure 3.55 with a single capacitor. For some circuits, the charge storage
of a single capacitor may be the dominant effect; other charge storage effects may
have a negligible impact on the results. Although the effects of multiple charge
storage elements cannot be obtained by considering these elements individually,
useful insights can be gained through such a process.
Two different input voltages will be considered, one with a high-to-low tran¬
sition, and the other with a low-to-high transition. Assume that vi^{t) has been
equal to Vp for a very long time and that it is suddenly switched to zero at ^ = 0.

fin(0 = Vp(l-t/(0) (3.36)

If Vp < VBE{on), then the transistor will remain cut off and uouT= Vcc for all
times. The interesting case is for Vp > VBE(on)-, which results in the following for
the initial base current {t < 0):

tB — {Vp — VBE(on))/RB t < 0 (3.37)

If < Vcc — Fc£(sat)? then the transistor is in its active region of operation
as given by

vom - vcE = Vcc - ^fIbRc active, f < 0 (3.38)

On the other hand, if the base current is sufficiently large, the transistor will be
saturated, ^eibRc > Vcc — i’C£(sat)-

Four = Fc£(sat) Saturated, ^ < 0 (3.39)

Because it is this case that is generally of interest, this condition will be assumed
for the solution that follows.
For ^ > 0, the base current is reduced to zero, resulting in a cutoff condition
for the transistor, ic — 0. The equivalent circuit of Figure 3.56, in which Rq
charges the load capacitor applies.

dvom
(Vcc — bo\jt)/Rc = C£
dt
(3.40)
dvQiTT Four _ Vcc f ^ Q
dt RcCl RcCl

3.4 DIGITAL LOGIC CIRCUITS: STATIC AND DYNAMIC CHARACTERISTICS 167

 Figure 3.56: Equivalent circuit for charg¬
ing of a load capacitor.

A solution for vom(t) having an arbitrary constant of integration A is obtained

for a solution of the differential equation

i^out(^) = -f Vcc ^ > 0. (3.41)

As a result of the capacitor, the output voltage will not change abruptly at ^ = 0.
Hence, A must be such that uout(O) = vc£(sat)-

A = UC£(sat) - Vcc

Vom(t) = Vcc — (Vcc — t > 0

When t is equal to the time constant of the circuit RcCl, the exponential is equal
to 0.37 (e~^), that is, the output voltage has changed 63 percent of its way toward
reaching Vcc (Figure 3.56).
The solution for an upward transition of uinI^) is somewhat more complex.
It will be assumed that uin(^) = 0 for t < 0, resulting in a cutoff condition for
the transistor {ic = 0). At ? = 0, the input voltage is suddenly increased to Vp,
resulting in a base and collector for the transistor {Vp > VBE{on)) as follows:

vin(?) = Vpu{t)

is = (Vp — VBE(on))/RB (3.43)

ic = = Pf{Vp- VBE{on))/RB t>0

The initial value of vce (— i^out) is Vcc- Because this voltage will not change
abruptly (owing to Ci), the transistor immediately following the change in in¬
put voltage will be in its active mode of operation. The equivalent circuit of
Figure 3.57 is therefore valid as long as wour > uc£(sat)-
On the basis of the circuit of Figure 3.57, the following is obtained for the
time-dependent behavior of uoux:

{Vcc-vom)/Rc = CL—^^ + ^piB t>0 (3.44)

For many circuits, ^piB is very much larger than the left-hand side of Eq. (3.44). If

168 THE BIPOLAR JUNCTION TRANSISTOR

 Figure 3.57: Transistor equivalent circuit for dqut > i^C£(sat)-

^IN

slope - -/ipiVjj - t^BE(on))/^BCL

t ^CE(sat)

“^sat
Figure 3.58: Input and output voltage for a downward transition of vouT-

this is the case, a rather simple result is obtained for uouT (Figure 3.58) as follows:
dvouT . „ /
= —^FtBlCi, = -{Vp - VBE(on))^F/RBCL

Vomit) = Vcc - {Vp - VBE(on))fiFt/RBCL t>0 ^ ^

This solution is valid until four falls to i'cE(sat)- The time required for this to
occur, 4at5 is readily obtained by

(Vp — VBE(on))^Ftsat/RbCl = Vcc “ ^CElsat)

(3.46)
(Vcc - VcE(sat)) RbCe
4at —
(Vp — VbE( on ))Pf

This time will generally be considerably less than RqCi, the time constant asso¬
ciated with an upward transition of four-
The response of this circuit for pulsed input voltage is given in Figure 3.59. It
will be noted that the pulse length tp needs to be larger than 4at for saturation
to occur. Otherwise, the minimum value of four will be greater than i^c£(sat)-
The time constant for the upward transition is equal to RcCl. Therefore, a time

Figure 3.59: Response of the circuit of Figure 3.55 for an input pulse {tp > 4at)-

3.4 DIGITAL LOGIC CIRCUITS: STATIC AND DYNAMIC CHARACTERISTICS 169

 interval of three (or more) times RcCl is required for uouT to reach approxi¬
mately Vcc-
Both the time constant associated with the upward transition of uouT, RcCl,
and the time required for a downward transition of uouT? 4at) ate linearly depen¬
dent on the load capacitance Cl- Hence, to the extent that Ci can be reduced,
the response times of the gate can be reduced. It is often the case that Ci is due
primarily to an external load over which one has little control. To decrease the
upward response time of woux? it is then necessary to reduce the collector resistor
Re- Similarly, ^at, can be reduced by decreasing the base resistor Rb-
For a given set of voltage levels, the response times of the circuit are directly
proportional to Rb and Rc- Reducing both these quantities by 50 percent, for
example, reduces the response times by 50 percent. Reducing the resistance val¬
ues, however, increases the currents of a circuit (a doubling in currents for a
50-percent reduction in resistances). Consider the static collector current of the
basic current of Figure 3.54:

(Vcc - ^CE{sat))/Rc ^ Vcc/Rc for UOUT = l^C£(sat)

h— (3.47)
0 for i>ouT = Vcc

For a low-output voltage, the power supplied by Vcc is approximately Vqq/Rc,

whereas for a high output voltage it is zero (assuming no load current). If, on the
average, the output of the logic circuit is high as often as it is low, the average
power supplied by Vcc is the average of the values for a high-and low-output
voltage.

f’cc(av) = Vcc/2'f^C (3.48)

Therefore, if Rc is reduced to decrease transition times, the average power sup¬

plied by Vcc is increased. The price “paid” to achieve a more rapid response is
an increased average power that must be dissipated by the gate circuit.
To perform basic combinational logic functions, the common-emitter transis¬
tor circuit could be used in conjunction with the diode logic circuits discussed in
Sections 1.7 and 2.6. Alternatively, transistor circuits can be directly used to
perform combinational logic functions.

LOGIC FAMILIES

Three early families of transistor logic circuits are indicated in Figure 3.60
(Garret 1970; Glaser and Subak-Sharpe 1977; Gray, and Searle 1966; Gray and
Searle 1969; Harris, Gray, and Searle 1966; Haznedar 1991; Hodges and Jack-
son 1988; Millman and Taub 1965; Taub and Schilling 1977). If one input of the
resistor-transistor circuit is zero, that is, ub = 0, the resultant circuit is essentially
that of Figure 3.36 with Vbb = 0. As a result of the voltage divider found by the
two base resistors, an input voltage of 2vBE{on) is required to turn the transistor
on. For a properly designed circuit, the transistor will be saturated for an input
voltage that is less than Vcc- Therefore, if db = VcC) the transistor will be satu¬
rated regardless of the value of va (va > 0). The condition of saturation occurs
if either (or both) input(s) is(are) high, that is, it corresponds to the logic OR
operation on the two inputs. Because saturation results in a low output voltage.

170 THE BIPOLAR JUNCTION TRANSISTOR

 v,cc
^OUT

(a) resistor-transistor logic NOR gate

“ ^BE(on)

(b) direct-coupled transistor logic NOR gate

^cc

(c) diode-transistor logic NAND gate

Figure 3.60: Early bipolar-junction-transistor logic gates.

the gate performs the logical NOR operation (positive logic). Additional base
resistors may be used for more inputs; this increases the input voltage required
for a single input (for n inputs, it may be shown to be nvBE(on))- A base biasing
resistor and a negative biasing supply can be used to reduce this potential.
An alternative logic NOR gate configuration is the direct-coupled transistor
gate in which each input is connected to a separate transistor (Figure 3.60(b)).
As for the previous circuit, component values are chosen such that a transistor is
saturated if its input is high. A transistor with a low input, however, is cut off, that
is, its collector current is zero. If one or both transistors are satured, the output
of the circuit uouT is low. Additional transistors may be used for more inputs.
Logic gates are generally designed to function as a family, that is, the output of a
gate must serve as the input of one or more other gates of that family. For the gates

3.4 DIGITAL LOGIC CIRCUITS: STATIC AND DYNAMIC CHARACTERISTICS 171

 cc Vqq considered, the equivalent output circuit
for a high output has a Thevenin equiv¬
Rr Rr alent resistance of Rc- A low output is

+
a voltage of fc£(sat) as long as the collec¬
+
tor current of the transistor is less than
^OUT ^CE(sat) ^OUT
(Figure 3.61). The circuits of Fig¬
ures 3.60(a) and 3.60(b) result in an input
current for a high input signal. The gate
(a) high output (b) low output
providing the input signal must therefore
Figure 3.61: Equivalent output circuits of a transistor supply the input currents of the gates to
logic gate.
which it is connected. Because these cur¬
rents must be supplied by the circuit of
Figure 3.61(a) with the series resistance of Rq, the currents will be less than for
an input voltage of Vcc- This sets a limit to the number of gates that can be
connected to the output of a gate. Furthermore, a reduced base current tends to
result in a slower response of the circuit.
The output characteristics of the resistor-transistor and direct-coupled tran¬
sistor logic gates are ill-matched to provide the input current that these gates
require. When the transistor’s output is high, it is least able to supply the base
currents of the gates to which it is connected. On the other hand, when a transis¬
tor is saturated, it can readily sink additional current. The diode-transistor-logic
gate of Figure 3.60(c) provides a much better match between the output char¬
acteristic of the gate and its input current requirement. The two inputs, their
diodes, and Rb connected to Vcc will be recognized as a diode logic AND gate.
Because the common-emitter transistor behaves as an inverter, a logic NAND
operation would be expected for the gate.
To gain an understanding of the operation of the gate, consider the case for
which both inputs are floating, that is, the currents of the input diodes and
Db are zero. The other two diodes Dq and Du will be conducting, resulting in
the following for the base current of the transistor:

Fee = IbRe + 2vD{on) + t^BE(on)

— (Fee 2v£)(on) VBE{on)^/Rb ^ ^

The circuit is designed such that ig is sufficiently large to saturate the transistor,
resulting in vouT == vcE(sat)- For vu{on) = EB£{on) = 0.7 V, the voltage at the junc¬
tion of the diodes vj will be equal to 2.1 V. Hence, if va and ug are greater than
2.1 V, the input diodes will be reverse biased, and the same solution is obtained.
Therefore, if both inputs are high, or floating, the output of the gate is low.
Consider the case for which va = 0 and the other input vb is high. This results
in a current through Da and a voltage of vu(on) for the junction voltage vj.
This voltage, approximately 0.7 V, is, because of the series diodes Dq and Du,
insufficient to result in a significant base current of the transistor. Hence, the
transistor is cut off for this condition, and its output is high (uqut = Fee). The
corresponding current of the input iA is readily determined:

Fee = -iARB + Vu(on)

iA = -{Vcc - VD{on))/RB (3.50)

172 THE BIPOLAR JUNCTION TRANSISTOR

The current is negative, that is, it is out of the input terminal. A gate serving as
the input must therefore be capable of sinking this current when its output is low,
which is a condition that coincides with the capability of a saturated transistor.
As indicated in Figure 3.60(c), an abrupt transition of the output voltage occurs
for an input voltage of about 1.4 V. If either or both inputs are low, the output of
the gate is high. Only if both inputs are high is the output low - the logic NAND
function. A floating input results in the same behavior as a high logic input.

TRANSISTOR-TRANSISTOR LQGIC
The transistor-transistor logic circuit is a major improvement over the diode-
transistor logic circuit. This circuit, developed by J. L. Buie in 1961 (Buie 1966),
is the basis of the widely used TTL integrated circuit logic gates (Elmasry 1983,
1985). A switching limitation of bipolar junction transistors arises from the
charge storage within the device associated with its charge carriers. To mini¬
mize switching delays, in particular those associated with leaving the saturated
region, external circuits that can rapidly remove stored charges are necessary.
The transistors of a TTL circuit, in effect, work together to achieve this.
The basic two-input logic NAND gate circuit indicated in Figure 3.62(a) is
similar to the diode-transistor circuit. The input protective diodes, for normal

Figure 3.62: Transistor-transistor two-input logic NAND gates. Approximate

resistance values are given for the standard 7400 series gates.

Fcc = 5V

Fee - 5 V

3.4 DIGITAL LOGIC CIRCUITS: STATIC AND DYNAMIC CHARACTERISTICS 173

 operation in which the input voltages are zero or greater, are reverse biased and
thus do not affect the behavior of the circuit. The input transistor Q\ has two
emitters that share a common base and collector. For static conditions, the base-
emitter and base-collector junction diodes tend to behave as diodes Da, Db, and
Dc of the diode-transistor circuit of Figure 3.60. The advantage of the transistor
circuit over the diode circuit is that it responds much faster. Transistor Qz will be
recognized as forming an emitter-follower circuit. When this transistor is active,
or saturated, its base-emitter voltage VBE(on) is essentially the same as the voltage
across diode Dd of the diode-transistor circuit when it is conducting. As a result
of the current gain of Qz, the base current of Q3 is much larger than if the circuit
had only a diode. This circuit has nearly the same transfer characteristic as the
diode-transistor circuit.
A further enhancement of the TTL circuit is the totem-pole output circuit
of Figure 3.62(b). When both inputs of the gate are high, the current through
the base-collector junction of Qi (the base current of Qz) is sufficient to satu¬
rate Qz. This, in turn, results in a base current that saturates Q3. Because the
collector-emitter voltage of Qz is small, fcEisat), the base-emitter voltage of Q4
is insufficient for it to conduct, that is, the currents of Q4 are essentially zero.
Hence, the equivalent output circuit is simply the saturated transistor Q3.
A high-output state occurs if either input is low. For this condition, the base cur¬
rent of Qz is zero - it is cut off. The output transistor Q3 is also cut off. This results
in an equivalent output circuit that consists of Vcc, Rci, Rc4, Qa, and D. This cir¬
cuit has a much lower equivalent resistance than a circuit with a collector resistor.
However, to determine the behavior of this circuit, two regions of operation for
Q4 must be considered; Q4 may be either in its active or in its saturated region.
The transfer characteristics of the two TTL circuits are indicated in Figure 3.63.
As a result of the totem-pole output circuit, the high output voltage of this gate
is only 3.6 to 3.8 V. Furthermore, when the input voltage reaches approximately
0-7 V, Qz starts to conduct, that is, its collector voltage decreases. As a result
of Q4, which functions as an emitter-follower, an initial small downward slope
of the characteristic results (the telltale mark of a TTL gate). When the input
voltage reaches approximately 1.4 V, the output transistor is turned on, and an
abrupt output voltage transition occurs.

Figure 3.63: Transfer characteristics of transistor-transistor logic

circuits.

^OUT ^OUT
Vb = 0
5 :

cc

0
volts 0 5

(a) open-collector output circuit (b) totem-pole output circuit

174 THE BIPOLAR JUNCTION TRANSISTOR

 Integrated logic circuits with numerous modifications of the basic TTL circuit
are common. Both low- and a high-power versions of the circuit are available. A
version with Schottky-type transistors, in which saturation does not occur, results
in very short response times. Standard integrated circuits with up to 100 or more
transistors that perform numerous logic functions are available (Lancaster 1974;
Morris and Miller 1971; Texas Instruments 1976).

EXAMPLE 3.8
The common-emitter logic inverter gate of Figure 3.64 has a load capacitance
of 50 pF. Assume that a step function with a peak voltage of 5 V is used for
the input of the gate.
a. Determine 4at for the downward transition of the output voltage.
b. What are the times constant associated with an upward transition of the
output voltage?
c. What is the time required for the transitions of the output voltage to reach
their midvoltage value, that is, (Vcc + fCE(sat))/2?

SOLUTION It is necessary to determine if the transistor is saturated for uin = 5 V.

h = (l^IN — VBE{on))/I^B = 0.43 mA

If ic were equal to ydf/b, 21.5 mA, the collector-emitter voltage would be
— 16.5 V. This is not the case; the transistor is obviously saturated and vouT =
i^C£(sat) = 0.2 V. The collector current is a current considerably less than
(Vcc — vcE{s^t))/Rc = 4.8 mA.
a. The downward transition time fsat is given by Eq. (3.46).
(Vcc - yCE(sat)) RbCl
4at — 11.2 ns
(Vp - VBE{on))^F

b. The time constant for an upward transition is RcCl, 50 ns.

c. The midpoint for the downward transition occurs at 4at/2, 5.6 ns. The fol¬
lowing is obtained for the upward transition of the output voltage
(Eq. (3.42)):

VOUt(^) = Vcc - (Vcc -

g-«mid/RcCL _ Q 5^ = 34.7 ns

Figure 3.64: Logic inverter gate of Example 3.8.

Vcc - 5 V

ySf = 50
BBE(on) — 0.7 V
ECE(sat) = 0.2 V

3.4 DIGITAL LOGIC CIRCUITS: STATIC AND DYNAMIC CHARACTERISTICS 175

 EXAMPLE 3.9
The dynamic performance of an inverter gate is usually determined using an
input voltage with the same time-dependent waveform as the output voltage
of the gate. To achieve this, several gates can be connected in cascade, as
indicated in Figure 3.65. The last gate (Gate 5) is the output load of the gate
being tested (Gate 4). Assume that the circuit of Figure 3.64 applies for each
of the gates. A SPICE simulation is desired for this circuit {Is = 10“^^ A,
np — 1.0). Use an input voltage pulse with a peak amplitude of 5 V and a
duration of 200 ns. Except for a time displacement, the waveforms of the input
and output voltages of Gate 4 should be nearly identical.
a. Determine the output voltages of the first four gates and verify the previous
statement.
b. Eor Gate 4, determine the 10- to 90-percent transition times for the upward
and downward transitions of its output voltage.

Figure 3.65: Cascade inverter gates of Example 3.9.

gate being load

tested

Figure 3.66: Circuit and SPICE file for Example 3.9.

12 12 12 12 12

Inverter Gates RB4 7 8 lOK

VIN 1 0 PULSE(0 5 0 IN IN 200N) Q4 9 8 0 QNPN
RBI 1 2 lOK RC4 12 9 IK
Q1 3 2 0 QNPN CL4 9 0 BOP
RCl 12 3 IK RB 9 10 lOK
CLl 3 0 BOP QB 11 10 0 QNPN
RB2 3 4 lOK RGB 12 11 IK
02 5 4 0 QNPN CLB 11 0 BOP
RC2 12 5 IK VCC 12 0 DC B
CL2 5 0 BOP .MODEL QNPN NPN IS=1E-1B NF=1
RB3 B 6 lOK .TRAN IN 400N
Q3 7 6 0 QNPN .PROBE
RC3 12 7 IK .END
CL3 7 0 BOP

176 THE BIPOLAR JUNCTION TRANSISTOR

 Inverter Gates
Temperature: 27.0

Figure 3.67: SPICE solution for Example

3.9.

.V(1).V(3).V(5)-V(7).V(9)
Time

c. Determine the propagation delay times of Gate 4. These times, the delay in
the gate’s output voltage response to an input voltage change, are measured
between the midvoltage point of the input and the midvoltage point of the
output.

SOLUTION The circuit and SPICE file of Figure 3.66 will be used.
a. The PROBE response of Figure 3.67 was obtained for the circuit. Except for
the time difference, the voltage V(9) is essentially the same as V(7).
b. The maximum output voltage is 4.48 V, and the minimum is 73 mV (satura¬
tion). The 10- and 90-percent points are thus 0.52 and 4.11 V. An upward
transition time of 95 ns and a downward time of 19 ns are obtained.
c. For a downward transition of the output voltage, the propagation delay
time is 41 ns. A time of —10.7 ns is obtained for the upward transition.
This does not mean that the change in the output occurs before an input
(a “predictive” circuit). As expected, the output voltage of Stage 4, V(9),
does not begin to change until after the input begins to change.

3.5 AMPLIFIER CIRCUITS: SMALL-SIGNAL BEHAVIOR

It is often necessary to increase the voltage or current levels of a signal, or both.
A common example is the amplification of the low-level audio signal produced
by a microphone or radio detector in which the signal may have a power level
of only a few microwatts (or less) and needs to be amplified to a power level of a
few watts (or more) to drive a loudspeaker. This requires active devices (such as
bipolar junction transistors) that are powered by an external power supply (Vcc)-
Although amplification is most frequently thought of in terms of analog signals,
it is frequently necessary to amplify digital signals. For example, a “receiver”
at the end of a digital transmission line is used to amplify and restore the logic
levels of the low-level digital signal. Another example is the amplification of the
low-level signal produced by a photodetector of a fiber-optic system.

3.5 AMPLIFIER CIRCUITS: SMALL-SIGNAL BEHAVIOR 177

 ANALOG SIGNALS
Signals may generally be classified into two categories. One type, an alternating
current (ac) signal, has a zero average value.

lim — / Vs{t)dt = 0 ac signal (3.51)

T Jo
T-»-oo

Signals of this type, for example an audio signal, are generally such that the
integral term of Eq. (3.51) tends to be very small for relatively small values of T
(a dc voltmeter would read zero). The other type of signal has a direct current
(dc) component, that is, it does not have a zero average value. The output voltage
of a TTL logic gate, for example, has an average value that falls between its low-
and high-level output voltages - midway between these levels if the output is low
as frequently as it is high.
It is generally easier to amplify ac signals faithfully than signals with a dc com¬
ponent. As a result, most communications systems are designed to process and
transmit ac signals. Although many analog signals fall naturally into this category,
other signals can be transformed into an ac signal. The standard serial commu¬
nications port of a computer, for example, uses binary levels of approximately
— 10 and +10 V, which result, if the binary levels occur with equal frequency,
in an output voltage with a zero average value. Alternatively, a special encoding
might be used for digital signals. For example, a logic 0 might be transmitted by
a zero voltage and a logic 1 by either a positive or negative pulse, the polarity
alternating from pulse to pulse (bipolar signaling). This signal has a zero average
value regardless of the relative frequency of Os and Is. Alternatively, a split-phase
pulse can be used in which the pulse signal has a zero average value (Figure 3.68).
A practical advantage of an amplifier of ac signals is that capacitors can be
used to couple an ac signal from one node of the circuit to another node. To
illustrate this, consider a signal that is composed of two components, an average
value and a signal component without an average value, that is, an ac signal.

vs{t) Vs + Vs{t) (3.52)

physical quantity average value ac component

The notation of Eq. (3.52) is important. A lowercase symbol with an uppercase

subscript is used for the physical quantity, which is the notation that has generally
been used for currents and voltages up to this point. An uppercase symbol and
subscript are used for the average value, and a lowercase symbol and subscript
are used for the ac component. This is the generally accepted notation used for
electronic circuits. The term ac component^ however, is not quite correct because
ac is an abbreviation for alternat-
Figure 3.68: Split-phase pulses with a zero average value. ing current, a current that is pe¬
UpiO ^p(0 riodically reversed in time (it also
V„ logic 0 tends to carry a sinusoidal con¬
logic 1
notation). Although the polarity
of communications signals is fre¬
quently reversed, these signals are
-V„ -V..
generally not periodic. A periodic

178 THE BIPOLAR JUNCTION TRANSISTOR

signal conveys little information — seeing one period is equivalent to seeing all
periods. Therefore, the term varying component will generally be used in the
discussions that follow. It is to be understood that the varying component has
a zero average value. (This also eliminates the misnomer of ac voltage, that is,
alternating current voltage; or ac current, alternating current current.)

CAPACITIVE COUPLING

Suppose a voltage vs{t) is coupled to a resistor R by means of a capacitor

(Figure 3.69). Superposition may be used to solve the circuit. Consider the case for
the voltage source Vs, that is, the condition for Vs{t) = 0. The steady-state solution
is i>c(^) = Vs and VR(t) = 0. For the other case, \^ = 0, the following is obtained:

Vsit) = vc(t) + VR(t) = ^J idt + iR (3.53)

The average value of l;5(^) is zero. For a linear circuit, it would therefore be
expected that the average value of the current would also be zero. Hence, for a
sufficiently large value of capacitance, the integral term of Eq. (3.53) becomes neg¬
ligible. It should be noted that a large value of C is insufficient to assure that the
integral term is negligible; it is necessary that the integral of the current over time
be bounded — a condition that is satisfied for a current with a zero average value.

Vs(t) = iR = VR{t) C ^ 00 (3.54)

The result of Eq. (3.54) is the “infinite capacitance” approximation. If both su¬
perposition results are taken into account, the following is obtained:

VR(t) = Vs(t), vc{t) = Vs C^oo (3.55)

The average value of the signal Vs is “lost,” that is, it does not appear across
the resistor R. On the other hand, the varying component of the signal appears
across the resistor of the circuit. This component is coupled to the resistor by the
capacitor (hence, the label of coupling capacitor).
The circuit of Figure 3.69 is used for the ac input of an oscilloscope in which,
typically, a l-^tF capacitor is connected in series with the 1-Mf2 input resistance of
the oscilloscope deflection amplifier. Only the varying component (ac component)
of the input signal results in an oscilloscope deflection - the average value of the in¬
put signal is lost. For the dc input of the oscilloscope, the capacitor is shorted out.
Capacitor coupling may be used to extract the output signal from a transistor
amplifier that has an input signal Vs{t) with a zero average value (Figure 3.70).
The behavior of the base circuit will not be affected by the capacitor of the output

Figure 3.69: Capacitor coupling.

C i

3.5 AMPLIFIER CIRCUITS: SMALL-SIGNAL BEHAVIOR 179

 Figure 3.70: A common-emitter amplifier with an out
+
put coupling capacitor.

Figure 3.71: Equivalent-circuit for the collec¬

tor of the common-emitter amplifier of Fig¬
ure 3.70.

(a) dc equivalent circuit (b) varying component equivalent circuit

Figure 3.72: A solution of the circuit of Figure 3.71 using superposition.

circuit. If Vbb + Vs(t) exceeds VBE(on), the following is obtained:

k — {Vbb + Vs{t) - VBE{on))/RB

ic = PpiB = Pf{VbB — VBE(on))/RB + ^F'^^sit)/Rb

In obtaining the collector current ic it has been assumed that a saturation of

the transistor does not occur. This current consists of two components, a dc
component Ic and a varying component idt):

Ic = ^f{VbB — VBE(on))/RB, ic{t) = ^F^sit)/Rb (3.57)

Separate dependent-current sources may be used for these currents (Figure

3.71).
Superposition may be used to solve the circuit of Figure 3.71. First, con¬
sider the case for the dc sources, namely Ic and Vcc- For this case, the steady-
state current of C is zero, and the capacitor may be treated as an open circuit
(Figure 3.72(a)). This circuit yields Vcc — IcRc for the dc collector-emitter
voltage. This voltage (no signal) is the quiescent collector-emitter voltage Vce,
whereas fc is the quiescent collector current. To obtain a solution for the varying
component of collector current, the sources Ic and Vcc are removed by being

180 THE BIPOLAR JUNCTION TRANSISTOR

replaced with an open- and a short-circuit, respectively (Figure 3.72(b)). The
parallel combination of the current source ic{t) and the collector resistor R.c may
be replaced by a Thevenin equivalent circuit of a voltage source —ic{t)Rc and a
series resistance of Rc as follows:

-ic(t)Rc = iiRc + ^ y ^Ldt + iiRi (3.58)

For an infinite C approximation, the integral term can be treated as negligible.

ic{t)Rc
tL =
Rc + Rl
(3.59)
/ , . ic(t)RcRL
viit) = ilRl = \ = -ic{t)Rc\\RL
Rc + Rl
The solution of Eq. (3.59) is the same as that obtained by replacing C of Fig¬
ure 3.72(b) with a short circuit.
Using superposition, these results yield the following for the output voltage
Viit):

VL(t) = -^FVs{t)Rc\\RL/RB (3.60)

The effect produced by Vbb is removed from the output of the circuit. The
collector—emitter voltage, however, has both a dc and a varying component as
follows:
VCE = Vcc - IcRc - ^FVs{t)Rc\\RL/RB
dc (quiescent) value varying component (3.61)
= VCE + Vce(t)
The dc component is the quiescent value of voltage (no signal). Following the
notation previously adopted, an uppercase symbol and subscript are used for the
quiescent value, and a lowercase symbol and subscript are used for the signal
component.

SMALL-SIGNAL EQUIVALENT CIRCUIT

A set of equivalent circuits similar to those used for the collector current
could have been employed to obtain the quiescent and varying component of the
transistor’s base current. For the solution obtained (Eq. (3.56)), it was assumed
that the diode of the equivalent circuit was conducting and that it had a constant
voltage of VBE(on)‘ Often the signal voltage of the amplifier is very small. For
this case, an improved model for the equivalent base-emitter diode is appro¬
priate - a diode with an equivalent series resistance rbe- This resistance depends
on the current of the diode, that is, the quiescent base current of the transistor.
Two equivalent circuits, one for quiescent quantities and the other for varying
components, are then obtained (Figure 3.73).
If Vbb > Vy, a condition required for conduction of the ideal diode of
Figure 3.73(a), the following is obtained for quiescent quantities:

Vbb = IbRb + h^'be + Vy = IbRb + VBE{on)

. (3.62)
Ib = [Vbb - VBE{on))/Rb
This previously obtained solution for the quiescent base current may now be

3.5 AMPLIFIER CIRCUITS: SMALL-SIGNAL BEHAVIOR 181

 (a) quiescent equivalent circuit (b) small-signal equivalent circuit

Figure 3.73: Quiescent and small-signal equivalent base circuits. The voltage Vbb
must be sufficient for Dijeal to be conducting for the small-signal equivalent circuit
to apply.

used to determine the equivalent resistance rbe as follows:

^he — l^bVj/lB (3.63)

The equivalent series resistance of the diode appears in the small-signal equivalent
circuit and results in the following for the varying components of the base current
(Figure 3.73(b)):

Vs[t) = + iyrbe, ib = Vs{t)/{RB + rbe) (3.64)

The varying component of collector current is ib, which is a quantity that differs
from that previously obtained. The difference, however, is small if rbe R-b-
Before proceeding, a summary of the previous results is in order. The first step
in solving a circuit such as that of Figure 3.70 is determining the quiescent currents
and voltages. For Vs{t) = 0, the quiescent condition, this results in the equivalent
circuit of Figure 3.74 in which it is assumed that steady-state conditions prevail
- the current of the capacitor is zero.

h = {Vbb - VBE{on))/RB
(3.65)
Ic = Pvh, VcE = Vcc — IcRc

If Ib is known, the equivalent resistance rbe may be obtained as follows:

rhe^nEVrlh (3.66)

The small-signal equivalent circuit may now be used to determine the varying
components of currents and voltages.

Figure 3.74: Quiescent equivalent circuit for Vbb > VBE{on)-

Rr j
Lrc Rq

+
^VW- -I-

^BE(on) Prh \i 7 ^CE ^ Vcc

transistor

182 THE BIPOLAR JUNCTION TRANSISTOR

 transistor

Figure 3.75: Small-signal equivalent circuit.

As a result of the capacitor, the load voltage has only a varying component
defined by

ib{t) = Vs{t)/{RB + The), ic(t) = ^Fib(t)

(3.67)
viit) = -iAt)Rcl\RL =
Rb + rbe
Although this result assumes an infinite capacitance, such an approximation is
not necessary to obtain a solution for VF{t). The small-signal equivalent circuit is
linear. Therefore, if the input voltage were a sinusoidal quantity, a phasor solution
in which the capacitor is replaced by a complex impedance of IjjcoC could be
used. For other input voltage functions, a step-by-step numerical integration
could be used to obtain ul(^)-
The procedure for determining the behavior of an amplifier for low-level sig¬
nals involves the solution, in succession, of two equivalent circuits. A current of
the quiescent equivalent circuit 1b is used to determine the base-emitter equivalent
resistance rye of the small-signal equivalent circuit. This diode linear resistance
approximation sets a limit for the validity of the small-signal analysis. The mag¬
nitude of the varying component of the base current, \ib{t)\, needs to remain small
compared with the quiescent base current. However, for most applications, suf¬
ficiently accurate results are obtained for varying components that are as large
as 10 or 20 percent of the quiescent value.

hybrid-tt transistor model

A slightly different form of the small-signal transistor equivalent circuit indi¬
cated in Figure 3.76 is commonly utilized in which a voltage-dependent source
is used in place of the current-dependent source for the collector circuit. In ad¬
dition, a small-signal equivalent resistance designation of Vjt is used in place of
Tbe (for the level of coverage up to this point, they have equal values). Because

Figure 3.76: Small-signal equivalent circuits.

ih h h *c

(a) current-dependent source (b) voltage-dependent source

hybrid-7t model

3.5 AMPLIFIER CIRCUITS: SMALL-SIGNAL BEHAVIOR 183

 Figure 3.77: The small-signal hybrid-:7r equivalent circuit.

both circuits must result in the same varying component of collector current, the
following is valid:

Sm^be Sm^b^Jt
— —
(3.68)
f^F — Sm^Tit Stn ~ ^F /^n

The quantity gm is the small-signal mutual conductance of the transistor. When

the quiescent value of Ib is used to determine (= rbe), the following is obtained
for the mutual conductance:

Pf _ Pf _ PfIb _ Ic (3.69)
r„ upVt/Ib npVj npVj

Hence, the mutual conductance is directly dependent on the quiescent collector

current of the transistor.
The small-signal equivalent circuit of Figure 3.76(b) is generally referred to
as the transistor hybrid-7r equivalent circuit. This description comes about from
the equivalent circuit that is obtained when the base-collector capacitance
is included (Figure 3.77). It will be noted that the three elements form what
might be described as the Greek letter 7t (vertical elements on each side and one
across the top). Although this is the basic hybrid-7r circuit, other elements can
be incorporated to account for effects that have not been covered in this brief
introductory treatment of the bipolar junction transistor.
There is a class of amplifiers that do not utilize coupling capacitors but rely
on direct coupling. To achieve this, considerably more complex transistor cir¬
cuits are required. These amplifiers amplify signals with a dc component; an
amplified dc and a varying component appear at the output of the amplifier. This
type of response is required for operational amplifiers that use external feedback
circuits.
Only the smallest of capacitors, having capacitances no larger than a few
tens of picofarads, can be fabricated on an integrated circuit. Hence, if larger
capacitances, such as used for coupling (measured in microfarads), are required,
they need to be externally connected to the integrated circuit. Direct-coupled
circuits eliminate the need for these capacitors, but they require considerably
more transistors to achieve the same amplification. A problem with a direct-
coupled amplifier is that a small internally generated dc output offset voltage is
unavoidable. Furthermore, this voltage is usually dependent on temperature and
on the supply voltage. Hence, if integrated amplifier circuits are connected so
that one amplifies the output of another, a coupling capacitor is generally used
to eliminate the effect of the internally generated offset voltage.

184 THE BIPOLAR JUNCTION TRANSISTOR

 6 ycc = 12V

Figure 3.78: Transistor amplifier of Example 3.10. (The node num¬

bers are for the SPICE solution of Example 3.11.)

EXAMPLE 3.10
The behavior of the transistor amplifier circuit of Figure 3.78 is to be de¬
termined. The input signal has a zero average value, and infinite values of
capacitance may be assumed for the capacitors.
a. Determine the quiescent base and collector currents and collector-emitter
voltage of the transistor.
b. Determine the small-signal behavior of the circuit, that is, vi(t) as a function
of Vs(t).
C. What is the small-signal voltage gain of the amplifier, vi{t)/vs{t)}
d. What is the small-signal current gain of the amplifier, iiW/isW
e. What is the small-signal power gain of the amplifier?
SOLUTION
a. The quiescent equivalent circuit of the transistor will be used to obtain the
quiescent currents (Figure 3.79). The following is obtained for the quiescent
base current:
0 — IbRb + VBE(on) + ih + Ic)Re + VeE

— VeE — VEEjon)
14.4 fiA
Rb + {1 + MRe

Rb

Figure 3.79: Quiescent equivalent circuit of Ex¬

^BE(on) T Pfh
ample 3.10.

Ic + h

3.5 AMPLIFIER CIRCUITS: SMALL-SIGNAL BEHAVIOR 185

 Figure 3.80: Small-signal equivalent circuit - an infinite C approximation.

A value of —12 V was used for Vee- Hence, Ic = Pph — 1-44 mA. If
/c is known, the quiescent collector-emitter voltage may be determined as
follows:

k^CC = IcRc + VcE + (1 + PF)h^E + Ve£

kc£ = ^cc — yE£ — Ic^c ~ + ^)IcRe = 9.40 V

This solution is valid - the transistor is not saturated,

b. If Ib is known, the small-signal equivalent resistance r„ may be determined
by

r„ — He Vj/Ib = I-74 k^2

The small-signal equivalent circuit of Figure 3.80 applies for an infinite ca¬
pacitance approximation. The input elements of Vs{t) and Rs may be con¬
verted to a Norton equivalent circuit that has a source current of Vs{t)/Rs:

^ ^_M?)_
(l/Rs + l/RB + l/r,)i?s
This voltage may be used to obtain viit) as follows:

gmRcWRLVsjt)
Vlit) = -gmVbeRcWRL =
1 -I- Rs/Rb + Rs/E,t

A numerical evaluation of the preceding is readily obtained as follows:

gm = Ic/np Vt = 57.4 mS
Rcl|i^L = 1.99kf2, VL(t) =-16.7vs{t)

c. The voltage gain of the amplifier is —16.7. The significance of the minus
sign is that a positive input voltage results in a negative output voltage.
d. The input and output resistances may be used to determine the current gain
of the amplifier as follows:

R^n = Vs{t)/is{t) = Rs + RB\\rn = 11.7

Rl = VE{t)/iiXt) = 5 k^^
is{t) = Vs{t)/Ri^, iiit) = vi{t)/Ri

ts{t) Vs{t) Rl

e. The power gain is the product of the voltage and current gains, namely.

186 THE BIPOLAR JUNCTION TRANSISTOR

EXAMPLE 3.1 1
A SPICE solution of Example 3.10 is desired using the .AC analysis mode.
The program automatically determines quiescent quantities, that is, an . OP
statement results in a listing for each transistor. A phasor-type solution is then
obtained for the corresponding small-signal equivalent circuit in which the
effects of all capacitances are included:

Cs = 1 jjJ', Cl = 1 /xF, Ce = 100 /xF

An . AC statement causes the frequency of the phasor source (or sources) to

be swept. As a result of the finite capacitance values {Cs, Cl, and Ce), the
response of the circuit for low-frequency signals will be affected. For higher-
frequency signals, the infinite C approximation applies. In an actual circuit,
the response of the transistor will be a limiting factor for very-high-frequency
signals. An important high-frequency effect is the base-collector capacitance of
the reverse-biased base-collector junction diode (C^ of the small-signal hybrid-
Tt equivalent circuit). To account for this, include an external capacitance Qc
of 5 pF connected from the base to the collector of the transistor. Use a value
of Is for the transistor model that results in the quiescent collector current
determined in Example 3.10 for a base-emitter voltage of 0.7 V. For the 27 °C
SPICE default temperature, Vt — 25.9 mV.

SOLUTION A quiescent base-emitter voltage of 0.7 V is to result in a quiescent

collector current Ic of 1.44 mA.

7c = Is = = 2.63 x 10“^^ A

It will be noted that an input phasor signal with an amplitude of 1.0 V and zero
phase angle has been specified (Figure 3.81). This amplitude is obviously much

Small-Signal Amplifier
VS 1 0 AC 1
RS 1 2 lOK
CS 2 3 lU
RB 3 0 lOOK
Q1 4 3 5 QNPN
CBC 4 3 5P
VCC 6 0 DC 12
Figure 3.81: SPICE circuit file for Example 3.11. RC 64 3.3K
The node numbers of the circuit are indicated on RE 5 7 6.8K
Eigure 3.78. CE 5 0 lOOU
VEE 7 0 DC -12
CL 4 8 lU
RL 8 0 5K
.MODEL QNPN NPN IS=2.63E-15 NF=1 BF=100
.OP
.AC DEC 10 1 IMEG
.PROBE
• END

3.5 AMPLIFIER CIRCUITS: SMALL-SIGNAL BEHAVIOR 187

♦*** BIPOLAR JUNCTION TRANSISTORS

NAME Q1 RPI 1.80E+03

MODEL QNPN RX O.OOE+00
IB 1.44E-05 RO l.OOE+12
IC 1.44E-03 CBE O.OOE+00
VBE 6.99E-01 CBC O.OOE+00
VBC -8.70E+00 CBX O.OOE+00
VCE 9.40E+00 CJS O.OOE+00
BETADC l.OOE+02 BETAAC l.OOE+02
GM 5.55E-02 FT 8.84E+17

Small-Signal Amplifier
Temperature: 27.0

200d +.+.+.+..T.t

-400d i.+.+.+■
80 /-yPW-iJPiHL-HP.iRS).

"VM(8) • IM(RL)/IM(RS) • VM(8)*IM(RL)/IR(RS)/10

Frequency

Figure 3.82: SPICE solution for Example 3.11.

larger than that of a small signal. In solving the linear small-signal equivalent
circuit, the SPICE program does not take into account signal amplitudes (it
“blindly” obtains a solution for the circuit). For the 1-V input signal specified,
the output voltage will be numerically equal to the voltage gain of the amplifier.
The .OP statement produces an output table for the transistor (Figure 3.82).
Quiescent voltages and currents as well as calculated values of gm and (GM
and RPI) are included. The very slight numerical differences are the result of a
SPICE value of 25.9 mV being used for Vj- The PROBE response includes plots
of both the amplitude and phase of the voltage and current gains. It should
be noted that for the midfrequency range the gains agree with those obtained
in Example 3.10, and the phase difference of about —180° corresponds to the
minus sign of the analytic expressions.

EXAMPLE 3.12
Consider the amplifier of Figure 3.83 in which the quiescent base curent is
derived from the collector circuit of the transistor. Assume the average value
of Vs(t) is zero and that the infinite capacitance approximation applies.

188 THE BIPOLAR JUNCTION TRANSISTOR

 ^cc - 9 V

PF 100
VBE{on) 0.7 V
np 1.0
Mt)

Figure 3.83: Transistor amplifier of Example 3.12

a. Determine the quiescent base and collector currents and the collector-
emitter voltage of the transistor.
b. Determine the small-signal voltage gain vp/Vsit) of the amplifier.
c. Determine the input resistance v\{t)/ii{t) of the amplifier.
SOLUTION
a. The quiescent equivalent circuit of Figure 3.84 will be used.

Vcc = (iB + ic)Kc + lBK

I,
= [{'^ + ^f)Rc + Rb]Ib + VBE{on)

= ycc - VBao„l ^ 4 J3
Rb + {1 + ^f)Rc
Ic — ^Fh — 413 /zA, Vc£ = Vcc — (fc + h)Rc = 4.83 V

The transistor is not saturated, and the solution is valid. It should be noted
that for this circuit VcE must be greater than Vbe for a positive quiescent
base current. Hence, the transistor will not saturate regardless of the resis¬
tance values of the circuit.
b. The small-signal equivalent circuit must be solved to determine the voltage
gain of the amplifier (Figure 3.85). The circuit of Figure 3.85(b) is designed
by obtaining a Norton equivalent circuit for Vs{t) and Rs.

= npVpjlB = 6.05 kQ, = Ic/npVr = 16.5 mS

= Rs\\r„ =3.77kQ., R2 = RcWRp^S.OkQ

Vcc

Figure 3.84: Quiescent equivalent circuit of

Example 3.12.

3.5 AMPLIFIER CIRCUITS: SMALL-SIGNAL BEHAVIOR 189

 Rs Rb
-V/r- AVr +
+ +

Vsit) ^be SrrPbe Rr Rl < ^l(0

(a) actual small-signal equivalent circuit

Rb
A/W
+
-I- [I ■ Jl I +

^sCO
0) ^be ^ grrPbe (i) ^2 ^ ^l(0

(b) simplified small-signal equivalent circuit

Figure 3.85: Small-signal equivalent circuit for the amplifier of Exam¬

ple 3.12.

A set of simultaneous node-voltage equations needs to be solved.

Vs VL - Vbe _ ^be VL , Vi
Rs Rb ~ Rl' Rb ~ Rl

These equations may be written as follows:

Rl Rl Rb Ri + Rb
Vbe - Vl- — Vc Vbe + VL- = 0
Ri + Rb '^iRl + RB)Rs' ' "^{gmRB-VRl
If Vbe is eliminated, the following relation between vl and Vs is obtained
(the time dependence, though not written, is assumed):

Rl R2 + Rb \ Rl Rb
VL + = -Vs
Ri + Rb — 1)1^2/ {Ri + Rb)Rs
0.0159 Vl = —0.376 Vs, vi/vs — —23.6

The input voltage vi is equal to vi,e- The second of the simultaneous equa¬
tions for Vbe and vi yields the following:

Vbe + 0.0122 Vl = 0, Pi = Vbe = -0.0122 vi = 0.287 p.

From Figure 3.85(a), the current ii is readily determined as follows:

ii = (vs - vi)/Rs = 0.713 Vs/Rs

0.287 p,
, /p = 0-403 Rs = 4.03 kS2
0.713 Ps/Ks

This resistance, less than (6.05 kQ), is the result of Rb connected from
the base to the collector of the transistor.

3.6 THE PNP TRANSISTOR: A COMPLEMENTARY DEVICE

Up to this point, only NPN bipolar junction transistors, devices with a p-type
base sandwiched between an w-type emitter and collector region, have been

190 THE BIPOLAR JUNCTION TRANSISTOR

considered. An interchange of the semicon¬
ductor doping, as indicated in Figure 3.86,
results in a PNP transistor, a complementary
device with particularly useful circuit prop¬
NPN
erties. Circuits that simultaneously use
Rr
and PNP transistors can often accomplish
tasks that are not possible with circuits us¬
ing only NPN or PNP transistors.
Figure 3.86: A PNP transistor in a common-base
To forward bias the emitter--base junction
circuit.
of aPNP transistor, a positive emitter-base
potential veb is required. For this biasing, holes of the emitter cross the emitter-
base junction and diffuse across the thin base region of the transistor. These holes
readily cross a reverse-biased collector-base junction {vqb < 0)- For normal op¬
eration, it is primarily holes originating in the emitter region that account for the
behavior of a PNP transistor.
The roles of the holes and free electrons in a PNP transistor are reversed
from their roles in an NPN transistor (Figure 3.S7). For normal operation of a
PNP transistor, the emitter current ie is positive, whereas the base and collector
currents are negative. Furthermore, all voltages have opposite polarities. Never¬
theless, the same relationship applies between the collector and emitter current
as for an NPN transistor:

ic = -otEk (3.70)

The common-base current gain a p remains a positive quantity.

As a result of the interchange of the n- and p-type regions, the polarity of the
diodes of the equivalent circuit of a PNP transistor are reversed from those of
the equivalent circuit of an NPN transistor (Figure 3.88). Concurrently, a set of
emitter and collector characteristics that are the mirror image (mirrored about
both axes) of those for an NPN transistor result (Figure 3.89).
As for the NPN transistor, the equivalent-circuit model for the common-
emitter configuration of a PNP transistor is generally used to analyze circuits.
A simplified equivalent circuit model is indicated in Figure 3.90 (the polarity of
the diode is reversed). It will be noted that the emitter arrow of the transistor
symbol is reversed from that of an NPN transistor. The arrow of the emitter is
in the direction of the physical emitter current that occurs for a forward-biased
base-emitter junction.

Figure 3.87: The role of majority carriers in a PNP transistor.

base base
emitter collector emitter collector

holes
from emitter

free electrons ^ i.
from base !
(a) carriers (b) conventional current

3.6 THE PNP TRANSISTOR: A COMPLEMENTARY DEVICE 191

 collector

Figure 3.88: Equivalent circuit of a

^CB
common-base PNP transistor.

*E4 ■■ ^CB
*E3 •• Figure 3.89: Emitter and collector char¬
ki ■ ■ acteristics of a PNP transistor.
*E1
^EB
emitter characteristic collector characteristic

collector base collector

k k

emitter

(a) circuit symbol (b) equivalent circuit

Figure 3.90: Common-emitter equivalent circuit of a PNP transistor.

The collector and base currents for normal operation of a PNP transistor are
related by the common-emitter current gain by

ic = ^FiB, Pf = z—-— (3.71)

1 — Q!f
These are the same relations as for anNPN transistor. Expressions for the depen¬
dence of the base and collector currents of a PNP transistor on the base-emitter
voltage require a set of minus signs:

fc =(3.72)

A negative base-emitter voltage is required, and the paramenter Is is a positive

quantity. When using SPICE, a PNP . MODEL specification causes the program to
utilize the relationships appropriate for a PNP transistor.
Consider the situation in which a PNP transistor is used in a basic common-
emitter circuit. As indicated in Figure 3.91, a negative supply voltage Vcc is
required for normal operation of the transistor, and the diode of the equivalent
circuit is reversed from what it would be for an NPN transistor. For positive
values of vin, the diode is reverse biased, resulting in a zero base current (fc = 0
and KouT = Vcc, a negative quantity). Negative values of uin are necessary to
forward bias the diode (vBE{on) ^ -0.7 V for a silicon PNP transistor).
An analysis, similar to that for the NPN transistor, results in the transfer
characteristic of Figure 3.92 (the algebra of the analysis is the same). Although

192 THE BIPOLAR JUNCTION TRANSISTOR

 “ Zb cc
+
+ negative
^OUT quantity
^IN
Figure 3.91: Common-emitter PNP
transistor circuit.

^OUT

Figure 3.92: Transfer characteristic of a common-emitter PNP tran¬

sistor circuit.

the transition region occurs when ujn and uouT are negative, the slope for the
transition region, namely -^p Rc/Rp, is the same as that for an NPN transistor.

COMPLEMENTARY SYMMETRY
Frequently, a PNP transistor is used in conjunction with an NPN transistor
with one device supplying current when a positive quantity is required and the
other when a negative quantity is required. Often an emitter-follower-type of
circuit is used. The response of the NPN transistor of Figure 3.93(a) is that
previously obtained for a circuit with Rb = 0. A subscript of N has been used to
distinguish these results from those that will be obtained for the PNP device. For
the PNP transistor circuit of Figure 3.93(b), a value of ujn < vgEPion) is necessary
to achieve a base and collector current (uB£P(on) ^ —0.7 V for a silicon device).
When uiN < vgEPion), vp = uin — vbep(on)- For these individual circuits, the NPN
transistor supplies current for i>in positive and the PNP transistor for pin negative.
Suppose that the separate emitter-follower circuits are combined to provide
current for a single load resistor (Figure 3.94). The resultant transfer character¬
istic is the sum of the individual transfer characteristics. This apparent super¬
position of results, it should be emphasized, does not follow (at least directly)
from the superposition theorem of circuits - transistors are nonlinear circuit
elements! An analysis of this circuit is relatively straightforward. For simplic¬
ity, it will be assumed that the magnitude of the base-emitter on voltages is
0.7 V (vBENion) = -VBEP(on) = 0.7 V). For |pinI < 0.7 V, neither device will be

3.6 THE PNP TRANSISTOR: A COMPLEMENTARY DEVICE 193

 ^OUT

(a) NPN emitter-follower amplifer

^OUT
^IN

(b) PNP emitter-follower amplifer

Figure 3.93: NPN and PNP transistor emitter-follower circuits.

conducting.

For — 0.7 V < uiN < 0.7,

(3.73)
VBEN = VbEP = VIN, hN = hp — 0, UOUT = 0.
When uiN is greater than 0.7 V, the NPN transistor will be conducting.
For uiN > 0.7 V,
(3.74)
vben = vbep = 0-7 V, Ibp = 0, four = i’in — 0.7 V.

As a result of their common emitter and base connections, both devices have the
same base-emitter voltage. A base-emitter voltage of 0.7 V for the PNP transistor
implies that its base-emitter equivalent-circuit diode is reverse biased - its base
and collector currents are therefore zero. For vin < —0.7 V, the PNP device will
conduct.
For uiN < -0.7 V, ^
vben — Vbep = —0.7 V, ibn = 0, four = vin + 0.7 V.

Figure 3.94: An emitter-follower circuit using both an NPN and PNP tran¬
sistor - complementary symmetry.

Fee ^OUT

194 THE BIPOLAR JUNCTION TRANSISTOR

 ^OUT

Figure 3.95: Distortion of a sinusoidal input signal.

The base-emitter equivalent-ckcuit diode of the NPN transistor is reverse biased

for this condition.
The behavior of the emitter-follower amplifier of Figure 3.94 relies on the
complementary symmetry of its NPN and PNP transistors. For this basic circuit, a
distortion of the output signal occurs around uin = 0 (Figure 3.95). This crossover
distortion can be reduced with appropriate circuit modifications. Suppose, for
example, that batteries with potentials slightly less than 0.7 V, the potential
assumed for the magnitude of the base-emitter voltage of the preceeding analysis,
are inserted in series with the base of each transistor. For a battery polarity
opposite to the base-emitter voltage, the magnitude of the voltage required to
turn on a transistor would be reduced to a very small value. This is equivalent to
a small value of VBEN(on) or \vBEP(on)\- Flence, the width of the crossover region,
the range of uin for which uqut = 0, would be very small.
A circuit requiring a set of batteries is not acceptable even if batteries with the
precise potential required were available. Furthermore, the base-emitter voltages
of the transistors do not remain constant, as assumed for the model utilized. The
effect of the batteries can be approximated with a set of diodes and current
sources (Figure 3.96). As long as the diodes are forward biased, their voltage
is nearly equal to that required to keep the transistors in their active region of
operation. This circuit is generally designed so that, for a zero input voltage, there
is a small collector current of Qn and an equal magnitude collector current of
Qp. Owing to the complementary symmetry of the circuit, the load voltage and
current will be zero for pin = 0. For positive values of vin, the collector current of
Qn increases, whereas the magnitude
Figure 3.96: A complementary emitter-follower circuit us¬
of the collector current of Qp decreases
ing diode biasing.
to essentially zero for fairly small
positive values of win- For negative
values of uin, the magnitude of the cur¬
rent of Qp increases (providing a neg¬
ative load current), whereas the collec¬
tor current of Qn decreases. The net
effect is that crossover distortion is es¬
sentially eliminated. By using diodes
with appropriate parameters (in par¬
ticular Is), the no-signal collector cur¬
rents will be fairly small compared
with the currents that occur for nor¬
mal levels of the signal voltages.

3.6 THE PNP TRANSISTOR: A COMPLEMENTARY DEVICE 195

 Emitter-follower circuits using complementary symmetry are generally used
when an output load current must be provided. This is the case for an oper¬
ational amplifier - an amplifier for which the output voltage, ideally, is inde¬
pendent of the load current. Typical low-power integrated-circuit operational
amplifiers will generally supply at least 10 mA of current with either polarity.
A circuit employing complementary emitter-follower transistors is generally
used for integrated circuits incorporating bipolar junction transistors. Another
application is the output circuit of an audio power amplifier. The load resis¬
tor for this case is the loudspeaker; two amplifiers are required for a stereo
system.

EXAMPLE 3.13
A PNP transistor is used in the circuit of Figure 3.97, which uses a positive
supply voltage. The output voltage is the voltage across the collector resistor.
Determine the voltage transfer characteristic of the circuit.

SOLUTION The transistor needs to be replaced with its equivalent circuit

(Figure 3.98). A forward-biased base-emitter junction has been assumed, that
is, iB < 0 for a PNP transistor.

k"cc = -VBE{on) — h Rb + h — - { ^CC + VBE(on) “ ^^In) /Rb

For iB < 0, Din < 4.3 V is required.

I^OUT = -icRc — {Vcc + VBE{on) - Vm)^FRc/RB

This solution is valid only if the transistor is not saturated, that is, only if

Figure 3.97: Transistor circuit of Example 3.13.

ySf = 50
VBE(on) = —0.7 V
^CE(sai) = — 0.3 V

Figure 3.98: Equivalent circuit of Exam¬

^CC ple 3.13.

196 THE BIPOLAR JUNCTION TRANSISTOR

 ^OUT 1^CE( sat)l = 0-3 V

Figure 3.99: Transfer characteristic of Example

3.13.

^/Nsat

vcE < vcE{sat)’ The following is obtained at the edge of saturation, pjn = fiNsat:
VCC = -^CE{sat) + UOUT

= -fC£(sat) + (Vcc + VBE(on) - sat) Pf Rc / Rb

f IN sat = VCC + VbE( on) (Tec + BCE{sat)) Rb/Rc = 3.36 V

The resultant voltage transfer characteristic is indicated in Figure 3.99.

EXAMPLE 3.14
The circuit of Figure 3.100 is typical of that used for the output stage of
an audio amplifier connected directly to a loudspeaker having an 8 coil.
Consider the case for which viit) is a sinusoidal voltage:
vi{t) = Vm sin cot, \4i = 20 V
A feedback circuit is generally used to obtain an input voltage that will produce
a sinusoidal output voltage. The base currents of the devices may be assumed
to be negligible, that is, the current out of an emitter of a transistor may be
assumed equal to its collector current.
a. Determine the average power delivered to the loudspeaker.
b. What are the average values of icN and icp ?
c. What is the average power supplied by each of the voltage sources Vec and
Vee?
d. What is the average power dissipated by each of the transistors?

SOLUTION
a. The average loudspeaker power depends on the rms value of the load volt¬
age, that is, \^/a/2.

PLav = V^/2Rl = 25 W

Rl 8Q
Figure 3.100: Transistor circuit of Example 3.14.

3.6 THE PNP TRANSISTOR: A COMPLEMENTARY DEVICE 197

 Figure 3.101: Collector currents of the transistors of Example 3.14.

b. The following is obtained if the base currents of the transistors are ignored:

ihit) = icN{t) + icp{t)

For iiit) > 0, only the NPN transistor is conducting, icp{t) = 0.
icN{t) = idt) for ii^t) > 0
A similar situation occurs for the PNF transistor:

icp{t) = idt) for kit) < 0

Each of these currents is a half-wave rectified sinusoidal current
(Figure 3.101). The average value of each current is I/tt of its peak value.

fcNav = VmlTtRi = 0.796 A

fcPav = - Vml^RL = -0.796 A
c. The average power supplied by Vcc ot ^ee is equal to the product of its
voltage, a constant, and its average current:

Pccav — icNavVcC = 23.9 W

Pee aw = icPavVEE = 23.9 W
d. The total average power supplied to the circuit is PoCav + Pee ay, 47.8 W.
Therefore, 47.8 — 20 = 27.8 W is dissipated by the two transistors, 13.9 W
by each transistor.

REFERENCES

Armstrong, E. H. (1915). Some recent developments in the audion receiver. Proceedings of the
Institute of Radio Engineers, 3, 3, 215-47.
Buie, J. L. (1966). U. S. Patent 3,233,125.
Cringely, R. X. (1992). Accidental Empires. New York: HarperCollins Publishers.
De Forest, L. (1914). The audion - detector and amplifier. Proceedings of the Institute of Radio
Engineeers, 2, 1, 15-36.
Early, J. M. (1952). Effects of space-charge layer widening in junction transistors. Proceedings
of the Institute of Radio Engineers, 40, 11, 1401-6.
Electronics (1980). Entire issue, 53, 9 (17 April).
Elmasry, M. I. (1983). Digital Bipolar Integrated Circuits. New York: John Wiley 8c Sons.
Elmasry, M. I. (1985). Digital bipolar integrated circuits: A tutorial. In Digital VLSI Systems,
M.I. Elmasry, ed., 38-46. New York: IEEE Press.
Garrett, L. S. (1970). Integrated-circuit digital logic families. Part I: Requirements and features
of a logic family; RTL, DTE, and HTL devices. IEEE Spectrum, 7, 10, 46-58. Part II: TTL
devices; IEEE Spectrum, 7, 11, 63-72. Part III: ECL and MOS devices. IEEE Spectrum, 7,
12, 30-42.

198 THE BIPOLAR JUNCTION TRANSISTOR

Glazer, A. B. and Subak-Sharpe, G. E. (1977). Integrated Circuit Engineering: Design, Fabri¬
cation, and Applications. Reading, MA: Addison-Wesley Publishing Co.
Gray, P. E. and Searle, C. L. (1969). Electronic Principles: Physics, Models, and Circuits. New
York: John Wiley & Sons.
Harris, J. N., Gray, P. E., and Searle, C. L. (1966). Digital Transistor Circuits. Semiconductor
Electronics Education Committee. New York: John Wiley & Sons.
Haznedar, H. (1991). Digital Microelectronics. Redwood City, CA: The Benjamin/Cummings
Publishing Co.
Hodges, D. A. and Jackson, H. G. (1988). Analysis and Design of Digital Integrated Circuits.
New York: McGraw-Hill. ^
Lancaster, D. (1974). TTL Cookbook. Indianapolis, IN: Howard W. Sams & Co.
Millman, J. and Taub, H. (1965). Pulse, Digital, and Switching Waveforms. New York:
McGraw-Hill.
Morris, R. L. and Miller, J. R. (eds.) (1971). Designing with TTL Integrated Circuits. Texas
Instruments Electronics Series. New York: McGraw-Hill.
Shockley, W, Pearson, G. L., and Haynes, J. R. (1949). Hole injection in germanium - Quanti¬
tative studies and filamentary transistors. The Bell System Technical Journal, 28, 3, 344-66.
Taub, H. and Schilling, D. (1977). Digital Integrated Electronics. New York: McGraw-Hill.
Texas Instruments (1976). The TTL Data Book for Design Engineers (2d ed.). Dallas, TX:
Texas Instruments, Inc.

PROBLEMS

3.1 Consider the common-base circuit of Figure P3.1 that uses a silicon NFN
transistor with ctp = 0.995 and VEB{on) = —0.7 V.
a) Suppose Vee — 2.0 V. Determine Ie, ic, and vqb for this condition.
b) Determine the maximum value of Vee for which fc = 0-
c) What is the value of Vee that results in vcb = 0?
d) Repeat the previous parts for Vcc = 20 V.

Rg 1 kD j'e ic

Vee
Figure P3.1

Vcc V
3.2 Repeat parts (a), (b), and (c) of Problem 3.1 for Vcc = 10 V.
3.3 Repeat Problem 3.1 with a 1-kQ resistor Reb connected between the
emitter and base of the transistor.
3.4 The transistor of Problem 3.1 is replaced by another transistor having
parameters of ap = 0.98 and VEB(on) = —0.7 V. Repeat Problem 3.1 for
this transistor.
3.5 A silicon transistor with ap = 0.99 and vpBion) = —0.7 V is used in the
circuit of Figure P3.5. Determine the transfer characteristic of the circuit,
that is, vcB versus hn, for -8 < hn < 0 V.
3.6 Repeat Problem 3.5 for Rc = 1

PROBLEMS 199
 3.7 Repeat Problem 3.5 for Rc = ^0 k^2.

Rjm 1 kQ i'e ic

Figure P3.5

3.8 The silicon transistor circuit of Figure P3.8 {ap = 0.99, VEB{on) =
—0.7 V) has an input signal source of Vs(t). An emitter biasing source
Vee of 4 V is used to achieve a desired operating point.
a) Assume quiescent conditions prevail, Vs(t) = 0. Determine /£, ic, and
VCB-
b) The periodic input signal Vs(t) has a symmetrical triangular waveform
with a peak-to-peak amplitude of 1.0 V. What is the peak-to-peak
value of vcB ?

Rs 100Q

Figure P3.8

3.9 Repeat Problem 3.8 assuming Vs{t) has a sinusoidal waveform with a
peak-to-peak value of 0.5 V.
3.10 Repeat Problem 3.8 assuming Vsit) has a symmetrical square waveform
with a peak-to-peak value of 1.0 V.
3.11 The circuit of Figure P3.ll has a silicon diode in series with the base of
the transistor.

a) Determine the emitter and collector currents of the transistor.

b) What are the voltages veg and ucG?
c) Suppose the diode of the base circuit is reversed. Determine ie and ic
for this condition.
/?£ 100 O i£

ap = 0.99
Rc
500 a VpBion) = —0.7 V
l^D(on) = 0.7 V

Figure P3.ll

3.12 A base biasing voltage Vbb of 3 V is used for the silicon transistor of
the circuit of Figure P3.12 (ap = 0.995, veb{ou} = -0.7 V). Use the

200 THE BIPOLAR JUNCTION TRANSISTOR

 transistor common-base equivalent circuit to determine Ie and i c of the
circuit. What are the transistor voltages veb and vqb ?

+
^EB ^CB
Figure P3.12
^BB

3V
t/cc 10 V

3.13 Repeat Problem 3.12 with the polarity of the battery Vbb reversed.
3.14 Because the common-base current gain of a transistor is very close to
unity, small changes in this gain have a marked effect on the common-
emitter current gain. Suppose that a nominal common-emitter current
gain pF of 150 is required.
a) What is the nominal value of ap required?
b) Suppose a tolerance of ±50 percent is required for ^e- What would
be the corresponding tolerance of off ?
c) What would be the tolerance required for ap if that of were ±10
percent?
3.15 Repeat Problem 3.14 for a nominal value of 100 for ^p.
3.16 Repeat Problem 3.14 for a nominal value of 200 for ^p.

PF 200
VBE{on) 0.7 V

FCE(sat) 0.3 V

Figure P3.17

3.17 A silicon NPN transistor is used in the circuit of Figure P3.17.

a) Determine the transfer characteristic of this circuit, that is, uour versus
Fin (0 < Fin < 20 V).
b) What is the minimum value of vin for which vqut = Fc£(sat)?
c) What is the slope of the transfer characteristic for uin less than that
required for saturation (din > 0.7 V)?

3.18 Repeat Problem 3.17 for Rq = 5

3.19 Repeat Problem 3.17 for Rb = 100 k^2.
3.20 Repeat Problem 3.17 for Pp = 100.
3.21 A silicon diode is connected in series with the base of the transistor of
Figure P3.21.

PROBLEMS 201
 a) Determine the transfer characteristic of the circuit.
b) What is the slope of the characteristic for the region over which min
affects the output voltage?
c) Suppose the diode of the circuit is reversed. Determine the transfer
characteristic for this condition.
^cc = 5 V

1 kS2 Pp =50
~ + VBE(on) — 0.7 V
^CE VCEisat) = 0.3 V
VD{on) — 0.7 V

Figure P3.21

3.22 Repeat Problem 3.21 for two diodes in series with the base of the tran¬
sition (same polarity as the diode of Figure P3.21).
3.23 Repeat Problem 3.21 for three diodes in series with the base of the tran¬
sition (same polarity as the diode of Figure P3.21).
3.24 Repeat Problem 3.21 with the diode removed from the base circuit and
placed in series with the emitter of the transistor (downward forward-
biased current).

100
VBE{on) 0.7 V

VCEisat) 0.2 V

Figure P3.25

3.25 In the transistor circuit of Figure P3.25, a base biasing resistor is con¬
nected directly to Vcc {Veb = Vcc)-
a) Determine ic and pout for pin = 0.
b) What is the slope of the voltage transfer characteristic for pin = 0?
c) What is the minimum value of pin for which pout = Pc£(sat) ?

d) What is the maximum value of pin for pout = Vcc?

3.26 Consider the circuit of Figure P3.25. What is the equivalent input circuit
for Pin = 0? Over what range of pin is this circuit valid? What is the
equivalent output circuit for this condition?
3.27 Repeat Problem 3.25 for Rbi = 100 kf2.
3.28 Repeat Problem 3.25 for Rq = 10 kf2.
3.29 Repeat Problem 3.25 for ^p = 150.

202 THE BIPOLAR JUNCTION TRANSISTOR

3.30 A load resistor Ri of 10 k^2 is connected to the output of the circuit of
Figure P3.25 (across vout)- Repeat parts (a), (b), and (c) of Problem 3.25
for this condition.

d) What is the maximum value of vout and the minimum value of uin
for which it is obtained?
3.31 Suppose input voltage source din of Figure P3.25 is replaced by a sinu¬
soidal signal source Vs{t) — Vp sin In ft.
a) Determine Douri?) for Vp = 0.2 V.
b) Determine Douxlfl'for Vp = 1.0 V.
c) What is the largest value of Vp for which the output voltage is not
distorted?
3.32 Repeat Problem 3.31 for a 10-kf2 load resistor connected to the output
of the circuit (across dout)-
3.33 A common-emitter transistor circuit is used in conjunction with a light-
sensitive diode to indicate the presence of a light signal (Figure P3.33).
a) Consider the condition for no light - the reverse-biased current of the
diode may be treated as zero. Determine the maximum value of Rb
for which saturation of the transistor occurs.
b) Determine the light-generated current of the diode required to result
in Dour = 5 V for the value of Rb determined in the previous part.
c) What is the minimum value of light-generated diode current required
for Dour = Vcc?

h 100
VBE(on) 0.7 V
Figure P3.33
^CEisat) 0.3 V

3.34 Repeat Problem 3.33 for a l-k^2 resistor in series with the emitter of the
transistor.
3.35 Repeat Problem 3.33 for a 50-k^2 resistor connected in series with the
base of the transistor.
3.36 The transistor circuit of Figure P3.36 is used to amplify an audio signal
source Vs{t). It is found that the audio signal can be simulated with a
sinusoidal voltage as follows:

Vs(t) = Vp sin In ft, f = 600 Hz

a) Suppose Vp = 0.5 V. Determine the peak-to-peak value of dout(^)
and the amplification of the circuit.
b) What is the largest value of Vp that may be used without resulting in
a distorted output voltage?

PROBLEMS 203
 ycc = iov

PF 200
VBEion) 0.7 V
Figure P3.36
VCEissit) 0.3 V

c) What is the equivalent input circuit for uin = 0?

3.37 Repeat Problem 3.36 for Re = 500 ^2.
3.38 Repeat Problem 3.36 for a 10-k^2 resistor in series with the base of the
transistor.
3.39 Repeat Problem 3.36 for a l-kf2 load resistor connected to the output of
the circuit (across uout)*
3.40 The circuit of Figure P3.36 is to be redesigned to respond to an input
signal vs{t) that is a negative pulse.
a) Determine a new value of Re that results in uout(^) = 0 for vs(t) = 0
(no change in other circuit values).
b) What is four for a —1.0 V input pulse?
c) What is the pulse amplitude required for uouT = Vcc ?
3.4 T Repeat parts (a) and (b) of Problem 3.40 for a load resistor of 1 kf2
connected to the output of the circuit. What is the maximum value of
uouT and for what input pulse voltage does it occur?

Rb2 ^ - < Rc = 150

200 kQ .. t > 3.3 kO.
VBEIon) = 0.7 V
fC£(sat) = 0.3 V
75 ka ^ : s
> ^ ka

3.42 A silicon transistor is used in the biasing circuit of Figure P3.42. With
appropriate capacitors, this basic circuit could be converted to a high-
gain signal amplifier. Although a direct solution of this circuit may be
obtained by writing the appropriate circuit equations, a simpler approach
is to utilize a Thevenin equivalent circuit for the base resistors.

a) Determine an equivalent circuit for Rbi, Rbi, and Vcc-

b) Using the circuit of part (a), determine the base and collector currents
of the transistor.
c) Determine vqe of the transistor.

204 THE BIPOLAR JUNCTION TRANSISTOR

3.43 Repeat Problem 3.42 for fip = 50 and = 300. Explain why the col¬
lector current of the transistor tends to have only a minimal dependence
on ^p.

3.44 Repeat Problem 3.42 for vgEion) — 0.6 and 0.8 V. Explain why the de¬
pendence of ic on VBE{on) is not very great.

150
0.7 V
0.3 V

Figure P3.45

3.45 The circuit of Problem 3.42 is to be used with an input voltage vin and
resistance Rin (Figure P3.45).

a) Determine the values of ig, ic, and vce for vin = 0.

b) What is the change in uouT for uin = 1 V?
c) What is the change in uoux for uin = — 1 V?
d) What is the voltage gain of the circuit, Auout/Auin?
3.46 Suppose that the emitter resistor Re of Figure P3.45 is replaced with an
ideal battery Vee. The potential of Vee is such as to result in the same
quiescent currents as obtained in Problem 3.45.

a) What is the value of Vee ?

b) What is the change in uouT for uin = —10 mV? For input signals that
vary in time, a large capacitor connected in parallel with Re will often
achieve the same result.
3.47 Repeat Problem 3.45 for Rpi removed from the circuit (an infinite resis¬
tance).

PF 100
VBE(on) 0.7 V
^ ^ ^ Figure P3.48
FCE(sat)
^IN

3.48 A silicon transistor is used in the emitter-follower circuit of Figure P3.48.

a) Determine the voltage transfer characteristic of the circuit vqut versus

Fin (0 < Fin < Vcc)-
b) Determine the current transfer characteristic of the circuit four versus
On (^out = Four/f^fi)-

PROBLEMS 205
 3.49 Repeat Problem 3.48 for Rb = 0.
3.50 Consider the emitter-follower circuit of Figure P3.48 with uin = 3 V.

a) Determine uouT-
b) Determine the output short-circuit current of the circuit.
c) What is the TheVenin equivalent resistance of the circuit?
d) Repeat the previous parts for win = 6 V.

PF 200
Rg 100 kQ
f B£(on) 0.7 V
Figure P3.51
VCEisit) 0.2 V
^IN

3.51 The transistor logic inverter of Figure P3.51 has a load capacitance Cl
of 20 pF.
a) Suppose bin has been equal to Vcc for a very long time and that it
is suddenly switched to zero at ^ = 0. Determine the times necessary
for Bout to reach 5 V and 9 V.
b) The input voltage bin is zero and is suddenly switched to Vcc — 0.
What are the times necessary for bqut to fall to 5 V and to 1 V?
3.52 Repeat Problem 3.51 for an input signal that has a high logic level of
only 5 V.
3.53 Repeat Problem 3.51 for Rc = 10
3.54 Repeat Problem 3.51 for Rg = 47
3.55 Repeat Problem 3.51 for transistors with = 50 and ^p = 200. Why
is only one transition of the output affected?
3.56 Suppose that the circuit of Figure P3.51 has two inputs as the logic NOR
gate of Figure 3.60(a) (both base resistors are 100 k^^). The input voltage
of the second input is zero. Repeat Problem 3.51 for this condition.
3.57 The supply voltage of the logic inverter circuit of Figure P3.51 is reduced
to5 V.

a) Determine the times necessary for bqut to reach 2.5 V and 4.5 V.
b) The input voltage bin is zero and is suddenly switched to Vcc at t = 0.
What are the times necessary for bqut to fall to 2.5 V and to 0.5 V?
3.58 A siliconNPN transistor is used in the logic inverter of Figure P3.58 in
which the load capacitance Cp is that of a data bus.

a) The input has been high (Vcc) and is suddenly switched to zero.
Determine the 10-to 90-percent rise time of bout-
b) The input is suddenly switched from zero to Vcc- Determine the 90-
to 10-percent fall time of bqut-

206 THE BIPOLAR JUNCTION TRANSISTOR

 c) The maximum 10- to 90-percent rise or fall time is not to exceed
200 ns. Redesign the circuit to achieve this.

Tcc = 5V

50

VBE{on) Figure P3.58

fC£(sat) 0.3 V
^OUT

3.59 A voltage with a periodic square waveform is often used to test logic
circuits. Suppose the input voltage of the circuit of Figure P3.58 is the
periodic square voltage of Figure P3.59. Determine the maximum fre¬
quency f for which the output voltage is a reasonable response for the
input voltage. It will be necessary to arrive at a quantitative definition of
a reasonable response.

^in(0 Vp = 2.0 V
f = l/T
Figure P3.59

T/2 T

3.60 The resistor-transistor logic NOR gate of Figure P3.60 has four input
voltages. Determine the transfer characteristic of the circuit four versus
va for vb — VC = vd = 0. What is the slope of the characteristic for the
transition region of the output voltage?

Rg = 22 k^2
Rc ^ IkQ
— 50
^OUT VBE(on) — 0.7 V
VCE(sat) = 0.2 V

Figure P3.60

3.61 Repeat Problem 3.60 for Rg = 10 kfi.

3.62 Consider the direct-coupled transistor logic NOR gate of Figure 3.60(b)
with Rc = 500 Q. The transition of uouT is to occur in a 0.5 V range
of VA with vg = 0. Determine the maximum value of Rg for a circuit
with a transistor having a common-emitter current gain of 50 to 200
(vgE(on) = 0.7 V, FC£(sat) = 0.2 V).

PROBLEMS 207
 3.63 Repeat Problem 3.62 for a logic NOR gate with five inputs. What are
the limiting factors related to the number of inputs for a gate with this
configuration?
3.64 A sinusoidal voltage is used for the input signal vs(t) of the RC circuit of
Figure P3.68. Assume the following:

Vs (t) — Vs cos ItT ft, VR{t) = Vr COS (Ik ft+ 6)

Determine Vr/Vs and 6 in terms of f and the element values of the

circuit. Show that the results depend on the product RC and not on
either individual value.
3.65 Evaluate the result of Problem 3.64 for f = 1 kHz, R = 10 and
C = 1 /iE
3.66 Use the results of Problem 3.64 to determine the frequency f for which
Vr/Vs = 1/V2. What is 0 for this frequency? What is the frequency for
which Vr/Vs — 0.9? What is the angle for this frequency?
3.67 The input voltage of the RC circuit of Eigure 3.69 is a symmetrical square
wave with a periodic frequency of 50 Hz and peak amplitudes of ±1 V.
Component values are R = 10 k^2 and 0=10 /zF. Determine and sketch
VR{t). What is the amount by which the output voltage changes over the
interval for which vs(t) = 1 V?

Tcc = 12V

ySf - 100

^out(0
VBE(on) = 0.7 V
np — 1.0

Figure P3.68

3.68 A silicon NPN transistor is used in the amplifier circuit of Figure P3.68.
a) Draw the quiescent equivalent circuit for the amplifier. Determine Iq
and Vc£.
b) Draw the small-signal equivalent circuit.
c) Determine the small-signal voltage gain Vout(t)/Vs(t).
d) Suppose Vs(t) = Vm cos cot. Determine the value of V^ that results in
a peak-to-peak value of 1 V for vouT(t).
3.69 Repeat Problem 3.68 for a transistor with j8p = 150.
3.70 Repeat Problem 3.68 for Rs = 0.
3.71 Suppose that a transistor with pp =200 is to be used in the circuit of
Figure P3.68. Determine a new value of Rr that results in a quiescent
value of 5 V for vout(0- Determine Vout{t)/Vs(t) for this circuit.

208 THE BIPOLAR JUNCTION TRANSISTOR

 Repeat Problem 3.68 for a circuit with a 270 ^2 resistor in series with the
emitter of the transistor.
Vcc = 15 V

= 100
VBE(on) = 0.7 V
np = 1.0
Mi)

3.73 An NPN silicon transistor is used in the small-signal common-emitter

amplifier of Figure P3.73.
a) Draw the quiescent equivalent circuit for the amplifier. Determine Ic
and VcE-
b) Draw the small-signal equivalent circuit.
c) Determine the small-signal voltage gain VL{t)/Vs{t).
d) A peak-to-peak value of 1V is required for vM). What is the minimum
peak-to-peak value of Vs{t) necessary?
3.74 It is desired to determine the small-signal output resistance of the ampli¬
fier circuit of Figure P3.73. To do this, find vM) for Rp ^ oo and the
load current of Rp for Rp 0.
3.75 Repeat Problem 3.73 for a transistor with fip — 30.
3.76 Repeat Problem 3.73 for a transistor with = 200.
3.77 Determine the quiescent power supplied by Vcc of the circuit of
Figure P3.73. What is the quiescent power dissipated by the transistor?
3.78 To reduce the quiescent power consumed by the circuit of Figure P3.73,
an engineer decided to double all resistance values.
a) Determine the quiescent power supplied by Vcc and that dissipated
by the transistor.
b) Determine the small-signal voltage gain vp{t)/vs{t) for this condition
{Rs = lkQ,Rp = l kJ2).
3.79 Repeat Problem 3.78 for a circuit in which all resistance values are mul¬
tiplied by a factor of 10.
3.80 A silicon transistor is used in the emitter-follower amplifier of Figure
P3.80.
a) Draw the quiescent equivalent circuit of the amplifier. Determine Ic
and Vc£.
b) Draw the small-signal equivalent circuit.
c) Determine the small-signal voltage gain vp(t)/vs{t).
d) Determine the small-signal current gain ip{t)/is{t) of the amplifier.

PROBLEMS 209
 Vcc = 12V

= 150

VBE{on) = 0.7 V
np = 1.0

Figure P3.80

3.81 Repeat Problem 3.80 for Rs = 100

3.82 Repeat Problem 3.80 for Rs — 0.
3.83 The logic circuits of Figure P3.83 utilize silicon FNF transistors. The
logic input voltage levels are 0 and Vcc- Determine a voltage truth table
for each of the circuits. What are the logic functions of the gates?

= 20 kQ
= IkQ
= 50
= -0.7 V
= -0.2 V

Figure P3.83

3.84 The output of the FNF transistor logic circuit of Example 3.13 is con¬
nected to a 50-pF capacitor. Determine the 10- to 90-percent rise and
fall times of vomit)- Assume input step functions with voltage levels of
0 and Vcc-

COMPUTER SIMULATIONS

C3.1 The emitter and collector characteristics of a common-base transistor,

as indicated in Figure 3.13, are to be obtained using a SPICE simulation.
Assume the transistor has parameters of ySp = 100, Is — 10“^^ A, and
np = 1.2. Using an appropriate circuit, obtain the characteristics for a
range of -10 to 0 mA for ip (steps of 2 mA) and for vcb up to 10 V.
Be sure to use a negative vcb to obtain the collector characteristic for all
positive values of collector current.
C3.2 A SPICE simulation of the common-base amplifier of Eigure 3.14 is
desired. Assume the transistor has parameters of ySp = 100,= 10~^^A,
and np = 1.2.

210 THE BIPOLAR JUNCTION TRANSISTOR

 a) Use a . DC analysis mode to obtain a plot of vcb versus Vs(-3 <Vs < SV).
What is the slope of this characteristic for i;5 small (the voltage gain) ?
b) Use a .TRAN analysis mode to determine the behavior of the circuit
for a sinusoidal input voltage Vs(t) that has an amplitude of 0,5 V and
a frequency of 1 kHz. On the basis of the peak-to-peak amplitude of
these curves, what is the voltage gain of the amplifier? This quantity
should be the same as that obtained in part (a).
c) Repeat part (b) for the largest input voltage for which an undistorted
collector-base voltage can be obtained.
C3.3 A simulation of the circuits of Problems 3.21, 3,22, and 3.23 is desired.
For the diodes, assume Is = 10“^^ A and n = 1.0, whereas for the tran¬
sistors, assume fip = 50, Is — 10“^"^ A, and np — 1.0. If the three circuits
are included in a single circuit file and run simultaneously, their transfer
characteristics can be obtained on a single graph. A single input voltage
source uin can be used for the three circuits. The derivative of a trace
can be obtained by requesting DV(N) for a Probe display. On a separate
graph, obtain curves of for each of the circuits. What is the value
of the derivative of each curve for uouT = 2.5 V?
C3.4 Solve the common-emitter transistor amplifier circuit of Example 3.3
using a SPICE simulation. Use the values of Rb and Vbb determined in
part (a) and, for the transistor, assume that np = 1.4 and that C has a
value that yields f c = 1 oiA for UBf: = 0.7 V. Use a . TRAN mode of analysis
and a frequency of 1 kHz for the sinusoid. By using three circuits, curves
for all three values of fy may be obtained on a single graph (similar to
those of Figure 3.31).
C3.5 Solve the cascade amplifier circuit of Example 3.4 using a SPICE simu¬
lation. Assume the transistor has parameters of fy = 50, Is — 10~^^ A,
and Up — 1.0. Obtain curves of uouTi and fouTZ versus wnsf. Compare
the resultant response with that of Table 3.2. Determine the slopes of the
output voltages for uouTi = 2.5 V and compare these values with the
analytically obtained values.
C3.6 A simulation of the transistor circuit of Problem 3.45 (Eigure P3.45) is
desired. Assume the transistor has parameters of = 150, C = 10“^^ A,
np = 1.0, and Vaf = 100 V.

a) Using a .DC sweep, determine the dependence of uout on uin (—10 <
niN < 10 V). What is vom and the slope of the characteristic for uin =
0? What are the maximum and minimum values of wqut?
b) A transient (. TRAN) solution for an input sinusoidal signal sin lit f t,
is desired (/ = 500 Hz). Obtain uout for = 4.0 V. What are the
maximum and minimum values of uouT? What is the ratio of wouTp-p
to uiNp-p? This ratio should be nearly the same as the magnitude of
the slope obtained in part (a).
c) Repeat part (b) for = 8 V. What are the maximum and minimum
values of uouT?

COMPUTER SIMULATIONS 211

 ycc = i5V

Rc
SkSi ^ 100
Is = 10“^^ A
Figure C3.7
^OUT2
+
^OUTl

VpB 6V

C3.7 The transistor circuit of Figure C3.7 has identical collector and emitter
resistors.
a) From a static solution (. DC mode) obtain plots of the output voltages
and the collector-emitter voltage of the transistor. A range of ±6 V is
needed for Vs.
b) Consider the case for Vs(t} being a sinusoidal signal sin In ft
with an amplitude of 1 V and a frequency of 1 kHz. Using a .TRANS
solution, obtain plots of the input voltage and the two output voltages.
What are the gains for varying voltage components? What is the input
resistance for the varying component of the input voltage, that is, the
ratio of the peak-to-peak input voltage divided by the peak-to-peak
value of the input current? This circuit is known as a phase splitter
because, for a sinusoidal input voltage, the varying components of its
output voltages are 180° out of phase.
C3.8 Repeat Simulation C3.7 using the maximum input signal amplitude
for which undistorted outputs are achieved. Determine the cause of the
distortion by observing vqe •

C3.9 A SPICE simulation of the logic inverter of Figure 3.64 is desired. Assume
the transistor has parameters of =50, Is = 10~^^ A, np = 1.0, and
Vap = 50 V.
a) Determine the static transfer characteristic of the gate.
b) Determine, using a . TRAN solution, the dynamic behavior of the gate.
Use an input voltage that has a 0- to 5-V transition at t = 0 and a
downward transition at ^ = 50 ns. Compare the simulation results
with the analytic results of Example 3.8.
C3.10 Repeat Simulation C3.9 for a transistor with a base-to-collector capacitor
of 5 pF. This capacitor corresponds to the junction capacitance of the
transistor.

C3.11 A diode-transistor logic NAND gate is indicated in Figure 3.60(c). As¬

sume the transistor has parameters of ^p = 50, Is = 10“^^ A, np — 1.0,
and Vap = 50 V and that each diode is a diode-connected transistor (base
and collector tied together). The parameters of the circuit are Vcc = 5 V,
Rc = 1 k^2, and Rp = 20 k^2. Use SPICE to determine the static transfer

212 THE BIPOLAR JUNCTION TRANSISTOR

 characteristic of the gate uouT versus va for vb = 0 and 5 V. For ub = 5 V,
determine for i>ouT — 2.5 W.
C3.12 An open-collector TTL NAND gate is indicated in Figure 3.62(a). As¬
sume that the gate has only a single input; it therefore behaves as a logic
NOT gate. For normal input voltages, the input protective diode is re¬
verse biased (it is therefore not required for a simulation). Assume the
transistor has parameters of = 50, Is — 10“^^ A, np = 1.0, and
Vap = 50 V.
a) Determine the static transfer characteristic of this circuit (0 <VA<

5 V). Determine for i;out = 2.5 V.

b) Determine the input characteristic of the gate, that is, obtain a plot
of the input current versus the input voltage.
c) Assume that the output of the gate is connected to a 50-pF load ca¬
pacitor. Determine the transient behavior of uqut for an input voltage
that has a 0- to 5-V transition at ^ = 0 and a 5- to 0-V transition at
f = 50 ns. What are the delay times of the output voltage, that is, the
time required for the output to reach its midvalue?
C3.13 Repeat Simulation C3.12 for a TTL gate with a totem-pole output circuit
(Figure 3.62(b)). Assume that the diode of the output circuit is a diode-
connected transistor (collector and base tied together).
C3.14 A SPICE simulation of the transistor circuit of Figure P3.73 using the
. AC analysis mode is desired.

Cs = 10 /rF (in series with Rs)

Cl = 10 /xF (in series with Rp)
Ce = 100 /xF (in parallel with Rp)
Cpc = 5 pF (base-to-collector)

Follow the approach of Example 3.11 to obtain voltage, current, and

power gains for a frequency range of 1 Hz to 1 MHz.
C3.15 A SPICE simulation is desired to verify the analytic solution of Exam¬
ple 3.12. Assume that the transistor has parameters of 4 = 5 x 10“^^ A,
np = 1.0, and Yaf = 100 V, and that Cs = 0.1 /xF and Cp = 0.2 /xF.
a) Compare the quiescent currents and voltages of the devices (produced
by an . OP statement) with the analytically obtained quantities.
b) Obtain plots of the magnitude and phase of the small-signal voltage
gain of the amplifier (1 Hz < /" < 100 kHz). At what frequency
is the response 0.707 of its high-frequency value? This is the lower
half-power frequency because power is proportional to the square
of the voltage. At what frequency is the response 90 percent of its
high-frequency value?
c) Obtain plots of the magnitude and phase of the input impedance of
the amplifier. Compare the high-frequency value (it should be real)
with the analytic result.

COMPUTER SIMULATIONS 213

 C3.16 The transistor amplifier of Example 3.13 (Figure 3.97) uses a PNP tran¬
sistor. For a SPICE simulation, a PNP designation in the .MODEL
statement is required. By convention, the parameters 4 and Vaf are pos¬
itive - appropriate minus signs are introduced within the program. As¬
sume the transistor has parameters of =50, Is — 10“^^ A, np = 1.2
and Vaf = 50 V.
a) Obtain a static solution (. DC) and a plot of uouT versus uin- Compare
the slope of this characteristic with the analytic result.
b) Consider the case for which a 30-pF load capacitor Ci is connected
in parallel with the output of the circuit. Assume ujn has an upward
transition, 0- to 5V, at ? = 0 and a downward transition Att — 1 /zs.
What are the rise and fall times of the output voltage (10- to 90-
percent change) ? Obtain a plot of the time-dependent collector current
of the transistor. Why is the upward transition of four much smaller
than its downward transition?
C3.17 A SPICE simulation to determine the behavior of the amplifier with com¬
plementary symmetry of Example 3.14 is desired. (See Simulation C3.16
for modeling the PNP transistor.) Assume 7^ = 3 x 10~^® A, np = 1.4,
and Vaf = 100 V for the “power” transistors of the circuit.
a) Obtain a static transfer characteristic of the circuit, that is, uout ver¬
sus uiN. Also obtain curves of the currents out of the emitters of the
ip) and ip. Does QN provide the load
transistors (in the direction of
current when din is positive and QP when din is negative, as expected?
b) Assume din is a sinusoidal voltage V^ sin In ft with V^ = 25 V and
/” = 1 kHz. Using a transient solution (.TRANS), obtain a plot giv¬
ing time dependence of dout- On a second graph, obtain plots of
the instantaneous powers dissipated by the load resistor and by the
collectors of each of the transistors {Ic'^ce)-

DESIGN EXERCISES

D3.1 A common-emitter transistor amplifier is shown in Figure D3.1. A value

of Dour = 5 V for Din = 0 V and = - 5 for dout = 5 V is desired.
Determine values for Rgi and Rbi that achieve these conditions. What is
the effect of using a transistor with = 150 in the circuit? What would
be the effect of designing the circuit for a transistor with ^p = 125?
Would the resultant circuit work reasonably well for 100 < ySf < 150?
D3.2 In the common-emitter amplifier indicated in Figure D3.1, a 1-k^^ re¬
sistor is connected in parallel with dout- A value of dqut = 2.5 V for
Din = 0 V and = —5 for dqut = 2.5 V is desired. Determine values
for Rbi and Rbi that achieve these conditions. What is the effect of using
a transistor with fip = 150 in the circuit? What would be the effect of
designing the circuit for a transistor with = 125? Would the resultant
circuit work reasonably well for 100 < /Sf < 150?

214 THE BIPOLAR JUNCTION TRANSISTOR

D3.3 Suppose that a 100 resistor Re is connected in series with the emitter
of the transistor of Figure D3.1. Repeat Design D3.1 for this circuit.

100
0.7 V
Figure D3.1

D3.4 In the transistor circuit of Figure 3.36, Vcc = 5 V, Rc —i — 50,

and VBE{on) = 0.7 V. Determine values for the base resistors that result in
an output transition at djn ^ 2.5 V and an output transition that has a
slope of —5.

D3.5 Repeat Design D3.4 for a circuit with the configuration of Figure 3.48
(component values and transistor parameters of D3.4). Values for Re
and Vee are to be determined.
D3.6 Consider the transistor amplifier circuit of Figure 3.51 that has an input
voltage source with an equivalent series resistance Rjn of 1 Modify
the circuit so that the LED turns on at uin = 0 V.
D3.7 Modify the transistor amplifier circuit of Figure 3.51 so that the LED is
on for a negative value of ujn and turns off when uin becomes positive.
An additional transistor will be required.
D3.8 Design a resistor-transistor logic NOT gate with the configuration of
Figure 3.55 (Vcc = 5 V). Assume the transistor has parameterrs of ^e =
50 and VBE(on) = 0.7 V. The load capacitance is 50 pF and, for static
conditions, the transistor is to be saturated for din > 2 V. The delay
time is to be no more than 50 ns (50-percent change in the output). To
minimize power dissipation, use maximum resistance values.
D3.9 Consider the direct-coupled logic NOR gate of Figure 3.60(b) (Vcc =
5 V). The output of the gate is to be capable of providing the input
signal of at least four similar gates (a fan-out of 4). It is desired that
I’OUT > 4.5 V for a high output. It is also desired that uqut = i^C£(sat) for
a single input voltage of 2 V or greater. Assume Rc = 1 klf2. Determine
Rb for a transistor with jSp — 50 and VBE{on) — 0.7 V. Suppose that a
transistor with = 100 in the circuit designed for the transistor with
Pp =50. What would be the effect of this change?
D3.10 Consider the transistor biasing circuit of Figure D3.10. A nominal collec¬
tor-emitter voltage of 5 V and a collector current of 5 mA is desired.
Determine values of Rc and Rp that achieve this for a transistor with
VBEion) = 0.7 V and 100 < pp < 200. Minimize the variation in the
collector-emitter voltage for different transistors.

DESIGN EXERCISES 215

 D3.n Repeat Design D3.10 for the circuit of Figure D3.11. Assume Re =
0.5 Rc and use resistance values for the base resistors that are large com¬
pared with of the transistor.

Figure D3.10 Figure D3.11

D3.12 A transistor amplifier circuit with the configuration of Figure 3.83 (but
with different component values) is to be designed. The circuit is to work
with transistors with VBE{on) = 0.7 V and 100 < ySf < 200. The source
resistance R5 is 10 the load resistance Re is 1 k^^, and Vcc = 10 V.
The amplifier is to have a voltage gain with a magnitude of at least 20.
The peak-to-peak undistorted output voltage is to be at least 1 V. Assume
an infinite capacitance. Verify, using SPICE, that your design is indeed
valid for transistors with — 100 and 200.

216 THE BIPOLAR JUNCTION TRANSISTOR

 CHAPTER FOUR

THE METAL-OXIDE FIELD-EFFECT TRANSISTOR:

ANOTHER ACTIVE DEVICE

The idea of a field-effect transistor predates that of the junction transistor by

two decades. In the late 1920s, Julius Edgar Lilienfeld proposed using an
electric field to control the conductance of a semiconductor crystal (Sah 1988).
Although Lilienfeld was granted three patents for proposed devices, there is no
evidence that he was able to build an actual working transistor, probably be¬
cause the required semiconductor technologies were not available at the time. It
was Shockley’s 1939 consideration of a related field-effect process, the “Schot-
tky gate,” that initiated his thought processes and ultimately led to the invention
of the point-contact transistor in 1948 (Shockley 1976). Shockley recognized
that a surface field-effect played a role in the operation of this device (Shockley
and Pearson 1948). Not only did the invention of the bipolar junction transis¬
tor follow this device, but so too the junction field-effect transistor (Shockley
1952).
Semiconductor field-effect devices rely on a single type of carrier for conduc¬
tion, that is, either free electrons or holes. Hence, these devices are frequently
referred to as unipolar transistors (single-polarity charges). The earliest commer¬
cially produced field-effect device is the junction field-effect transistor (JFET) in
which conduction is controlled by a reverse-biased junction diode. This device,
therefore, is characterized by a very high input resistance (negligible diode current
for static conditions). Junction field-effect transistors are utilized both as discrete
devices and, most frequently, in conjunction with bipolar junction transistors in
integrated circuits.
It is a more recent development, however, that of the metal-oxide semiconduc¬
tor field-effect transistor (MOSFET), that has had perhaps the most profound
effect on the design of electronic systems. This transistor was first proposed by
Kahng in 1960 (Kahng 1976), and its theory of operation was published 3 years
later (Hofstein and Heiman 1963). Very-large-scale integrated circuits rely on
this device, which is, structurally, considerably simpler than the bipolar junc¬
tion transistor. In addition, MOSFET devices require fewer processing steps and
can be made considerably smaller than bipolar junction transistors. As a result.

217
 p-type substrate

n-type source

Figure 4.1: Metal-oxide field-effect transistor.

extremely high device (and therefore logic) densities can be achieved (Hittinger
1973).
The basic structure of a MOSFET device with a p-type substrate is illustrated
in Figure 4.1. This device has two heavily doped n-type semiconductor wells,
labeled source and drain, embedded in the p-type substrate. A metallic gate
extends between the wells and is insulated from the substrate by a thin silicon
dioxide layer. Because silicon dioxide is a dielectric, the gate and substrate form a
capacitor in which a gate-to-substrate potential results in induced surface charges
at the boundary of the dielectric and the substrate.
To gain an appreciation of the operation of this device, suppose that the gate is
floating (no connection) and that it has no residual charge. An equivalent circuit
consisting of two junction diodes applies (Figure 4.2). For no connection to the
substrate, the current between the source and drain will be negligible regardless of
the polarity of an externally applied voltage difference (one diode will be reverse
biased). This is also the case for a substrate connection if the source and drain
potentials relative to those of the substrate are zero or greater.
The capacitive effect of the gate is utilized to induce surface charges on the
substrate that, in turn, provide a current path between the source and drain of the
device. Consider a positive gate-to-substrate potential that induces negative sur¬
face charges on the substrate between the n-type source and drain of the device.
Because the surface charge density is proportional to the electric field of the di¬
electric, extremely thin oxide thicknesses, no more than a fraction of a micron, are
required to achieve useful charge densities for a reasonable potential difference.
For small gate voltages, the negative substrate charges are the result of
mobile holes moving away from the dielectric-substrate boundary, thus leav¬
ing behind unneutralized acceptor atoms. A further increase in the gate volt¬
age results in the generation of free electrons (mobile
Figure 4.2: Equivalent circuit for a carriers) as a result of a shifting of the internal energy
MOSFET device with a floating gate. levels of the semiconductor. These free electrons pro¬
vide a current path between the drain and the source of
source drain
the device. For a positive drain-to-source potential, free
electrons originate at the n-type source and are collected
by the drain. It should be noted that MOSFET devices
generally have a symmetrical physical structure - the
substrate source and drain are not physically distinguishable. It

218 THE METAL-OXIDE FIELD-EFFECT TRANSISTOR

 gate mcreasmg
+ ^DS 1 ^GS
^GS

source substrate ^DS

(a) MOSFET symbol (b) drain characteristic

Figure 4.3: MOSFET symbol and drain characteristic.

is the external potentials that determine which w-type region functions as a source
or a drain. Hence, the device has a bidirectional property - a characteristic that
is extremely useful.
A MOSFET device is a four-terminal element, a characteristic that complicates
determining its behavior in a circuit. However, if the source and substrate are
connected together, as in Figure 4.3, the equivalent of a three-terminal device is
obtained. The drain current depends on both the gate-to-source voltage (the same
as the gate-to-substrate voltage) and the drain-to-source voltage (Figure 4.3(b)).
A gate-to-source voltage vgs greater than a threshold value Vr is required for a
drain current, and for vgs > Tj the drain current increases for an increasing value
of dg5- Because the metal gate is one terminal of a capacitor, the gate current for
static conditions is essentially zero. Therefore, to the extent that the current of
this capacitor is negligible, the power provided by an input signal connected to
the gate is likewise negligible.
To illustrate the operation of a MOSFET device, consider the basic circuit of
Eigure 4.4, a circuit analogous to that of a bipolar junction transistor (Figure 3.3).
A transfer characteristic is readily obtained by drawing a load line on the drain
characteristic of the device. To construct an amplifier, an input biasing voltage
would be inserted in series with an input signal source. Alternatively, the transfer
characteristic (Figure 4.4(b)) is essentially that desired for a logic NOT gate. For
an integrated circuit, a second MOSFET device is used in place of the drain resis¬
tor Rd. As a result, logic circuits are fabricated entirely from MOSFET devices - a

Figure 4.4: Common-source circuit and transfer characteristic.

^OUT

Vt VdD
(a) common-source circuit (b) transfer characteristic

THE METAL-OXIDE FIELD-EFFECT TRANSISTOR 219

gate decided fabrication advantage because

1 /
MOSFET devices tend to require a much
smaller chip area than a resistor. Both
* * NAND and NOR operations may be ob-
- tained using additional devices.
In addition to being used for conven¬
Figure 4.5: MOSFET switch. tional logic gates, MOSFET devices are
frequently used as logic switches. When
an integrated circuit is fabricated, it is generally desirable that a common sub¬
strate be utilized for all devices. If a p-type substrate is used, as for the device
of Figure 4.1, the substrate is connected to the lowest potential of the circuit,
normally the common ground of the circuit. This ensures that neither the source
nor the drain diode of the device will be forward biased. For a sufficient gate-to-
source voltage, the device behaves as a relatively low, albeit nonlinear, resistance.
However, for a zero gate-to-substrate voltage, the device behaves as an open cir¬
cuit. This property of MOSFET devices provides an additional logic function -
a bidirectional switch (Figure 4.5).
A memory cell of a dynamic random-access memory (DRAM) uses a MOS¬
FET device as a bidirectional switch. It has been pointed out by Sah that this
one-transistor memory cell is probably the most abundant man-made [s/c] object
on the planet earth (Sah 1988, p. 1301). The single transistor memory cell was
invented by Robert H. Dennard in 1966 (Dennard 1984). Rather than using an
electronic flip-flop requiring at least four MOSFET devices for the storage of
a binary bit, Dennard proposed an ingenious circuit that requires only a single
MOSFET switch and capacitor. The memory state (logic 1 or 0) is associated
with the charge of the capacitor (charged or uncharged).
Although Dennard is credited with inventing the one-transistor semiconduc¬
tor memory cell, the concept of using a capacitor as a memory element goes
back to the 1940s computer of John V. Atanasoff (Mackintosh 1988). His early
computer (some historians argue precomputer) used a rotating memory disk of
50 capacitors for data storage. A capacitor was either charged (it had a poten¬
tial difference) or was uncharged to represent a binary 1 or 0. A contact on the
periphery of the disk was used to read or write an individual capacitor as the
connection to the capacitor rotated past the contact. As is true for today’s semi¬
conductor memories, a refresh circuit was required to compensate periodically
for charge leaking from the capacitors, which is the consequence of unavoidable
dielectric losses.
The configuration of a modern dynamic memory is illustrated in Figure 4.6 -
additional rows and columns are used for typical memory chips (1024 rows x
1024 columns for a 1-Mbit memory). To access a particular memory cell, the ap¬
propriate column and row needs to be addressed. A high voltage (logic 1) applied
to a row line turns on all the MOSFET switches of that row, connecting each
memory capacitor to its column line. If the capacitor was initially charged, its
charge will increase the potential of an initially uncharged column line. This
increase is sensed by the column circuit, and the result is transferred to the

220 THE METAL-OXIDE FIELD-EFFECT TRANSISTOR

 regenerative
read/write circuits

read
write

Figure 4.6: An elementary 16-bit dynamic memory. Each memory element re¬
quires but a single MOSFET device with the capacitor being the substrate to
source-drain capacitance of the device.

read-output line through the column select circuit. Connecting the memory ca¬
pacitor to the column line and circuit, which has a much larger capacitance to
ground, depletes the charge of the memory capacitor. A regenerative-type circuit
is utilized to restore the voltage and hence the charge of the memory capacitor. To
write to a memory cell, either a high or low voltage is applied to the appropriate
column line.
Periodically the memory cells must be read and their voltage for a charged
condition restored. Because each column has its own regenerative circuit, an en¬
tire row can be refreshed simultaneously. It is, however, necessary to sequence
through each row to refresh the entire memory. Depending on the memory char¬
acteristic, it must be refreshed every few milliseconds or less.
An understanding of the physical operation of a MOSFET device is neces¬
sary to devise suitable equivalent circuit models. These models will then be used
to develop an understanding of several commonly used MOSFET circuits. It is
these circuits, when combined in very-large-scale integrated circuits, that have
revolutionized the diversity and complexity of modern electronic systems.

4.1 FIELD-INDUCED CARRIERS: THE PHYSICS OF A MOSFET DEVICE

Although a quantitative description of a MOSFET device premised on a detailed
understanding of semiconductor physics is beyond the scope of an introduc¬
tory text, a qualitative description of the key physical mechanisms involved is
desirable. The device of Eigure 4.7, a device with a p-type substrate in which
free electrons are the current carriers, will be considered. Because the carriers of
the MOSFET device are free electrons that form a channel between the source
and drain, an ^-channel designation is used. To simplify the analysis, a common

4.1 FIELD-INDUCED CARRIERS: THE PHYSICS OF A MOSFET DEVICE 221

 — oxide thickness, m
= permitivity of oxide, F/m
/x„ = surface mobility of free
electrons, m^/V-s
u .s
O
CC
to u Cox = gate capacitance, F/tn
75
T5
Vj = threshold voltage, V
- ^GS +

k-L-^

Figure 4.7: Metal-oxide field-effect transistor configuration.

connection for the source and substrate will be assumed; the effect of a source-
to-substrate bias will be treated later. Complementary devices with an n-type
substrate in which holes are the current carriers, that is, a p-channel MOSFET
device, are also widely used.
It is the gate-to-substrate capacitance, the result of the thin silicon dioxide
dielectric that separates the gate and substrate, that plays a pivotal role in the
behavior of the device. For a zero gate-to-substrate bias (Figure 4.8(a)), the sub¬
strate, except in the vicinity of the «-type regions, tends to have a uniform dis¬
tribution of holes, and the hole density is approximately equal to the acceptor
doping density. For each hole, however, there is an acceptor atom tending to
have an extra valence electron that completes its valence bonds. Hence, charge
neutrality prevails.
To begin, consider the case for a small gate-to-substrate voltage (Figure 4.8(b)).
This results in a downward-directed electric field within the dielectric approxi¬
mately equal to the voltage divided by the dielectric thickness vcs/tox- A positive
surface charge therefore resides on the gate and an equal negative charge on (or
slightly within) the p-type substrate (surface charge densities of ±€oxVGs/tox)-
Within the substrate, the negative surface charge is the result of the mobile

Figure 4.8: The effect of a gate voltage.

gate gate

e e e free electrons
© © © _ _ _ depletion
holes _ _ _ depletion
© © © © © © , ,
holes © © © , ,
© © © holes
substrate
© © ©
substrate
substrate
(a) Vqs = 0 (b) 0 < Ugs < Ft (c) Vj < Vqs

222 THE METAL-OXIDE FIELD-EFFECT TRANSISTOR

holes’ moving away from the surface of the substrate - an effect of the elec¬
tric field’s penetrating the substrate. However, acceptor atoms that are locked
into the semiconductor crystalline structure are not mobile. Hence, the surface
region is depleted of holes, leaving it with a net negative charge (a depletion
region).
The thickness of the depletion region tends to increase as the gate-to-substrate
voltage is increased until a critical gate-to-substrate voltage is reached. This is the
threshold, voltage Vp.* For larger gate-to-substrate voltages, a new phenomenon
occurs: some valence electrons near the surface of the substrate gain sufficient
energy to escape their valence bonds and become free electrons (Figure 4.8(c)).
This is the result of a bending of the semiconductor energy levels caused by the
electric field produced by the gate-to-substrate voltage. It is the free (and hence
mobile) electrons of the very thin inversion layer that provide the current path
between the drain and source of a MOSFET device.
With these considerations in mind, let us return our attention to the MOS¬
FET device of Eigure 4.7 having a common substrate-source connection. As¬
sume, initially, that the drain-to-source voltage is zero {vds = 0) and that a
gate-to-source voltage less than the threshold voltage is applied (0 < vgs < Tp).
This results in a substrate depletion region, as illustrated in Eigure 4.8(b). Be¬
cause the negative charges of the depletion region are not mobile, they do not
provide a current path between the drain and the source. Hence, the drain cur¬
rent io is zero if a small voltage, vds-, is applied. Eurthermore, the drain cur¬
rent remains zero for any positive value of vds (providing breakdown does not
occur).
for VGS < Vt and v^s > 0, io — O cutoff condition (4.1)

This is the cutoff region of operation.

Suppose that vgs is now increased so that it is greater than the threshold volt¬
age, whereas vds remains equal to zero. The substrate condition of Eigure 4.8(c)
with a free electron inversion layer now prevails. Free electrons provide a current
path for the device - in essence, they “connect” the source to the drain of the
device. The stored charge of the gate-substrate capacitor is its voltage multiplied
by its capacitance. This charge resides on the gate surface and in the vicinity of
the substrate-oxide boundary (a positive quantity on the gate and an equal but
negative quantity on the substrate). The surface charge density (qs expressed in
C/m^), is the capacitance per unit area (Co* expressed in F/m^) times the voltage
difference:

qs = -CoxVGS C/m^ (4.2)

In Eq. (4.2) it is assumed that the gate-to-source potential is nearly entirely
across the dielectric - a generally valid assumption. Only that portion of the

* It should be noted that the symbol Vt has already been used in conjunction with diodes and bipolar
junction transistors (Vt = kT/e ^ 25 mV for room temperature). Ideally, a different symbol should
be used for these two totally unrelated voltages. Unfortunately, the same symbol is used in most of
the published literature. Because the behavior of both devices is seldom considered simultaneously, a
confusion of terms rarely arises.

4.1 FIELD-INDUCED CARRIERS: THE PHYSICS OF A MOSFET DEVICE 223

 surface charge due to a gate-to-source voltage in excess
of the threshold voltage Vj gives rise to free-electron
charges:

= -CoxivGS - Vt) C/m^ free electrons (4.3)

The conductivity of the channel formed by the free elec¬

'^DS
trons may now be obtained. The width of the channel
is W, its length is L, and the surface mobility of free
Figure 4.9: Drain current versus
drain-to-source voltage. electrons is

G = iXnq's'^/L = iXnCoxW/L(vGs - Vt) = Hvgs - Vt) S

where k = UnCoxV/jL A/V^

The quantity k is known as the transconductance of the device. For a very small
drain-to-source voltage, the conductivity calculated for vds = 0 would be ex¬
pected to yield the drain current of the device as follows:

Id ^ Gvds ^ H^gs — Vt)vt)s, uds small (4.5)

This results in a linear dependence of drain current on drain-to-source voltage

for a given gate-to-source voltage (Figure 4.9).
The basis for the naming of the n-type regions should now be clear. Free
electrons originate at the source, traverse the channel, and leave the device
at the drain. Although the electron flow is from source to drain, the direc¬
tion of conventional current is in the opposite direction, that is, from drain to
source.
A linear current-versus-voltage relationship of Eq. (4.5) would not be expected
to prevail as vds is increased. A potential difference will exist from one end to
the other of the channel, which, in turn, implies that the voltage across the oxide
varies along the length of the channel. At the source end, the voltage is vgs, but at
the drain end it will be smaller, namely vgs — vds- Therefore, the surface charge
density at the drain end is reduced and the current is less than that for a uniform
channel. A detailed analysis predicts the following:

for Vgs > Vt and 0 < vds < vgs — Vt

io = k.[{vGS — Vt)vt,s — 2^Ds]

This expression is obtained by accounting for the variation of gate-to-substrate

potential that occurs between the source and drain of the device. It is valid
only for a gate-to-source potential greater than the threshold voltage, that is,
VGS — Vds > Vt. Flence, Eq. (4.6) is valid only for vds < vgs — Vt.
The condition for which vds — vgs ~ Vt is known as pinch-off. The surface
charge density of free electrons at the drain end is zero because the gate-to-
drain voltage is only Vj. Does this imply that for a further increase in vds the
drain current will fall to zero? For this condition, the conducting channel of free
electrons will no longer contact the drain region. Abrupt discontinuities in the

224 THE METAL-OXIDE FIELD-EFFECT TRANSISTOR

behavior of electron devices are not common. The current of a MOSFET device
does not fall to zero when v^s exceeds vgs ~ Vj, rather it remains equal to a
saturation value predicted by Eq. (4.6) for vds = vgs — Vt-

for VGS > Vt and vds > vgs - Vt

io = ijivGs — Vt)^

For Vds > vgs — currentfarriers, in effect, cross the depletion region between
the end of the channel and the drain, and the drain current is independent of the
drain-to-source voltage of the device.
To summarize, the MOSFET device has three distinct regions of operation. For
small gate-to-source voltages, voltages less than the threshold voltage, vgs < Vt,
the device is cut off - its drain current is zero. For larger gate-to-source volt¬
ages,Vgs > Vt, and for small drain-to-source voltages, namely vds < vgs — Vt,
the drain current depends on vgs and vds- This region of operation is desig¬
nated by various terms such as linear, resistance, below pinch-off, and triode.
The triode designation is the result of a recognition that the behavior of this
device is similar to the behavior of the triode vacuum tube (a device familiar
to the engineers and scientists who developed field-effect devices). The triode
designation appears to have the widest acceptance and will thus be used in
this text. Large values of drain-to-source voltage result in a saturation of the
drain current. This region of operation is referred to as above pinch-off or sat¬
uration. Saturation will be used in this text.* These results are summarized in
Table 4.1.
On the basis of the preceding considerations, the behavior of a MOSFET device
may be described by two parameters: its transconductance k and its threshold
voltage Vj. The MOSFET characteristic of Figure 4.10 was obtained for k —
0.8 mhfV^ and Vj = 2.0 V, For gate-to-source voltages of 2 V or less, the drain
current is zero. For a gate-to-source voltage of 3 V, the expression for the triode

Table 4.1 Drain Current of an n-channel MOSFET

Region Drain-Source Voitage Drain Current

Cutoff Vgs < Vt Vds > 0 =0

Triode 0< Vds < VGS — Vt io = k [(UGS — Vt)vdS - ^Vqs]

Conduction
Vgs > Vt
Saturation Vds > Vgs — Vt io = -^{vgs - Vrf

* Unfortunately saturation is also used for the region of operation of the bipolar junction transistor
(BJT) that occurs for small collector-to-emitter voltages corresponding to a forward biasing of the base-
collector junction of the device. For a BJT, saturation is the result of an external circuit limitation,
namely, insufficient voltage. On the other hand, the saturation of a MOSFET occurs for large drain-
to-source voltages; in essence, the opposite condition to that for a BJT. Unless one is dealing with a
circuit having both types of devices, it is generally clear which type of behavior is being described. It is
important, however, to remember that the term saturation is used to describe rather dissimilar circuit
characteristics of BJT and MOSFET devices.

4.1 FIELD-INDUCED CARRIERS: THE PHYSICS OF A MOSFET DEVICE 225

 ^DS - ^GS ■

k = 0.8 mAA^^
yT = 2 V

volts

Figure 4.10: Drain characteristic of a MOSFET device obtained using the

equations of Table 4.1.

region applies when drain-to-source voltages are less than 1 V. Larger drain-
to-source voltages result in a saturation of the drain current io = 0.4 mA (last
line of Table 4.1 and Eq. (4.7)). Higher gate-to-source voltages result in higher
drain-to-source voltages that correspond to the dividing line between the triode
and saturation regions (the dotted line on Figure 4.10).
The current expressions of Table 4.1 are for static conditions. Capacitive cur¬
rents must also be considered for rapid voltage changes. Equivalent capacitances
exist between the gate and the source and the gate and the drain of the device.
These capacitances are the result of the close proximity of the edges of the gate
and the source and drain regions (a small overlapping of the gate and these re¬
gions is common). There is also an equivalent gate-to-substrate capacitance, the
result of charges due to the electric field of the oxide layer. Between the source
and the substrate and the drain and the substrate there may also be capacitive
currents resulting from the junction diodes between these regions. In addition,
the dynamic response of the mobile charges of the channel must also be taken into
account for rapid voltage changes. Numerous texts are available that provide a
comprehensive quantitative treatment of relevant solid-state physics principles
and also discuss the operation of other types of MOSFET devices (Milnes 1980;
Pierret 1990; Pulfrey and Tarr 1989; Schroder 1987; Streetman 1990; Sze 1981;
Taur and Ning 1998; Tsividis 1987).

SPICE MODEL
The SPICE computer program includes a set of algorithms to simulate the be¬
havior of a MOSFET device. An indirect specification is used for the transconduc¬
tance parameter k, that is, a parameter known as the transconductance process
parameter k' (KP in SPICE).

k = KP = l^n^ox — ^n^ox!^oxi k = k W/L, (4.8)

The process parameter KP is specificied in a . MODEL statement, whereas values of

W and L are specified in the device statement. Default values of 100 /rm for both
W and L are incorporated in the MicroSim PSPICE simulation program (other
versions of SPICE may have different default values). If Wand L are not explicitly
specified, the default values are automatically used - an .OPTIONS statement

226 THE METAL-OXIDE FIELD-EFFECT TRANSISTOR

 MOSFET Drain Characteristic
2 Ml 2 1 0 0 MOSTRANS
VGS 1 0
VDS 2 0
.MODEL MOSTRANS NMOS KP=50U
+LAMBDA=.02 VTO=l
.DC VDS 0 6 .1 VGS 1 5 .5
.PROBE
.END
Figure 4.11; SPICE circuit and file for determining the drain characteristic of a MOSFET device.

may be used to change the default values. It is not infrequent thatW and L are
not known, that is, k is either specified or has been determined experimentally.
Because the default values of W and L are equal, KP is numerically equal to k if
W and L are not specified.
To illustrate the computer simulation of a MOSFET device, the circuit and
SPICE file of Eigure 4.11 will be used to obtain a drain characteristic. Device
parameters of ^ = 50 and Vj = 1.0 V have been assumed. An M is used
for the MOSFET label, and four terminals are specified: drain, gate, source, and
substrate (in this order). This is followed by an arbitrary device name (MOSTRAN).
W and L were to be specified, they would follow the device name (for example,
If
W=800U L=400U). With no specification, the default values result in W/L — 1.
The .MODEL statement includes a device-type NMOS for an w-channel device (PMOS
for a p-channel device). The numerical value of KP is equal to k for W/L = 1,
and the threshold voltage VTO is also specified.
An additional parameter LAMBDA (A) of 0.02 is also included in the .MODEL
statement. This parameter accounts for the small increase in drain current that
generally occurs in the saturation region. In Eigure 4.10, the drain current lines
are horizontal for saturation, that is, the drain circuit of the MOSFET device
behaves as an ideal current source. For an actual device, the drain current tends
to increase somewhat as the drain-to-source voltage is increased (Figure 4.3).
This phenomenon, which is the result of several effects, is generally accounted
for by a channel-length modulation parameter A. As the drain-to-source voltage
is increased, the channel pinch-off position tends to move away from the drain,
thus reducing the effective channel length. Taking this into account, one obtains
the following equations for the drain current (conduction):

f ^[(PGS - Vt)vds - jVds]('^ + ^^Ds) triode region

fo = < - . . (4-")
[ j{vGS - Vt)^(1 + Auds) saturation

The factor 1 +Xvds is used in both expressions to avoid a discontinuity in current

at the transition between the expressions.
Although A is usually assumed to be zero for analytic calculations, a nonzero
value is readily handled by simulation programs. The similarity to the Early
effect for bipolar junction transistors will be noted - A plays the same role as
I/Va. Values of 0.005 to 0.04 for A are typical for MOSFET devices, and
the largest values occur for small channel lengths L. A value of 0.02 was

4.1 FIELD-INDUCED CARRIERS: THE PHYSICS OF A MOSFET DEVICE 227

 MOSFET Drain Characteristic
Temperature: 27.0

VDS

Figure 4.12: SPICE-generated MOSFET drain characteristic.

used for the simulation. A nested sweep was specified that yields 0.5-V incre¬
ments for the gate-to-source voltages. The resultant drain characteristic is given in
Figure 4.12.

EXAMPLE 4.1
The MOSFET device of Figure 4.7 has the following parameters:

Vt = 1.0V tox = 0.1ixm Cox = 3.9^0

W = 80 ^Jim L = 20 fim ii„ = 800 cm^A^ • s

The source and substrate are connected.

a. What is the overall gate-substrate capacitance of the device?
b. What is the transconductance k}
c. The gate-to-source voltage is 2 V. What is iu for vus = 0.5, 1.0, 1.5, and
2.0 V?

SOLUTION
a. The overall gate-to-source capacitance is the capacitance per unit area Cqx
multiplied by the area of the gate:

Cox = ^oxltox = 3.45 X lO-"^ FW

Cgs = CoxWL = 0.55 pF

b. The transconductance depends on Cox as follows:

k = fx„CoxW/L = 0.11 mAN^

228 THE METAL-OXIDE FIELD-EFFECT TRANSISTOR

 C- ugs = 2.0 V. For v^s = 0-5 V, the MOSFET device tvill be in its triode
region of operation {vqs < vgs — Vj).

in = k[(vGs - Vt)vds - = 41.3 /xA

For dds = 1-0 V the device is at pinch-off {vds = i’gs — Vj). Either expression
may be used to obtain the drain current:
k
io = 2^vgs - Vt)^ = 55 fxA

This will also be the current for v^s = 1.5 and 2.0 V because the current
is independent of vds for saturation.

EXAMPLE 4.2
In MOSEET integrated circuits, MOSEET devices are generally used in place
of resistors. This simplifies the fabrication process - the circuit then con¬
sists entirely of devices that differ only in the width, length, (W, or both L,
or both) of the channel. Eurthermore, much smaller areas are required for
MOSEET “resistors” than for true ohmic resistors. A nonlinear resistor can
be obtained by connecting the drain and gate of the device of Example 4.1
(Eigure 4.13).
a. Determine a set of expressions for the current as a function of vds-
b. What is the equivalent resistance vos/io for i>d5 = 2 V?
c. What is Vds/in for vds = 3 V?
d. An equivalent resistance of 10 is required for vqs = 3 V. What is the
channel width W that could be used to obtain this resistance (no change in
the other parameters)?

ic - 0 +

- ^GS =
Figure 4.13: MOSFET circuit of Example 4.2.

SOLUTION
a. Because vds > ^gs - Vt for all values of vds, the device will be either cut
off or saturated - it will never be in its triode region of operation.

for PD5 < 1 V, iD = 0 cutoff

for Vds > 1 V, /’d = — Vt)^ mA

b. Vds = 2 V, /T = 55 /xA, Req — 36.4 kQ

c. Vds = 3 V, Id = 0.22 mA, R^q = 13.6 kQ
d. = 10 kQ for vds = 3 V, Id = 0-3 rnA, k = 37.5 ixAfV^.

4.1 FIELD-INDUCED CARRIERS: THE PHYSICS OF A MOSFET DEVICE 229

 Because k is proportional to the width of the channel, W— (37.5/55)(80 /xm) —
54.5 /xm.

EXAMPLE 4.3
A MOSFET device is used in the circuit of Figure 4.14.
a. Determine the value of that results in uour = 6 V.
b. Determine the variation in vin required to produce a variation in uouT of
±0.1 V about 6 V.
c. Determine the variation in uin required to produce a variation in i»ouT of
±1 V about 6 V.

MOSFET circuit of Example 4.3.

SOLUTION
a. The gate resistor Rg will have no effect on the behavior of the circuit
because for static conditions the gate current is zero vgs = fin- A value
of Win greater than 2 V is required for conduction {id > 0). Because it is
not known if the device is in its triode or saturated region of operation, it
is necessary to guess. The corresponding value of uin may be determined
and compared with vds to determine if vds is greater or less than vgs — Vr.
If the guess was incorrect, the device is in the other region of operation.
Because the expression for the saturated drain current is the simplest, it is
reasonable to use this for the initial guess:

Vdd = io^D ± Foot, io = 0-4 mA

VGS -Vt= V2iD/k = 2.828, ugs = 4.828 V

Because vgs — Vj = 2.828 V, the initial guess of saturation is valid.

b. For POUT — 6.1 V, /'d = 0.39 mA, ujn = Vt ± s/2i^/k = 4.793 V.
For uouT = 5.9 V, fo = 0.41 mA, pin = Vt ± \/2iDlk = 4.864 V
A variation of about =f0.035 V is required for a variation of ±0.10 V in
fouT (a voltage gain of —2.86).
c. For POUT = 7V, in = 0.3 mA, pin = VjT \/2/d/^ = 4.449 V (-0.379V)
For POUT = 5 V,/D = 0.5 mA, pin = Vt ± ^2^^ = 5.162 V (±0.334 V)
The variation in pin for a ±1 V variation in pout is not symmetrical as a
result of the nonlinear dependence of the drain current on vgs — Vj.

230 THE METAL-OXIDE FIELD-EFFECT TRANSISTOR

 ^OUT - ^DS

. ,. '^DS - ^GS ~
saturation /

/" triode

^IN - ^GS
Vj
(a) circuit (b) regions of operation

Figure 4.15: Basic common-source MOSFET circuit.

4.2 THE COMMON-SOURCE EQUIVALENT CIRCUIT: APPLICATIONS

The transfer characteristic of the basic common-source MOSFET circuit of
Figure 4.15 will be determined using the analytic expressions summarized in
Table 4.1 to calculate the drain current of the device. Because djn = egs? the
MOSFET device is cut off (/d = 0) for din less than the threshold voltage. When
the device is conducting, the dividing line between the triode and saturated region
occurs for vds = '^^GS — Vt, the 45° upward-sloping line of Eigure 4.15(b) that
extends upward from the uin = Vj point on the input voltage axis. To be valid,
a solution must fall in the region corresponding to the expression that was used
to calculate the drain current.
To obtain a transfer characteristic of four versus uin, it will be assumed that
uiN is increased from zero. For uin < Vt, the device is cut off, yielding /T> = 0
and Dour = Vdd- However, as uin is increased above Vj, the saturation region
of operation is entered, and the following is obtained:

k y
io = — Vt) saturation
(4.10)
kRD
EouT = Vdd — ioRo — Vdd — (tin - Vr)'"

The solution of Eq. (4.10), indicated in Eigure 4.16, is valid until tout = ein-Vt,
which corresponds to the boundary between the saturation and triode regions.
Setting TOUT equal to tin - Vr in Eq. (4.10) will yield the value of tin at which

Figure 4.16: Transfer characteristic for the cutoff and

saturation regions.

4.2 THE COMMON-SOURCE EQUIVALENT CIRCUIT; APPLICATIONS 231

 the device enters the triode region:

kRo.
UlN — Vt = Vdd — (uiN - Vt)"

2 2 Vdd
(uiN - Vt) + 7^(uin - Vr) =0 (4.11)

i^iN = Vt

Only the positive square-root term of the solution that arises in solving the pre¬
ceding quadratic equation yields a valid solution.
For values of uin larger than that of Eq. (4.11), the device is in the triode
region of operation.

Id = ^[(uiN - Vt)uout - l^om]

(4.12)
I’ouT = Vdd — ^1^d[(i^in — Vt)i’out 2^0UT

A quadratic equation must be solved to obtain an explicit functional dependence

of uouT on Win. This dependence corresponds to causality in which an input
voltage is applied and the output is observed. However, if one is merely interested
in obtaining a curve of wouT versus win, ^ solution of win as a function of wout
is equally useful. This corresponds to wqut being treated as the independent
variable.
TT X 1 2 , ^OUT VpD
(l^IN Vt)wout - 2^out + =0
kRo (4.13)
T/ , 1 1
l^IN Vt + ::rl^OUT + -
2 KAdWout kRo
A point-by-point determination of win for a range of values of wour is readily
obtained (Figure 4.17).
The transfer characteristic of Figure 4.17 could be used either for a logic
NOT gate or for an amplifier circuit. For a logic NOT gate, a threshold voltage
considerably less that the supply voltage Vdd is necessary. Furthermore, for win =
Vdd an output voltage less than Vt is desirable. These conditions ensure that the

Figure 4.17: Transfer characteristic of a common-source MOSFET

circuit.

232 THE METAL-OXIDE FIELD-EFFECT TRANSISTOR

output of one logic gate is properly interpreted when it is used for the input of a
second logic gate.
To illustrate these requirements, suppose that a particular MOSFET device
has a threshold voltage Vj of 1.0 V and is used in a circuit with a supply voltage
Vdd of 5.0 V. A reasonable value of nouT for djn = Vdd would be 0.5 V (Vt/2).
From Eq. (4.12), a numerical value for the design parameter kR^ is obtained;
kRr, — 2.40 V. What does this result imply? If, for example, R^, = 1 a device
with a transconductance parameter k of 2.4 mAfV^ is required. On the other
hand, if Rd = 10 k ='0.24 mAW^. Because a device with a larger value
of k results in a smaller value of uout for din = ^dd? these values are, in effect,
minimum transconductance values required for a particular drain resistor Re,. If
kRo — 2.40 V is assumed, the point at which the transition from the saturation
region to the triode region occurs may be determined using Eq. (4.11):

din = 2.667 V, DouT = 1.667 V (4.14)

At this value of input voltage, it may be noted, the second derivative of the
transfer characteristic changes sign.

A COMMON-SOURCE AMPLIFIER

Although the transfer characteristic of the basic MOSEET circuit is well suited
for a logic gate, its utility as a basic amplifier circuit is more limited. Unlike the
transfer characteristic of the basic common-emitter bipolar junction transistor
circuit (e.g.. Figure 3.24), the characteristic of the basic MOSFET circuit does
not have a region over which dout tends to have a linear dependence on din-
Suppose that an input biasing voltage Vgg is used with a sinusoidal input signal
voltage that is to be amplified (Eigure 4.18). If the device remains in its saturated
region of operation, the following is obtained:

I’iN = Vgg + Vw sin cot

uouT = Vdd-^( Vgg + Vn sin at — Vj)^ (4.15)

^OUT ^OUT

Figure 4.18: Distortion caused by the transfer

characteristic of the basic MOSFET circuit.

4.2 THE COMMON-SOURCE EQUIVALENT CIRCUIT: APPLICATIONS 233

 An alternative to determining vouT using Eq. (4.15)
is a point-by-point procedure employing the transfer
characteristic. For the sinusoidal input voltage indi¬
cated in Figure 4.18, the output voltage is significantly
distorted. Although alternative circuits may be used to

'6 '^IN ^OUT

reduce the distortion (for example, a MOSFET load),
this circuit is useful for amplifying small-amplitude
V,GG signals.
Consider the small-signal amplifier circuit of
Figure 4.19 and assume that the input voltage win is
Figure 4.19: MOSFET small-signal am¬
such that the device is always conducting (pin > Vj)
plifier circuit.
and that the device remains in its saturated region of
operation. The quiescent value of drain current corre¬
sponds to a zero value of a signal.

Id — ^(^GG — Vt)^ (4.16)

If the magnitude of the input signal Vs(t) is sufficiently small, an approximate

value for the drain current may be obtained using the derivative of the drain
current as follows:

di D
io — - Vt)^ = H^gs — Vt)
dvGS
(4.17)
di D
= HVgG - Vt) = gn
dv GS Vgg

The derivative has been evaluated for the quiescent condition (pin = Vgg)- The
quantity g^, the mutual conductance of the MOSFET, depends on the quiescent
gate-to-source voltage. This results in the following:

di D
io = Id + Vs(t) = lD+gmVs(t) (4.18)
dvGS Vgg

This implies that two current sources may be used for the drain current: one a
quiescent value given by Eq. (4.16), and the other, a signal value of gntVsit).
The two current sources of Eq. (4.18) result in the equivalent circuit of
Figure 4.20. Although the gate-to-source voltage vgs determines the drain current

Figure 4.20: Overall equivalent circuit of MOSFET amplifier.

234 THE METAL-OXIDE FIELD-EFFECT TRANSISTOR

 (a) quiescent equivalent circuit (b) small-signal equivalent circuit

Figure 4.21: Eqyivalent circuits of a MOSFET amplifier.

of the MOSFET device, the gate behaves as an open circuit because ic — 0. As

for the bipolar junction transistor circuit, superposition may be used to obtain a
solution for eout-
The quiescent circuit of Figure 4.21(a) is obtained for Vs{t) = 0. All other
voltage sources are included, and Id (for saturation) is given by Eq. (4.16). The
small-signal circuit has a single voltage source Vs{t). A notation similar to that
already used for BJT circuits is employed for all quantities. Eor example, the
following applies for the gate-to-source voltage:

vgs = + (4.19)

dc (quiescent) value varying component

The solution for uouT is the sum of the solutions of the individual circuits of
Eigure 4.21.

VouT = Vdd - ^^( Vgg - yrf quiescent solution

Four = -gmRDVsit) = -kRoiVcG - VT)v^{t) Varying component (4.20)

Four = Tout + Fout

Although the magnitude of the voltage gain of a MOSFET amplifier tends to
be less than that of a BJT amplifier, a MOSEET amplifier tends to have a much
higher input impedance. To the extent that the effect of the gate-to-source ca¬
pacitance can be ignored (Example 4.1), the input current is negligible. This
implies an extremely large power gain. An advantage of MOSEET amplifiers is
that they can be used to amplify signals from sources that have very large internal
impedances.
Figure 4.22: A MOSFET source-
follower circuit.
A SOURCE-FOLLOWER AMPLIFIER
T;DD
An alternative to the MOSEET common-source con¬
figuration having a resistor in the drain circuit is a source-
follower configuration having a resistor in the source
circuit (Figure 4.22). This circuit will be recognized as
being the MOSFET analogy of the BJT emitter-follower Four
circuit (Figure 3.42). As the names of these circuits imply,
their output voltage tends to follow their input voltage.

4.2 THE COMMON-SOURCE EQUIVALENT CIRCUIT: APPLICATIONS 235

 An advantage of the MOSFET source—follower over a MOSFET common—source
amplifier is that its output resistance tends to be much smaller.
It will be noted that the current out of the source of the MOSFET device is
equal to its drain current - the result of a zero gate current. For din < Vr, the gate-
to-source voltage is less than Vj, resulting in a zero drain current and zero output
voltage. As uin is increased so that it exceeds Vj, the MOSFET device will start to
conduct. The drain-to-source voltage vqs depends on Vdd and uouT as follows:

vds = Vdd — uqut (4.21)

Hence, for ujn = Vr and uqut = 0, uds = Vdd- The drain-to-source voltage is
therefore initially large, considerably larger than vgs ~ V7, and the device is in
its saturated region of operation.

in = ~ (4.22)

The gate-to-source voltage depends on the output voltage your as well as the
input voltage vin as given by

yiN = Vgs + yoUT, VGS — l^IN — l^OUT (4.23)

Given that your = ioRs, the following is obtained:

k 2

(4.24)
i^ouT = ioRs = [(i^iN — Vt)^ — 2(yiN - Vrlyour + ^out]

If a numerical value is available for kRs, the preceding quadratic equation may
readily be solved to determine the dependence of your on yjN-
As for the common-source circuit, a somewhat simpler expression is obtained
if youT is treated as the independent variable:

V^ouT = \/^-Rs/2(yiN — Vt — your)

IIvqgt (4.25)
yiN = Vr -f- + youT

Using this expression or solving the quadratic expression of Eq. (4.24) for your
results in the transfer characteristic of Figure 4.23. Be¬
Figure 4.23: Transfer characteristic
of a MOSFET source-follower
fore proceeding, it should be verified that the MOSFET
circuit. does indeed remain in its saturation region of operation.

^OUT When yiN = Vdd? the gate-to-source and drain-to-source

voltages are equal, yes = v^s- If it is assumed that Vr is
a positive quantity, the condition for saturation applies
because vds is obviously greater than yes — Vj. The in¬
put voltage needs to be greater than Vdd for the device
to enter its triode region of operation.
The slope of the transfer characteristic of Figure 4.23
^IN is less than unity. This is invariably the case for a MOS¬
FET source-follower circuit - its small-signal voltage

236 THE METAL-OXIDE FIELD-EFFECT TRANSISTOR

gain, which depends on the slope of the characteristic,
will be less than unity (or, at best, close to unity). The
J
utility of this circuit is that its input current, the cur¬
rent of the gate of the MOSFET, is for many applica¬ +
tions negligible, and, therefore, its power gain is large. A
small-signal analysis will be used to determine the volt¬ ^OUT

age gain.
Consider the MOSFET source-follower circuit of “
Figure 4.24 in which the amplitude of the input signal Figure 4.24: MOSFET source-fol-
Vs(t) is small. For the circuit to function as an amplifier lower small-signal amplifier.
(i.e., for vouT > 0), the device must be conducting. This
requires that the biasing voltage Vgg be greater than Vp. For Vgg < Vdd, the
device is in its saturated region of operation. A quiescent solution is obtained
using Eq. (4.24) or 4.25 (pin = Vgg)- From the quiescent value of drain current
Id, the following is obtained:

VbuT = IdRs, Vgs = Vgg — Vbur

(4.26)
gm = ^(Vg5 — Vt) = HVgg — VbuT — Vp)

For a circuit in which the biasing and supply voltages along with the device
parameters are specified, Eq. (4.26) yields a numerical value of the mutual con¬
ductance gm- A small-signal equivalent circuit may now be used to determine the
small-signal behavior of the MOSFET source-follower (Figure 4.25).
The voltage sources Vgg and Vdd are not included in this circuit - their effect
has already been taken into account in determining the quiescent solution. The
following is obtained for the small-signal quantities in which it will be noted that
— gtti^gs’-

Vs{t) — Vgs -|“ idR-S ~ Vgs T gntVgs Rs 1 ^out ~ ^dRs — gmVgs Rs

(4.27)
gmRsVsit) Eout gmRs
1+gmRs’ Vs 1+gmRs
The voltage gain Pout/fs is less than unity.
As a final consideration, the small-signal equivalent output resistance of the
circuit will be determined. This is the resistance seen looking into the output
terminal of the small-signal equivalent circuit when all independent sources are
properly removed. The mutual conductance current source gmVgs is a dependent
source - it cannot be removed from the circuit
unless its controlling voltage happens to be ^5^ Small-signal equivalent circuit of
zero. The output resistance is essentially the re- ^ MOSFET source-follower amplifier,
sistance that would be measured with an ohm-
meter. Therefore, it will be imagined that a mea¬
suring voltage Vx is applied to the output, and the
corresponding current will be determined (as an
ohmmeter does). From Figure 4.26, in which the
independent source Vs{t) has been replaced with

4.2 THE COMMON-SOURCE EQUIVALENT CIRCUIT: APPLICATIONS 237

 SrrPgs
Figure 4.26: Equivalent circuit used for determining the output resistance
of a source-follower amplifier.

a short-circuit, the following is obtained:

tx — ^x/§m^gs — ^x/”h Sm^x /4

ixl^x — ~h gm

It will be noted that the output conductance is greater than the conductance of
the resistor Rg. The output resistance is, in effect, the resistance Rs in parallel
with an equivalent resistance of 1 /gm-

EXAMPLE 4.4
The common-source MOSFET circuit of Figure 4.15 has the following circuit
values and device parameters:

Vdo = 5 V, Rd = 10 k^2, k = 0.5 mAA^^ Vt = 1 V

Determine the following points of the circuit’s transfer characteristic:

a. The input voltage for uqut = 2.5 V.
b. The values of pin and pout corresponding to the transition between the
saturation and triode region of operation (pinch-off).
c. The output voltage for pin = 5 V.
d. The input and output voltages corresponding to the points of the charac¬
teristic that have a slope of —1.

SOLUTION
a. Equation (4.10) is valid for the saturation region {kRc = 5 V~^).

Tout = Vdd-— Vj)^

2( Vdd — tqut)
Tin = Vt -h = 2 V for Pout = 2.5 V
kR D

b. Equation (4.11) may be used to determine the input voltage at which the
transition between the regions occurs.

1 1 , 2Vdd
Tin = Vt - + + = 2.228 V
kRo kRo) kR D

Tout = tin — Vt = 1.228 V

238 THE METAL-OXIDE FIELD-EFFECT TRANSISTOR

c. Equation (4.12) can be used to determine uout for ujn = 5 V.

I^OUT = Vdd - kRolivm - VT)t;ouT - ji^our]

—^ ^OUT 2 ^OUt)

^OUT ~ ^OUT + 2 = 0, uouT = 0-245, 8.155 V

Only the first solution, vout = 0.245 V, is valid. A simpler alternative

approach generally yields an acceptable result when uin is large and vqut is
small. This involves using an approximate expression for the drain current
as follows:

fD = ^[(fIN — Vj) - jVds]vdS

^ ^(viN - Vt)vds if vds < 2(i;in - Vr)
It will be noted that 2(uin “ Vt) = 8 V, which is a value considerably larger
than the expected value of vds (i^out = vds)- This result corresponds to a
linear dependence of id on vds, that is, the device’s behavior is approxi¬
mately that of a resistor r„.

1
Vds/Id = = 0.5 kQ
k(viN — Vt)
By using this resistance in place of the MOSFET, the following is obtained
for vout:

t'wVpD
UOUT = = 0.238 V
fn + Rd
This approximate result is only 7 mV less than the exact solution,
d. The transfer characteristic will have two points at which it has a slope
of —1. Consider initially the point near yiN= Vt in which uout is large.
The device is in its saturated region of operation, and Eq. (4.10)
applies.

^ = -kRuinu - Vr)
dVitq

With the derivative equal to —1, the following is obtained for i;in and
four:

1 = kRoivi^ — Vt), uin = 1-20V, uout = 4.90 V

The other point for which the slope is equal to —1 occurs for iijn large and
uouT small corresponding to the triode region of operation. Differentiating
Eq. (4.13) with respect to ujn yields the following:

^ _ 1 dvom VpD dvQiTT

2 duiN kRDVQUT dviN
By substituting —1 for the derivative, a value for uouT is obtained.

2 Vdd
^OUT — uouT — 0.816 V
3kRD

4.2 THE COMMON-SOURCE EQUIVALENT CIRCUIT: APPLICATIONS 239

 ^OUT

Figure 4.27: Transfer characteristic for MOS-

FET circuit of Example 4.4.

This value of uqut may now be substituted into Eq. (4.13) to obtain a value
for Din; ein = 2.433 V. These points, as well as those of the previous parts,
are indicated on the transfer characteristic of Figure 4.27.

EXAMPLE 4.5
Determine the small-signal voltage gain of the common-source MOSFET am¬
plifier of Figure 4.28.

SOLUTION The quiescent conditions need to be determined using the circuit of

Figure 4.29. Because the static gate current is zero, a voltage divider relation¬
ship may be used to determine Vgs-

RgiVdd
Vgs — 3.056 V
Rgi + Rg2

If the device is assumed to be in its saturated region of operation, the following

is obtained:

fD=^(VG5-VT)" = 0.223 mA

Vds = Vdd — IdRd = 5.54 V

Because Vds of 5.54 Vis greater than Vgs-Vt (1.056 V), the initial assumption
of saturation is valid. The mutual conductance may now be determined as

Figure 4.28: MOSFET amplifier circuit of Example 4.5. (Node

numbers are those used for the SPICE simulation of Example 4.6.)

k = 0.4 mAA^^
Vt = 2.0 V

240 THE METAL-OXIDE FIELD-EFFECT TRANSISTOR

 Figure 4.29: Quiescent circuit of Example 4.5.

follows:
= HVgs - Vt) = 0.422 mS
The small-signal equivalent circuit will now be solved (Figure 4.30). It is as¬
sumed that the capacitors behave as short circuits for the signal components.
Numerical resistance values are included on the circuit for the parallel combi¬
nation of resistors.
_ RgiWRgiVs
= 0.958u,
Rgi II Rg2 + Rs

Eout— Strings Rd\\Rl — 7.035Dg5

Eout— 6.7401)5, ^out/^s — 6.74

Rs

2.292 MQ 16.67 kQ
Figure 4.30: Small-signal equivalent circuit of Example 4.5.

EXAMPLE 4.6
Determine, using a SPICE simulation, the large-signal behavior of the amplifier
of Example 4.5 for a sinusoidal input voltage with a frequency of 1 kHz. To
show the distortion that occurs, assume amplitudes of the input signal that
would result in, on the basis of the small-signal voltage gain determined in
Example 4.5, peak-to-peak output voltages of 1, 2, 3, and 4 V. Obtain graphs
of Uout and numerical values for the harmonic distortion.

SOLUTION Eor a small-signal voltage gain of 6.74, a peak-to-peak input voltage

of 0.148 V will produce a peak-to-peak output voltage of 1 V. Hence, an am¬
plitude of 0.074 V is required for an input signal, and amplitudes of 0.148,
0.222, and 0.296 V correspond to peak-to-peak voltages of 2, 3, and 4 V. If
the results were to be obtained experimentally, a single circuit would be con¬
structed. The input amplitude would then be successively set to the preceding
values while the output voltage is observed. Eor a SPICE simulation, however.

4.2 THE COMMON-SOURCE EQUIVALENT CIRCUIT: APPLICATIONS 241

 MOSFET Amplifier VS3 31 0 SINCO .222 1000)
VSl 1 0 SIN(0 .074 1000) RS3 31 32 lOOK
RSI 1 2 lOOK CSS 32 33 lU •
CSl 2 3 lU RG13 33 0 3.3MEG
RGl 3 0 3.3MEG RG23 6 33 7.5MEG
RG2 6 3 7.5MEG M3 ;34 33 0 0 MOST
Ml -4300 MOST RD3 6 34 20K
RDl 6 4 20K CL3 34 35 lU
CLl 4 5 lU RL3 35 0 lOOK
RLl 5 0 lOOK
VDD 6 0 DC 10 VS4 41 0 SINCO .296 1000)
RS4 41 42 lOOK
VS2 21 0 SIN(0 .148 1000) CS4 42 43 lU
RS2 21 22 lOOK RG14 43; 0 3.3MEG
CS2 22 23 lU RG24 6 43 7.5MEG
RG12 23 0 3.3MEG M4 ■44 43 0 0 MOST
RG22 6 23 7.5MEG RD4 6 44 20K
M2 24 23 0 0 MOST CL4 44 45 lU
RD2 6 24 20K RL4 45 0 lOOK
CL2 24 25 lU
RL2 25 0 lOOK .MODEL MOST NMOS KP=. 4M VTO^
.TRAN . OIM 2M OM .OIM
.FOUR 1000 V(45)
.PROBE
.END

Figure 4.31: SPICE simulation circuit file of Example 4.6.

it is more convenient to determine the behavior of four circuits simultaneously,

each having a different input voltage. This is accomplished with the circuit
file of Figure 4.31, the node numbers of the first circuit being indicated in
Figure 4.28. By running the circuits simultaneously, a plot of output voltages
on a common graph can be obtained.
Even though the four circuits are identical (except for their input voltages), a
unique labeling of each element and device is required. However, only a single
.MODEL statement is required for the MOSFET devices (MOST). The last quan¬
tity of the transient statement (.TRAN), .OIM, limits the internal integration
step size to 0.01 ms, that is, one hundredth of the period of the 1-kHz signal.
Without such a step-size limit, the SPICE program tends to use a larger step
size, resulting in a poorly defined sinusoidal voltage - one that is noticeably
distorted. It is the author’s experience that the step size should be no greater
than one hundredth of the period of a sinusoid. Although a smaller value pro¬
duces still better results, a longer computational time is required. It should be
noted that the first value of the . TRAN statement, the step size for the output
data file, does not constrain the internal integration step size. Output data are
generated through an interpolation process.
The result of the simulation is given in Figure 4.32. It will be noted that for
the larger amplitudes, the output voltage is appreciably distorted. Although the
peak-to-peak amplitudes are very close to that expected, the resultant signals
are no longer symmetrical, that is, their positive excursions are considerably

242 THE METAL-OXIDE FIELD-EFFECT TRANSISTOR

 MOSFET Amplifier
Temperature: 27.0

Figure 4.32: SPICE solution for Exam¬

ple 4.6.

.V(5).V(25).V(35). V(45)
Time

less than their negative excursions. A .Four command produces a Fourier

analysis of the voltage specified V (45) if a fundamental frequency of 1000 Hz
is assumed. The program uses the last period of the signal, that is the last
1.0 ms of the transient result. The data of Figure 4.33 appeared in the output
file. It will be noted that the fundamental component’s having an amplitude
of nearly 2 V would be the case for no distortion. The distortion is essentially
that due to the dc component of —0.13 V and a second harmonic with an
amplitude of 0.13 V. The contribution of the other harmonics is negligible.
To obtain the harmonic distortion of the other components, separate runs of
the program were required - the version of SPICE used by the author did not
allow more than one .Four statement.

Figure 4.33: Harmonic distortion.

FOURIER COMPONENTS OF TRANSIENT RESPONSE V(45)

DC COMPONENT = -1.296614E-01

HARMONIC FREQUENCY FOURIER NORMALIZED PHASE NORMALIZED

NO (HZ) COMPONENT COMPONENT (DEG) PHASE (DEG)

1 1.OOOE+03 1.995E+00 1.OOOE+00 -1.799E+02 0.OOOE+00

2 2.000E+03 1.339E-01 6.708E-02 9.012E+01 2.700E+02
3 3.000E+03 1.143E-04 5.730E-05 1.800E+02 3.599E+02
4 4.000E+03 8.552E-05 4.286E-05 1.799E+02 3.598E+02
5 5.OOOE+03 6.824E-05 3.420E-05 1.799E+02 3.599E+02
6 6.OOOE+03 5.664E-05 2.838E-05 1.799E+02 3.598E+02
7 7.000E+03 4.831E-05 2.421E-05 1.798E+02 3.597E+02
8 8.000E+03 4.208E-05 2.109E-05 1.798E+02 3.597E+02
9 9.OOOE+03 3.717E-05 1.863E-05 1.797E+02 3.596E+02

TOTAL HARMONIC DISTORTION = 6.708376E+00 PERCENT

4.2 THE COMMON-SOURCE EQUIVALENT CIRCUIT: APPLICATIONS 243

 One might be wondering why an .AC analysis was not used. Is this not
the option generally used for sinusoidal signals? The .AC option is based on
a phasor analysis (an time dependence) that is valid for only a linear
circuit. SPICE, when doing an . AC analysis, uses the small-signal linear circuit
and treats this circuit as being valid regardless of the signal amplitudes. This
option predicts the same voltage gain (with no distortion because the circuit
is linear) regardless of the signal amplitudes. A 1-mV input signal is treated in
the same fashion as a 1-MV signal.

4.3 MOSFET LOGIC GATES: BASIC CONSIDERATIONS

To change the voltage of a device or circuit capacitance, a current is required. Fur¬
thermore, the more rapidly this change in the voltage of a capacitance needs to be
achieved, the larger the current required. Circuit limitations of devices therefore
impose a limit on the speed at which these circuits can respond. Capacitances
may generally be treated as being lossless, that is, the electrical energy they dissi¬
pate tends to be negligible. However, as a result of capacitive currents, electrical
power is dissipated by the circuit associated with the capacitance. Therefore, lim¬
its on the power that may be safely dissipated limit the response time of a logic
circuit.
A capacitor stores electric charge, and as a result of its charge storage q a
capacitor may also be viewed as storing a quantity of electrical energy Ec as
follows:

q = Cv C, coulombs; Ec = jCv^ J, joules (4.29)

For a periodic voltage with a period of T, the stored charge and energy are also
periodic.

q(t + T)^q(t); Edt + T) = Ec{t) (4.30)

Hence, at the conclusion of one period, the capacitor’s stored energy is the same
as at the beginning of the period. This implies that the net energy supplied over
a period by vs{t) in Figure 4.34(a), the circuit without a resistor, is zero. This is
obviously not the case for the circuit with a series resistor (Figure 4.34(b)). To

Figure 4.34: Periodic voltage source and a capacitor.

2 R

(a) no resistor, Pg = 0 (b) series resistor, Pg > 0

244 THE METAL-OXIDE FIELD-EFFECT TRANSISTOR

 Vs(t) input voltage
V„

T/2 T
current Psit) power supplied
Vp/R VpR'..
T/2

T/2 T
-Vp/R

Figure 4.35: Switching the voltage of a capacitor-resistor circuit with a

periodic square-wave voltage.

change a capacitor’s voltage, a current is required:

dq dv
(4.31)
dt dt
As a consequence, electrical power R is dissipated by the resistor.
Consider the case of a periodic square-wave input voltage vs{t), which could
represent a logic signal with voltage levels of 0 and Vp (Figure 4.35). As a result
of the series resistance of the circuit of Figure 4.34(b), the capacitor’s voltage v{t)
does not respond instantaneously to changes in the input voltage. The capacitor’s
voltage has finite rise and fall times - a result of the current required to charge
and discharge the capacitor. When vs(t) increases from 0 to Vp (for example, at
? = 0), the energy it supplies is equal to the integral over time of its instantaneous
power p(t) as follows:

p(t) = vs(t)i(t)
/■T/2 pT/l rT/2 (4.32)
Es= p{t)dt= / vs{t)i(t)dt = Vp / i{t)dt
Jo Jo Jo
The time T/2 is assumed to be sufficient for v(t) to reach approximately Vp
(theoretically, the voltage will never quite reach Vp). From the expression for the
capacitor’s current, Eq. (4.31), a relatively simple expression, is obtained for Es
as follows:

Es = Vp
rT/2 J,, dt = CVp /
fVp
dv = CVl (4.33)
Jo dt Jo
Because during this interval, the capacitor’s voltage increases from zero to Vp,
its increase in stored energy is \CV^. Flence, half the energy supplied is stored
by the capacitor while the other half is dissipated by the series resistor, that is,
converted to thermal energy. It will be noted that the value of the resistance not
only did not enter into the result, but the result is valid for a nonlinear resistive
element. When vs{t) returns to zero (for example at ^ = T/2), a negative capacitor
current results - charge leaves the capacitor. Because vs{t) is equal to zero when
this occurs, the energy it supplies (or absorbs) is zero. At the conclusion of the

4.3 MOSFET LOGIC GATES: BASIC CONSIDERATIONS 245

 discharge, the potential of the capacitor and its stored energy are approximately
zero. Hence, an energy of ^CVp is again dissipated by the resistor.
To summarize, an energy of CVp must be supplied by vsit) to charge the
capacitor; half of this energy is stored by the capacitor, whereas the other half is
dissipated by the resistive series element. When the capacitor is discharged, the
half of the energy stored by the capacitor is dissipated by the resistor. Therefore,
over a complete cycle, the resistor dissipates an energy of CVp. If vs{t) supplies
an energy of Es each period of T seconds, the average power supplied, Psav, is
the following:

Ps„ = Ec/T=Ecf = CV}f^ (4.34)

A periodic frequency f has been introduced. An average power Psav) is required

to compensate for the resistive losses of the circuit (this result may be shown
to remain valid in the limit as R goes to zero because its peak current becomes
infinite). This is an important consideration for designing logic circuits - in par¬
ticular circuits that may be driving data busses with an appreciable capacitance.
Suppose C = 100 pF, Vp = 5 V, and f = 10 MHz. Then,

Ps^.^CVlf (4.35)

For this situation, an electronic circuit must be capable of dissipating at least

25 mW. A larger capacitance or a higher switching frequency increases the
power.

AN ELEMENTARY LOGIC INVERTER

Both MOSFET and BJT devices may often be treated as switches that are
either open circuits or closed circuits with small resistances. To the extent that
the equivalent series resistance of the device can be treated as being zero, the
basic logic inverter circuit of Figure 4.36 in which the device is simulated by a
switch can be utilized. The switch will be assumed to be open if uin is less than an
input transition voltage Vt and closed if it is above this voltage. (SPICE includes
a switch model that requires a finite input voltage range for the switch to move
from its open to its closed condition.)
The static output voltage levels of the inverter gate of Eigure 4.36 are zero and
Vdd- The output is high when the switch is open and the current supplied by
Vdd is zero. Eor a low output, which occurs when the switch closed, a power of

Figure 4.36: A basic logic inverter

Vqd/R is supplied by Vdd- Hence, on the basis of static
using an ideal switch. conditions and if it is assumed the output is low as often
as it is high, the average power that must be supplied by
Vdd is VI)q/(2R). This power is dissipated by the resis¬
tor R. To determine the dynamic behavior of this basic
circuit, suppose that the logic input voltage of the gate
is simulated with a periodic square-wave having a fre¬
^OUT quency of f and an amplitude greater than Vf. When the
switch is opened, an energy of C V^d must be supplied by
Vdd to charge the capacitor. When the switch is closed.

246 THE METAL-OXIDE FIELD-EFFECT TRANSISTOR

the energy stored by the capacitor, ^in(0 ^out(0
namely j C Vqq, is dissipated by the
small but nevertheless finite resis¬
p Vdd ■ -
—t L
tance of the switch. The result is
T/2 T T/2 T
that an average dynamic power as
well as a static power must be sup¬ Figure 4.37: The dynamic behavior of a logic inverter using an
ideal switch.
plied by Vdd as follows:

S dynamic <■^5 static — ^Dd/ (4.36)

The ratio of these quantities is of value in judging their relative importance.

dynamic RC
2RCf = (4.37)
Ps Static 772

For a useful circuit, the time constant of the circuit, RC, must be small compared
with T/2; otherwise, the output voltage would not rise to approximately Vdd-
Hence, the dynamic power tends to be much less than the static power for this
particular circuit.
The rapidity of the response of the circuit is an important factor (Figure 4.37).
A downward transition of uin (for example, at ^ = T/2) results in an exponen¬
tial rise in the output voltage. On the other hand, an upward transition of uin
(for example, at f = 0) results in a nearly instantaneous fall of uouT? the con¬
sequence of an assumed zero switch resistance. Although a zero fall time does
not occur with an actual device such as a MOSFET, the fall time of a circuit of
this type is much less than the rise time. A time equal to the time constant of
the circuit, RC, is required for uqut to increase from 0 to 63.2 percent of its
final value of Vdd- A longer time, namely 2.2RC, is required for the 10- to-90-
percent rise time of uouT- A quantity that may be utilized when designing logic
circuits is the product of the rise time and the average static power supplied by
Vdd-

triise time = 2.2RC, Ps static ‘rise time = 1.1V^dC (4.38)

This is the static power - rise time product. It is a function of the supply voltage
and the load capacitance, not the resistor of the circuit:

l.lVgpC (4.39)
Ps static —
ise time

To decrease the rise time, that is, to increase the speed at which the gate will re¬
spond, the power supplied by Vdd and hence that dissipated by the circuit must
be increased. A reduction in the circuit capacitance, if possible, will reduce the
rise time. Furthermore, the circuit supply voltage Vdd can also be reduced - a
technique frequently used for very high speed circuits.

A MOSFET INVERTER GATE

A basic MOSFET logic inverter gate, along with its static transfer characteristic
obtained in the previous section, is indicated in Figure 4.38. Included in this

4.3 MOSFET LOGIC GATES: BASIC CONSIDERATIONS 247

 ^OUT

^IN

Figure 4.38: Basic MOSFET logic inverter gate.

circuit is an output capacitance Cl, which accounts not only for the capacitance
of the external circuit connected to the inverter but also for the capacitance of the
MOSFET device. For an input voltage that is less than the threshold voltage Vj,
the output voltage is Vdd, the high-output voltage of the gate Vqh- For this to
occur when a similar gate is used to produce uin, its output voltage for uin = Vdd
must be less than Vr. This is the low-output voltage Vql- As a consequence, an
input of Vql results in an output voltage of Vqh, and an input of Vqh results in
an output voltage of Vql-
Of interest at this point is the dynamic behavior of the gate for an input
voltage having upward and downward step functions with levels of Vql and Vqh-
Consider, initially, an input voltage with a downward step function (Figure 4.39).
For i < 0, Win = Vqh, and the output voltage is Vql (static behavior is assumed
for f < 0). After ^ = 0, the gate-to-source voltage of the MOSFET is less than
its threshold voltage, and the device is cut off. This is equivalent to the device
being removed from the circuit. Hence, the equivalent circuit for t > 0 is simply
a series resistor and capacitor Rd and Cl connected to the supply voltage Vdd-
An increasing output voltage is obtained as defined by

i^out(0 = VoL + {Vqh — Vol)(1 —

(4.40)
= Vqh — {Vqh — Vol)^ ° ^

The 10- to-90-percent rise time of uouT is simply I.IRdCi. It will be noted that
if Vql = 0, the solution is the same as that obtained for the basic logic inverter
with an ideal switch.
A more complex situation occurs for an upward transition of uin(?) that results
in a downward transition of uout(^) (Figure 4.40). For ? < 0, the MOSFET is cut

Figure 4.39: A downward transition of iiin(0.

y|N(0 ^out(0
^OH — DD

VOL

248 THE METAL-OXIDE FIELD-EFFECT TRANSISTOR

 ^in(0 ^out(0
^OH VoH-i V.'DD

^OL — V,OL

Figure 4.40: An upward transition of l'IN(^).

off (VoL < Vt) - its drain current is zero. After the upward transition of uiNiO?
the device is turned on. As a result of the capacitor, vomit) will not change
instantaneously. Hence, initially vos = Vdo, and the device is in its saturated
mode of operation with vqs also being equal to Vdd (Figure 4.41).
An expression for the drain current io is readily obtained for saturation as
follows:

in = - Vt)^ = iji^DD - Ft)^ (4.41)

On the basis of the circuit of Figure 4.41, the following is obtained by summing
the currents at the drain node:
Vdd — Four dvom k dl>OUT
= Id + Cl = ^(Vdd Vr)" + Cl (4.42)
l^D dt dt

For t very small {t = 0+), the output voltage is equal to approximately Vdd- The
initial value of the time derivative of i»ouT is readily obtained from

dvom kiVoD—Vj)^
at ^ = 0'*' (4.43)
dt 2 Cl
A line having this slope is indicated on the response of Figure 4.41. The intercept
to is readily determined as follows:

Vdd H Vdd — 2VddCl

to (4.44)
to 2Cl ’ HVdd-Vt)^
Although the actual transition time of vouT (10- to-90-percent) is larger than
to, this readily calculated time provides a useful scale factor for the downward
response time of pout-
The drain current of Figure 4.41 remains equal to its saturated value as long
as POUT exceeds Vdd - Vp. When pqut falls below Vdd - Vj, the device enters its
triode region of operation, and
hence, the drain current depends
Figure 4.41: The discharge of Cl-
on pds(— Tout)- While an ana¬
lytic expression can be obtained VDD
for pouTj a simpler albeit appro¬
ximate solution, is sufficient. To
change the output voltage, the
charge of the capacitor Cl must
be changed. This requires a cur¬
rent that is out of the capacitor;
that is, ii of Figure 4.38 is a

4.3 MOSFET LOGIC GATES: BASIC CONSIDERATIONS 249

 ^out(0

Figure 4.42: Determining a downward transition time of uout(?)-

negative quantity:

dvom »^OUT2 - l^OUTl

ii = Cl dh) ^ Cl (4.45)
dt ti - h
For each output voltage fouTi and uouT2? the corresponding MOSFET drain cur¬
rents tDi and iDi and capacitor currents in and ii2 may be calculated
(Figure 4.42). The average capacitor current {ii) may be approximated as the
average of its end values as follows:

{ii) = {ill + ^li)/2 (4.46)

Although this may seem to be a rather crude approximation, the result is rea¬
sonably valid because ii for an actual circuit tends to have a nearly linear time
dependence (if II is linear in time, Eq. (4.46) is exact). Combining Eqs. (4.45)
and (4.46) results in the following for ti — ty.

2Cl(uout2 - t^OUTl)
t2 — t\ = (4.47)
ill + ill
If uouTi and i;oijt2 correspond to the 10- to-90-percent change in uouTj the time
difference t2 — h is the corresponding response time. A numerical example will
be used to illustrate this approximate solution more fully.

EXAMPLE 4.7
A basic logic inverter gate is to be approximated with a circuit using a switch
that has an on resistance of 1 (Eigure 4.43).
a. What is Vql, the static output voltage for a high-logic input voltage?
b. Suppose viN is high and that it is suddenly switched low. What is the time
required for uouT to increase from Vql to Vdd/2?

Figure 4.43: Switch-type logic inverter circuit of Example

4.7.

250 THE METAL-OXIDE FIELD-EFFECT TRANSISTOR

 ^Th
Figure 4.44: Thevenin equivalent circuit
of Example 4.7. +
^Th ^OUT

c. Suppose uiN is low an^ that it is suddenly switched high. What is the time
required for uour to fall from Vdd to Vdd/2?

SOLUTION
a. When the switch is closed, the output voltage for static conditions is deter¬
mined by the voltage divider consisting of Ron and R:

VoL = jRonVDD/(f^+ ^n) = 0.455 V

b. The capacitor is charged from its initial voltage of Vql to Vdd by the
resistor R. If uour = Vql at f = 0, the following is obtained:

eout(^) = VoL + (Vdd — Vol)(1 —

= Vdd-(Vdd-

Setting t>ouT(^) equal to Voof^ yields the desired time ^midup:

Vdd/2 = Vdd + (Vdd — Vol)

^midup = RClln2(l - Vol/Vdd) = 0.598 RCl = 59.8 ns

c. When the switch is turned on, the circuit of Figure 4.44 applies as follows:

Vph = RonyDD/{R + f^n) = ^OL = 0.455 V,

f^Th = = 0.909 kQ
If it is assumed that the input transition again occurs at ^ = 0, the following
is obtained for i;out(^):

i^out(^) = y^OL + (Vdd ~ Tql) ^

Setting i;out(^) equal to Vdd/2 yields the desired time ^middown:

Vdd/2 = Vql + ( Vdd - Vql)

^middown = RthCl In - Vol) ~ - 7.26 ns

EXAMPLE 4.8
An w-channel MOSFET device is used for the ouput circuit of an integra¬
ted circuit. The equivalent capacitance of the external circuit Ci is 50 pF
(Figure 4.45).
a. What are the static low-and high-level output voltages Vol and Voh, re¬
spectively, of the logic gate?

4.3 MOSFET LOGIC GATES: BASIC CONSIDERATIONS 251

 +
k = 1 mA/V^ Figure 4.45: MOSFET logic inverter cir¬

^IN Cl ^OUT cuit of Example 4.8.

50 pF Vt = 1 V

b. Suppose that pin has been equal to Vqh for a very long time and that it
is suddenly switched to Vql at ^ = 0. Determine the rise time (10- to-90-
percent) of pqut-
c. Consider the opposite situation in which pin has been equal to Vql for a
very long time and is suddenly switched to Vqh at ^ = 0. This results in
the MOSFET device’s being rapidly turned on. Determine the capacitor’s
current for a 10- and 90-percent change of pout- What is the approximate
fall time of pqut?

SOLUTION
Q* Toh = Vdd = 5 V. For pin = Vddj the following approximate solution is
obtained:

1 rnVpD
rn = 0.25 VoL = 0.455 V
HVdd-Vt) (Rd +1'„)

b. The MOSFET device is cut off for this transition, and pout increases with
a time constant of RpCi. The 10- to-90-percent rise time is 2.2 RpCi,
0.275 /rs.
c. The MOSFET is conducting for this transition. The total change in pout
is Vdd — VoL = 4.545 V:

10-percent: pouti = 5 — .1(4.545) = 4.546 V (saturation region)

k ,
ipi — 2(Vdd — Vr)^ = 8.0 mA

in = ( Vdd — fouti)/Rd — ipi = —7.82 mA

90-percent: PouT2 = 5 - .9(4.545) = 0.910 V (triode region)
I
ipi = ^[(Vdd - Vr)pouT2 — 2^o\jn\ = 3.226 mA

ill — (Vdd — fout2)/Rd — idi = —1.59 mA

The average current {in + iLi)/^ will be used to determine the time differ¬
ence ^2 — h as follows:

{in + iL2){h - h)Jl — Cl(pouti — fout2)

2Cl(pouti - t^OUT2)
h~h = = 38.6 ns
in + ihi

252 THE METAL-OXIDE FIELD-EFFECT TRANSISTOR

4.4 INTEGRATED-CIRCUIT LOGIC GATES: NO RESISTORS
The logic inverter gate of the previous section used a “pull-up” resistor to produce
a high-level output voltage Vdd when the MOSFET device was cut off. A conven¬
tional carbon resistor would be employed if the logic gate were to be constructed
using discrete components. For an integrated circuit, an n-type resistor could be
diffused into the p-type substrate used for the n-channel devices. An alternative
to a linear resistor is a second MOSFET device connected so as to behave as
a resistor, albeit a nonlinear resistor. MOSFET pull-up resistors are universally
used in modern integrated circuits. Not only is the processing step to form the
resistor not required with a MOSFET device, but it generally requires a much
smaller chip area - an important factor for very-large-scale integrated circuits
(Elmasry 1992; Haznedar 1991; Hodges and Jackson 1988; Mukherjee 1986).

AN ENHANCEMENT-TYPE LOAD
Consider the MOSEET device of Eigure 4.46(a) that has its gate and drain
connected. Because vds — vgs, vds is always greater than vgs — Vt for a de¬
vice with a positive threshold voltage. Its triode region of operation is therefore
excluded - the device is either cut off or saturated.

fO ifi;D5<VT, cutoff
iD = { k. ,, ,2 r (4.48)
y ^('i^DS — vt) for Vds > vt, saturation

Instead of a linear (straight-line) current-versus-voltage relationship, the MOS¬

FET device has a nonlinear characteristic (Figure 4.46(b)).
In the inverter circuit of Figure 4.47, the pull-up resistor has been replaced by
a MOSFET device. Because the gate voltage of this device is not controlled by
Tin, it is described as being a passive device as opposed to the inverter transistor
Ml, which is an active device. As for a circuit with a resistor, a load line may be
determined for the MOSFET load M2 and Vdd-

iDi = ioi, Vdd — ^dsi + tdsi, vdsi = Vdd - vdsi (4.49)

These equations result in the load line of Figure 4.47(b), a line generated from
the characteristic of Figure 4.46(b) (by reversing the voltage axis and shifting it
to the right by Vdd)-

Figure 4.46: A MOSFET device connected to form a two-terminal

element.

ic - 0

^GS -

(a) device (b) characteristic

4.4 INTEGRATED-CIRCUIT LOGIC GATES: NO RESISTORS 253

 7dd
< hi
^DS2 l03ci

[1 - transistor

+ + Ml
117
+ 'n ^DSl inverter
^OUT ,
^IN transistor

(a) circuit

Figure 4.47: A MOSFET inverter gate with a saturated MOSFET load.

Although a graphical analysis of the logic inverter gate with a MOSFET load
device could be used to obtain its transfer characteristic, an analytic solution
is readily obtained. For convenience, both devices will be assumed to have the
same threshold voltage - a not uncommon situation when devices are fabricated
simultaneously. However, different values of transconductance parameters will
be assumed, ki and ki for Mi and M2, respectively. For din less than the threshold
voltage. Ml is cut off and its drain current is zero. On the basis of the load line of
Figure 4.47(b), the drain-to-source voltage of M2, vusi, is Vj or less. If, however,
one is attempting to measure uouT, for example, using an oscilloscope with a high
but finite input resistance, the load device would need to supply the slight current
required by the oscilloscope measurement. For a very small current, the drain-
to-source voltage of M2, would be approximately Vj, and Four would be
equal to Vdd — Fj. This portion of the circuit’s transfer characteristic is indicated
in Figure 4.48.
As uiN is increased above the threshold voltage Vr, the active device Mi begins
to conduct. Because Mi will be in its saturated region of operation, the following
is obtained:

2
•<■ . 9
ioi = y ( Vdd - t^oux - Vj) because vusi = Vdd - uoux
(4.50)
k\
iDl = y (fin — Vt)

Recognizing that the drain currents must be equal

Figure 4.48: Transfer characteristic of yields the following for i>out:
a MOSFET logic inverter gate with a
MOSFET load.
(Vdd - I’ouT - Vr) = - Vj)
^OUT ^_ (4.51)
I’ouT = Vdd - Vr - \/^i/^2(^in - Vj)

This linear transfer relationship having a slope of

-y/kllk2 is valid as long as Mi remains in its sat-
urated region of operation. It will be noted that
\/ki/ k.2, the magnitude of the slope of the characteris¬
tic, needs to be larger than 1 for a useful logic inverter
characteristic.

254 THE METAL-OXIDE FIELD-EFFECT TRANSISTOR

 As uiN is further increased, Mi will enter its triode region of operation.

1
tDl = (uiN - VtIkoUT — 2^0UT
(4.52)
kl 1
(VdD — l^OUT — Vt) = (uiN - VtIvoUT - 2*^0UT

If four is desired for a particular value of din, a quadratic equation must be

solved. Alternatively, the transfer characteristic for this region may readily be
obtained by treating uouT as'^the independent variable and solving for uin. If this
gate is properly designed, Vqh = Vdd — Vj and Vql is the value of uouT obtained
from Eq. (4.52) for ujn = Vdd — Vr. The design criteria is that Vql he less than
the threshold voltage.

SUBSTRATE BIAS
In the logic inverter circuit of Figure 4.47, the substrate of the load transistor
was connected directly to its source. This simplifies the analysis because one can
treat the transistor as a three-terminal device. If this circuit were to be used within
an integrated circuit, separate, electrically isolated, p-type substrates would be
required for each device (Figure 4.49(a)). Although the inverter devices of an
integrated circuit could share a common substrate, each load device would require
a separate substrate. This complicates the fabrication of the integrated circuit.
Furthermore, the load device has a relatively large substrate-to-base capacitance
- a capacitance that appears across the output of the gate. This additional load
capacitance increases the transition times of the circuit.
If a common substrate is used for load and inverter transistors (Figure 4.49(b)),
not only is the fabrication process simplified, but a much smaller area is re¬
quired for the circuit. Furthermore, a common w-type well can be used for the
drain of the inverter and the source of the load. To analyze this circuit, how¬
ever, it is necessary to treat the load transistor as a four-terminal device (Fig¬
ure 4.50(a)) in which an additional voltage, the source-to-substrate voltage vsb
is taken into account. The second subscript of vsb refers to “bulk,” an alternative
designation for the substrate. For static conditions, the substrate current is zero;
the only currents of the device that remain are the drain and source currents
(in = -is)-
A substrate bias vsb, for most situations, affects only the threshold voltage
Vr of a MOSFET device (Figure 4.50(b)). For an n-channel device, the substrate

Figure 4.49: Physical structure of MOSFET logic inverter gates.

input output Vdd output Fdd

inverter load T inverter load

(a) substrate-to-source connection (b) common substrate

4.4 INTEGRATED-CIRCUIT LOGIC GATES; NO RESISTORS 255

 must be at a potential less than

iU that of either the source or drain

|J ^DS of the device. If this were not the
K- substrate
+ case, an n-type source or drain
^GS 1 ^SB
1+
bulk
well would be forward biased.
Hence, the substrate (bulk)-to-
(a) device (b) threshold voltage source potential will be zero or

Figure 4.50: The four-terminal MOSFET device.

negative; conversely, vsb, the
source-to-substrate potential, is
zero or positive for normal operation of the device. An analytic expression for
the threshold voltage Vj based on theoretical considerations is generally utilized.

Vt = Vto + Y {VVSB + 2<t>F - V^<PF) (4.53)

where

Vto = threshold voltage for zero substrate bias, V

y = body-bias coefficient,
2(f)P = surface potential, V
This is the relationship used by SPICE (the default value of y is zero). A value of
0.4 is typical for the body-bias coefficient, and 0.6 V is typical for the surface
potential. Precise values of these parameters for a particular device generally
necessitate a set of experimental measurements.
A MOSFET logic inverter circuit with a load transistor sharing a common
substrate is indicated in Figure 4.51 - the circuit corresponding to the physical
structure of Figure 4.49(b). It will be noted from the following that the source-
to-substrate voltage of the load device Mi is equal to the output voltage:

I’SBZ = Bout, = Vto + yW bout + '^4>f — \/'^4>f) (4.54)

The high-level output voltage Vqh of this circuit, the voltage that occurs for
Bin < Vj, is reduced as a result of the dependence of the threshold voltage of Mi
on Bout-

VoH = Vdd — Vt2, Vt2 = Vto + y{V^oh + 20f — y/2(pp) (4.55)

A simultaneous solution of the preceding equations can be obtained to find Vqh-

Figure 4.51: A MOSFET logic inverter circuit with a common substrate.

Fdd Bout

(a) circuit (b) transfer characteristic

256 THE METAL-OXIDE FIELD-EFFECT TRANSISTOR

However, owing to the small sensitivity of the threshold voltage to the substrate
bias, an iterative-type solution generally entails less effort.
To illustrate the effect of a common substrate, consider the case for Vdd = 5 V,
Vjo = 1 V, y = 0.4 and 20f = 0.6 V. If the effect of the substrate bias is
ignored (Vj = Vjo), the threshold voltage of M2 is 1 V, and Vqh = 4 V. However,
for a substrate bias of 4 V, the threshold voltage predicted by Eq. (4.55) is 1.548 V.
This implies the output voltage Vqh is only 3.452 V (Vdd — Vti)- This value of
output voltage yields a threshold voltage of 1.495 V and a corresponding output
voltage Vqh of 3.505 V. The resultant output voltage may be shown, to an
accuracy better than ±10 mV, to be 3.50 V. The overall effect of the common
substrate is to depress the entire transfer characteristic curve (Figure 4.51(b)).

A DEPLETION-TYPE LOAD

A disadvantage of the logic inverter gates with the MOSFET loads that have
been considered is that their output voltage for a low-level input voltage is con¬
siderably less than Vdd- For the MOSFET devices that have been discussed, a
positive gate-to-substrate voltage is required to form a channel of free electrons
(Vj is positive). An alternative device can be fabricated with a surface layer of
donor doping atoms that extends from the source to the drain of the device. The
free electrons contributed by the donor atoms result in a “built-in” channel that
exists in the absence of a gate-to-source bias. The net effect is that the threshold
voltage is reduced, and, with sufficient doping, the threshold voltage is negative
(Figure 4.52). The device symbol implies a built-in channel - the drain charac¬
teristic is unchanged except that a reduced gate-to-source voltage is required for
a given drain current. A negative gate-to-source voltage is required to reduce the
drain current to zero for the device of Figure 4.52(b). Because the channel must be
depleted for the threshold condition, this is known as a depletion-type MOSFET
device. A MOSFET device having a positive threshold voltage is known as an
enhancement-type device - its channel must be enhanced to achieve a threshold
condition.
Although enhancement-type devices are used for the inverter transistors of
logic circuits, depletion-type devices are frequently used for the load transistors.
Consider the logic inverter circuit of Figure 4.53 with a depletion-type load tran¬
sistor. The gate-to-source connection of M2 results in a current-versus-voltage

Figure 4.52: A depletion-type MOSFET device.

^DS - ^GS “

*D

-I-
^GS

(a) device (b) drain characteristic, Vj--3V

4.4 INTEGRATED-CIRCUIT LOGIC GATES: NO RESISTORS 257

 ^OUT

+ M2
^DS2 losd
transistor

^ + Ml
^DSl inverter
^OUT ^
transistor

(a) circuit (b) transfer characteristic

Figure 4.53: A MOSFET logic inverter with a depletion-type load.

characteristic of Figure 4.52(b) corresponding to vgs — 0* For a negative thresh¬

old voltage Vt2, the device is never cut off (vosi > 0)- Analytic expressions for
the drain current of the load ioi, are readily obtained (i’g52 = 0. ^T2 = — I Vt2|)-
|^DS2 - 2^052) ^or 0 > vds2 < |Vt2I. triode
(4.56)
for vds2 > \Vt2\, saturation

With a common substrate connection, the threshold voltage of the load transistor
Vt2 depends on uouT- Equation (4.53) also applies for a depletion-type device,
in which case Vro is a negative quantity. An important advantage of this circuit
is that when the inverter transistor is cut off and has a zero drain current (uin <
Vri), the drain-to-source voltage of the load transistor vds2 is zero. Hence, the
output voltage is Vdd- The typical transfer characteristic of a logic inverter with
a depletion-type load is shown graphically in Figure 4.53(b).
The dynamic behavior of a MOSFET circuit depends on the load capacitance
of the gate. Approximate analytic techniques, similar to those applied to circuits
with a resistor-type load, may be used to obtain estimates of rise and fall times.
Alternatively, a SPICE simulation can be used. The effect of a substrate bias
(ysB2 = i^out) generally needs to be included when calculating the drain current
of the load device.
Both NOR and NAND logic operations may readily be obtained with circuits
using only MOSEET devices. Eor a two-input NAND gate, Eigure 4.54(a), two

Figure 4.54: MOSFET logic gates.

(a) MOSFET NOR gate (b) MOSFET NAND gate

258 THE METAL-OXIDE FIELD-EFFECT TRANSISTOR

inverter transistors are connected in parallel. With a depletion-type load device
the high-level output voltage (both va and vb less than the threshold voltage
of the inverter devices) is Vdd- If an enhancement-type load is used, the high-
level output voltage is reduced. For a two-input NAND gate, Figure 4.54(b), the
inverter transistors are connected in series. It should be noted that for both gates,
the devices have a common substrate and that the logic functions are performed
entirely with MOSFET devices - no resistors are required.

EXAMPLE 4.9
The devices of the MOSFET logic inverter gate of Figure 4.47 have the fol¬
lowing parameters:

ki = 90 MA/V^ h = 10 iuA/V^, Vti = Vt2 = Vt = 1.0 V

The supply voltage Vdd is 5.0 V, and there is a load capacitance Cl of 1 pF.
a. Determine the static characteristic of the gate for the region in which Mi is
saturated. What is the slope of the characteristic, and what is the maximum
value of uiN for which Mi is saturated?
b. Determine the static high- and low-output voltages Vqh and Vql of the
circuit.
c. The input voltage has been equal to Vqh for a very long time and is sud¬
denly switched to Vql at ^ = 0. What is for f = 0"*"? On the basis
of the derivative’s value, estimate the time required for i>ouT to fall from
VoH to its midvalue of (Vqh + Vol)/2.
d. Consider the case for which ujn has been equal to Vql and is suddenly
switched to Vqh at ^ = 0. What is for ? = 0+? Estimate the time
required for uouT to reach its mid-value.

SOLUTION
a. For niN < Vt (1.0 V), uout = Vdd - Vt = 4 V, the high-level value of
uouT, VoH- For uiN > Vt and Mi saturated, the following is obtained:

tDi = - Vr)^, tDl = -j{vDS2 - Vrf

The following results if these currents are equated and one recognizes that
vds2 = Vdd — t’ouT:

four = Vdd — Vt — \/^i/^2(vjn — Vt) = 4 — 3 (uin — 1) V

The transition of Mi to its triode region of operation can be obtained by
setting four = - 1*
J^IN — 1=4 — 3 (l>iN — l)i *^IN = 2 V
b. The output voltage is equal to Vql for an input voltage of Vqh- For this
condition. Mi is in its triode region of operation.

iDi = [(VoH - Vt) Vql — j Vql]

( Vdd - VoL - Vr)^ = ^ [(VoH - W) Vql - { V^ J

4.4 INTEGRATED-CIRCUIT LOGIC GATES: NO RESISTORS 259

 Introducing numerical values results in the following quadratic equation
for VoL-

V^l-6.2Vol +1.6 = 0, VoL = 0.270, 5.930 V

Only the first solution, Vql = 0.27 V, is valid. For i>rN = 0.27 V, Mi is cut
off and i>ouT is equal to Vdd — Vt = 4 X the value of Vqh-
c. For this condition, Mi is cut off for t > 0. The current of Mi will charge
the capacitor.

( Vdd - VoL - Vrf = 69.6 fiA at t = 0+

dt^OUT dvoUT
Cl = ioi, — = 69.6 V/^ls
dt dt Cl

To reach its midvalue, it is necessary for uouT to change by ( Vqh ~ Vol)/2,

1.865 V.

= 69.6 W/ixs, ^midup = 26.8 ns

^idup

d. For an upward transition of uin. Mi is conducting at ^ = 0'*' and at

the edge of its saturation-triode region. The current of Mi is zero
for vouT = Vqh-

tm = j{VoH- Vrf = 405 ixA

= ^ = 405 V//XS, r^ddown = 4.6 ns

at Cl

EXAMPLE 4.10
A SPICE simulation is desired to verify the results of Example 4.9 for the
logic inverter of Eigure 4.47. In addition, determine the behavior of the circuit
of Figure 4.51 with the substrate of Mi connected directly to ground (y =
0.4 V^/^, 20P = 0.6 V). To ascertain the dynamic behavior of the gates, assume
uiN has levels of 0 and 4 V.

SOLUTION Separate MOSFET inverter circuits will be used to determine the be¬
havior for the two substrate connections. An input voltage pulse having a
high-level duration of approximately 30 ns will ensure that uouT reaches a
steady-state value of Vql before the input pulse returns to zero. The upper
curves of Figures 4.56 and 4.57 are for a load transistor with a direct source-
to-substrate connection, and the lower curves are for the load and inverter
transistors sharing a common substrate. For the direct source-to-substrate
connection, Vqh = 4.00 V and Vql = 0.27 V, values that are in agreement
with those of Example 4.9. The transient solution resulted in values of 53.6 ns

260 THE METAL-OXIDE FIELD-EFFECT TRANSISTOR

 MOSFET Inverter - Example 4.10
VIN 1 0 PWL(0 0 .IN 4 SON 4 30.IN 0)
MIA 2 1 0 0 INVERTER
M2A 3 3 2 2 LOAD
CLA 2 0 IP
VDD 3 0 DC 5
MIB 4 1 0 0 INVERTER
M2B 3 3 4 0 LOAD
CLB 4 0 IP
.MODEL INVERTER NMOS KP=90U VT0=1
.MODEL LOAD NMOS KP=10U VT0=1 GAMMA=.4 PHI=.6
.DC VIN 0 5 .05
.TRAN .5N 150N
.PROBE
.END
Figure 4.55: SPICE circuit and file of Example 4.10.

MOSFET Inverter - Example 5.10

Temperature: 27.0

Figure 4.56: Static SPICE solution of Ex¬

ample 4.10.

O.OV 1 .OV 2.0V 3.0V 4.0V 5.0V

.V(2).V(4)
VIN

and 5.0 ns for ^midup and f^iddown, respectively. The fall time is very close to
the value obtained using the initial derivative (4.6 ns), whereas the rise time
is considerably longer than the 26.8 ns predicted using the initial derivative.
For devices with a common substrate, Vqh = 3.50 V and Vql = 0.31 V (the

4.4 INTEGRATED-CIRCUIT LOGIC GATES: NO RESISTORS 261

 MOSFET Inverter - Example 5.10
Temperature: 27.0
4.0V

3.0V

Figure 4.57: Dynamic SPICE solution of Ex¬

2.0V
ample 4.10.

1.0V

0ns 20ns 40ns 60ns 80ns 100ns 120ns 140ns

.V(2).V(4)
Time

value of Pout for pin = 3.50 V). Midvoltage rise and fall times of 67.8 and
3.9 ns were obtained.

4.5 COMPLEMENTARY METAL-OXIDE SEMICONDUCTOR LOGIC GATES:

AN ENERGY-EFFICIENT LOGIC FAMILY
Static and dynamic limitations constrain the performance of the MOSFET logic
gates discussed in the previous sections. When the static output of one of these
gates is low, there is a current of the load device that must be supplied by Vdd-
Power is thus dissipated by the gate for this condition. The dynamic limitation
may be seen on the SPICE response of Eigure 4.57 (Example 4.10). A rapid
downward transition of the output voltage is achieved as a consequence of the
large drain current of the active device that discharges the load capacitance. The
upward transition of the output voltage, however, is much slower as a result of
the much smaller current of the load device. Although a larger load device (a
device with a larger transconductance parameter) could be used to decrease the
rise time, this would result in a larger current for a low-level output voltage of
the gate. The power dissipated by the gate would be increased.
Logic circuits using complementary metal-oxide semiconductor (CMOS) field-
effect transistors provide an alternative circuit configuration that overcomes these
limitations of conventional MOSEET logic gates. For static conditions, the power
dissipated by the circuit is essentially zero. Furthermore, an active device is used
to produce the upward as well as the downward transition of the output voltage.
Upward and downward transition times of the output voltage are, as a result,
comparable.

THE p-CHANNEL MOSFET DEVICE

Up to this point, only n-channel MOSFET devices have been discussed. With
an alternative fabricating process in which the semiconductor doping is reversed,
a p-channel device can be formed (Figure 4.58) with an n-type substrate and
p-type wells for the drain and source. Because the polarity of the drain- and

262 THE METAL-OXIDE FIELD-EFFECT TRANSISTOR

 source gate drain

— Vqs +
+ -t-

1 .J
^ ” 7-1 ^DS '^DS
^GS

(a) 'device (b) symbol

Figure 4.58: Metal-oxide p-channel field-effect transistor. The direc¬
tion of the substrate arrow is reversed to distinguish the symbol of
this gate from that of an ^-channel device.

source-to-substrate diodes is reversed from those of an n-channel device, the

potentials of the drain and source relative to the substrate need to be negative (or
zero) for normal operation. By means of a negative gate-to-substrate potential,
positive changes are induced at the oxide-substrate boundary. For sufficiently
negative gate voltages, mobile holes result that provide a current path between
tbe source and drain of the device. Even though holes, rather than free electrons,
are the current carriers, the operation of this device is similar to that of an n-
channel device. However, because the mobile charges have a positive rather than
negative charge, the polarity of all currents and voltages is reversed.
As can be seen from the drain characteristic of Figure 4.59, the threshold
voltage of the device is negative (gate-to-source voltages more negative than this
voltage are required for a device current). The transconductance parameter of a
p-channel device (defined as a positive quantity) depends on the surface mobility
of holes /Xp.

k = fipCo,W/L (4.57)

Because the surface mobility of holes is less than that of free electrons, the
transconductance of a p-channel device is less than that of an n-channel de¬
vice with the same dimensions (/Xp//x„ ^ 0.4). The following is obtained for the
drain current of a p-channel device {vds S 0):

cutoff: vgs > Vt, /d = 0

triode: vgs ^ Vt and vgs — Vj < vds < 0

/'d = -k[(vGs — yT)vDS — (4.58)

saturation: vgs < and vds S vgs — W

in — -^{vGS - Vt)^

Other than for the reversal of the inequalities and the minus signs of the current
expressions, these equations are essentially the same as those of an n-channel
device (Table 4.2). For normal operation, all voltages of Eq. (4.58) are negative.
In place of the negative voltages of Eq. (4.58) (a situation that frequently
leads to errors), a new set of device voltages and currents that are positive will

4.5 COMPLEMENTARY METAL-OXIDE SEMICONDUCTOR LOGIC GATES 263

 ^ ^DS
^GS -

Figure 4.59: Drain characteristic of a /7-channel MOS-

FET device.

^DS - '^GS “

be introduced. The source current of a p-channel device is is positive, and the

source-to-gate and source-to-drain voltages are also positive for normal opera¬
tion.

is = -to, ^SG = -VGS, vsD = -vds (4.59)

For a negative threshold voltage (that occurring for an enhancement-type p-

channel device), the following may be used:

Vt^-\Vt\ (4.60)

Substituting the transformations of Eqs. (4.59) and (4.60) into Eq. (4.58) yields
the relations of Table 4.2. It will be noted that the relations of Table 4.2 for
a p-channel device may be derived from those of Table 4.1 for an n-channel
device by interchanging drain and source subscripts (D and S) and introducing
the magnitude of the p-channel threshold voltage.

A CMOS INVERTER GATE

A logic inverter gate using complementary MOSFET devices was first proposed
by Sah and Wanlass in 1962 (Davies 1983; Sah 1988). As a result of numerous
improvements, there are several families of CMOS gates and CMOS integrated
circuits (Shoji 1988; Uyemura 1988). CMOS logic gates are extensively used for
battery-powered electronic systems such as electronic watches and laptop com¬
puters. Consider the basic inverter circuit of Figure 4.60 with devices that have
complementary symmetry, that is, devices with equal transconductance parame¬
ters and threshold voltages with equal magnitudes.
The regions of operation of the n-channel device are the same as in circuits
in which an inverter is used with a load resistor or device (Figure 4.61(a)). The

Table 4.2 Source Current of an enhancement-type p-channel MOSFET

Region Source-Drain Voitage Source Current

Cutoff vsG < IVtI vsd >0 is = 0

Triode 0 < usd < I'SG - |Ft| *5 = A;[(i;sg - |Vy|)usi7 -

Conduction I
VSG > \Vt\ I
f;Saturation vsd ^ vsg — |Vy| is = 2 (■'^SG - |Vyi)^

264 THE METAL-OXIDE FIELD-EFFECT TRANSISTOR

 ^DD
o
^SGP ' n +
Vsdp Mp

k-N kp^k
-t r -1- -1-
Mn
Vtn \Vtp\ = Vt
^IN ^DSN ^OUT
^GSN

Figure 4.60: Complementary metal-oxide semiconductor field-effect

logic inverter gate.

source-to-gate and source-to-drain voltages of the p-channel device, vsgp and

vsDP, may readily be related to the input and output voltages of the inverter
circuit by

'^SGP = Vdd — VsDP = Vdd — l^OUT (4.61)

A cutoff condition occurs for vsg < Vp:

Vdd — < Vp, uin > Vdd - Vp (4.62)

The dividing line between the triode and saturation regions of the p-channel
device corresponds to vsdp — vsgp ~ Vp as follows:

Vdd — i^ouT = Vdd — i^in — Vp, uqut = i'in + Vp (4.63)

This condition for the p-channel device is indicated in Figure 4.61(b).

The static voltage transfer characteristic of the gate will be determined for an
open-circuit output condition. This requires that the currents of the devices be
equal as given by

hp = ioN (4.64)

For Pin < Vp, the ^-channel device is cut off (/'dn = 0)- Because the source-to-
gate of the p-channel device is large, this device could be conducting, but because
its source current is zero, its source-to-drain voltage must be zero. Hence,

Figure 4.61: Regions of operation for the devices of a CMOS inverter circuit.

Pout ^out
pqut - ^in + Vp
Vdd ■■ V.dd
Pqut - ^iN ~ Vp
saturation triode /"

3
u
/" triode Vj saturation

-+-♦ Pin -i—1-> Pin

Vp Vdd t Vdd
Vdd “ Vp
(a) M-channel MOSFET (b) p-channel MOSFET

4.5 COMPLEMENTARY METAL-OXIDE SEMICONDUCTOR LOGIC GATES 265

 tiQUj = Vdd for Din < Vj. A similar con¬
^OUT Mn cutoff
I Mp triode, Mf^ saturated dition occurs for uin > Vdd ~ with the
p-channel device being cut off. The gate-to-
source voltage of the ^-channel device is large,
both saturated and because idn = 0, the output voltage is
Mp saturated, triode zero (uouT — 0 for uin > Vdd ^ Vj). These
Vj Mp cutoff results are indicated by the voltage transfer
j/ characteristic of Figure 4.62.
i-^IN
I I ^DD Consider the situation for which both de¬
^DD~^T vices are in their saturated region of opera¬
tion (the region between the dashed lines of
Figure 4.62: Voltage transfer characteristic of a
Figure 4.62). Equating the device currents re¬
CMOS inverter gate.
sults in the following:

k. 2 ^
-^i^GSN - Vrr = 2^vsgp Vrf

VGSN — Vt = VSGP — Vj, I'iN — Vr = Vdd — vin — Vp (4.65)

i^iN = Vdd/2

This implies a vertical line for four over the range for which the devices are
saturated. Finally, there are two transition regions in which one device is saturated
and the other is in its triode region of operation. Consider the upper transition
region in which the p-channel device is in its triode region and the ^-channel
device is saturated (Vp < uin < Vdd/2).

I^[(VSGP - Vt)vsdP - l^SDp] — 2^VgSN- Vjf-

(4.66)
{Vdd - t’iN — Vt)( Vdd - i^out) - j(Vdd — vout)^ = j(t^iN — Vp)^

When this quadratic relationship is solved, the upper transition portion of the
characteristic results. There is a similar set of expressions for the lower transition
region in which the p-channel device is saturated and the n-channel device is in
its triode region of operation:

^(^SGP - Vp)^ = k[(VGSN - Vt)vdSN - J^dsn]

(4.67)
jIVdd - Pin - Vp)^ = [(pin - Vp)pouT - jPqut]

Although not immediately obvious from the preceding relations, the voltage
transfer characteristic is symmetric about its midpoint (pin == pqut = Vdd/2).
The current supplied by Vdd is the source current of the p-channel device I'sp
(= ^dn)- Because for pin < Vp and pin > Vdd — Vp one of the devices is cut off, isp
is zero. The supply current and power supplied by Vdd are therefore zero for these
input voltages that correspond to low- and high-input logic levels. Therefore, for
static conditions, the power supplied and hence dissipated by the inverter gate is
essentially zero. A current occurs for the transition region Vp < pin < Vdd - Vp

266 THE METAL-OXIDE FIELD-EFFECT TRANSISTOR

when conduction occurs. When both devices *SP - *DN
are saturated uin = Vdd/2, the supply cur¬
rent is a maximum:

isPmax = ^(Vdd/2 — Vr)^ (4.68)

For rapid transition of the input voltage, the

energy dissipated by the MOSFET devices as
a result of their current is generally small. The
dependence of the device curfents on uin is in¬
dicated in Figure 4.63. Figure 4.63: Device currents as a function of input
In addition to a low power consumption, voltage.

a CMOS logic gate has a more rapid dynamic

response than a logic gate consisting of an inverter device and pull-up load. Con¬
sider the circuit of Figure 4.64 with a load capacitor Ci, which accounts for the
drain-to-substrate capacitances of the devices as well as the capacitance of the
circuit to which it is connected. Assume the input voltage has been zero for a long
time (static conditions prevail) and that it is switched to Vdd at ? = 0. Because
the p-channel device is cut off for t > 0, the circuit of Figure 4.65 with only the
w-channel device applies. The drain current of the ^-channel device /’dn rapidly
discharges the capacitor. Initially the MOSFET device will be saturated, resulting
in the following:
dvoUT dvoUT
ioN = VtT =-Cl (VoD-Vrf (4.69)
dt ’ dt 2Ci
This initial value of the derivation of vouT is valid until the device enters its
triode region of operation, that is, until pout falls below Vdd — Vp. The initial
slope, projected to the time axis corresponding to pqut = 0, yields a useful time
parameter to:
Vdd k ,, ,9 . IClVdd
(4.70)
(Vdd — Vp) to —
to 2Cl' " HVod-Vt)^
A time of approximately to/2 is required for pout to fall to Vdd/2, whereas the
90-to-10-percent fall time is somewhat larger than to-
A similar situation occurs when an input voltage of Vdd is switched to zero
at t = 0 (Eigure 4.66). Eor this case, the source
current of the p-channel device charges the capac¬ Figure 4.64: CMOS logic inverter gate with
itor. The initial time derivation of pout has the a load capacitance.

same magnitude for complementary devices except

Vdd
that it is positive. The time parameter ^o corre¬
sponding to a projection of the initial derivative
Mr.
to POUT = Vdd is the same. As a result of the
p-channel device, the upward transition of pout
+
is considerably less than that when it is charged _
^IN — Pout
with a MOSFET load device. For complementary
symmetry, the rise and fall times of the output are
equal.

4.5 COMPLEMENTARY METAL-OXIDE SEMICONDUCTOR LOGIC GATES 267

 ^IN

^DD
*DN

t
J iviN ^
^OUT
V;DD Cl
’^OUT

equivalent circuit for t > 0

Figure 4.65: An upward transition of vin-

CMOS LOGIC GATES

Logical NOR and NAND operations may readily be performed with CMOS
gates; each logic input is used to switch both an n-channel and a p-channel device.
The circuit for a NOR gate is shown in Figure 4.67(a). If both inputs are low
(va = vb = 0), the w-channel devices are cut off while the p-channel devices have
a large source-to-gate voltage - they would provide a source current if a load
were connected to the output of the circuit. The behavior of the circuit for this
condition approximates that of a single p-channel device with a transconductance
one-half that of the individual devices (a channel twice as long). Hence, for a zero
load current, the output voltage is Vdd- If either input is high {Vdd), one of the
p-channel devices will be cut off. For this condition, uouT = 0 because one of
the parallel-connected n-channel devices will be conducting.
For the NAND gate of Figure 4.67(b), the parallel and series connections of the
devices are reversed. If either input is low, one of the series-connected n-channel
devices is cut off while one of the parallel-connected p-channel devices has a
large source-to-gate voltage. Hence, uouT = Vdd for no load current. Only if
both inputs are high {va — vg = Vdd) will the series n-channel devices conduct,
resulting in a low value for vout-

Figure 4.66: A downward transition of uin.

268 THE METAL-OXIDE FIELD-EFFECT TRANSISTOR

 ^OUT
+

(a) two-input NOR gate (b) two-input NAND gate

Figure 4.67: CMOS logic gates.

EXAMPLE 4.1 1
A CMOS logic gate is connected to a load that can be simulated by two resistors
(Figure 4.68). The two load resistors and Vdd niay be replaced by a Thevenin
equivalent circuit.
a. Determine uouT for ujn = Vdd-
b. What is uouT for uin = 0?
c. What is vouT for uin = 5 V?
d. As a result of the load resistors, the output transition that occurs when
both devices are saturated will no longer be vertical. Estimate the slope of
the transition by determining dout for uin = 4.8 and 5.2 V. Verify that the
MOSFET devices are indeed saturated for these input voltages.

SOLUTION The load resistors and Vdd result in a Thevenin equivalent circuit
with Vxh = 5.0 V and i^xh = 10 (Figure 4.69).
a. Only the ^-channel device conducts for uin = Vdd (Figure 4.69(a)). For
uouT small, the drain-to-source circuit may be replaced by an equivalent
resistance r„ as follows:

1 r«Vrh
Tn = 1.25 kQ, fOUT = = 0.56 V
^( Vdd — Vt) fn + f^Th

Figure 4.68: CMOS logic inverter of Example 4.11.

Vdd - 10 V

= kp = 0.1 mA
VfN = I Vjp I = 2.0 V
^OUT

4.5 COMPLEMENTARY METAL-^OXIDE SEMICONDUCTOR LOGIC GATES 269

 o
^DD - 10 V

^Th R Th
1. “Wv—
I—— + +
FoUT ^OUT 'Th
Tdd

(a) U|tyf -Vqd (b) yiN = 0

Figure 4.69: Equivalent circuits for vin = Vdd and njN = 0.

b. For Tin = 0, only the p-channel device is conducting (Figure 4.69(b)).

For vsDP small, the MOSFET device may be replaced by an equivalent
resistance rp as follows:

1
isp ~ k{Vp)D — Vt)vsdp, 1.25 kQ
HVdd-Vt)
The voltage across rp is 0.56 V, resulting in a value of 9.44 V for tout-
c. Using the Thevenin equivalent output circuit, the following is obtained for
the output voltage:

isP = iDN+ (t^OUT — VTh)/-RTh

i^ouT = Vxh + Rjhihp — ioN)
For Tin = 5.0 V, the devices have equal currents as follows:

k
isp — — Fin — Ft)^ = 0.80 mA

k
ioN — — Vpf = 0.80 mA

Therefore, tqut = Vxh = 5.0 V.

d. For Tin = 4.8 V, isp = 0.882 mA and i^N — 0.722 mA. From the preceding
expression for tqut? a value of 6.6 V is obtained. For tin = 5.2 V, isp =
0.722 mA and idn — 0.882 mA, resulting in a value of 3.4 V for tout-

, A Tour 3.4-6.6
slope =- -8.0
A Tin 5.2-4.8

When Tin = 4.8 V, both devices will be saturated if tout is between 2.8
and 6.8 V (tin ± Vr). When tin = 5.2 V, saturation occurs for tout be¬
tween 3.2 and 7.2 V. These conditions were fulfilled - the devices were
saturated.

EXAMPLE 4.12
A CMOS logic inverter gate has an output transition that occurs for a mod¬
erately large change in tin (Figure 4.62). A much more abrupt transition

270 THE METAL-OXIDE FIELD-EFFECT TRANSISTOR

 can be achieved using an additional set of inverter gates - a total of three
logic inverter gates. Assume the MOSFET devices have the following param¬
eters:

kN = 0AmAN^, Vtn = 1.0 V, X = 0.02

kp = 0.1 mAA^^ Vtp = -1.0 V, X = 0.02

A supply voltage of Vdd = 5 V is used for the gates. Use a SPICE simulation
to determine the static transfer characteristic of one, two, and three gates.
Consider the transition width of din to be defined by the points at which the
magnitude of the slope of the characteristic is 1. What are the transition widths
for the circuits?

SOLUTION The circuit and file of Eigure 4.70 will he used for a solution. It should
be noted that for the p-channel devices, the drain is the lower terminal and the
source is the upper terminal. The voltage transfer characteristics of Eigure 4.71
are obtained. A single gate has the response having “rounded corners,” V(2).
Two gates form a buffer (output logic equal input logic) and have a voltage
transfer characteristic V(3) that has nearly “square corners.” The transfer
characteristic for three gates is essentially a “perfect” response having square
corners. From plots of the derivative of dquTj DV(2), DV(3), and DV(4), the

Figure 4.70: SPICE diagram and circuit for Example 4.12.

Vdd = 5V

J M PI
J M P2
M,P3

+ + +
H
^IN ^OUTl ^OUT2 ^OUT3
M,N1 MiN2 M N3

CMOS Inverters
VIN 1 0
MPl 2 1 5 5 MP
MNl 2 1 0 0 MN
MP2 3 2 5 5 MP
MN2 3 2 0 0 MN
MP3 4 3 5 5 MP
MN3 4 3 0 0 MN
VDD 5 0 DC 5
.MODEL MP PMOS KP=.1M VT0=-1 LAMBDA=.02
.MODEL MN NMOS KP=.IM VT0=1 LAMBDA=.02
.DC VIN 10 5 .01
.PROBE
.END

4.5 COMPLEMENTARY METAL-OXIDE SEMICONDUCTOR LOGIC GATES 271

 CMOS Inverters
Temperature: 27.0
5.0V

4.0V

3.0V
Figure 4.71: SPICE solution for Example
4.12.
2.0V

1.0V

O.OV
O.OV 1.0V 2.0V 3.0V 4.0V 5.0V
= V(2). V(3). V(4)
VIN

following is obtained for the transition widths:

Vii ViH Au/n

uouTi 2.092 2.908 0.816 V

yoUT2 2.468 2.532 0.064 V
t^ouTS 2.480 2.520 0.040 V

4.6 LOGIC MEMORIES: THE BASIS OF MEGABYTES OF STORAGE

The static behavior of the bipolar and MOSFET logic circuits that have been
discussed was specified by means of a transfer characteristic. An output of these
circuits at a particular time was uniquely determined by the value of its input
signals at that time. This is not the case for a memory circuit because its output
depends not only on its present input signals but also on its earlier inputs. In
Chapter 1 MOSFET circuits (Figure 1.27) were briefly discussed. Because the
operation of these circuits depends on positive feedback, they are classified as
regenerative circuits. The concept of regeneration, that is, regenerating an input
signal by feeding back a portion of the output signal to the input, was utilized
to enhance the sensitivity of the early radio receivers (Armstrong 1915, 1922).
Although regenerative circuits are now seldom used for radio receivers or other
analog systems, they are extensively used for logic circuits. The bistable flip-flop,
which will be discussed in this section, is the modern descendant of this early
concept, which dates back to nearly the beginning of electronics.

A MOSFET BISTABLE CIRCUIT

Consider the MOSFET circuit of Eigure 4.72, which consists of two basic
inverter circuits with pull-up resistors. The static transfer characteristic of a single
inverter gate, uouTi versus pin, is shown in Eigure 4.73(a). From the output of

272 THE METAL-OXIDE FIELD-EFFECT TRANSISTOR

 E;DD
the first gate for the input of the sec¬
ond gate, the overall transfer charac¬
RD RD
teristic of the logic buffer, uouTi ver¬
sus uiN, is obtained (Figure 4.73(b)). + +
The characteristic is readily obtained Ml M,
+ ^OUTl ^OUT2
with a point-by-point procedure in ^IN
which changes in the regions of op¬
eration of the devices are taken into
account. The buffer characteristic, it Figure 4.72: A MOSFET logic buffer (two inverters).
will be noted, has a much more abrupt
output voltage transition than that of
a logic inverter gate using a single MOSFET device. Its transfer characteristic is
much closer to that which might be considered an “ideal” response.
The abrupt transition is the result of the amplification of the individual
MOSFET logic inverter circuits. Consider the case for uout2 = i^ouTi = I’iN-
A single logic inverter gate for this input has a transfer characteristic with a
slope of m (a negative quantity with a magnitude that is greater than unity).
Eor the two logic inverter gates that form a logic buffer gate, the slope of the
overall characteristic is m^, a positive quantity that is larger than the magnitude
of m.
A line, uouri = vin, is also indicated in Eigure 4.73(b). At its intersections
with the response of the gate, fouTZ? the output voltage of the buffer, is equal to
its input voltage. Hence, if the output of the logic buffer gate is used to provide
its input, there are three equilibrium conditions: A, B, and C. A logic buffer
circuit with its output connected to its input is shown in Figure 4.74. The circuit
has been redrawn to emphasize its physical symmetry. Although there are three
equilibrium voltages and currents for this circuit, only two of the equilibrium
conditions, A and C, are stable. For either of these conditions, the circuit will
return to its previous equilibrium condition if a small disturbance (for example,
thermal or shot noise) should move it from its initial equilibrium condition. This
is not the case for condition B, which corresponds to the abrupt transition of
UOUT2- A slight disturbance will propagate through the circuit, causing uourz to
move to the condition corresponding to either A or C. Although A and C are

Figure 4.73: Transfer characteristic of a MOSFET logic inverter and buffer.

^OUTl

4.6 LOGIC MEMORIES: THE BASIS OF MEGABYTES OF STORAGE 273

 stable equilibrium conditions, B is
an unstable equilibrium condition; a
physical circuit will never be found in
an unstable equilibrium condition.
The circuit of Figure 4.74 has two
stable equilibrium states: uouTi =
Vdd and uout2 = Vql or uouri =
VoL and uouTi = Vdd- These are
Figure 4.74: MOSFET bistable circuit. indicated in Table 4.3. Because the
circuit will remain indefinitely in a
particular state as long as the supply
voltage is maintained, this is a bistable circuit. It is a basic flip-flop memory cir¬
cuit that is occasionally referred to as an Eccles-Jordan flip-flop after its inventers
(Eccles and Jordan 1919).

A FLIP-FLOP MEMORY ELEMENT

To serve a useful memory function, it is necessary to be able to change the state
of a flip-flop. This can be achieved using a second set of MOSFET devices that
have set and reset input voltages vs and ur (Figure 4.75). The outputs of the set
and reset devices are in parallel with the outputs of the MOSFET devices of the
flip-flop. When vs and vr are less than the threshold voltage of the devices Vr,
devices M3 and M4 are cut off, and they will have no effect on the operation of
the flip-flop circuit. In accordance with the initial state of the flip-flop, high-level
logic input voltages for vs or vr may be used to change the state. Consider the
case for which Mi is conducting, that is, uouTi = Vol- A high-level logic input
for Vs, Vs — Vdd will have only a small effect on uouTi? reducing it slightly. The
other output voltage, uouTi? will be unaffected. On the other hand, a high-level
logic input voltage for vr, vr = Vdd will cause M4 to conduct. This will reduce
i^ouT2) which, in turn, will result in a cut-off condition for Mi if uout2 falls
below Vj. As a consequence, M2 will conduct (uout2 ^ Vql)- The result is that
the flip-flop memory changes state - it will remain in the new state even after vr
is reduced to a low-level logic voltage (vr < Vj).
For this memory, a high-level logic voltage for vr produces a low-level logic
voltage for i>ouT2- Owing to the physical symmetry of the circuit, a high-level
logic voltage for vs results in a low-level logic voltage for uouri, which implies
a high-level logic voltage for i'ouT2- If both inputs are high {vs = vr — Vdd),
both outputs will be low. When the inputs are removed, the resultant state of the
flip-flop memory will depend on which input was removed last. For the case in
which both inputs are removed
simultaneously, the resultant
TABLE 4.3 MOSFET BISTABLE CIRCUIT
state of the memory will depend
KOUTl Ml fOUT2 M2 on both the electrical noise of
State 1 Vdd cutoff Vol conducting circuit and possible asymmetries
State 2 Vol conducting Vdd cutoff of the circuit. As a consequence,
the resultant state tends to be

274 THE METAL-OXIDE FIELD-EFFECT TRANSISTOR

 Set - Reset
Figure 4.75: MOSFET flip-flop circuit with set and reset inputs.

unpredictable. To avoid this uncertain outcome, the condition of having both

inputs simultaneously high is excluded, that is, the logic circuits producing vs
and vr must be designed so that simultaneous high-level logic voltages of the
input signals do not occur.
The circuit of Figure 4.75 is generally known as an RS flip-flop. If the logic
variable Q is associated with fouTZ) then, except when the memory is changing
state, Q can be associated with uouri- Concurrently, the logic variables S and
R can be associated with vs and vr, respectively. This results in the logic truth
table. Table 4.4.
The MOSFET device circuit of Figure 4.75 can be recognized as consisting
of two logic NOR gates. Mi and M3, which, along with their common drain
resistor, form one logic NOR gate; M2 and M4 form the other gate. The output
of each NOR gate serves as an input of the other NOR gate (Figure 4.76(a)). As
would be expected, the truth table (Table 4.4) is consistent with that of the NOR
gate logic circuit. The same logic truth table is obtained regardless of the devices
and circuit configurations used to implement the logic NOR gates. Therefore,
MOSFET devices could have been used in place of the pull-up resistors (Rd) or,
alternatively, CMOS, TTL, or any other type of logic gates could have been used.
An alternative implementation of the RS flip-flop memory using NAND gates is
indicated in Eigure 4.76(b); complemented input logic levels are required for the
set and reset inputs.

A MEMORY ARRAY
Memories consisting of flip-flops are extensively used in logic systems. A mi¬
croprocessor, for example, requires numerous flip-flop-type storage registers.
In addition, flip-flops are used for addressable
memory arrays such as that of Eigure 4.77, for
which four memory cells of a much larger array TABLE 4.4 RS
are shown (simplified device symbols). Generally, FLIP-FLOP MEMORY
a square array is utilized; a 16-bit memory consists
R S Q
of 4 rows and columns, a 16-kbit array (16,384
0 0 Qprevious
bits) consists of 128 rows and columns, and so 1 0 0
forth. Although a device circuit is shown for only 0 1 1
Celln, all memory cells have the same device cir¬ 1 1 Excluded

cuit. Both outputs of the flip-flops are connected to

4.6 LOGIC MEMORIES: THE BASIS OF MEGABYTES OF STORAGE 275

 column data lines (Di and Di
for Cellu) through enhance¬
ment-mode MOSFET devices.
The gate voltages of these de¬
vices are determined by the row
address line to which they are
(a) NOR gates (b) NAND gates connected.
When a memory is inactive,
Figure 4.76: Logic gate implementation of an RS flip-flop memory. that is, it is neither being read or
written to, all row address lines
(Ai, Ai,...) are at a potential less than the threshold voltage of the enhancement¬
mode devices. Hence, the devices connecting each memory cell to column data
lines will be cut off. Therefore, each cell will remain in its present state, thus
“storing” a single bit of data.
To read or write to a particular cell, the cell must first be addressed. A high-
level row address line, for example Ai, will result in high gate voltages for the
MOSFET devices connected to the address line. As a result, each memory cell
of the first row will be connected to the data lines (Di and Di for Celln, etc.).
The column address determines which column will be read or written to - only
a single row and column is simultaneously addressed.
The circuit of Eigure 4.78 in which the address voltage is Vdd corresponds
to a read operation. The resistors r represent extremely large MOSFET circuit

Figure 4.77: A memory array consisting of flip-flops using MOS¬

FET devices. A simplified symbol is used for the devices. Although
while not shown, all substrates are connected to ground. The circuit
of each cell is identical to that indicated for Cellw.

column address

276 THE METAL-OXIDE FIELD-EFFECT TRANSISTOR

resistances. Consider the case for
which the memory state is such that
M2 is conducting and Mi is cut off:
FouTZ VoL ai^ fouTi ^ Vdd. The
circuit for the D data bus is a con¬
ducting enhancement-mode device
M5 in series with the depletion mode
device M3. These devices, in turn, are
in series with r and the supply volt¬
age Vdd- For a very small series cur¬
rent (due to the large r), the drain-
to-source voltage of M3 will be very
small, and that of M5 will be approx¬
imately its threshold voltage Vts.
Hence, uceiii ^ Vdd - Vt5, a high- Figure 4.78: Reading a logic memory cell.
level logic voltage. For the circuit of
the other data line D, MOSFET device is also conducting. However, foutz
is very small (~Vol), resulting in a very small voltage for vceliz (^Vol)- For the
other memory state, the read voltages across the resistors are reversed. With a
suitable MOSFET logic circuit controlled by the column address, the state of the
selected memory cell can be transferred to the read output of the memory circuit.
It should be noted that the voltages are such that the terminals of Ms and
that are connected to the flip-flop behave as drains, and the terminals connected
to the data lines behave as sources.
A MOSFET circuit is used for writing to a selected memory cell (Figure 4.79).
The set and reset devices of the read-write circuit perform a function similar to
those of an RS flip-flop memory in which MOSFET devices M5 and Me provide
a series connection to the memory. If uouTZ is high {^Vdd), a high-level logic
voltage for vr will result in the conduction of both the reset MOSFET device and
M^. This will result in a low-level logic voltage for foutz, thus changing the state
of the memory. If voutz is initially a
Figure 4.79: Writing to a logic memory cell.
low-level logic voltage (~Vol)) the
reset operation would not affect the TdD ^dd
D D
state of the memory. A set input,
_^ Tpp
however, will change the state of the
memory. M3 II7| ^ Ml
-L Ms h H ^ Ms -L
The memory cell that has been dis¬
_in
cussed used enhancement-mode active
MOSFET devices and depletion-mode
p Ml M2 *"1
loads. Alternatively, enhancement¬
mode load devices could have been
used. Although the high-level logic
voltages would be reduced, fewer fab¬ Read/Write
+ +
rication steps would be required (no circuit Vr
channel doping for the load devices).
Set Reset
Memory arrays using CMOS devices

4.6 LOGIC MEMORIES: THE BASIS OF MEGABYTES OF STORAGE 277

D
D
are also common (Figure 4.80). For this

-1
^ ^DD memory, CMOS inverter gates are
M3 connected to form a flip-flop. Either
^-channel or p-channel enhancement¬
- Mg
FT
+
^
nLxJ +
^OUT2
mode devices may be used for connect¬
ing the flip-flop to the column data lines
’^OUTl
£2 zt:
A/ (^-channel devices are shown). An ad¬
vantage of a CMOS memory is its very
low power consumption; for static con¬
Figure 4.80: A CMOS memory cell. Transistors M and
3
ditions the currents of the memory cells
M are p-channel MOSFET devices.
4 as well as those of the row and column
circuits are essentially zero. Although
bipolar junction transistors were used
for early memory arrays, MOSFET circuits are generally used for memories now
being produced.

THE DYNAMIC MEMORY ARRAY

The type of memory that has been discussed is generally known as a random-
access memory (RAM). Although the term random is universally used, it is used in
a sense different from its more conventional meaning, which is lacking a definite
plan or order. A circuit external to the memory reads or writes data according to
a very definite plan or order. It is from the perspective of a memory cell that the
reading or writing appears to be random. The term static is also used, that is, static
RAM or SRAM. The term static is also missapplied because the state of the mem¬
ory, for most applications, is repeatedly changed (through write operations). The
memory is used in dynamic systems in which its dynamic behavior is of particular
importance. Eor these memories, static is used to describe a memory’s ability to
store, indefinitely, a bit of data as long as its supply voltage is maintained.
The memory cells that have been discussed require six transistors per cell. The
fewer transistors required per cell, the more readily can a particular size array be
fabricated. Alternatively, the fewer transistors required for each cell, the larger
the array (and hence the number of bits that can be stored) that can be fabricated
on a given size semiconductor chip using a particular technology. To reduce the
transistor count of a cell, an alternative data storage scheme utilizing the charge
storage of a capacitor has been developed (Dennard 1984; Rideout 1979; Sah
1988; Schroder 1987; Terman 1971). The voltage of a capacitor depends on its
stored charge q according to the relation
V = q/C (4.71)
To change the voltage, the charge must be changed, that is, a current is required:
dv 1 dq
(4.72)
dt C dt C
For an ideal (lossless) capacitor, the charge and hence voltage will remain un¬
changed for a zero current condition (an open circuit). Hence, a capacitor’s
charge, or lack of charge, can be associated with a bit of data. Unfortunately,
the utility of this simple data storage scheme is limited by physically realizable

278 THE METAL-OXIDE FIELD-EFFECT TRANSISTOR

capacitors - they are not lossless. As Read
a result of an unavoidable dielectric Write
leakage current, the charge of a capac¬
itor diminishes with time - it “leaks”
off. Hence, data may be stored only
temporarily unless a provision is in¬
cluded to refresh the memory, that is,
to restore the charge that leaks off.
Consider the three-transistor dyna¬
mic memory cell of Figure 4.81. To D.Write D Read
read the cell, its read address line is set
to a high-level logic voltage (for exam¬ Figure 4.81: Three transistor dynamic memory cell.
ple, Vdd)- In addition, a load MOS-
FET device connected between DRead nnd Vdd is activated (with a high-level
gate voltage). This load device, as well as M3, serves as a load for the MOSFET
inverter M2. The column voltage will depend on the voltage of Ci, that is, the
gate-to-source voltage of M2. For a small capacitor voltage (less than Vj), M2
will be cut off and the voltage of the read column will be high. Conversely, a high
capacitor voltage will result in the conduction of M2, thus tending to reduce the
column voltage.
To write to the cell, its address line is set to a high-level logic voltage (for
example, Vdd). A high-level logic voltage for Dwrite will result in a charging of
Cl. The left-hand terminal of Mi will function as a drain, and the right-hand
terminal as a source (it may be treated as a source follower with a load of Ci).
A low-level logic voltage (0 or Vql) for Dwrite will discharge Ci if it is initially
charged. The source and drain terminals of Mi are reversed - the MOSFET
current is in the opposite direction from that when Dwrite is high.
As a result of charge leakage, a refresh operation is required. Eor this opera¬
tion, the read address line is first set to a high-level logic voltage, and the state of
the memory is determined by a read operation. The column write line is then set
either high or low, corresponding to the memory state determined by the read
operation. The write address line is then set to a high-level logic voltage and
the capacitor, if it was at a high-level logic voltage, is recharged. It is necessary
to “refresh” this cell while the capacitor’s charge remains adequate to indicate
its original state. Because there is a separate circuit for each column of cells, an
entire row of cells can be refreshed simultaneously. To refresh the entire array, it
is necessary to sequence through each row of the array. The cell structure of the
preceding dynamic memory is simpler than that of a static memory (only three
as compared with six transistors). The price “paid” is that more complex col¬
umn and row circuits are required. Furthermore, the memory cannot be accessed
during a refresh interval.
The circuit of a dynamic memory cell may be further simplified, that is, it can
be reduced to a single transistor and capacitor. A one-transistor memory cell was
mentioned in the introduction to the chapter (Figure 4.6). For this cell, a high-
level logic address line voltage is used to read a cell. This operation, in effect,
connects the capacitor of the cell to the column data line. Unfortunately, the data

4.6 LOGIC MEMORIES: THE BASIS OF MEGABYTES OF STORAGE 279

 line, owing to its physical length (it connects to all cells of a particular column),
has a much larger capacitance than that of the cell. Hence, the stored charge of
Cl will result in only a very small change in voltage of the data line. Not only
must this small voltage change be detected, but the voltage of the cell’s capacitor
must be restored to its original value. Each read operation must be followed by
a write operation to restore the original state of the memory. A write operation
consists of applying a high-level or low-level logic voltage to the column line.
Because an entire row is addressed for each read or write operation, all other
cells of that row must be refreshed.
A considerable effort is being expended to produce ever larger memory ar¬
rays. This includes the development of static memories with small access times
that have storage capacities in excess of 1 Mbit (Flannagan 1992). Very large
dynamic memory arrays are also being developed (Itoh 1990). The complexity
of modern memory arrays and other very large-scale integrated circuits is con¬
siderably beyond that which could have been imagined when early integrated
circuits were fabricated. Although further improvements are expected, physical
limitations will eventually set constraints on the ultimate level of complexity
(Keys 1987, 1992).

EXAMPLE 4.13
Consider the logic buffer circuit of Figure 4.82, which will be used to construct
a flip-flop. A SPICE simulation is to be used to verify that the equilibrium
condition corresponding to point B of Figure 4.73 is unstable.
a. Determine the static transfer characteristic of the circuit uoirrz versus din.
Ignore the “dashed” feedback circuit of Figure 4.82.
b. The behavior of the circuit with the “dashed” feedback circuit is to deter¬
mined. A voltage source is included in the feedback circuit to simulate

Figure 4.82: MOSFET circuit of Example 4.13. The node numbers of the circuit correspond
to those of the SPICE program.

Ml, Ml Ms, AU
k = 50fiAN^ Vt = 1.0V k = 50ixAJV^ Vro =-1.0 V
)/ = 0.37Vi/2 20p=O.6V

280 THE METAL-OXIDE FIELD-EFFECT TRANSISTOR

 MOSFET flip-flop
VIN 1 0
Ml 2 1 0 0 MOSACTIVE
M3 3 2 2 0 MOSLOAD
Cl 2 0 IP
M2 4 2 0 0 MOSACTIVE
M4 3 4 4 0 MOSLOAD
C2 4 0 IP
VDD 3 0 DC '5
.MODEL MOSACTIVE NMOS KP=50U VTO=l
.MODEL MOSLOAD NMOS KP=50U VTO=-l GAMMA=.37 PHI=.6
.DC VIN 0 5 .025
.PROBE
.END
Figure 4.83: Circuit file for static transfer characteristic of Example 4.13.

the effect of a noise pulse. Assume pjv is a single pulse with an amplitude
of 0.1 V and a duration of 10 ns. Use an initial condition corresponding
to the unstable equilibrium condition to determine the time dependence of
i^ouT2 for noise pulses with both positive and negative polarities.

SOLUTION
a. The circuit file of Figure 4.83 results in the static transfer characteristic
of Figure 4.84, which yields the following equilibrium voltages (uouT2 =
Un):

A: 0.120V B: 1.722V C: 5.0V (4.73)

b. Although an unstable equilibrium point will not occur for a physical cir¬
cuit, it can occur for a SPICE transient simulation; frequently the initial
condition found for a transient simulation will be the unstable equilibrium
point. Furthermore, the SPICE transient solution will tend to be stable, that

MOSFET flip-flop
Temperature: 27.0

Figure 4.84: SPICE static solution for Ex¬

ample 4.13.

VIN

4.6 LOGIC MEMORIES: THE BASIS OF MEGABYTES OF STORAGE 281

 MOSFET flip-flop
VN 1 4 PWL(0 0 ION .1 20N 0)
Ml 2 1 0 0 MOSACTIVE
M3 3 2 2 0 MOSLOAD
Cl 2 0 IP
M2 4 2 0 0 MOSACTIVE
M4 3 4 4 0 MOSLOAD
C2 4 0 IP
VNA 10 40 PWL(0 0 ION
MIA 20 10 0 0 MOSACTIVE
M3A 3 20 20 0 MOSLOAD
CIA 20 0 IP
M2A 40 20 0 0 MOSACTIVE
M4A 3 40 40 0 MOSLOAD
C2A 40 0 IP
VDD 3 0 DC 5
.NODESET V(4) = 1.722
.NODESET V(40) = 1.722
.MODEL MOSACTIVE NMOS KP=50U VT0=1
.MODEL MOSLOAD NMOS KP=50U VT0=-1 GAMMA=.37 PHI=.6
.TRAN IN lOOON
.PROBE
.END
Figure 4.85: Circuit file for noise pulse simulation of Example 4.13.

is, the equilibrium will persist unless intentionaly perturbed. To ensure a

desired equilibrium condition, a .NODESET command can be used. The
.NODESET voltage of the circuit file of Figure 4.85 achieves this. (With¬
out the .NODESET command, the initial condition found by the author’s
program corresponds to the unstable condition. There is, however, no

MOSFET flip-flop
Temperature: 27.0

Figure 4.86: SPICE dynamic solution for

Example 4.13.

Time

282 THE METAL-OXIDE FIELD-EFFECT TRANSISTOR

 certainty that all versions of SPICE will produce this initial condition.)
To obtain simultaneous solutions for both pulse polarities, a second cir¬
cuit file with a negative pulse voltage is included. The transient results of
Figure 4.86 are obtained. A positive pulse voltage causes the output of
the flip-flop circuit to go to its high-level voltage (5.0 V), whereas a nega¬
tive pulse results in a low-level voltage (0.12 V). Approximately 0.6 /zs is
required to reach the stable equilibrium voltages for the circuit.

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 Pulfrey, D. L. and Tarr, N. C. (1989). Introduction to Microelectronic Devices. Englewood
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PROBLEMS

4.1 The source and the substrate of an ^-channel silicon MOSFET device are
connected.

W = 50 ptm, L = 25 ptm, Vj = 2.0 V

tox = 0.1 /xm, €ox = 3.9co, pin — 800 cm^A^ • s

A gate-to-source voltage vgs of 4 V is applied to the device.

a) What is the transconductance k of the device?
b) What is the value of vjys that results in a pinch-off condition?
c) What is Id for the pinch-off condition?
d) What are the values of Id for uds 1 V less and 1 V greater than the
potential corresponding to pinch-off?

4.2 The threshold voltage of a MOSFET device may be modified by a doping

of the oxide-substrate surface with donor atoms. Repeat Problem 4 1 for
Vt = 1.0 V.
4.3 Repeat Problem 4.1 for Vj = 1.5 V.

4.4 An ^-channel MOSFET device with a transconductance of 0.1 mAN^ is

284 THE METAL-OXIDE FIELD-EFFECT TRANSISTOR

 required for a particular application.

tox = 0.2 fim, €ox = 3.9eo, = 800 cm^A^ • s

a) What is the width required for a device with a length of 10 /xm?

b) What is the gate-to-substrate capacitance of the device?
4.5 In a particular circuit, a drain current of 1.0 mA is required for an n-
channel MOSFET device with a drain-to-source voltage of 3 V and a
gate-to-source voltage of 5 V (substrate connected to source). Determine
the values of k required for Vj = 1,2, and 3 V.
4.6 The gate and drain as well as the source and substrate of a particular
n-channel MOSFET device are connected (Vj^l.OV, ^=10 ixkN^).

a) What is io for vds = 2, 3, and 4 V?

b) As a result of a variation in manufacturing processes (larger tox), a
device has a threshold voltage of 1.5 V. What are the currents for this
device with vqs —2, and 4 V?

20 kOl

^Ds k = 50 ixAN^ p4 y
Vt = 2.5 V

4.7 An n-channel MOSFET device is used in the circuit of Figure P4.7.

a) What is the gate-to-source voltage vgs of the MOSFET?

b) What is /'d?
c) What is uds?
4.8 Repeat Problem 4.7 for Vj = 1.5 V.
4.9 Repeat Problem 4.7 for Rgi = Rg2 = 100
4.10 Repeat Problem 4.7 for Rd — 100
4.11 A 20 k^2 resistor Rt is connected between the drain of the MOSFET and
ground in the circuit of Figure P4.7. Determine ugs, h, and vds for this
circuit.
4.12 In the circuit of Figure P4.7, the upper end of Rgi is connected to the
drain of the MOSFET device rather than to Vdd- Determine vgs, W, and
Vds for this circuit.
4.13 Repeat Problem 4.12 for Rd = 10 kf2.
4.14 Repeat Problem 4.12 for Rd = 50 k^2.
4.15 An n-channel MOSFET device is used in the circuit of Figure P4.15.
Determine vcs, in, and vds for this circuit.

PROBLEMS 285
 ^DD -5V

^G2
lOOkn
k= l.OmA/V^
Vt = 1.0V Figure P4.15
^G1
100 kfl

4.16 Repeat Problem 4.15 for Rd = 5 k^2.

4.17 Repeat Problem 4.15 for Rs = 2 kf2.
4.18 Repeat Problem 4.15 for Rd = 5 kf2 and R^ = 2 k^2.
4.19 An n-channel MOSFET device is used in the circuit of Figure P4.19.

^DD = 10 V
Rd
10 kQ
100 ktl _ = 0.1 mA/V^

+ Vt = 2.0 V Figure P4.19

^OUT
^IN

a) Determine the range of ujn for which the MOSFET is in its cutoff
region of operation. What is I'ouT for this condition?
b) What is the value of uin for which uour = pin?
c) What is Win for uout = 5 V?
d) What is fouT for ujn = 10 V?
4.20 Repeat Problem 4.19 for a load resistor Ri = 20 kf2 connected in parallel
with Pout-
4.21 Consider the MOSEET inverter circuit of Problem 4.19. Determine the
sets of voltages tin and pout for which = — 1.
uUiN
4.22 An w-channel MOSEET is used in the circuit of Eigure P4.22.

k = 50 /xA/V^
Vt= 1.0 V Figure P4.22

a) What is the value of tin for which the device is at pinch-off (the
transition from the saturation to triode region)?

286 THE METAL-OXIDE FIELD-EFFECT TRANSISTOR

 b) Determine win for which uour = ^in-
c) What is uouT for uin = Vdd?
d) What is uouT for a value of din equal to dout determined in part (c)?
4.23 Determine for Problem 4.22 the sets of voltages djn and dqut for which
dym
aviN
4.24 Repeat Problem 4.22 for Rd = 27
4.25 Repeat Problem 4.23 for Rd — T1 kf2.
4.26 A drain resistor of Rd =10 k^2 is used for the MOSFET circuit of Fig¬
ure P4.22. What is dout for din = Vdd = 5 V? Suppose that this voltage
is used as the input of a second gate. What is dqut of the second gate?
Vdd = 10V

k 0.2 mA/V^
Vt 1.0 V

Figure P4.27
4.27 A MOSFET device is used in the amplifier circuit of Figure P4.27.
Id and Vds-
a) Determine the quiescent quantities
b) What is the mutual conductance gm of the MOSFET?
c) Draw the small-signal equivalent circuit of the amplifier and
determine Dout/i^s-
4.28 Repeat Problem 4.27 for a load resistor Rl = 100 kQ connected in
series with a capacitor to the drain of the MOSFET device and ground.
The voltage dout is that across Rl and the capacitance may be treated
as being infinite.

Vdd-15 V

1.0 mAW^
3.0 V

Figure P4.29
4.29 An w-channel MOSEET device is used in the amplifier circuit of
Figure P4.29.
a) Determine the quiescent drain current Id and the quiescent device
voltages Vgs and Vds-

PROBLEMS 287
 b) What is the mutual conductance gm of the device?
c) What is the small-signal voltage gain Wout/i^s of the amplifier?
d) What is Uout/^^s for Rl ^ oo?
4.30 A sinusoidal signal with a frequency of 500 Hz is used for the input
signal Vs of Problem 4.29. What is the reactance of the capacitors for
this frequency? Would the solution obtained for Vout/'^s, if infinite values
of capacitance, were assumed, be expected to be valid for this sinusoidal
signal?
4.31 Consider the MOSFET circuit of Figure P4.29.

a) At what frequency is the magnitude of the reactance of C\ equal to Rs ?

b) At what frequency is the magnitude of the reactance of Ci equal to Ri ?
c) On the basis of the results of the previous parts, what is the lowest
frequency for which the amplifier would be expected to perform
reasonably well?

Vdd = 15 V

k = 2.0 mAN^
Vt = 2.0 V
^OUT Figure P4.32

4.32 An w-channel MOSFET device is used in the source-follower circuit of

Figure P4.32.

a) What is uout for din < Vj?

b) What is dqut for din = 5 V?
c) What is DouT for din = 10 V?
4.33 Determine din for dout = 5 V of Problem 4.32. What is for this
j. . ^ wUiN
condition?
4.34 A biasing voltage Vgg = 5 V and a signal source Dj are used for the
input voltage of the MOSFET circuit of Figure P4.32.

a) Determine the quiescent drain current of the MOSFET.

b) What is the mutual conductance of the MOSEET?
c) What is the small-signal voltage gain of the circuit?
4.35 Repeat Problem 4.34 for Vgg = 10 V.
4.36 Repeat Problem 4.34 for Vgg = 15 V.
4.37 Repeat Problem 4.34 for Vgg = 5 V and Rs = 2 k^2.
4.38 An RC circuit is excited with an input step function voltage. Assume
^OUT = 0 for t < 0.

a) Obtain an analytic expression for dout(^) for t > 0.

b) Determine/(?).
c) What is the instantaneous power dissipated by R?

288 THE METAL-OXIDE FIELD-EFFECT TRANSISTOR

 d) Show that the energy dissipated by R from ^ = 0 to ^ ^ oo is equal
to

i^iN = Vb^/(^)
Figure P4.38

4.39 Repeat Problem 4,38 for uin = Vo(l —Assume uouT = Vb for t < 0.
4.40 Assume that the circuit of Example 4.7 has the following parameters:

Ron = 100Q, R = 2kQ, Vdd^IOV, Cl = 100pF

Repeat Example 4.7 for this circuit.

4.41 Repeat Problem 4.40 for a load resistor of 5 connected in parallel
with Cl-

Vdd = 5V

lOOkQ

+
k^25 aiA/V^ Figure P4.42
Cl ^OUT
1 pF Vt^ 1.0 V

4.42 An w-channel MOSFET device is used for the logic inverter of Figure
P4.42.
a) What are the static low- and high-level output voltages Vql and Vqh,
respectively?
b) Suppose that win has been equal to Vqh for a very long time and that
it is suddenly switched to Vql at ^ = 0. Determine the time required
for uouT to increase to its midvalue of (Vql + Voh)/^^
c) Suppose that uin has been equal to Vql for a very long time and is
suddenly switched to Vqh at ? = 0. This causes the MOSFET device
to be turned on rapidly. Estimate the time required for uqut to fall to
its midvalue.

4.43 Repeat Problem 4.42 for Vj = 1.5 V.

4.44 Repeat Problem 4.42 for k = 50 ixK/V^.
4.45 Repeat Problem 4.42 for Vr = 1.5 V and ^ = 50 /xA/V^.

4.46 Suppose a MOSFET device with Vj = 0 V is used in the circuit

of Figure P4.42. Determine Vql and Vqh for this circuit. Note: A
trial-and-error approach will be necessary because the device is not cut
off for uiN = VoL-

PROBLEMS 289
 4.47 A MOSFET logic inverter is used to drive an NPN bipolar junction
transistor logic inverter (Figure P4.47).

a) What are uouTi and uouT2 for t^iN = 0 V?

b) What are fouTi and vouT2 for ujn = 2.5 V?
c) What are uouTi and uouT2 for uin = -5.0 V?

Fdd - 5 V

k 25 ixA/V^
Vj 1.0 V
200
VBE{on) 0.7 V
^OUT2
VCEisat) 0.2 V

Figure P4.47

4.48 Repeat Problem 4.47 for = 100*

4.49 Repeat Problem 4.47 for ^ = 50 ixAfV^.
4.50 Repeat Problem 4.47 for a silicon junction diode in series with the base
of the BJT device {vD{on) — 0.7 V). The diode is oriented such that its
forward-biased current is into the base of the BJT device.
4.51 Consider the circuit of Figure P4.47. Determine for a value of uin
that results in uout2 = 2.5 V. Show that the derivative is constant for
0.2 < i’oiJT2 < -5.0 V.

10 ixA/W^
Vt = 1.0 V Figure P4.52

4.52 The source and drain of a MOSFET device are connected together
(Figure P4.52).

vds = 1, 2, 3, 4, and 5 V?
a) What is /d for
b) What is vqs/W, a resistance, for each of the voltages of part (a)?
4.53 Repeat Problem 4.52 for Vt = 2.0 V.

4.54 Suppose that a 1.0-V battery is inserted between the drain and the gate
of the device of Problem 4.52. The polarity of the battery is such that
^GS = Vds + 1.0 V. Repeat Problem 4.52 for this circuit.
4.55 The device of Problem 4.52 is used as the load of a MOSFET logic
inverter (Figure P4.55). Use the results of Problem 4.52 and determine
Pin for pout = 1, 2, 3, and 4 V.

290 THE METAL-OXIDE FIELD-EFFECT TRANSISTOR

 ^DD - 5 V

kl 10 mA/V^
Vt2 1.0 V

h 80 flA/W^ Figure P4.55

Vri 1.0 V

4.56 Solve Problem 4.55 using analytic expressions for the dependence of
t'ouT on uiN. What is ujn for uouT = vin? What is for the region
over which pout has a linear dependence on unsf ?
4.57 Consider the MOSFET circuit of Figure P4.55.

a) What is vouT for t;iN < 1.0 V?

b) What is uout for uin equal to the value of i>ouT determined in part (a)?
4.58 For the MOSFET circuit of Figure P4.55, a value of vour = 0-25 V is
desired for ujn = 4 V. What is the minimum value of ki {Mi) that will
achieve this voltage? Assume all other parameters are unchanged. What
is the power supplied by Vdd for djn = 4 V?
4.59 For the MOSFET circuit of Figure P4.55, a value of uouT = 0.25 V is
desired for uin = 4 V. What is the maximum value of ki (M2) that will
achieve this? Assume all other parameters are unchanged. What is the
power supplied by Vdd for t;iN = 4 V?
4.60 Repeat Problem 4.57 for Vti = 0 V. Assume all other parameters are
unchanged.
4.61 Repeat Problem 4.57 for a load resistor of 1.0 Mf2 connected in parallel
with four-
4.62 In the circuit of Figure P4.55 the substrate of Mi is connected to ground.
Assume y = 0.37 and 2(pp = 0.6 V.
a) Determine four for i>in < 1-0 V.
b) What is vouT for the input voltage determined in part (a)?

4.63 What is pin for PouT = 2.0 V of Problem 4,62?

4.64 Repeat Example 4.9 for Cl = 10 pF and all other parameters unchanged.
4.65 Repeat Example 4.9 for = 50 and all other parameters
unchanged.
4.66 A depletion-type MOSFET is to be used as a two-terminal nonlinear
resistor (Figure P4.66).
a) Determine a set of expressions for the dependence of io on pds
(pds > 0).
b) What is io for vds = 2, 3, 4 and 5 V?

PROBLEMS 291
 c) What is VDs/io for each of the voltages of part (b)?

k=10 /xA/V^

Vt = -1.0 V Figure P4.66

4.67 Repeat Problem 4.66 for Vj = —2.0 V.

4.68 Consider the MOSFET circuit of Figure P4.66. What is vqs/W for
vds 0?
4.69 A depletion-type MOSFET (vgs = 0) is to be used to replace the con¬
ventional” resistor Rq of the circuit of Figure P4.42. Its gate, source,
and substrate are connected. Assume the depletion-type MOSFET has a
threshold voltage Vj of -1.0 V and it is desired that vos/io be equal to
Rd (100 for vds = -5.0 V.
a) Determine the required value of k for the depletion-type device.
b) What are Vql and Vqh of the circuit?
c) What is uiN for uouT = ’^in?
d) What is uin for four = 4.0 V?
e) What is uin for uqut = 1.0 V?
4.70 Repeat Problem 4.69 for Vj = —2.0 V.

k = 50 M/v^
Figure P4.71
Vt = -1.0 V

4.71 Consider the depletion-type MOSFET device of Figure P4.71 that is

used to charge a capacitor. This is the effective circuit of a MOSFET
inverter gate for a condition in which the active device is cut off, that
is, for a low-level input voltage. Assume four = 0 at ? = 0. What is the
range of uouT for which the MOSFET device is in its saturation region?
Determine the time dependence of four for this region. What is the
time required for kout to rise to a value that results in the MOSFET’s
entering its triode region of operation?
4.72 Determine, for Problem 4.71, the time required for uqut to increase
from 0 to 4.5 V.
4.73 Repeat Problem 4.71 for a threshold voltage Vj = —2.0 V.
4.74 Consider Problem 4.71. Show that the time required for uqut to rise to
a value that results in the device’s entering its triode region is linearly
dependent on the parameter Cl/k.
4.75 Consider the logic NOR gate of Figure P4.75. Determine the voltage

292 THE METAL-OXiDE FIELD-EFFECT TRANSISTOR

 “truth table” that gives uout for high and low values of va and vb-
Assume that Vqh = vouT for va — vb = Vql and that Vql = ^out for
f A = VoH and vb — Vql-
^DD - 5 V
Rd
lOOkQ

k — 20 fxA/W Figure P4.75

Vt = 1.0 V

4.76 Suppose Rd of Figure P4.75 is replaced with an enhancement-type

MOSFET load device (gate connected to drain and source connected to
substrate). Assume a load device with Vr = 1.0 V and a transconduc¬
tance parameter that yields a value of vds/id equal to Rd for vqs = 5 V.
Repeat Problem 4.75 for this device.
4.77 Suppose Rq of Figure P4.75 is replaced with a depletion-type MOSFET
load device (gate, source, and substrate connected). Assume a load
device with Vj = —1.0 V and a transconductance parameter that yields a
value of vds/W equal to Rd for vds = 5 V. Repeat Problem 4.75 for this
device.
Edd = 5V

Rd
100 kQ

k = 30 M/v^
^OUT Vt = 1 0 V

4.78 Consider the logic NAND gate of Eigure P4.78. Determine the voltage
“truth table” that gives uouT for high and low values of va and vb.
Assume that Vqh = i^our for va = vb = Vql and that Vql = i^our for
VA — Vb = Vqh- The effect of a substrate bias may be ignored.
4.79 Suppose Rd of Figure P4.78 is replaced with an enhancement-type
MOSFET load device (gate connected to drain and source to substrate).
Assume a load device with Vr = 1.0 V and a transconductance param¬
eter that yields a value of vds/W equal to Rd for vds = 5 V. Repeat
Problem 4.78 for this device.
4.80 Suppose Rd of Eigure P4.78 is replaced with a depletion-type MOSFET
load device (gate, source, and substrate connected together). Assume a
load device with Vj = -1.0 V and a transconductance parameter that

PROBLEMS 293
 yields a value of uds/io equal to Rd for vds — 5 V. Repeat Problem 4.78
for this device.

^DD - 10 V

= 100 M/v^
Figure P4.81
^OUT Vr = -2.0 V

4.81 A p-channel MOSFET device is used in the circuit of Figure P4.81.

a) What is vouT for uin = 0?

b) What is Hour for uin equal to the value of uour determined in part (a)?
c) What are Vql and Vow?
4.82 Consider the circuit of Figure P4.81.

a) What are the ranges of uouT for which the MOSFET is cut off, is in
its triode region, and is in its saturation region?
b) What is uin for four = i^in?
c) What is uiN for uouT = 2.0 V?
d) What is vin for uout = 6.0 V?
4.83 Suppose that a load capacitor of 50 pF is connected across kout in the
circuit of Figure P4.81.

a) Assume the input voltage has been equal to zero for a very long time
and is suddenly switched to Vdd at ^ = 0. What is the time required
for i>ouT to reach 5.0 V?
b) Assume the opposite for uin, that it has been equal to Vdd for a very
long time and that is suddenly switched to zero. Determine the time
required for uouT to reach 5.0 V for this condition.
4.84 Consider the CMOS logic inverter gate of Figure 4.60 [k = 100 /zA/V^,
Vt = 1.0 V, and Vdd = 5.0 V).

a) What is the range of din for which one or the other of the devices is
cut off? What are the corresponding values of dout?
b) What is din for both devices being saturated? What is the range of
Dout for saturation? What is the supply current for this condition?
c) Determine din for dqut = 1.0 V.
4.85 Repeat Problem 4.84 for Vdd = 10 V.
4.86 Repeat Problem 4.84 for Vdd = 15 V.
4.87 A 10-pF capacitor is connected across the output of the CMOS
logic inverter gate of Figure 4.60 {k = 100 ^AN^, Vj = 1.0 V, and
Vdd = 5.0 V). Assume the input voltage has been equal to zero for a
very long time and it is suddenly switched to Vdd- Estimate the time
required for dqut to change to Vdd/2.

294 THE METAL-OXIDE FIELD-EFFECT TRANSISTOR

4.88 Repeat Problem 4.87 for Vdd = 10 V,
4.89 Repeat Problem 4.87 for Vdd = 15 V.

COMPUTER SIMULATIONS

C4.1 Use a SPICE simulation to verify the results obtained for the MOSFET
inverter of Example 4.3. In addition to obtaining the values needed to
answer the questions of the example, determine the transfer characteristic
of the circuit. What are the values of vin for which = — 1?
C4.2 Use a SPICE simulation to determine the transfer characteristic of the
MOSFET circuit of Example 4.4. Verify that the analytic results of the
example are valid.
C4.3 Use a set of SPICE simulations to ascertain the sensitivity of the results
of Example 4.4 on the parameters of the MOSFET device. Assume for
the device that 0.3 < ^ < 1.0 mA/V^ and 0.75 < Vx < 1.5 V.
Vdd = 15 V

k = 2.0 mAW^
Vt = 2.0 V
^IN

2 MQ — 20 kQ

Figure C4.4

C4.4 Use a SPICE simulation to determine the behavior of the MOSFET circuit
of Figure C4.4.
a) Obtain a graph (.DC) of uouT versus hin for an input voltage range of
±5 V. What are the input and output voltages at which uouT limits?
b) What is uour for uin = 0? What is the slope of the foui-versus-uiN
characteristic for uin = 0?
c) Obtain a graph of the drain current of the MOSFET device id- What
is /'d for uiN = 0?
C4.5 Use SPICE simulations to determine the dynamic behavior of the circuit of
Figure C4.4. Determine the behavior of the circuit for symmetrical input
voltages with sinusoidal, triangular, and square waveforms ( /^ = 1 kHz).
Consider voltages with peak-to-peak values of 1.0 and 2.0 V.
C4.6 Use an . AC Spice simulation to determine the small-signal voltage gain of
the MOSFET amplifier of Figure P4.29. Following the method of Exam¬
ple 4.6, determine the harmonic distortion for an input sinusoidal signal
with a peak amplitude of 0.3 V. What is the harmonic distortion for an
input signal that has an amplitude of only 0.1 V?
C4.7 Use a .DC Spice simulation to determine the transfer characteristic of
the two-transistor circuit of Problem 4.47. For the BJT device, assume

COMPUTER SIMULATIONS 295

 a value of Is that results in a value of 0.7 V for vgEon at the edge of
saturation {ic ^ and np = 1. What are the values of uin for
which = 1?
I'IN
C4.8 A SPICE simulation is to be used to determine the static and dynamic
behavior of the logic inverter gate of Problem 4.55.
a) Use a . DC simulation and determine the transfer characteristic of the
gate. What are the values of ujn for which = — 1?
b) Assume the gate has a load capacitance Cp of 2 pF. Use an appropriate
input pulse (levels of 0 and 4 V) and determine the rise and fall times
of uouT (lO-to-90-percent). What are the times required for four to
reach its mid value?
C4.9 Repeat C4.8 for the substrate of Mz connected directly to ground. As¬
sume for the devices that y = 0.4 Icpp = 0.6 V, and Vjo = 1-0 V.
For the dynamic response, the high-level voltage is the static value of
uouT for uiN == 0.
C4.10 To improve the static transfer characteristic of a logic circuit, logic
inverter gates are frequently connected in cascade, that is, two logic
inverter gates are used to form a buffer and three logic inverter gates are
used to form an improved inverter. Use a SPICE simulation to determine
the static transfer characteristic of three cascaded logic inverter circuits
of Figure P4.42. Obtain the transfer characteristic for one, two, and
three gates. What is for uout = 2.5 V for one, two, and three
gates? Determine the dynamic behavior of the gates using an input
0.5-/XS pulse with a height of 5.0 V. What are the times required for
uouT to reach 2.5 V for one, two, and three gates? Note: The times for
upward and downward transitions will differ.
C4.n Use a transient SPICE simulation to determine the dynamic behavior
of the CMOS logic inverter gate of Example 4.12. The circuit has 5-pF
capacitive loads at uouri and uouTi and 10 pF at uout3- In addition,
each device has a gate-drain capacitance of 0.5 pF. Use an input voltage
that has abrupt transitions (levels of 0 and Vdd)- What are the rise and
fall times of the output (lO-to-90-percent)? What are the delay times,
that is, the times necessary for the output to reach Vdd/2?
C4.12 Repeat Example 4.12 for the case in which the MOSFET devices do not
have complementary symmetry. Assume for the n-channel device that
kpi = 0.2 mA/V^ and Vjn = 0.75 V. Also determine the response of
this circuit for Vdd = 10 V.

DESIGN EXERCISES

D4.1 A common-source amplifier is indicated in Figure D4.1. A value of

i^ouT = 5 V and = -5 is desired for uin = 0. Determine the resis¬
tance values required for the circuit for the condition that the input resis¬
tance is at least 1 What are the values of uout for win = ±0.5 V?

296 THE METAL-OXIDE FIELD-EFFECT TRANSISTOR

 ^DD - 10 V

lOkD

+ k = 1.0 mAA^^
Vt = 2.0V

Figure D4.1

D4.2 Repeat D4.1 for a circuit with a l-k^2 resistor in series with the common
source-substrate connection of the MOSFET and ground.
D4.3 Consider the MOSFET circuit of Figure D4.3. It is desired that for unsf =
0, uouTi = —youT2 and = —0.75. What is ^3“^ for this circuit?

k = 0.5 mAW^
Vt = 3.0 V

Figure D4.3
D4.4 A drain current Id of 0.5 mA is desired for the MOSFET circuit of
Figure 4.29 (Vdd = 10 V). The MOSFET device has parameters of ^ =
0.5 mA/V^ and Vt — 1.0 V. A drain-source voltage Vd5 of 5 V is desired.
Use values of Rg\ and Rgi that result in Rgi || Rg2 — 1 Mf2. What is
the effect of a ±50% variation in k on the drain current and Vds for
this circuit? Suppose that a maximum variation of 20 percent (either
direction) is acceptable for Iq. Redesign the circuit using a resistor in
series with the common source-substrate connection of the MOSFET
device and ground to achieve this. Note: It may be necessary to use a
trial-and-error type solution.
D4.5 The MOSFET amplifier of Example 4.5 (Figure 4.28) is to be modified
by adding a source resistor Rs in series with the source-substrate con¬
nection of the device and ground. Use a value of resistance that results in
IdRs = IV. The new values of Rgi and Rgi should result in the same
input resistance Rgi II Rgi- Therefore, if the source resistor is properly by¬
passed, the small-signal gain of the circuit will be unchanged. However,
the behavior of the amplifier will be less sensitive to parameter variations
of the MOSFET device. Determine the quiescent drain current and the
small-signal gain of the circuit for a MOSFET device with Vt = 1.5 V
and for a device with Vr = 2.5 V.

DESIGN EXERCISES 297

 D4.6 A MOSFET logic inverter circuit with the configuration of Figure 4.38 is
to be designed. It has a load capacitance Cl of 1.0 pF, and the MOSFFT
device has parameters of ^ = 100 /xAA^^ and Vj = 1.0 V. The supply
voltage Vdd is 5 V. The rise and fall times (lO-to-90-percent) are to be no
greater than 100 ns, and Vql is to be no greater than 0.5 V. Determine
the maximum value of Ru for the circuit (smallest power dissipation).
What are the smallest values of rise and fall times that can be achieved
for the condition that Vql be no greater than 0.5 V? What is Rb of the
circuit?
D4.7 Both devices of the MOSFET logic inverter of Figure 4.47(a) have thresh¬
old voltages of 0.8 V. Determine the ratio of the transconductance pa¬
rameters ki/ki required for Vol = 0.4 V. The supply voltage Vdd is
5 V. What are the values of the transconductance parameters required to
achieve transition times to ( Vql + Voh)/2 that are no greater than 20 ns.
The load capacitance Cl is 2 pF.
D4.8 Repeat D4.7 for the MOSFET circuit of Figure 4.51(a) in which the
devices have a common substrate-to-ground connection. Assume y =
0.4 Vi/2, 2(j)p = 0.6 V, and Vro = 0.8 V.
D4.9 Repeat D4.7 for the MOSFET circuit of Figure 4.53(a), which has a
depletion-type pull-up MOSFET device. For the depletion-type device,
assume y — 0.4 20^ = 0.6 V, and Vro = -1.5 V.
D4.10 A CMOS logic inverter gate using the circuit of Figure 4.64 is to be
designed that has upward and downward output voltage transitions to
Vdd/2 that are no greater than 100 ns. The load capacitance Cl is 50 pF
and 5 < Vdd < 15 V. The devices have threshold voltages with a magni¬
tude of 1.0 V. A design based on minimum transconductance parameters
is desired.

298 THE METAL-OXIDE FIELD-EFFECT TRANSISTOR

 CHAPTER FIVE

NEGATIVE FEEDBACK AND

OPERATIONAL AMPLIFIERS

Negative feedback, when used with an amplifier, reduces the gain of the overall
circuit because part of the output signal is used to “negate” a portion of the in¬
put signal. If properly designed, negative feedback circuits can result in improved
performance characteristics - in particular, lower distortion, improved frequency
and impedance characteristics, and a smaller dependence on supply voltages. To
realize these benefits, an amplifier is required that has a gain considerably in ex¬
cess of that which would otherwise be needed. With the advent of commercially
produced integrated circuits, high-gain, low-cost amplifiers suitable for negative
feedback circuits became readily available. Integrated circuit operational ampli¬
fiers (IC op amps) are now widely used “building blocks,” both as individual in¬
tegrated circuits (replacing discrete transistors for many applications) and within
more complex integrated circuits.
The concept of positive feedback electronic circuits predates that of negative
feedback (Tucker 1972). Positive feedback was initially used to increase the gain
of early low-gain vacuum tube circuits. With positive feedback (regenerative cir¬
cuits), an enormous increase in the sensitivity of radio receivers was achieved.
Only after high-gain amplifier circuits were developed in the 1920s did the con¬
cept of using negative feedback emerge. Harold Black is credited with having
first proposed this concept in 1927. According to published accounts, the idea of
an electronic amplifier with negative feedback was the result of a sudden insight
that Black had while crossing the Hudson river by ferry on his way to work
in Manhattan (Mabon 1975; O’Neill 1985). As is generally the case, this sud¬
den insight did not happen in an intellectual vacuum (“out of the blue’); it was
the result of a succession of attempts to solve a telephone transmission problem
that had engaged his attention since starting to work at Bell Telephone Labo-
1921. Given the importance of this invention, a brief account of the
circumstances that led to its discovery may be of interest.
Long-distance telephone lines require electronic amplifiers at periodic inter¬
vals to compensate for transmission losses due to the resistance of wires and
the conductive losses of insulating materials. An early application of vacuum
 tubes was for telephone repeater amplifiers, which were first used in 1913 and
were an important component of the first transcontinental line of 1914 (Fagen
1975). To minimize transmission losses, early long-distance telephone lines used
fairly large diameter copper wires (the New York-San Francisco line used 1/6-
inch-diameter wire, a total of 2500 tons). With improved amplifiers, smaller
diameter, less expensive but higher resistance wires could be used. Another re¬
duction in wire requirements had been achieved through the development of
multiplex systems in which a single pair of wires was used to carry several tele¬
phone conversations simultaneously. (Alexander Graham Bell was attempting
to develop a multiplex system for telegraph communication, the “harmonic”
telegraph, when he strayed from this task and invented the telephone.) For
a telephone carrier multiplexing system, each telephone conversation is trans¬
mitted with a different carrier frequency in the same fashion that radio sta¬
tions use different carrier frequencies. Active electronic devices (then vacuum
tubes) are used to generate the carriers, to modulate and demodulate the carri¬
ers, and to amplify the signals that, as a result of transmission line losses, are
attenuated.
Carrier multiplexing (also known as frequency multiplexing) is achieved by
moving signals to frequencies higher than those associated with a single base¬
band telephone signal. These higher-frequency carrier signals are, in essence,
“stacked” in frequency, one above another. Higher-frequency signals, however,
are attenuated much more than a base-band telephone signal because transmis¬
sion line losses tend to increase with frequency. Not only are more and higher-
gain amplifiers needed to compensate for the attenuation, but amplifiers with
very low levels of distortion are required. The instantaneous transmission line
voltage is the sum of the instantaneous voltages of each signal. If this voltage is
not uniformly amplified, regardless of its level, each telephone signal will tend
to be distorted. Furthermore, interfering interactions between the signals occur.
Amplifiers with extremely low levels of distortion, that is, highly linear ampli¬
fiers, are required for this particular application. It was with this need in mind
that Black, after many other less successful attempts, conceived of using negative
feedback.
Black proposed the basic symbolic circuit of Figure 5.1 in which a portion
of the output voltage fi is returned to the input of the amplifier (Black 1934).
The amplifier is assumed to have a gain of A, that is, its output voltage is A times
its input voltage UError- This results in the
Figure 5.1: A symbolic representation of a negative following:
feedback system.
FOUT = AuError = A(i;in “ /SfOUt)
^ Auin ^ Vm
1+^A fi + l/A ^ ^ ^

If the amplifier gain is very large, a rela¬

tionship involving only ^ is obtained:

FouT = fiN/)6 forA^oo (5.2)

300 NEGATIVE FEEDBACK AND OPERATIONAL AMPLIFIERS

Hence, the gain of this feedback circuit tends to be determined entirely by the
feedback network, a network that can be constructed from purely passive com¬
ponents (resistors for a simple amplifier circuit). The preceding result (Eq. (5.1))
is for an ideal linear amplifier in which uouT = (no distortion). This is not
the case for a physically realizable amplifier in which the transfer response devi¬
ates from a linear dependence. However, as for the linear case, negative feedback
reduces the dependence of the response of the overall circuit on the transfer re¬
sponse of the amplifier. Through this process, very low levels of distortion can
be achieved with realizable amplifiers.
Despite the apparent simplicity of the circuit of Figure 5.1, much effort was
required before useful negative feedback amplifier circuits emerged. Early circuits
would often break into oscillation, a phenomenon then referred to as “singing.”
This unacceptable result was due to the delay introduced by electronic amplifiers.
This delay, a phase shift for sinusoidal signals, can result in positive feedback and
an oscillating behavior of the circuit. It is necessary that those amplifiers that are
to be used with negative feedback circuits have especially constrained responses.
An analysis of these constraints led to the development of stability theory, an
understanding of which is necessary for designing negative feedback amplifier
circuits (Nyquist 1932).
It is the integrated-circuit operational amplifier that has revolutionized the
design of many electronic circuits. The term operational amplifier, however, pre¬
dates integrated circuits. High-gain amplifiers were used in analog computers to
perform various mathematical operations such as summing, scaling, and integra¬
tion. The particular operation depended on the external feedback circuit, and ana¬
log computers were programmed by changing external components. Although
digital computers that can readily simulate the behavior of analog computers have
made analog computers obsolete, the descriptive term operational amplifier has
remained. Integrated-circuit operational amplifiers not only have large voltage
gains but are designed to be stable when used with negative feedback circuits.
In 1964, Robert Widlar, while working at Fairchild Semiconductor, developed
the first commercially available IC op amp (Solomon 1991). This was the /xA 709,
an amplifier fabricated on a single silicon chip having an area of less than 2 mm^.
Although these early amplifiers often behaved erratically (as is the case for many
early inventions), subsequent integrated circuits, the LM 101 of 1967 and the
ixk 741 of 1968, behaved much more predictably (more than three decades after
its invention, the /xA 741 was still widely used). The early IC op amps utilized
bipolar junction transistors. Subsequently, op amps using junction field-effect
transistors as well as MOSFET and CMOS devices have been developed.
A simplified circuit of a bipolar junction transistor op amp (the prefix inte¬
grated circuit will be assumed to apply whenever op amp is used) is shown in
Figure 5.2. A three-stage amplifier circuit is common. The first stage, using a FNP
differential amplifier circuit, has an inverting and a noninverting input (its output
is the difference of its input voltages). This high-gain amplifier stage, along with
the second stage, an emitter—follower driving a common—emitter amplifier, results
in a very large voltage gain (10^ to 10^). The last stage, emitter-followers with
complementary symmetry, provides a current gain and results in an output circuit

NEGATIVE FEEDBACK AND OPERATIONAL AMPLIFIERS 301

 ^cc

input stage intermediate stage output stage

high-gain emitter-follower and complementary-symmetry
differential amplifier common-emitter emitter-follower
amplifier amplifier

Figure 5.2: Simplified bipolar junction transistor operational amplifier circuit.

with a very low equivalent resistance. A compensating capacitance Q is required

to constrain the amplifier response so that it will be stable when used with typical
feedback circuits. Twenty to thirty discrete devices are generally required for a
complete low-power operational amplifier.
An advantage of a well-designed operational amplifier circuit is that both its
static and dynamic transfer characteristics can be made nearly independent of the
characteristics of the op amp. Hence, the design of op amp circuits is generally
reduced to the design of the feedback circuit, whereas the op amp is treated as
being ideal, that is, having an infinite gain. Two common amplifier circuits are
shown in Figure 5.3.
An introductory treatment of negative feedback will include a discussion of
using negative feedback to reduce the distortion caused by a nonlinear amplifier.
The important topic of stability will next be addressed. Various linear amplifier

Figure 5.3: Typical linear operational amplifier circuits.

noninverting amplifier inverting amplifier

302 NEGATIVE FEEDBACK AND OPERATIONAL AMPLIFIERS

configurations using op amps will
be considered, and the concept of
an ideal response will be introduced.
The constraints imposed by the
Ri
frequency-dependent gain of actual
op amps as well as by their slew- Ri + Ri

rate limiting will be discussed. The

chapter will conclude with two sec¬
tions devoted to designing circuits
Figure 5.4: A basic feedback circuit using a difference ampli¬
using op amps.
fier.

5.1 NEGATIVE FEEDBACK: A KEY CONCEPT

Negative feedback is used with many different electronic amplifiying circuits to
achieve a desired set of overall characteristics. Although only a few basic circuits
will be considered, an analysis of these circuits will establish the general principles
that govern the operation of amplifier circuits with negative feedback.
The behavior of the basic circuit of Figure 5.4 with a linear amplifier will
initially be determined. Although power supply connections are obviously nec¬
essary for the amplifier, these connections have not been shown; it is the role of
signal voltages that is important. To simplify the analysis, the resistances of the
input terminals of the amplifier will be assumed to be infinite, thereby implying
that currents into the input terminals are zero. In addition, the amplifier’s output
resistance will be assumed to be zero. The equivalent circuit of Figure 5.5 with the
amplifier replaced by an ideal voltage-dependent voltage source therefore applies.
In Figures 5.4 and 5.5, two resistors are shown for the feedback circuit (the
dashed box labeled ^). The portion of the output voltage fed back to the input
circuit yS is readily determined through the following expression:

Ri (5.3)
Ri + Ri
Although this basic two-resistor feedback circuit is common, other types of feed¬
back circuits are also used. The input voltage of the amplifier uoif, is the difference
between the input voltage uin and the portion of the output voltage fed back to
the input /SvouT as given by Figure 5.5: Equivalent circuit for the amplifier of
Figure 5.4.
i^Dif = viM - ^vom
uouT = = Adivm - /3i>out)
four Ad /5 4\
1 , o-t: ^ ’
I’IN 1 + pAd

^ HA
V/3/ 1 -b ^Ad
The term Afb has been introduced for the
overall voltage gain of the amplifier with
feedback. KpAd is very large compared with

5.1 NEGATIVE FEEDBACK: A KEY CONCEPT 303

 1, an “ideal response” is obtained as follows:

(5.5)
V / Ideal P
The ideal response depends only on the feedback network; it is the result that
occurs for what may be characterized as an ideal amplifier, that is, an amplifier
with infinite gain.
For the two-resistor feedback network, a fairly simple expression is obtained
for the ideal response of the circuit as follows:

\ l^IN / Ideal -^1

In general, the actual response of the circuit may be written in terms of its ideal
response as follows:

It is the parameter ^Ad (a quantity known as the open-loop gain) that yields the
factor by which the actual gain deviates from the ideal gain corresponding to
pAd oo.

DECIBEL NOTATION

At this point it is convenient to introduce a decibel (dB) scale for expressing

voltage gains. For a voltage gain (or ratio) of A, its decibel value depends on the
base ten logarithm of A:
AdB = 20 1og|A| (5.8)

TABLE 5.1 DECIBEL SCALE

A 0.01 0.1 0.5 1.0 2.0 10 20 100 10^ lO'' 10^

/^dB -40 -20 -6 0 6 20 26 40 60 80 100

If A is a positive quantity, the magnitude operation is

Figure 5.6: A decibel scale for 1 < A< 10. not needed. Table 5.1 provides a few decibel values
for a wide range of A, and Figure 5.6 gives decibel
AdB values for a range of 1 to 10 for A. It will be noted
that for each doubling of A, A^b increases by 6 dB.
Concurrently, for each factor of j for A, Ajb de¬
creases by 6 dB. This is a result of the logarithmic
dependence - the logarithm of the product of two
quantities being the sum of the logarithms of the in¬
dividual quantities. A doubling of voltage (a 6-dB
increase) implies a quadrupling of power delivered
to a resistive load. To double the power, an increase
of \/2 is required. This implies a decibel change of

304 NEGATIVE FEEDBACK AND OPERATIONAL AMPLIFIERS

3 dB (lOlogVl = 10log2 = 3). Therefore, a 3-dB increase can be associated
with a doubling of power, that is, a voltage change by a factor of \fl. A 3-dB
decrease can be associated with a halving of power, that is, a voltage change by
a factor of 1/V2 or 0.707.
A plot of the gain with feedback, Eq. (5.4), in which both A and Afb are
expressed in decibels (dB), is given in Figure 5.7. It will be noted that a value of
pAd is required that is considerably greater than that needed to achieve a gain
that corrrresponds to its ideal value {1/^). Expressed in decibels, the gain Afb
may be written as follows:

(Adeal)dB = 20 logfi) =20 logT’^'j

(AftU = 20 loga/fc = 20 log(^l) +20 >og(Y^^) <5-5)

= (AdealldE + 20 '0g(^Y+7^)

The last term of Eq. (5.9) is the decibel gain error (AError)dB- It is a negative
quantity because, for negative feedback (yS Aj > 0), the argument of the logarithm
is less than 1.

<AH„.U = 20 1og(^) (5.10,

If, for example, fiAd = 10, the gain error is -0.83 dB, that is, the actual gain
is 0.83 dB less than its ideal value. This implies the gain with feedback is 90.9
percent of the gain that would ocur with an infinite gain amplifier. 11 ^ Ad = 100,
the gain error is only -0.086 dB; the gain is 99.0 percent of that for an ideal
amplifier. To achieve this last condition, an amplifier with a gain 100 times that
produced with the feedback is required.

REDUCING DISTORTION
The reduction of distortion is an important feature of electronic amplifier
circuits with negative feedback. Although amplifiers designed for low-level output
signals generally introduce very little distortion, this is not the case for amplifiers
that deliver high-level output signals. Distortion is caused by the nonlinearity

5.1 NEGATIVE FEEDBACK: A KEY CONCEPT 305

 ^OUT

transfer characteristic high-level amplifier

Figure 5.8: Response of a typical amplifier with a high-level output voltage.

of the electronic devices of the amplifier. The static transfer characteristic of a

typical amplifier designed to produce a high-level output voltage is shown in
Figure 5.8. A deviation from an ideal linear response occurs before the output
voltage saturates (at ui = iVimax)- Although a symmetrical characteristic is
shown, this is not always the case.
The feedback circuit of Figure 5.9 will be analyzed to show the effect of nega¬
tive feedback on the response of the amplifier. The additional amplifier gain of the
input difference amplifier (is required to achieve the same low-level response
as that without feedback. Because the difference amplifier provides the input sig¬
nal of the high-level amplifier, its output voltage vi will tend to be small. Hence,
an assumption of linear behavior for the difference amplifier is not unreasonable.
The feedback circuit and R2 is placed around both amplifier stages.
An analysis of a general nonlinear amplifier system is not possible. Therefore,
to illustrate the effect of negative feedback, a nonlinear amplifier with a quadratic-
type response will be assumed as follows:

Al Vi jnax + A2 V|^n,ax for Vi < -Vimax

AiVi + A2l’| for Vimax < 1^1 < 0
I’OUT = < (5.11)
AiUi - A2V^ for 0 < Ui < Vi max

, Al Vi max — A2 Vj^max for Ul > Vi max

Figure 5.9: A feedback circuit for reducing distortion of a high- For luil small, a linear response
level amplifier.
I’OUT = Al Pi is obtained - Ai is the
low-level voltage gain of the am¬
plifier. The quadratic term with a
coefficient of A2 accounts for the
distortion of the amplifier, and the
parameter Vimax corresponds to
the input voltage at which the
output voltage saturates, that is,
the input voltage for which the
derivative of pout with respect to
Pi is zero. Consider the case for

306 NEGATIVE FEEDBACK AND OPERATIONAL AMPLIFIERS

vi > 0:
dvouT
= A\ — lAiui
dv\ (5.12)
M — 2A2 Vimax = 0> max — A\I^A.i

A limiting of algebraic details is necessary; otherwise, these details will tend to

obscure the development. Rather than all four cases of Eq. (5.11) for vout? only
the case for a nonsaturated amplifier with a positive input voltage, 0 < wi < Vi max?
will be considered. Therefore, until stated otherwise, it will be assumed that vi
falls in this range even though it will not be explicitly stated for each equation
of the development.
If a zero output resistance and infinite input resistance is assumed for the
amplifiers, the following is obtained:

I’ouT = Aiui — A2V1 — AdA^VDif — AjAiv^if (5.13)

The input difference voltage depends on the input signal and that of the
feedback network as follows:

^^Dif = t)iN - ^UOUT (5.14)

If one substitutes this dependence into Eq. (5.13), the following expression that
relates four and i>in is obtained:
2 ^ (5.15)
vom = A^Ai(din - Pvom) - A^AiIuin - ^voutY

If viN — PvouT is treated as the dependent variable instead of fouT, an algebraic

simplification is possible as follows:
2 2
- fivom = I^IN - A^Ai(uiN - ySnouT) + A^A2(vin - ^vom) (5.16)

This equation is quadratic in the term (ujn — ^vom)'

ySA^A2(uin - Pvout)^ - (1 + )SA^Ai)(i;in - jS^our) + vin = 0

(1+ySA^Ai) \ I
(5.17)
(VIN - ^VOUV) + = 0
(VIN — ^VoUtY

The quadratic formula may be used to find uin — ^i^ouT- After simplification, the
following is obtained:

(l+y6A^Al) 4y6AjA2l’IN
1-Wl- (5.18)
viN - = (l + ySA^Ai)2

Only one additional step is needed to obtain an expression for uout in terms of
VIN.

uiN (1 + ^A^Ai) 4ySA^A2UiN

1 '1 (5.19)
l^OUT = -
(l+y6AjAi)2
^6 2^^AlA2

This is the desired result that will now be used to illustrate the effect of negative
feedback on distortion.

5.1 NEGATIVE FEEDBACK: A KEY CONCEPT 307

 Az ^ 0 may be obtained
For a check of the validity of Eq. (5.19), the result for
by expanding the square root and then taking the limit as Az goes to zero:

VlN
WOUT = (5.20)
^(1 + pAdA\) U; (l+^AdAi)
This, not surprisingly, is the result expected for a linear amplifier with a gain of
AjAi (Az — 0 implies linear behavior). To show the distortion-reducing effect
of the negative feedback circuit, a numerical example is necessary. Suppose the
output amplifier has a low-level gain of 10 {A\ = 10) and that the amplifier
saturates for an input voltage of vi = ±2.0 V (Vimax = 2.0 V). From Eq. (5.12),
a value for Az is obtained as follows:

^2 = A|/2Vi„„=2.5 V-> (5.21)

The difference amplifier will also be assumed to have a gain of 10 (Aj = 10), and
a feedback network will be used that results in an overall low-level gain of 10,
the same low-level gain of the output amplifier without feedback. The feedback
factor may be determined from Eq. (5.20) as follows:

(l + pAjAi) = (5.22)

These numerical values may now be introduced into the equation for uour,
Eq. (5.19):

i^ouT — 11.11 uiN — 2.469 (1 — \/l — 0.9 uin) (5.23)

This expression is valid for a value of i;in up to uouT = 10 V. This implies that
= 2 V and uoif = 0-2 V.

l^Dif = UiN - ^UOUT, UIN = r>Dif ± ^UOUT = 1-10 V (5.24)

Hence, the result of Eq. (5.23) is valid for 0 < uin < 1.10 V. If all values of ujn
are taken into account, the following (complete) expression for uout is obtained:

'-10 V for uiN < —1.10 V

11.11 uiN ± 2.469 (1 - VI ±0.9uin) for —1.10 V < Din < 0
UOUT =
11.11 uiN — 2.469 (1 — VI — 0.9 Kin) for 0 < uiN < 1.10 V
10 V for uiN > 1.10 V
(5.25)

A plot of this response, along with that for the high-level amplifier without
feedback, is given in Figure 5.10(a), and the amount by which the output volt¬
age differs from that for an ideal linear response, that is, IOuin, is given in
Figure 5.10(b). The distortion is significantly reduced even for the very modest
difference amplifier gain of 10. Using a much larger difference amplifier gain, as
would normally be the case, will further reduce the distortion of the amplifier
(Example 5.3).

308 NEGATIVE FEEDBACK AND OPERATIONAL AMPLIFIERS

 ^OUT feedback
^Error

(b) output voltage error

Figure 5.10: Amplifer response with negative feedback and output voltage error.

ADDITIONAL BENEFITS OF NEGATIVE FEEDBACK

Although the reduction in amplitude distortion is important for many ap¬

plications, amplifier circuits utilizing negative feedback offer many additional
benefits.

Gain Sensitivity: Closely related to amplitude distortion is the sensitivity of the

overall small-signal gain to the gain of the amplifier. With negative feedback,
the dependence of the overall gain on that of the amplifier is reduced. For
a large open-loop gain, the overall gain tends to depend primarily on the
feedback fraction p and only slightly on the gain of the amplifier.
Reduced Output Resistance: The output resistance of an amplifier with neg¬
ative feedback is smaller than that of an amplifier without feedback. For
circuits with large open-loop gains, it is frequently possible to ignore the
effect of the output resistance of an amplifer (jRout ^0).
Increased Input Resistance: In the feedback amplifier circuits of Figures 5.4
and 5.5, an infinite input resistance is implied for the amplifier (an input
open circuit for Dpif). Although a realizeable amplifier has a finite input
resistance, the equivalent resistance for the input signal ujn is larger than
that of the amplifer without negative feedback. Furthermore, with large
open-loop gains, the input resistance is often sufficiently large so that it can
be treated as being infinite.
Reduced Dependence on Power Supply Fluctuations: For the transistor ampli¬
fier circuits considered in the previous chapters, the output signal voltage,
current, or both, is dependent on the supply voltage (Vcc or Vdd)- With
negative feedback, this dependence is reduced. With a large open-loop gain,
the effect of power supply variations, such as hum, is often reduced to a
negligible level.
Reduced Dependence on Ambient Conditions: The values of components used
in amplifiers often have a dependence on ambient conditions - most notably
temperature. But, to the extent that negative feedback reduces the depen¬
dence of the overall gain on that of the amplifier, the dependence on ambient
conditions will also be reduced.
Noise Reduction: The sensitivity of all amplifers is limited by internal noise,
the result of thermal effects, the discrete nature of electronic charges, and

5.1 NEGATIVE FEEDBACK: A KEY CONCEPT 309

 other less understood effects. Although negative feedback reduces the output
noise of an amplifer, it also reduces the output signal produced by a low-level
input signal. Hence, the signal-to-noise ratio at the amplifier’s output may, or
may not, be improved. However, with a well-designed feedback network and
a low-noise input amplifier, the noise performance of the amplifier circuit
can be improved.
Simplified Design: With a large open-loop gain, the overall response of an
amplifier with negative feedback tends to depend only on the feedback net¬
work. Hence, for the amplifier of Figures 5.4 and 5.5, the gain tends to
depend only on the two resistors of the circuit. By using precision resis¬
tance values, the gain can be accurately controlled. Furthermore, reactive
elements may be used in the feedback circuit to obtain a desired frequency
response (a filter). Alternatively, nonlinear elements (for example, diodes)
can be used in the feedback circuit to obtain a desired output-versus-input
voltage functional dependence (for example, a limiter).

As a result of negative feedback, the gain of an amplifier circuit is reduced.

Hence, for a required overall gain, a much higher amplifer gain is necessary. A
more complex, higher-gain amplifer is the price paid for obtaining the benefits of
negative feedback. When amplifiers utilized discrete components, negative feed¬
back was used only for critical applications. However, with the advent of readily
available high-gain integrated circuit operational amplifiers, amplifier complex¬
ity is no longer a limitation. Amplifier circuits using integrated circuit operational
amplifiers are generally much simpler and less expensive than conventional lower-
gain amplifier circuits.

EXAMPLE 5.1
A determination of the effect on the behavior of the circuit of Figure 5.4 of a
difference amplifier with a finite input resistance R, is desired.
a. Determine an expression for the equivalent input resistance Rin of the
amplifier.
b. Assume R, = 1 Evaluate Rjn for difference amplifiers with gains of
50, 100, and 1000. The feedback circuit for each case is to be such that
i^out/vin is equal to 10 {Afb — 10).

SOLUTION
a. The equivalent circuit of Figure 5.5 will be modified to account for the
amplifier input resistance R, (Figure 5.11). The feedback factor p is the
fraction of vouT fed back to the input of the difference amplifier.

^^Dif = fiN - ySuouT = —/di'ouT for din = 0

For uiN = 0, the circuit of Figure 5.12 applies. Because p = -uoif/t^ouT
for uiN = 0, the following is obtained for jS:

... R,\\Ri
Ri II Ri -I- Rz

310 NEGATIVE FEEDBACK AND OPERATIONAL AMPLIFIERS

 Mn

If Ri is very large compared with jRi, then yS = R\/{Ri + Ri), which is

the feedback fraction obtained for an infinite input resistance. Other than
for taking into account the effect of R, on jS, the voltage-gain expression
remains unchanged.

t^OUT _ 4 _
l^IN ~ l+^Aj
The input current /'in depends on the voltage across Rj, that is, Doif as
follows:

l^Dif VIN - ^vom

= R.
_ ^ /^1 _ ^ ^ ^ 1 \
~ Ri\ 1 + ^AdJ Ri\l+pAdJ
Rin = uin/hN = Rdl +

From the recognition that l+^Ad^Ad/Afb (from the expression for

uouT/t^iN), the following is obtained:

Rin = RiAd/ Afb

Because Ad > Afb, the equivalent input resistance is larger than Ri.
b. Because Afb = 10 for all cases, Rin = (0.1 MQ)/Ad. Hence, for Ad = 50,
Rin = 5 M^2; for Ad = 100, Rin = 10 and for Ad = 1000, Rin =
100 MQ.

EXAMPLE 5.2
A determination of the effect on the behavior of the feedback circuit of
Figure 5.4 of a difference amplifier with a nonzero output resistance Rq is
desired.

5.1 NEGATIVE FEEDBACK: A KEY CONCEPT 311

 Ro

Figure 5.13: Equivalent circuit for

a difference amplifer with a nonzero
output resistance.

a. Determine an expression for the equivalent output resistance of the ampli¬

fier Rout for feedback resistances R\ and R2 that are large compared with
Ro.
b. Assume Rq = 100 ^2. Evaluate Rout for = 50, 100, and 1000. The
feedback circuit for each case is to be such that tout/^^in is equal to 10
{Afb = 10).
SOLUTION
a. The equivalent circuit of Figure 5.5 will again be modified; this time an
amplifier output resistance of Rq will be added to the circuit (Figure 5.13).
The equivalent output resistance is the Thevenin equivalent resistance seen
looking into the output terminals when the independent voltage source
Tin is properly removed, that is, replaced by a short circuit. As a result
of the external voltage vx of Figure 5.14, a current ix results; the ratio
vx/ix is the equivalent output resistance Rout- This use of an external
voltage is essentially the same method by which an ohmmeter determines
an unknown resistance.

TOif = -^TOUT = —^VX

. ^ VX VX - Adv-Pit

“ Ri + R2 Ro
— , ^x(l + PAd)
R\ + R2 Ro

ix

Figure 5.14: A circuit for de¬

termining Rout-

312 NEGATIVE FEEDBACK AND OPERATIONAL AMPLIFIERS

 If R\ + Ro, the first term of the above expression may be ignored.
f^ouT = vx/ ix = f^o/(l + ^Ad) — RoAfb/ Ad
Because Afb < Ad, the equivalent output resistance is less than Rq-
b. Because Rq = 100 and Afb = 10 ior all cases, Rout = 1000 Q./Ad.
Hence, for Ad = 50, Rqut = 20 Q; for Ad = 100, Rqut = 10 and for
Ad = 1000, Rout = 1.0

EXAMPLE 5.3
A SPICE simulation of the nonlinear amplifier with feedback, discussed in this
section, is desired (quadratic dependence on input voltage, Ai = 10, Az = 2.5).
Evaluate the behavior of these circuits for difference amplifiers with gains
of 10, 100, and 1000. For each case, the feedback circuit Ri and Ri is to
be such that uout/^^in = 10 for a low-level output signal (linear behavior).
Determine the static transfer characteristic uout versus din, for each circuit
(—1.0 < Din <1.0 V). Use these characteristics to determine the error in dqut
from that expected for an ideal amplifier (10 din) for input voltages of 0.8 and
0.9 V. Using a transient-type solution, determine the harmonic distortion for a
sinusoidal input voltage with an amplitude of 0.9 V and a frequency of 1 kHz.

SOLUTION The behavior of the nonlinear amplifier may be simulated with a

polynomial controlled voltage source. If the magnitude of the amplifier’s input
voltage is used, a single equation is obtained for dqut that is valid for positive
as well as negative values of di as follows:

UOUT = AiDi - A2D1ID1I for |Di| < Vimax

A full-wave rectifier circuit is convenient for obtaining the magnitude of a
voltage (subcircuit of Figure 5.15). Ideal diodes may be simulated by using
a very small value for the ideality factor n of the diodes. Because SPICE is a
purely numerical analyzer, parameters are not restricted to those of physically
realizable devices {n of 1 to 2). li n — 0.001 and Is = 10~^*^ A, a forward-
biased voltage of only 0.42 mV results in a diode current of 1.0 mA, and the
diode’s reverse saturation current is only 0.1 nA. A polynomial dependence is
used for the voltage source; the two sets of node numbers for the two input
voltages follow the P0LY(2) specification. The coefficients bn correspond to
the following for two inputs x\ and xz'.

y = bQ + b\x\ -f bzxz + ^3^ + b^xixz + bsx^ -\-

Figure 5.15: Subcircuit for nonlinear amplifier.

Uideal Uideal

5.1 NEGATIVE FEEDBACK: A KEY CONCEPT 313

 Different feedback circuits are required for each value of difference amplifier
gain:
%

^^[Ad-\)IAdAx
Ad = 10 ^ = 0.09 Ri=0.9kQ R2 = 9.1kQ
Ad = 100 yS = 0.99 Ri = 0.99 k^ Ri = 9.01 k^
Ad = 1000 yd = 0.0999 Ri = 0.999 kQ R2 = 9.001 k^2

The resistance values of Ri and R2 are arbitrary; it is only their ratio that
determines yd. However, the values specified are values that would very likely
be appropriate for an actual amplifier. The SPICE circuit and corresponding
circuit file are given in Figure 5.16. The . DC simulation results in the static

Figure 5.16: SPICE circuit and file for Example 5.3.

no feedback

Feedback Amplifier .DC VIN -1 1 .02

.TRAN 2U IM 0 2U
VIN 1 0 SIN(0 .9 1000) .FOUR 1000 V(2) V(5) V(8) V(ll)
XI 1 2 AMP .PROBE

Rll 3 0 .9K .SUBCKT AMP 1 5

R21 5 3 9.IK RI 1 0 lOOMEG
Ell 4 0 1 3 10 E2 2 0 1 0 1
X2 4 5 AMP E3 0 3 1 0 1
D1 2 4 DIDEAL
R12 6 0 .99K D2 3 4 DIDEAL
R22 8 6 9. OIK RD 4 0 lOK
E12 7 0 1 6 100 .MODEL DIDEAL D N=.001 IS=1E-10
X3 7 8 AMP E4 5 0 P0LY(2) 1040
+0 10 0 0 -2.5
R13 9 0 .999K RL 5 0 IK
R23 11 9 9.001K .ENDS
E13 10 0 1 9 1000 .END
X4 10 11 AMP

314 NEGATIVE FEEDBACK AND OPERATIONAL AMPLIFIERS

 Feedback Amplifier
Temperature: 27.0

Figure 5.17: SPICE simulations VIN

for Example 5.3. Feedback Amplifier
Temperature: 27.0

.V(2).V(5).V(8).V(11)
Time

characteristic, and the .TRAN simulation results in the dynamic response of

Figure 5.17. The . FOUR statement yields a Fourier analysis of the output volt¬
ages (an output listing similar to that of Figure 5.33 is obtained). The voltage
errors for pin = 0.8 and 0.9 V as well as the harmonic distortion are summa-
rized in Table 5.2.

TABLE 5.2 VOLTAGE ERRORS AND HARMONIC DISTORTION

Din = 0-8 V i;,N = 0.9 V V„, = 0.9 V
I’Error
Distortion
Ad l^Error

-1.60 V -2.024 V 4.8%

0
-0.274 V -0.393 V 1.02%
10
—30.2 mV -45.7 mV 0.12%
100
—3.05 mV —4.66 mV 0.012%
1000

5.1 NEGATIVE FEEDBACK: A KEY CONCEPT 315

 Figure 5.18: An amplifier with positive feedback.

5.2 STABILITY: NOT ALL AMPLIFIERS ARE EQUAL

In the analysis of the previous section, it was assumed that the difference ampli¬
fier’s output voltage was dependent on only the instantaneous value of its input
voltage. As a result of unavoidable circuit and device capacitances, the output of a
physically realizable amplifier depends on derivatives and integrals, with respect
to time, of the input voltage. Variations of an input voltage tend to be attenuated,
and the resultant variations in output voltage are delayed. These capacitive ef¬
fects can result in an unstable circuit when negative feedback is used. An unstable
circuit may oscillate - a condition that is unacceptable for an amplifying circuit.
As a consequence, the design of an amplifier for use with negative feedback is
critical; only with a well-designed amplifier can the benefits of negative feedback
be realized.
Oscillations can occur as a result of positive feedback (regeneration). Consider
the circuit of Figure 5.18 in which the feedback signal ySuouT is returned to the
positive terminal of a difference amplifier. If it is assumed that ^ = Ri/{Ri + Rz)
and the amplifier is linear, the following is obtained:
i^Dif = ^I’ouT — Fin
Four = = ^di^VoUT - Fjn)
(5.26)
Four -Ad . . rut
positive feedback
Fin 1-pAd
As indicated in Figure 5.18, positive feedback increases the magnitude of the gain
of the circuit (j6 < 1/Ad). For — 1/A^, the magnitude ofthe gain is infinite, that
is, an output voltage can exist for a zero input voltage. As a result of transients
associated with turning the circuit on, as well as
Figure 5.19: A conventional feedback am
plifer circuit.
electrical noise, many circuits will tend to oscillate
(some circuits may go to a “latched up” condition
in which no amplification occurs). In general, the
output voltage will tend to increase for ^6 = 1/Ad
until nonlinear effects limit the response.
Although a reversal of the difference amplifier’s
input terminals results in positive feedback, this
also occurs if the gain of the amplifier should be¬
come negative. In the conventional feedback ampli¬
fier circuit of Figure 5.19, positive feedback occurs

316 NEGATIVE FEEDBACK AND OPERATIONAL AMPLIFIERS

for fiAd negative, the result of either a negative gain or a negative feedback
fraction, which becomes possible if other than a simple resistor network is used
for the feedback circuit. An infinite response (possible oscillations) occurs for
PAd = -l.

AMPLIFIER PHASE SHIFT

With sinusoidal signals, a change in the sign of the amplifier gain occurs when
the phase of the output signal differs by 180° from its input signal. A phase shift
occurs for circuits with a capacitor such as the basic RC circuit of Figure 5.20.
This circuit could be a part of the equivalent circuit of an amplifier. A phasor
analysis based on a time dependence of is convenient for analyzing this
circuit. Introducing an impedance of IfjcoC for the capacitor, the following is
obtained:

_ {1/jcocm _ vi (5.27)
^ R+l/jcoC l + jcoRC
The ratio V2/V1 has both magnitude and phase as follows:

Yl = Ae’^
Vi

A= Yi 1
(5.28)
Vi Vl + (o)RC)^
0 = — tan ^{(jdRC)

For a radian frequency of 1/RC, the magnitude of V2/V1 is 11^/2, and its phase
is —45°. For higher frequencies, the magnitude decreases, and the phase tends
toward —90°.
A circuit such as that of Figure 5.20 may exist in the signal path of a difference
amplifier. If a linear amplifier is assumed, Vi is proportional to the phasor repre¬
senting the amplifier’s input voltage, and the phasor output voltage of the ampli¬
fier is proportional to V2. Hence, the amplifier’s output voltage not only decreases
with increasing frequency, but it is also shifted in phase as a result of the RC cir¬
cuit. The first case that will be considered is that of a difference amplifier that has
only these two elements affecting its frequency-dependent behavior. With the in¬
troduction oicob for 1/RC (the subscript b denoting break - a “break frequency”).

IV2/Vil

CO

Figure 5.20: Basic RC network and response.

5.2 STABILITY: NOT ALL AMPLIFIERS ARE EQUAL 317

 the following is obtained for the phasor response of the difference amplifier:

^out _ A _ (5.29)
Vdif ~ 1 + jco/cob
In this expression, is the gain for zero frequency, a quantity that will be
assumed to be real and positive. The parameter coy is the radian break frequency,
the frequency at which the magnitude of the gain is Ado/ V2 and the phase of the
gain is —45°.
The phasor response of the feedback circuit of Figure 5.19 for an amplifier
with a response given by Eq. (5.29) may now be determined as follows:

Vin \M\ + \/pAd

1 _ 1+
^Ad ^Ado
When the preceding equations are combined, the following is obtained:

Vout ^ ^Ado
^in ^ Ado + 1 + jco/(Ob

V/d/ Vl + PAdoJ 1+ ^Ado)

This expression may be simplified by introducing a new break frequency coh
[h denotes high).

coh = wfc(l + ^Ado)

Vout_/l\/ ^Ado \ 1 (5.32)
^in V^/ W + ^AjO/ 1 +
The overall feedback circuit has the same type of response as that of the amplifier,
albeit its break frequency coh is higher than that of the difference amplifier.
The significance of the preceding theoretical result can best be illustrated with
a numerical example. Consider the situation for which the difference amplifier
has a low-frequency gain of 1000 {Ado — 1000) and a Hertzian break frequency
of 1 kHz (fb — (jObl'^'K = 1 kHz):

Ado Ado 1000

(5.33)
1 + )(£>l(JOb i + /7//fc “ i + y/'/iooo
A feedback network with = 0.1 will be assumed. For a difference amplifier
with an infinite gain, the gain with feedback Afb would be 1 /y6, that is, 10. For a
difference amplifier with a finite zero frequency gain of 1000, the resultant gain
is slightly less than 10.

fi)f ^Ado \
9.90 (5.34)
(0 = 0 \p)\\^pAdo)
The Hertzian break frequency for the response of the amplifier with feedback fh
may also be obtained as follows:

fb^ /),(l+;dAjo) = 101kHz (5.35)

318 NEGATIVE FEEDBACK AND OPERATIONAL AMPLIFIERS

 gain

Ado = 1000
fy = \ kHz
yS = 0.1

Figure 5.21: Response of a feedback circuit for a difference amplifier

with a single break frequency.

The amplitude (expressed in decibels) and phase of Ad and Aft, are given in
Figure 5.21 (for convenience, a logarithmic scale has been used for the frequency).
The gain 'with feedback, not surprisingly, is less than that tvithout feedback; the
response curve for feedback is constrained by the response curve of the difference
amplifier.
The response of Figure 5.21 for the difference amplifier with feedback can be
described as “well behaved” - with increasing frequency the magnitude of the
gain Afb has a smooth falloff, and its phase approaches -90° in a gradual fashion.
If the upper break frequency cot, is adequate, this difference amplifier and feedback
circuit has a response characteristic that is adequate for most applications. Unless
special care is exercised in the design of a difference amplifier, a response with
more than a single break frequency will occur. In essence, most amplifiers tend to
have more than a single equivalent RC circuit that determines their frequency-
dependent behavior. Consider the case for an amplifier with two break frequencies
cobi and coti:

A, = \A^\e’^ =_-:-
(1 + jco/cobi)i'^ + joo/cobi)

IA.I =
y/l + {co/cObl)^V^ +

e = - {oo/C0b\) {(JO/cobi)

The response of an amplifier of this type is given in Figure 5.22(a); fbi = 1 kHz
and /fo2 = 1, 10, and 100 kHz. As a result of the two break frequencies, the
magnitude of the response falls off more rapidly with increasing frequency than
the magnitude of an amplifier with a single break frequency. Furthermore, with
increasing frequency, the phase shift for the two break frequencies tends toward
-180°. Because a phase shift of -180° corresponds to a reversal of the sign of

5.2 STABILITY: NOT ALL AMPLIFIERS ARE EQUAL 319

 gain
= 0.1

Hertz Hertz

(a) difference amplifier (b) feedback response

Figure 5.22: A difference amplifier with two break frequencies. For all responses,
the left-hand curve is for /& = 1 kHz, the middle curve is for fi, — 10 kHz, and the
right-hand curve is for fi, = 100 kHz.

the gain of the difference amplifier (positive feedback), this difference amplifier
would be expected to have a feedback response that reflects this effect.
The response of the amplifier of Fig. 5.22(a) for a ^ = 0.1 feedback circuit is
given in Figure 5.22(b) (a numerical calculation or SPICE simulation is necessary
to obtain these results; see Example 5.4). With increasing frequency, the gain of
the feedback amplifier circuit tends to increase to a peak before it falls off. This
effect, which is very pronounced for ft,2 = 1 and 10 kHz, is predicted by the
following feedback expression:

The peak in response occurs as a result of the denominator of this expression

becoming small, that is, when ^Ad approaches —1. Because the phase angles for
the difference amplifiers with two break frequencies approach —180°, the peak
in the response tends to occur at the frequency for which \^Ad\ — 1. Because
^ = 0.1, this occurs for \ Ad\ = 10 (20 dB). The frequencies at which this occurs,
as well as the corresponding phase angles, are summarized in Table 5.3. The
magnitude of the gain, \Afh\, for fhi = 1 and 10 kHz, is considerably larger than
its low-frequency value of approximately 10. For fbi = 100 kHz, the gain with

TABLE 5.3 THE FEEDBACK RESPONSE FOR |j8Ad| = 1

fbi f e \Afb\
1 kHz 9.96 kHz -168.5° 33.9 49.6
10 kHz 30.8 kHz -160.1° 29.2 28.8
100 kHz 89.5 kHz -127.4° 21.1 11.4

320 NEGATIVE FEEDBACK AND OPERATIONAL AMPLIFIERS

feedback, \Afb\, is only slightly larger than I^ dB
10, which is the result of having a phase angle
of —127.4° - an angle considerably removed
from -180°.

STABILITY

A determination of the precise conditions

that result in a stable or unstable feedback
amplifier configuration is beyond the scope
of the present treatment (see Bode 1975; Gray
and Meyer 1992; Millman and Grabel 1987;
Nyquist 1932; Sedra and Smith 1991; Wait,
Huelsman, and Korn 1992). For most appli¬
cations, not only is a stable feedback amplifier
required, but a well-behaved response is also
desired. It is the behavior of ^Ad for frequen¬
cies that cause it to have a value close to —1 that is important.
A set of criteria based on the gain and phase margins of a difference amplifier
and its feedback circuit is generally used for predicting whether the response with
feedback Afb will be acceptable. Both the magnitude and phase for a typical
difference amplifier ^Ad are indicated in Figure 5.23. This response might be
obtained through a detailed theoretical analysis of the difference amplifier or
from a set of experimental measurements. Two frequencies are indicated on the
figure: = the frequency for which the magnitude of fiAd is unity, and
/■_i80o, the frequency for which the phase of ^Ad is -180°. These frequencies
tend to be close to the frequency at which \1 + ^Ad\ is a minimum. Hence, the
value of fiAd at these frequencies tends to be useful for estimating the behavior
of the feedback circuit.
The gain margin G^dB is defined as the amount by which \pAd\, expressed in
decibels, is less than zero for f = /hi80“-

Gnid^ = -\P-^d\d^ for the frequency corresponding

to the phase of Ad =—180° (5.38)

For this frequency, ^Ad = -\pAd\, that is, it is a negative real quantity. A stable
feedback amplifier circuit generally requires that \pAd\ be less than 1 for this
frequency (G^^^dB > 0)- The phase margin is the phase angle by which the
phase of ^Ad deviates from —180° for f — f\pAi\ = i defined by

0^ = phase ^Ad + 180° for the frequency corresponding

to I^Adl = 1 (5.39)

The -f180° is a result of an extra minus sign introduced when obtaining the
difference quantity. For a stable amplifier, it is generally required that the phase
margin be greater than zero, that is, the phase shift should not have reached
—180° for the frequency at which \^Ad\ = 1- In general, both the gain and phase
margin conditions need to be satisfied for the feedback circuit to be stable.

5.2 STABILITY: NOT ALL AMPLIFIERS ARE EQUAL 321

 The gain and phase margins are also useful for predicting the response of
a stable amplifier feedback circuit. For most difference amplifiers, the response
with feedback will be relatively well behaved if the gain margin is at least 10 dB
and the phase margin is at least 45°, that is,

well-behaved response: > 10 dB, \^Ad\ < 3.16

(pm > 45°, phase > —135°
It is these criteria that are generally used when designing an amplifier that is to be
used with negative feedback circuits. Although an ideal response (for example, no
peak in the response) is not assured, a response acceptable for many applications
(a very small peak) is obtained.
The gain and phase margins depend on the feedback fraction p of the circuit.
If is a real quantity (such as that for a resistor network), a change in ^ affects
only the \^Ad\ response, not the phase response. Increasing yS moves the \^Ad\
curve upward; decreasing yd moves the \pAd\ curve downward. A change of yd
alters both the gain and phase margins. A decrease in yd will generally result in
an increase in the gain and phase margins. A smaller value of /d implies a larger
low-frequency gain for the feedback circuit.

EXAMPLE 5.4
A SPICE simulation of the difference amplifier with two break frequencies that
produced the feedback response of Figure 5.22(b) is desired.
a. Verify that its frequency response is indeed that of Figure 5.22b.
b. Determine the time-dependent response of the output voltage for an input
voltage pulse with an amplitude of 0.1 V and a duration of 0.5 yu,s.

SOLUTION Two basic RC circuits are required to simulate the behavior of an

amplifer with two break frequencies:

= ^ RC = —
In InRC Infb

For a break frequency of 1 kHz, a time constant RC of 0.1592 ms is required.

Any combination of resistance and capacitance could be used - a 1-kQ resistor
and a 0.1592-yuF capacitor are indicated in the circuit file of Figure 5.24.
Break frequencies of 10 kHz and 100 kHz are achieved with capacitances
of 0.01592 and 0.001592 yuF, respectively (R = 1 kQ). A dependent voltage
source is required to isolate the two RC networks — the output of one cannot
be directly connected to the input of the other. A dependent voltage source is
also required for the output of the amplifier. Three independent circuits are
included in the circuit file so that the response for the three values of fti can
be obtained simultaneously.
a. The frequency-dependent response of the feedback amplifier circuit is in¬
deed that given in Figure 5.22(b). The peak in the frequency response
for fhi = 1 kHz occurs at a frequency of about 10 kHz and that for
fbi = 'i-0 kHz at approximately 31 kHz.

322 NEGATIVE FEEDBACK AND OPERATIONAL AMPLIFIERS

 6

Amplifier - Double Break Freq CBB 15 0 0.01592U

VIN 1 0 AC 1 E3B 16 0 15 0 1
+PWL(0 0 lUf .1 500U .1 501U 0) R2B 16 17 9K
RIN 1 0 IMEG RIB 17 0 IK
ElA 2 0 1 7 1000
RA 2 3 IK EIC 22 0 1 27 1000
CA 3 0 0I.1592U RC 22 23 IK
E2A 4 0 3 0 1 CC 23 0 C).1592U
RAA 4 5 IK E2C 24 0 23 0 1
CAA 5 0 0.001592U RCC 24 25 IK
ESA 6 0 5 0 1 CCC 25 0 0.1592U
R2A 6 7 9K ESC 26 0 25 0 1
RIA 7 0 IK R2C 26 27 9K
RIC 27 0 IK
ElB 12 0 1 17 1000
RB 12 13 IK .TRAN 2U IM 0 2U
CB 13 0 0.1592U .AC DEC 20 1 IMEG
E2B 14 0 13 0 1 .PROBE
RBB 14 IEi IK .END

Figure 5.24: SPICE circuit and file for Example 5.4. Three circuits are included so that responses
can be obtained for fh2 = 1,10, and 100 kHz simultaneously.

Amplifier - Double Break Freq

Temperature: 27.0
2.0V +.■+--.+.■*"..

Figure 5.25: Transient solution for Ex¬

ample 5.4. The largest amplitude oscilla¬
tions occur for fbi = 1 kHz, whereas the
response with only a small overshoot is for
ff,2 = 100 kHz.

0.0ms 0.2ms 0.4ms 0.6ms 0.8ms 1.0ms

= V(6).V(16).V(26)
Time

5.2 STABILITY: NOT ALL AMPLIFIERS ARE EQUAL 323

 b. The time-dependent response of the feedback amplifier circuit is indicated
in Figure 5.25. The damped oscillations triggered by the rising and falling
edges of the input pulse have a frequency very close to the frequency for
which the peak in the frequency response occurred. It should be noted
that the response for the second break frequencies of 1 and 10 kHz would
not be acceptable for most applications. On the other hand, the very small
overshoot of the response occurring for fbi = 100 kHz would be acceptable
for most applications.

EXAMPLE 5.5
Consider the case for which a difference amplifier has three identical break
frequencies as follows:

/ljo = 1000, A = lkHz

(1 + if/fbr
The difference amplifer is used with a feedback circuit having ^ = 0.1.
a. Show that the gain and phase margins of this circuit are negative, that is,
the overall circuit is unstable.
b. Use SPICE to determine the frequency response of the circuit. This is pos¬
sible because the . AC command does not check if a circuit is stable.
c. Determine the response of the amplifier circuit for an input step function
voltage of 0.1 V. Because this circuit is unstable, the .TRAN command
should result in an output voltage that grows indefinitely with time.

SOLUTION
a. Both the magnitude and phase of ^Ad may be readily obtained.

phase ^Ad = -3 { f/ fb)

The phase margin corresponds to the frequency for which |/6A^| = 1.

1 + f^/fb = iPAdQ)^/^

f = - 1 = 4.533 kHz =

= -3 tan( fifb) + 180° = -52.7°

The gain margin corresponds to the frequency for which 0 = —180°.

-3 tan( f/fb) = -180°, f/fb = \/3

^Ado
WAd\ = = 12.5
(1 +
G^dB = -201ogl;6A^| = -21.9 dB

Because the phase and gain margins are negative, the circuit may be judged
to be unstable.

324 NEGATIVE FEEDBACK AND OPERATIONAL AMPLIFIERS

 8

Amplifier - Tripple Break

VIN 1 0 'kC 1 PWL(0 0
RIN 1 0 IMEG
EA 2 0 1 9 1000
RA 2 3 IK
CA 3 0 0.1592U
EB 4 0 3 0 1
RB 4 5 IK
CB 5 0 0.1592U
EC 6 0 5 0 1
RC 6 7 IK
CC 7 0 0.1592U
ED 8 0 7 0 1
R2 8 9 9K
R1 9 0 IK
.TRAN lU 500U 0 lU
.AC DEC 40 1 IMEG
.PROBE
.END

Figure 5.26: SPICE circuit and file for Example 5.5. Three RC circuits are needed to simulate the
amplifer with three break frequencies.

Amplifier - Tripple Break Freq

Temperature: 27.0

180d +.+.+..+-.■*-.-t

Eigure 5.27: Frequency-dependent res¬

ponse of Example 5.5.

Frequency

5.2 STABILITY: NOT ALL AMPLIFIERS ARE EQUAL 325

 Amplifier - Tripple Break Freq
Temperature: 27.0
20V

10V

OV

Figure 5.28: Time-dependent response of

10V
Example 5.5.

20V

30V

40V
Ous lOOus 200us 300us 400us SOOus
.V(8)
Time

b. The SPICE circuit and file of Figure 5.26 will be used to obtain the pha-
sor frequency response and the time-dependent response for a step func¬
tion input voltage. Even though the feedback amplifier is unstable - an
experimentally determined frequency response would not be possible -
a simulation response is readily obtained. Although the response of
Figure 5.27 appears “well behaved,” the phase increase with frequency
implies a negative time delay, a physically unrealizable result.
c. The transient response is indicated in Figure 5.28. The input step function
results in an exponentially growing oscillating output voltage. Although
the output voltage would be limited by the saturation of a physically real¬
izable amplifier, the simulation result continues to grow with time (it would
eventually be limited by the numerical limit of the simulation program).

EXAMPLE 5.6
A stable feedback amplifier can be obtained for the difference amplifier of
Example 5.5 if ^ is reduced sufficiently. Determine the maximum value of ^
that ensures a gain margin of at least 10 dB and a phase margin of at least 45°.
What is the low-frequency gain of the feedback amplifier with this value of yS?

SOLUTION The gain margin occurs for a frequency at which the phase of is
equal to —180°.
-3tan“^ f/fl, = -180°, f/fi, = tan 60° = \/3
^Ado _ pAdQ
\^Ad\ =
(1 + ~

For a gain margin of 10 dB, \^Ad\ = 0.316.

= 81;6A^l/A^o = 2.528 x 10"^
A larger value of ^ results in a gain margin that is less than 10 dB. A phase
margin of 45° occurs for the frequency at which the phase is —135°.
-3tan“^ f/fh = -135°, f/fb = tan 45° = 1

326 NEGATIVE FEEDBACK AND OPERATIONAL AMPLIFIERS

 For this frequency, \^Ad\ = 1.

^Ado ^Ado ^Ado

IfiAdl = - 3/2 23/2 2.828
(1 + P/fl)
yS = 2.828 X 10-^
Hence, the largest acceptable value of p is 2.528 x 10“^. This results in a
gain margin of 10 dB and a phase margin that is slightly larger than 45°. The
low-frequency gain is readily obtained as follows:
Ado
>0 — = 261
1 -f ^ Ado
Only a moderate reduction in gain occurs (—11.7 dB) for this value of p.
Because p is small, only a modest improvement in the performance of the
circuit over the performance of the amplifer by itself would be expected.

5.3 ANALYSIS OF OPERATIONAL AMPLIFIER CIRCUITS:

BASIC CONSIDERATIONS
The concept of an ideal response, the response of a circuit with an op amp that
has an infinite gain (an “ideal op amp”), has been discussed in Section 5.1. For
the circuit considered in Figure 5.4, it was shown that the overall response of a
noninverting op amp configuration could be expressed as the product of the ideal
response and an error term. Often the ideal response is sufficiently accurate in
predicting the behavior of an op amp circuit; thus, the effect of the finite gain of
the an op amp is negligible. However, for other circumstances the behavior of the
op amp is important. In either case, an analysis to determine the ideal response
of the circuit is needed.
When an op amp is treated as having an infinite gain, its input difference
voltage UDif is zero for a finite output voltage. In essence, the signal fed back to
the input of the op amp from its output is such as to result in a zero difference
input voltage. This suggests an analysis of the circuit based on the concept of
a “virtual short” for the input terminals of the op amp (Figure 5.29). Viewed
from the external network, the input voltage of the op amp is zero, as would be
expected if its input were a short circuit. However, the input current of the op
amp is also zero. Hence, the virtual-short description applies - a zero voltage as
well as a zero current.

IDEAL OP AMP - INPUT VIRTUAL SHORT

Figure 5.29: The concept of a virtual short.
Consider the amplifier circuits of Figure
5.30; virtual shorts (:|;) are indicated for the in¬
puts of the op amps. For the noninverting am¬
plifier of Figure 5.30(a), the input voltage uin
is equal to the voltage across Ri as follows:
Riuout ’^out , ^2
VlN = p , ^
Ri -I- Ri viN
(5.41)

5.3 ANALYSIS OF OPERATIONAL AMPLIFIER CIRCUITS: BASIC CONSIDERATIONS 327

 (a) noninverting amplifier (b) inverting amplifier

Figure 5.30: Basic op amp circuits illustrating the use of a virtual short for obtaining
their ideal response.

A zero input current has been assumed for the op amp. This is the ideal response
that w^as previously obtained by solving the circuit for an op amp with a finite
gain and then, after an expression for uout/fin was obtained, letting the gain
become infinite. The ideal response for the inverting amplifier (Figure 5.30(b)) is
obtained by summing the currents into the inverting input of the amplifier; they
must sum to zero because the input current of the op amp is zero. In addition, the
voltage at the inverting terminal of the op amp is zero because the noninverting
terminal is connected to the common point of the circuit (ground).

tiQUT _ Q vom _ Ri
(5.42)
Ri R2 ’ Fin Ri
This is the ideal response of the inverting amplifier circuit.
The virtual-short concept is convenient for obtaining the ideal response of the
amplifier circuit of Figure 5.31, which has two input voltages, v\ and vi. For
this circuit, the input voltages of the op amp, 1;+ and must be equal. If it is
assumed that the input currents of the op amp are zero, these voltages are readily
obtained.
_ _ R4V2 R3Vom
R3 + R4 R3 + R4
(5.43)
+ Rivi
Ri -b Ri
By equating these voltages, an expression for
Figure 5.31: An op amp with an inverting and a
UOUT in terms of v\ and vi is obtained:
noninverting input.

R4V2 R3Vom _ R2Vi

R4
R3 + R4 R3 + R4 Ri + R2

R2(R3 + R4)
fOUT = Pi - V2 (5.44)
R3{Ri + R2) R3
R4(1 + R3/R4) R4
Rsd + Rt/Ri)

If Ri/R2 = R3/R4, the output voltage depends

only on the difference of the input voltages.

328 NEGATIVE FEEDBACK AND OPERATIONAL AMPLIFIERS

 l^OUT = ^ - Vl)
(5.45)
for R1/R2 = R2/R4

This circuit may therefore be used for ob¬

taining a response that depends on the dif¬
ference of two voltages.
An op amp circuit used for summing sev¬
eral input voltages is shown in Figure 5.32.
Summing the currents into the inverting Figure 5.32: A summing amplifier with an inverted
output.
node of the op amp yields the following:

V1V2 V3 UOUT

Ri ^ ^ ^ ^ ~R^
(5.46)
Rp Rp Rp
l^OUT = V1- — V2-—V3
Ri K2 K3

The preceding result may be extended to any number of input voltages.

The virtual-short concept may also be used to determine the ideal response
of an op amp circuit with a capacitive or inductive element such as the circuit
of Figure 5.33. Again, a solution is obtained by summing the currents into the
inverting node of the op amp as follows:

Fin Four ^ dvom _

Ri R2 dt ~
(5.47)
<^fout Four _ Fin
dt RiC RiC

A solution for Four depends on the explicit time dependence of din- Consider
the case for an input that is a step function voltage occurring at ^ = 0 and has
an amplitude of Vpi

fin(^) = Vpu{t)
dvom Four
= foroO (5.48)
dt ^ R2C ~~ RiC Figure 5.33: An op amp with a capacitive
TOUT = - RiVp/Ri feedback circuit.

The quantity A is the constant of integration. If

pquj = 0 at ? = 0 (capacitor initially uncharged),
the following is obtained:

POUT = -f?2 Vp/Ri(l - (5.49)

This solution is indicated in Figure 5.34. The time

constant of the response, R2C, is the time constant

5.3 ANALYSIS OF OPERATIONAL AMPLIFIER CIRCUITS: BASIC CONSIDERATIONS 329

 ^in(0 ^out(0
t

t
-RiVp/Ri

Figure 5.34: The response of the op amp circuit of Figure 5.33 for an
input step function voltage.

of the circuit connected between the output of the op amp and its inverting
input.
The op amp circuit of Figure 5.33 is often used to approximate the response of
an integrating circuit. If Ri is very large, the following is obtained from Eq. (5.47):
dvouT 1
l^OUT Kin dt (5.50)
dt

For Kin = this expression yields the initial response of Figure 5.34, that
is, the response for t RiC.
The response of the op amp circuit of Figure 5.33 for a steady-state sinusoidal
input voltage is also of interest. This response can be obtained using a phasor-
type analysis in which the input voltage is represented by Vin and the output
voltage by Vout as follows:

kin(0 = Re (Vine^"'), vout(0 = Re (Voute^"^') (5.51)

By introducing an imaginary impedance of 1 /jcoC for the capacitor, the following

is obtained:
. ^^out • 'TT"
+ /wCVout = 0

Vout_^ /R2\ 1 /R2\ 1

^in \Ri) 1 + jcoRiC \Ri) 1 + jco/coh (5 52)

\Rjl + jf/f,

a)h = llR2C, fh^XIlitRxC

The frequency dependence of this response is similar to that of a simple RC

circuit (Figure 5.20) already discussed. The magnitude expressed in decibels
and the phase are indicated in Figure 5.35. The response for an input signal

Figure 5.35: Response of the circuit of Figure 5.33 for a sinusoidal input signal.

(l^out/FiJdB phase
fh
0 ; log/
-90° .

330 NEGATIVE FEEDBACK AND OPERATIONAL AMPLIFIERS

with a frequency of fh is l/\/2 (—3 dB) of that of the response for a very-low
frequency signal. As a result of the minus sign of Eq. (5.52), a phase shift of — 180°
(or -1-180°) occurs for low-frequency signals. Because the capacitor has the ef¬
fect of reducing the gain of high-frequency signals, the overall circuit is generally
described as a low-pass filter. If the frequency components of an input signal
are less than some upper frequency, a circuit of this type may be used to reduce
extraneous effects caused by noise.

OP AMP LIMITATIONS
The behavior of an actual integrated circuit op amp deviates from that of
an ideal op amp - particularly in that its voltage gain, although large for low-
frequency signals, decreases as the frequency is increased. This is the result of
the frequency compensation used to achieve stable operation when feedback is
used (Section 5.2). The frequency response of the op amp must be constrained,
that is, the op amp must not have an excessive phase shift that could result in a
distorted response or oscillations. It is primarily the compensating capacitor Q
of the op amp circuit of Figure 5.2 that is used to achieve an acceptable frequency
response for the op amp.
A sufficiently large compensating capacitor is generally used, and thus the
response of the op amp tends to be dominated by a single break frequency for
frequencies at which the magnitude of its gain is greater than 1.
Ado Ado (5.53)
Ad =
1 -I- jco/cob ^ + jf/ fb
The amplitude expressed in decibels and the phase of this response are indicated in
Figure 5.36. For a typical op amp, the low-frequency gain Ado is 10^ to 10^ (100
to 120 dB). The break frequency fy is quite small - less than 100 Hz {fb^5 Hz
for a 741 and 25 Hz for a 356). This implies that for most signals of interest, the
magnitude of the gain of the op amp is considerably less than Ado, and its phase
shift is close to -90°. Therefore, an ideal response, that corresponding to an op
amp with an infinite gain, does not occur for most signals — the gain of the op
amp affects the behavior of the overall circuit.

(Ad)dB

Figure 5.36: Frequency-dependent response of an inte¬

grated circuit op amp.

5.3 ANALYSIS OF OPERATIONAL AMPLIFIER CIRCUITS; BASIC CONSIDERATIONS 331

 \i f fh, then the op amp response of Eq. (5.53) may be approximated by
the following expression:

Ad ^ -j Ado fb/f = -j GBP If

GBP = A^o fb (the gain-bandwidth product)

Manufacturers generally specify the gain-bandwidth product of op amps; sel¬

dom are its factors Ado or fh specified. Typical integrated circuit op amps have
gain-bandwidth products in the range of 1-10 MHz. When f = GBP, then the
magnitude of Ad is 1 or, expressed in decibels, 0 dB. The approximation for the
response of the op amp, —jGBP/f, tends to be valid for most frequencies of
interest.
If the frequency-dependent behavior of an op amp is known, the response of
a circuit using the op amp may be obtained. Consider the noninverting amplifier
of Figure 5.30(a). Its response can be expressed in terms of its ideal response and
an error term. From a phasor notation, the following is obtained:

^out _ / V^out \ fAd / Vput \ _ 1 _j_ ,r

v.„ “ V V.nAdeal 1+M/ V^Adear ^

The feedback fraction, it will be recalled, is the fraction of the output voltage
returned to the inverting input of the op amp. The approximate expression for
the op amp gain yields the following:

B = Ri/(Ri + R2), pAd^-jfGBPIf

V,out 1
= 1 + (5.56)
V.. Ri 1 1/BAd 1 + ifipGBP
R2\ 1
= 1 + fh = PGBP
/ 1 + if/fh ’
The upper half-power frequency for this circuit is fh, a quantity considerably
larger than fh but less than the gain-bandwidth product of the op amp. The
response of this amplifier, given in Figure 5.37, is constrained by the response of
the op amp - the gain of the overall circuit falls below (or is approximately equal
to) that of the op amp.
The result of Eq. (5.56), fh — ^GBP, and the corresponding response of
Figure 5.37, illustrate an important concept of amplifying systems. The expres¬
sion for fh of the noninverting amplifier yields the following:

fh/f = fhd + R2/R1) = fh (Vout/V.n)ideal = GBP (5.57)

('^out/'^in)dB

Figure 5.37: Frequency response of a non¬

inverting amplifier.

332 NEGATIVE FEEDBACK AND OPERATIONAL AMPLIFIERS

The ideal gain, (Vout/Vin)ideah is the low-frequency voltage gain of the amplifier.
The product of fh and the low-frequency gain, the gain-bandwidth product
of the amplifier circuit, is equal to the gain-bandwidth product of the op amp.
If, for example, GBP = 1 MHz, an amplifier circuit with (Vout/Vin)ideal = 10
will have an upper half-power frequency fh of 100 kHz, whereas if the circuit
is designed for a larger low-frequency gain of 100, fh = '\.0 kHz. Although the
gain of the amplifier may be arbitrarily chosen (by selecting appropriate values
of R\ and Rj), the resultant bandwidth of the circuit, fh, is constrained by the
gain-bandwidth product of the op amp. It is the active device, the op amp, that
establishes the gain-bandwidth product of the amplifier circuit.
An expression that includes the effect of a finite op amp gain has been used
for the preceding analysis.

Vin \ Vin / Ideal 1 +

Although this expression was derived for a noninverting amplifier configura¬

tion, it may be shown that this expression holds for all linear amplifier circuits
(Example 5.8). Consider the inverting amplifier circuit of Figure 5.30(b) - its
ideal response has been determined:

Vout\
(5.59)
^in / Ideal

The feedback fraction f is the fraction of the output voltage fed back to the
inverting terminal (Figure 5.38). It may be determined by setting the input voltage
viN to zero and removing the op amp (indicated by dashed lines) from the circuit
as follows:

P = V /vo\jT = Ri/{Ri 'P Ri) (5.60)

This is the same expression as that for the noninverting amplifier. Therefore, the
error term involving fAd is the same:

fh = fGBP (5.61)
\ Rjl + iflfh'
For an ideal response of -10 (the low-frequency response), Rz = 10 Ri. This
implies that = 1/11. For GBP = 1 MHz, the upper half-power frequency of
this amplifier is 91 kHz, as compared with 100 kHz for a noninverting amplifier
with a gain of 10.

R,
Figure 5.38: Determining p for an inverting amplifier
configuration.
^OUT

5.3 ANALYSIS OF OPERATIONAL AMPLIFIER CIRCUITS: BASIC CONSIDERATIONS 333

 Closely related to the behavior associated with the frequency response of an
op amp is its slew-rate limitation. An op amp is limited as to how rapidly its
output voltage can change in an upward and downward direction.

dvom (5.62)
SR = slew rate
dt max

The slew rate, as with the frequency response, tends to depend on the compensat¬
ing capacitor of the op amp. The slew rate arises as a result of a current limitation
of the amplifying circuits that charge (or discharge) the compensating capacitor.

dvc dvc i
i = Cc (5.63)
dt ’ dt Cc
The circuit sets a limit on how fast the voltage across the capacitor can change,
that is, its time derivative. This derivative, in turn, establishes a limit for the
derivative of the output voltage. General-purpose op amps have slew rates of 1
to 20 'V/fj.s, whereas special-purpose, high-speed op amps have slew rates as high
as 100 V//XS.
The combined effect of an op amp’s frequency response (a linear effect) and
a slew-rate limitation (a nonlinear effect) can be illustrated with an example.
Consider a noninverting amplifier circuit with a low-frequency gain of 10 (ideal
response). The op amp has a gain-bandwidth product of 1 MHz and a slew rate
of 1 V/)U-s. Because P = 1/10, this results in an upper half-power frequency fh
of 100 kHz (fh = fGBF). Suppose the amplifier has an input sinusoidal signal
with a frequency of 100 kHz and a peak amplitude of 0.1 V. On the basis of
the ideal response of this circuit, the output would be a sinusoidal signal with an
amplitude of 1.0 V and would be in phase with the input signal. Because f = fh,
the actual response, expressed in terms of phasors, is the following:

Vout^ 10 10e-^'45°
7.07e-'^^° (5.64)
V,n 1+ /
Hence, for Vin = 0.1 V, the amplitude of Vout is only 0.707 V, and it lags the
input signal by 45°.

flN(^) = (0.1 V) COs(27T ft)

vomit) = (0.707 V) cos(2;r ft - 45°)

If it is assumed that this solution, which is based on the assumption of linear

behavior, is valid, the derivative of i'out(?) may be obtained as follows:

= -iTtf {0.707) sin(27r/-?-45°) (5.66)

For f = fh — lOOkHz, the derivative varies between ±0.44 V//ZS. The maximum
magnitude is less than the slew rate of the op amp, namely 1 V//xs, and therefore
the response of Eq. (5.84), based on an assumption of linear behavior, is valid
(Figure 5.39(a)).
If, however, the amplitude of uin(^) is increased, a slew-rate limitation occurs.
Consider the case for a sinusoidal input voltage with a peak amplitude of 0.5 V.
On the basis of an assumption of linear behavior, the output voltage would have

334 NEGATIVE FEEDBACK AND OPERATIONAL AMPLIFIERS

 ^in(0

0.1 0.5
V V
- 0.1 0.5

^out(0 ^out(0

0.707 : 2.21 ■

/
V V /

-0.707 - 2.21

(a) linear response (b) slew-rate limited response

Figure 5.39: Linear and nonlinear behavior of an op amp circuit.

a peak value of 3.54 V, that is, both voltages of Eq. (5.65) and Figure 5.39(a)
would be magnified by a factor of 5. This implies a derivative of pout that varies
between ±2.22 V//xs. Because the op amp has a slew rate of only 1 V//xs, a
linear response does not occur. A nonlinear analysis (using SPICE) results in the
output voltage of Figure 5.39(b). The magnitude of the derivative is constrained
to 1 V//r^s, thus resulting in a distorted output voltage waveform.

EXAMPLE 5.7
An inverting amplifier with a voltage gain of —100 and an input resistance of
10 is desired.
a. Design a conventional amplifier using an op amp circuit with two resistors.
Assume an ideal response for the circuit (an op amp with an infinite gain).
b. Design an amplifier using the modified feedback network of Figure 5.40.
No resistances are to be larger than 10 kf2.

SOLUTION
a. The circuit of Figure 5.30(b) and the solution of Eq. (5.42) apply. The input
resistance pin/is equal to R\. Therefore, R\ — 10 k^2 and for a gain of
-100, Ri = 100 Ri = 1 MQ.

Figure 5.40: Inverting op amp circuit of Example 5.7.

5.3 ANALYSIS OF OPERATIONAL AMPLIFIER CIRCUITS: BASIC CONSIDERATIONS 335

 R2 R2
[—\W

^OUT UOUt/^2

virtual
Norton equivalent circuit
short
Figure 5.41: Equivalent circuit for the feedback network of Example 5.7.

b. A virtual short may be assumed for the input terminals of the op amp, that
is, v~ = 0. The current of the feedback network ip may be determined
using the Norton equivalent circuit of Figure 5.41 as follows:

G2 , 1 _ VR2 f fOUT^
G2 + G3 + G2 ’^ Ri J' 1/R2 + 1/R3 + 1/R2' Rz 1 J
2 R2R3 R2

As a result of the virtual short, the input resistance remains equal to Ri.
Therefore, Ri = 10 kf2.

RsVqut _Q

^^OUT _ _ 2 R2 R3 + Rf _ / 2 R2 Ri \
UlN R1R3 V Ri R1R3/
If Ri = 10 k^2 (a maximum value), then R2 — Ri.

= —(2 + R2/R3)
Fin
This implies that R2/R3 = 98 or R2 = 10 k^2/98 = 102 ^2. Although this
circuit has the same response as that of part (a), a very large resistance
(1 M^2) is not required. This circuit would be preferred if an integrated
circuit were to be fabricated.

EXAMPLE 5.8
Use the circuit of Figure 5.29 to verify that the expression of Eq. (5.58) is valid
for an external network with linear elements.

SOLUTION The input difference voltage of the op amp is linearly dependent on

uiN and vout:

i^Dif = Rvin — favour

The quantity K is equal to uoif/i^iN for vouT = 0, and ^ is equal to —UDif/i^oux
for uiN = 0. The quantity p is the negative feedback fraction of the circuit.
The ideal response corresponds to Poif = 0.

/ fOUT\ _ R

\ EIN / IJggI ^

336 NEGATIVE FEEDBACK AND OPERATIONAL AMPLIFIERS

 Rl
—

AAA
wv
Figure 5.42: Noninverting amplifier of Example 5.8.
^Dif
f
^IN
' ^OUT

For a finite op amp gain of'Aj, the following is obtained:

I’Dif = i^out/ Ad = Xpin - ^vom

t^ouT _ KAd (_ /^out\ PAd
UIN 'i^ + PAd \p)l+fiAd V f IN / Ideal 1 + ^

A similar expression is obtained for phasor quantities. To illustrate the use of

this expression, consider the inverting amplifier configuration of Figure 5.42.
With the polarity of Uoif taken into account, the following is obtained when
the op amp is removed from the circuit:

K = UDif/fiN = -Ri/iRi + Ri) for VOUT = 0

^ = —VDif/i^our = Ri/{R\ + Ri) for pin = 0
/ R _ Ri
V fiN / Ideal ^ R^

This is the same result as that obtained when an analysis based on a virtual
short is used.

EXAMPLE 5.9
Obtain a SPICE simulation of a noninverting amplifier circuit having an op
amp with a single break frequency; GBP = 1 MHz and SR — 1 V//iS.
a. Obtain a simulation model for the op amp that includes the slew-rate lim¬
itation.
b. The op amp is used in a circuit with a voltage gain of 10 (ideal response).
Determine pout(^) for an input signal with a symmetrical square waveform
pin(?) that has a peak voltage of 0.1 V, a minimum voltage of 0 V, and a
frequency of 50 kHz.

SOLUTION ^
a. The gain-bandwidth product is equal to A^o fb (Eq. (5.54)). If A^o = 10 ,
then /fc = 10 Hz. (The behavior of the circuit may be shown to be indepen¬
dent of these values. For example, A^o = 10^ and /), = 1 Hz will produce
essentially the same result.) An RC circuit may be used to achieve the break
frequency of 10 Hz:
/), = l/(2;rRC), C = l/{27tfbR)
If R = 1 Mf2, then C = 15.92 nF. The circuit of Figure 5.43, if the diodes

5.3 ANALYSIS OF OPERATIONAL AMPLIFIER CIRCUITS: BASIC CONSIDERATIONS 337

 3 0.5 MQ 4 0.5 7 8

Figure 5.43: Op amp simulation circuit for Example 5.9.

Example 5.11
VINA 1 0 PULSECO .1 0 ION ION lOU 20U)
XI 1 2 3 OPAMP
RIA 2 0 IK
R2A 3 2 9K
VINE 4 0 PULSECO .5 0 ION ION lOU 20U)
X2 4 5 6 OPAMP
RIB 5 0 IK
R2B 6 5 9K
.TRAN .05U 30U
.PROBE
.SUBCKT OPAMP 128
RI 1 2 lOMEG
El 3 0 1 2 1E5
RA 3 4 . 5MEG
DA 4 5 DIODE
VA 5 0 7960
DB 6 4 DIODE
VB 0 6 7960
RB 4 7 . 5MEG
CA 7 0 0.01592U
EB 8 0 7 0 1
.MODEL DIODE D
.ENDS
.END
Figure 5.44: SPICE circuit and file for Example 5.9.

338 NEGATIVE FEEDBACK AND OPERATIONAL AMPLIFIERS

 Example 6.11
Temperature: 27.0
5.0V

4.0V

3.0V
Figure 5.45: SPICE solution of Example

1.0V

-O.OV
Ous 5us lOus 15us
.5*V(3).V(6)
Time

of the circuit are not conducting, will produce the appropriate linear re¬
sponse of the op amp. For this circuit, the capacitor’s voltage vc is equal
to VOUT-
dvovT _ dvc _ i
dt dt C
SR = hlmax/C, liUax = CSR= 15.92 IIlA
The diode circuits need to be such as to limit the magnitude of the current
of the capacitor to 15.92 mA. This implies a voltage of 7960 V across the
0.5-MS2 resistor connected to the capacitor. Because |ucl is small, a value
of Va= Vb — 7960 V will achieve the limiting (for so large a voltage, the
effect of the diode voltage VD(on)^ will be negligible),
b. A subcircuit will be used for the op amp to obtain uout(^) for the two input
voltages (Figure 5.44). The output voltages are given in Figure 5.45. For
the 0.1-V input voltage, the output voltage has been magnified by a factor
of 5. If linear operation had occurred, the magnified voltage would have
been identical to that for an input voltage with a peak value of 0.5 V.

5.4 PREEMPHASIS AND DEEMPHASIS CIRCUITS: DESIGN EXAMPLES

Audio signals, both voice and music, may be treated as consisting of a spectrum of
signal components with different frequencies. To transmit a reasonable replica of
a voice-produced signal, only a minimal bandwidth is needed. For example, tele¬
phone systems use a spectrum of approximately 300 to 3400 Hz, and specialized
systems (fire, police, aircraft, etc.) use even a smaller bandwidth. A standard AM
radio broadcast transmitter uses an audio spectrum of 20 to 5000 Hz, a band¬
width that, although adequate for voice, is not sufficient for high-quality music
transmission. For a high-quality system (high-fidelity), a larger bandwidth, 20 Hz
to 20 kHz, is needed. This is the spectrum used for commercial FM broadcasting
(both monaural and stereo).

5.4 PREEMPHASIS AND DEEMPHASIS CIRCUITS: DESIGN EXAMPLES 339

 Although a wide bandwidth is needed for a high-fidelity system, the spec¬
tral distribution of the signal components is not uniform. Typical audio sig¬
nals tend to have large-amplitude, low-frequency components (less than 1 kHz),
whereas the amplitudes of high-frequency components (above 1 kHz) are much
smaller. As a result, the wide spectrum required for a high-fidelity signal is poorly
utilized - most of the signal power is concentrated in the lower part of the fre¬
quency spectrum. An overall improvement can be achieved by preemphasizing
(over-amplifying) the signal’s high-frequency components. At the other end of
the system (for example, an FM receiver), a deemphasis circuit is used to restore
the spectral amplitudes to their original values. As a result of the preemphasis-
deemphasis circuits, a reduction in noise due to unavoidable electronic effects
is achieved. Although these types of circuits are used for phonograph and tape
recording (analog systems), they are not used for compact discs (a digital system).

PREEMPHASIS CIRCUIT
Circuits using operational amplifiers are ideally suited for modifying the fre¬
quency spectrum of signals. Consider the inverting op amp circuit of Figure 5.46
in which phasors are indicated for the input and output sinusoidal voltages. For
very low-frequency sinusoids, the capacitor tends to behave as an open circuit,
that is, its current is negligible compared with that of Ri.

=———^-7- low-frequency sinusoids (5.67)

Tin / low -^1 ~b ^2

At higher frequencies, the magnitude of the capacitor’s impedance becomes small

and, in effect, tends to short out Ri- A larger magnitude of gain occurs for this
condition.
V,out
high-frequency sinusoids (5.68)
/ high Ri
The preceding equation gives the ideal response (infinite op amp gain). For much
higher frequency signals, the finite gain of the op amp affects the response.
The frequency-dependent response of the circuit of Figure 5.46 may be ob¬
tained by introducing a complex impedance Z/ for the input network.
Rijl/jcoC) Ri
Zi — Ri + R\ +
R2 + lljcoC 1 -f- jcoRiC
Ri + R2j(oRiR2C (Ri + R2)[1 + imRiRiC/{Ri + R2)]
1 -l- jo)R2C 1 + ioiRzC

Figure 5.46: An op amp preemphasis circuit.

340 NEGATIVE FEEDBACK AND OPERATIONAL AMPLIFIERS

 ('^out/^in)dB

Figure 5.47: The frequency-dependent

response of the preemphasis circuit of Fig¬
ure 5.46.
phase /l fl

If a virtual short is assumed for the input of the op amp, the following ideal
response is obtained for the amplifier:

Z; Rs
(5.70)
/ V.n \ _ ^3 _ / 1^3 \ 1 + jcoRiC
\Vout/ Z/ \Ri + Rz) 1 + jcoRiRzC/lRi + Rz)
This expression yields the low-frequency gain (Eq. (5.86)) for co -> 0 and the
high-frequency gain (Eq. (5.68)) for co ^ oo.
It is convenient to introduce a set of break frequencies as follows:

co\ = l/RjC, f\ = coilln

Ri + Ri 1 , (5.71)
“ RiRiC RiWRiC ^
The response may then be written in terms of these break frequencies as follows:

fyout\ f R3 + /c 7a\
\V.n)~ {Rl + RlJl + jf/fl
Because f\ < fi (Eq. (5.71)), the magnitude of the numerator starts to increase
with increasing frequency before the magnitude of the denominator increases
(Eigure 5.47). A frequency-dependent phase shift is also introduced by the pre¬
emphasis circuit.

DEEMPHASIS CIRCUIT
A deemphasis circuit is required to restore the frequency components to their
original amplitude and phase. The inverting op amp configuration is ideally
suited. Consider the two op amp circuits of Figure 5.48 in which both the input
and feedback networks consist of complex impedances. These circuits differ only
in that the impedances Za and Zb are interchanged.

out 1 Zb I'^out 2 ZA

l^inl Za l^in2 Zb

/ y out l\/l^out2\ ^

5.4 PREEMPHASIS AND DEEMPHASIS CIRCUITS: DESIGN EXAMPLES 341

 Figure 5.48: Two inverting op amp circuits with input and feedback impedances
interchanged.

These circuits may be thought of as having inverse frequency responses, that is,
the frequency distortion of one circuit will be compensated (“undone’) by the
second circuit. Hence, a deemphasis circuit can be constructed from the same
elements as those of the preemphasis circuit - it is only necessary to interchange
the input and feedback networks.

DESIGN
To illustrate the design of a preemphasis and a deemphasis circuit, consider the
case for which the ratio of the high-frequency to the low-frequency gain is to be
5.0 (a high-frequency preemphasis of 5.0, that is, 14 dB). A lower break frequency
f\ of 500 Hz is desired, and a low-frequency gain of —1.0 will arbitrarily be
assumed (it may be easily changed).

Rs/iRi + R2) = ^ low-frequency gain

R^/R^—S high-frequency gain (5.74)
R3 = 5 Ri, R2 = 4 Ri

The value of the capacitor C may also be expressed in terms of Ri as follows:

C= l/(8;r/iRi) = 7.96 X 10-V-Ri (5.75)

In the preceding relationships, the values of all elements are expressed in terms
of Ri. On the basis of the concept for an ideal op amp, any value of Ri could be
used (from 1 mlf^ to 1 G^2). However, on the basis of practical considerations, the
choice of a value for Ri, although still arbitrary, is considerably more constrained.
The output of the op amp needs to supply the current of R3 as well as that of the
input elements. General-purpose integrated-circuit op amps are usually designed
to supply or sink a maximum of 10 mA. This output current must provide the
input current of the next stage as well as the current of the feedback circuit R3
(Ri has the same current). A conservative design based on a maximum current
of 1 mA is reasonable. If the circuit is to be designed for Ri to have a maximum
voltage of 10 V, a resistance of 10 k^2 is required. The following is therefore
obtained for the element values:
Ri = 10 k^, R2 = 40 kQ, Rs = 50 kQ
C = 7.96 X 10-9 F, 7.96 nF

342 NEGATIVE FEEDBACK AND OPERATIONAL AMPLIFIERS

Although larger resistance values (and
concurrently a smaller value of capac¬
itance) could be used, practical consid¬
erations also dictate an upper resistance
limit. Resistance values should be small
enough so that the effects of currents
of unavoidable stray capacitances are
negligible. For discrete circuits designed
for audio signals, resistances as large as (a) preemphasis circuit
1 are generally acceptable, whereas C 6.8 nF
for higher-frequency signals, smaller re¬
sistance values are required.
Although the 10-k^2 resistance for Ri
yields a reasonable set of resistances for
R2 and R3, the capacitance value C is
not readily available. A value of 6.8 nF
would be more convenient. This implies
a value of 11.7 for R\. Standard re¬
sistor values (5 percent tolerance) yield
(b) deemphasis circuit
the following component values based
on a resistance of 12 k^2 for Ri: Figure 5.49: A preemphasis and deemphasis circuit using
standard resistance values.

Ri = 12 k^, Ri = 47 k^^, R3 = 62 kQ, C= 6.8 nF (5.77)

Circuits using these component values are indicated in Figure 5.49. It will be
noted that for either circuit, a change in R3 results in a linear scaling of its
response. For example, a doubling of R3 of the preemphasis circuit will double
the gain of the circuit but will leave the relative frequency response unchanged.
A doubling of R3 of the deemphasis circuit will halve the gain of this circuit. If
R3 of the deemphasis circuit is changed to 12 k^2, the high-frequency gain would
be -1.0 (as opposed to its original value of -0.2), and the low-frequency gain
would be approximately —5.0.
For an audio system, signals will have frequency components up to 20 kHz.
The op amp circuits, however, will respond to signals, in particular noise, with
much higher frequency components. This is generally not desirable; for a good
design, the response of the circuit should be constrained to minimize the effects
of high-frequency noise components. The finite gain-bandwidth product GBP
of the op amp will necessarily limit the high-frequency response. Consider the
preemphasis circuit of Figure 5.49(a). For a high-frequency signal, the capac¬
itor, in effect, shorts out the resistor R2, thus reducing the effective input cir¬
cuit to a single resistor Ri. Therefore, the feedback fraction ^ is approximately
Ri/(Ri -(- R3) = 0.162. The upper half-power frequency of the amplifier fh is
PGBP. Hence, a GBR of 1 MHz results in a frequency of 162 kHz for fh. The
deemphasis circuit (Figure 5.49(b)) with a value of 12 kf2 for R3 results in a high-
frequency value of 1/2 for p and fh = 0.5 MHz. Both of these upper half-power
frequencies are excessively large.

5.4 PREEMPHASIS AND DEEMPHASIS CIRCUITS; DESIGN EXAMPLES 343

 A capacitive circuit external to the op amp will be required to limit the high-
frequency response of the preemphasis and deemphasis circuits. Consider, ini¬
tially, the preemphasis circuit of Figure 5.49(a). For high-frequency signals, the
capacitance C may be treated as a short circuit. Suppose that a second capacitor
Ch is connected in parallel with R3, resulting in a complex impedance for the
feedback connection Zp:
_ Rsd/jcoCH) _ R3
^ R3 + lljcoCu 1 + jcoRiCn
^in 1 . ^out 1 _ Q
(5.78)

Voutl _ \_
Vini Ri Ri 1 -I- jcoRsCn
This relation yields an upper half-power frequency fp as follows:

V,out 1
fh = l/(27r RsCh) (5.79)
V.ni Rxl + ififh'
Because a fairly uniform response for signals with frequencies less than 20 kHz
is desired, a design value of 40 kHz for fp is reasonable.

CH = l/(27r/),R3) = 6.42xl0-“F, 64.2 pF (5.80)

A standard capacitor value of 56 pF will be used, resulting in a slightly higher

half-power frequency.
The high-frequency response of the deemphasis circuit of Figure 5.49(b) may
be constrained in a similar fashion. For high-frequency signals, the capacitor
C may again be treated as a short circuit. Therefore, a second capacitor Ch
connected across the feedback elements for this circuit results in the following
high-frequency behavior:

^out 2 Ri 1
fh = l/(27rRiCH) (5.81)
R3^ + jf/fh’
Again a value of capacitance will be determined that yields 40 kHz for fp as
follows:

Ch= l/(27r/),Ri) = 3.32 X 10“^° F, 332 pF (5.82)

A standard capacitance value of 330 pF will be used.

SPICE VERIFICATION

To verify the behavior of the preemphasis and deemphasis circuits, a SPICE

simulation will be employed (Figure (5.50)). A value of R3 that results in a low-
frequency gain of -5 for the deemphasis circuit will be used (R3 = 12 kf2).
To demonstrate that the deemphasis circuit does indeed restore the input signal,
the circuits will be connected in cascade, and the op amp subcircuit model of
Figure 5.44 will be used for the simulation. The frequency response (expressed
in decibels) of the individual circuits is given in Figure 5.51. It will be noted that
a “flat” overall response corresponding to a gain of about 5, that is 14 dB, is

344 NEGATIVE FEEDBACK AND OPERATIONAL AMPLIFIERS

 Pre emphasis/Deemphasis
VI 1 0 AC 1 PWL(0 0 .lU 1 200U 1 200.lU 0)
Rll 1 2 12K
R21 2 3 47K
Cl 2 3 6.8N
XI 0 3 4 OPAMP
CHI 4 3 56P
R31 4 3 62K
R32 4 5 12K
X2 0 5 7 OPAMP
CH2 7 5 330P
R12 6 5 12K
R22 7 6 47K
C2 7 6 6.8N
.AC DEC 20 10 lOOK
.TRAN lU 400U 0 lU
.PROBE

OPAMP subcircuit of Fig. 5.44

.END
Figure 5.50: SPICE circuit and file for a preemphasis and a deemphasis circuit.

achieved for frequencies less than 20 kHz. At 20 kHz the response is down by
2.4 dB from its low-frequency value.
The time-dependent behavior of the circuits for a 1-V input pulse with a du¬
ration of 200 fis is obtained from the transient analysis (Figure 5.52). It will be
noted that the preemphasis circuit results in a significant distortion of the input
pulse (it is also inverted). However, the deemphasis circuit restores the origi¬
nal time dependence of the pulse. The finite rise and fall times are a result of
the limitation of the frequency-dependent response to signal components with
frequencies less than about 20 kHz.

5.4 PREEMPHASIS AND DEEMPHASIS CIRCUITS: DESIGN EXAMPLES 345

 Preemphasis/Deemphasis
Temperature: 27.0

Figure 5.51: Fequency-dependent response

of the circuits of Figure 5.50.
preemphasis
deemphasis

10h lOOh I.OKh 10Kh 100Kh

. VDB(4) . VDB(7) - VDB(4) . VDB(7)
Frequency

Preemphasis / Deemphasis
Temperature; 27.0

Figure 5.52: Time-dependent response

of the circuits of Figure 5.50.

.V(1).V(4).V(7)
Time

5.5 A WIDE-BANDWIDTH AMPLIFIER: A DESIGN EXAMPLE

Integrated-circuit op amps are extremely convenient for constructing linear am¬
plifiers. These circuits tend to require considerably fewer components than cir¬
cuits using discrete transistors. Furthermore, the design process is much easier in
that only a limited knowledge of the behavior of op amps is required. Unfortu¬
nately, op amp circuits tend to have a more limited bandwidth than well-designed
circuits using discrete transistors.
To illuminate the design procedure, an amplifier requirement of a low-level
voltage gain of 100 will be considered. The amplifier is to be ac coupled, that is,
a nonvarying (dc) input voltage should have no effect on the amplifier’s output.
The frequency response of the amplifier is to be uniform (within 3 dB) down to
50 Hz, whereas the upper half-power frequency is to be as high as possible. An
additional condition is that the circuit is to require only a single supply voltage
Vcc of 15 V.

346 NEGATIVE FEEDBACK AND OPERATIONAL AMPLIFIERS

 SINGLE-STAGE AMPLIFIER

To achieve a wide bandwidth, several cascaded am¬

plifier stages will be needed. However, to justify this
assertion, an amplifier using only a single op amp will
initially be considered. A conventional noninverting
amplifier configuration that has a gain of 100 is indi¬
cated in Figure 5.53.
Figure 5.53: An amplifier using a single
V,out
= 1 1 Rz/Ri,
--
op amp.
Ideal (5.83)
R2/R1 = 99

The resistances Ri and Ri are reasonable design values (in constru¬

cting this circuit, a standard value of 100 would be used for Rz). The upper
half-power frequency of the response depends on the gain bandwidth product
GBP of the op amp as follows:

= 0.01 GBP

If, for example, GBP = 1 MHz, fh — 10 kHz. This response is not even adequate
for a high-fidelity audio amplifier. If, however, GBP — 20 MHz, an upper half¬
power frequency fh of 200 kHz results.
Operational amplifiers that may be described as undercompensated are avail¬
able with gain-bandwidth products of 20 MHz and higher. These op amps are
generally designed for stable operation in circuits with feedback fractions {f) that
are 0.2 or less. This implies a gain of 5 or greater for a noninverting amplifier
configuration. (General-purpose op amps are usually designed to be stable in cir¬
cuits with values of ^ up to 1.) Alternatively, an externally compensated op amp
could be used. When a smaller-than-normal value of compensating capacitance
Q, is used the gain-bandwidth of the op amp is increased. Through selection of
an appropriate capacitance, the response of the op amp can be optimized for the
circuit in which it is used.
For the discussion that follows, it will be assumed that op amps with gain-
bandwidth products of 20 MHz will be used. The high-frequency behavior of the
amplifier circuits will depend on this quantity; if op amps with a different GBP are
used, the high-frequency response will be different. For example, if op amps with
Qgp =10 MHz are used, the resultant upper half-power frequency will be only
one-half that of the circuit using 20-MHz op amps. For the circuit of Figure 5.53,
the upper half-power frequency fh will be 200 kHz {GBP = 20 MHz):

X22I - A = 200 kHz (5.85)

V.„ “ l-b/Y///.’
This is the response of the RC equivalent circuit of Figure 5.54. The same circuit
will also yield the response for an input voltage viM that is a step function

5.5 A WIDE-BANDWIDTH AMPLIFIER: A DESIGN EXAMPLE 347

 100 Vi„
Vi. RC= l/lTtfh

Figure 5.54: An RC circuit that simulates the response of the op amp

circuit of Figure 5.53.

Vpfji{t) as follows:

i-OUT(i) = 100 Vp(lforOO

T = RC = 1 jin fh
The time constant of the amplifier circuit is related to its upper half-power fre¬
quency. The lO-to-90-percent rise time U is readily obtained as follows:

tr ^2.2 r =2.2/2jtfh = 0.35/fh (5.87)

For an amplifier with fh = 200 kHz, the rise time is 1.75 /xs. To reduce the rise
time, the bandwidth of the circuit must be increased.

TWO-STAGE AMPLIFIER
Consider, as a next step in the design process, the situation in which two
amplifier circuits are used, each with a gain of 10 (Figure 5.55). Although this is
a more complex circuit than that of the amplifier with a single op amp, this circuit
has a much higher overall upper half-power frequency. Because the voltage gain
of each stage is 10, the feedback fraction is 0.1. Hence, for a gain-bandwidth
product of 20 MHz, the upper half-power frequency of each stage fh is 2 MHz.
The overall response is the product of the individual responses:

Vout 100 Vout 100

(5.88)
Vin {1 + if/fhr Vin 1+ F/f^
The overall upper half-power frequency /), overall? occurs for a frequency at which
the denominator of the magnitude of the gain expression is equal to \/2.

1 + /^overall//? = /^-overall = fh\/^ - 1 = 0.644 fh (5.89)

Hence, the overall upper half-power frequency of the two-stage amplifier is

1.29 MHz, which is a considerable increase over that of the single-stage amplifier.

Figure 5.55: An amplifier using two op

amps.

348 NEGATIVE FEEDBACK AND OPERATIONAL AMPLIFIERS

 THREE-STAGE AMPLIFIER
For the next step of the design process, a three-stage amplifier (Figure 5.56) will
be considered. To achieve an overall gain of 100, a gain of 4.64 (4'^) is required
for each stage. Both Ri and Ri have been increased to reduce the currents of the
circuit. Because P — 1/4.64 = 0.216, the upper half-power frequency of a single
stage is 4.32 MHz. The response of three stages is the third power of that of a
single stage as follows:

Vout ^ 100 Vout 100

(5.90)
V.n H + jf/fh?' (1 + P/fif"
Again, the overall half-power frequency occurs for a frequency at which the
magnitude of the gain is equal to \/2.

(1 + = 0.510 h (5.91)

The overall half-power frequency is 2.20 MHz, which is an improvement over

the two-stage circuit.
Although additional stages might also be considered, the large op amp gain-
bandwidth product of 20 MHz may not be realized for amplifier stages with
smaller voltage gains. For three stages, the gain of each stage, 4.64, results in
a value of 0.216 for p. This is slightly larger than the maximum value of 0.2
for which stable operation is specified for a particular op amp (a 357). If four
amplifier stages were to be used, the gain of each stage would be 3.16, and p
would be 0.316, an excessively large value for the preceding op amp. Although
an externally compensated op amp could be used, its gain-bandwidth product
would probably be less than 20 MHz. Hence, any improvement in the overall
performance of the amplifier that might be achieved would be small.
A single RC simulation circuit was used to determine the rise time of an
amplifier in terms of its upper half-power frequency (Eq. (5.87)). Two RC cir¬
cuits would be needed to determine the step-function response of a two-stage
amplifier - the exponential response of the first stage serving as the input voltage
of the second stage. Three RC simulation circuits would be needed for the three-
stage amplifier. The overall step-function response of these simulation circuits
is not a simple exponential function. However, the rise times tend to be related
to the overall half-power frequency of the amplifier. The following expression
based on the response of a single amplifier stage is a reasonable approximation

5.5 A WIDE-BANDWIDTH AMPLIFIER: A DESIGN EXAMPLE 349

 for relating the overall response time to the overall half-power frequency of a
multistage amplifier:

overall ~ overall

This implies rise times of approximately 0.78 and 0.45 /rs for the two- and three-
stage amplifiers. A SPICE simulation is recommended if a precise value of rise
time is required.

FINAL DESIGN
At this point, the three-stage amplifier with an overall upper half-power fre¬
quency of 2.20 MHz will be chosen for the final design. An amplifier with a
2.20-MHz bandwidth is suitable, for example, for amplifying a moderate-quality
video signal (without a color subcarrier). If a significantly wider bandwidth is
needed, an amplifier using either discrete devices or alternative integrated circuits
(not op amps) will be required. It is now necessary to complete the design, that
is, to take into account the single voltage supply requirement and realization of
the desired low-frequency response.
For a single supply voltage of Vcc? the negative supply connection of the op
amp will be connected to the ground point of the circuit (Figure 5.57). This
requires that the input voltages of the op amp as well as its output voltage be
constrained to a range bounded by 0 and 15 V (Vcc = 15 V). Ideally, the signal
and output voltages should have quiescent values of about 7.5 V (Vcc/2). The
input voltage of Figure 5.57 may be considered as the sum of a quiescent voltage
ViN and a sinusoidal quantity Re(Mne^"0. A similar condition prevails for the
output voltage.

vin(0 = Tin + RelVine^^^O

vomit) = Tout +

For the quiescent condition (no signal), the capacitor may be treated as an open
circuit. Because the current of R2 will be zero for this condition, the quiescent
input and output voltages will be equal:
Figure 5.57: An amplifier circuit using a
single supply voltage.
Fout = Mn quiescent values (5.94)

Therefore, if Vin = Vcc/2, Vour = Vcc/2,

which is a condition appropriate for the single sup¬
ply voltage.
For very high-frequency signals, the capacitor
will behave as a short circuit, resulting in the same
high-frequency response as that of a circuit without
a capacitor. A phasor analysis may be used to ob¬
tain the frequency-dependent behavior of the am¬
plifier circuit. Equating the phasor voltages at the

350 NEGATIVE FEEDBACK AND OPERATIONAL AMPLIFIERS

inputs of the op amp yields the following:

y _ [Rl + 1 /j(i>C\)Vout _ (1 + j(^R\Cl)Vout

Ri + l/j(oCi + Ri 1 + jo){Ri + RilQ
(5.95)
^ out _ 1 + jo){Ri + R2)Ci
Vin 1 + jcoRiCi

For ^ 0 the gain is 1, whereas for o) oo the gain of the preceding expression
is 1 + Ri/Ri, which is that expected for a circuit with the capacitor replaced by
a short circuit. The response'for Eq. (5.95) may be expressed in terms of two
break frequencies f\ and fz as follows:
V,out
/i = l/27r(Ri + R2)Ci, /2 = l/2;rRiCi (5.96)
Vi, 1 + if/fi
If this circuit is used for the three-stage amplifier, R2/R1 = 3.64, and the ratio of
the break frequencies is 4.64 (Figure 5.58).
The frequency-dependent response of three amplifier stages, each using the
circuit of Figure 5.57, is the third power of the expression for a single stage:

V,out (5.97)
h = 4.64 h
{t+p/flf"’
Because the design value of the lower half-power frequency is 50 Hz, a value
of fi (or fi) for which the magnitude of the gain is 100/\/2 needs to be deter¬
mined. Once the break frequencies are known, the value of capacitance C\ can
be obtained. An approximation will be employed because it will be asumed that,
for f = ft, the 1 of the numerator term of Eq. (5.97) can be ignored.
iji
out (eifi) h (5.98)

For this expression, ( fi/fi)^ = 100. Therefore, the lower half-power frequency
fi is the frequency at which the denominator of the preceding expression is equal
to Vl.

= 1 =0.510/-, (5.99)

For a lower half-power frequency of 50 Hz, fi = 25.5 Hz. When the expression
of Eq. (5.96) is used for fi, the following is obtained for Q (Ri = 10 kQ):

Cl = IjlitfiRi = 5.24 X 10 ^ F, 0.624 /xF (5.100)

(Fout/Vn)dB

13.3
Figure 5.58: Frequency response for the amplifier of
dB
Figure 5.57.
0

5.5 A WIDE-BANDWIDTH AMPLIFIER: A DESIGN EXAMPLE 351

 Ri = 10 kQ, Ri = 36 k^2, Q = 0.68 ixV
R, = 1.0M^, Q=0.1/xF, Cl = 47/zF, Rl = 1.0 kQ
Figure 5.59: The final design of a three-stage amplifier. Node numbers are those used for a
SPICE simulation.

A Standard capacitance value of 0.68 /xF will be used. For this circuit, f\ is equal
to 5.50 Hz, and fi_/f\ =9.1. Because ff/fi = 82.6, the approximation that this
quantity is large compared with 1 is valid.
A capacitor Q and a set of resistors Ri will be used for the input circuit of
the amplifier (Figure 5.59). The input capacitor Q is sufficiently large so that
the magnitude of the sinusoidal voltage across Q is negligible compared with
the input voltage at a frequency of 50 Hz. An arbitrary load resistor (it was not
specified), along with a coupling capacitor, is shown for the output circuit. As
for the input circuit, for a frequency of 50 Hz, the sinusoidal voltage across Cl
is negligible compared with the load voltage.

SPICE VERIFICATION
For a SPICE simulation of the amplifier, a modification of the previously used
subcircuit is necessary (Figure 5.60). The 20-MHz gain-bandwidth product cor¬
responds to a break frequency of 200 Hz for = 10^. This requires a capaci¬
tance of 795.8 pF for an equivalent circuit with a series resistance of 1 The
limiting voltages of ±19895 V result in a slew rate of 50 V//xs (the specified slew
rate of a 357 op amp). Two external connections (nodes 9 and 10) have been
added to the subcircuit to account for the power supply connections. Through
the use of a polynomial voltage source specification (EB), the zero-signal value
of the output voltage is shifted to the midvalue of the supply voltages (Vcc/2 for
Vee = 0). The supply resistor ^supply has been included to account for the supply
currents. For an actual device, the current supplied by the output of the op amp
is derived from Vcc and Vee. To model this behavior, a more complex circuit is
necessary.
The circuit file of Figure 5.61 will be used to simulate the behavior of the three-
stage amplifier. Phasor (.AC) and transient (.TRAN) analyses are included. The
frequency response of the first stage of the amplifier and for the overall response of

352 NEGATIVE FEEDBACK AND OPERATIONAL AMPLIFIERS

 9 ^Supply

^CC •-WV-• ^EE

10 kQ

.SUBCKT QPAMPS 1 2 8 9 10
RI 1 2 lOMEG
El 3 0 1 2 1E5
RA 3 4 .5MEG
DA 4 5 DIODE
VA 5 0 19895
DB 6 4 DIODE
VB 0 6 19895
RB 4 7 .5MEG
CA 7 0 795.8P
EB 8 0 P0LY(3) 7 0 9 0 10 0 0 1 .5 .5
RSUPPLY 9 10 lOK
.MODEL DIODE D
.ENDS
Figure 5.60: Subcircuit for op amp with supply connections.

the amplifier is given in Figure 5.62. The lower and upper half-power frequencies
of the simulation are 47.7 Hz and 2.2 MHz, respectively, which are values very
close to the design quantities. The transient response for a l-/us input pulse is
given in Figure 5.63. The rise time of 165 ns is very close to that predicted by the
approximate relationship (0.35//i,overall) of 159 ns. For the frequency-dependent
and the transient response, the gain is slightly less than the design value of 100
(40 dB). This is a result of the standard resistance value of 36 (instead of
36.4 kf2) being used for R2. If a precise value of 100 is required for the overall
voltage gain, R2 of one stage could be increased slightly.
As a result of the overall lower half-power frequency of 50 Hz, the amplitude
of the response for a 50-Hz sinusoidal input signal is down by 3 dB, that is,
the output voltage is only l/\/2 of that which it would be for a much higher
frequency (for example, 1 kHz). This low-frequency limitation has a significant
effect on the amplification of signals with other waveforms. A simulation was
run for an input voltage with a square waveform and a frequency of 250 Hz
(5 times the lower half-power frequency of the amplifier). A considerable dis¬
tortion of the output voltage resulted (Figure 5.64). The coupling capacitors Q
and Cl along with the capacitive feedback networks result in a “sag” of the
output voltage. Instead of the output voltage remaining at a constant high or

5.5 A WIDE-BANDWIDTH AMPLIFIER: A DESIGN EXAMPLE 353

 Three-Stage Amplifier
VIN 1 0 AC 1 PWL(0 0 IN .02 lU .02
+1.001U -.02 2U -.02 2.001U 0)
Cl 1 2 O.IU
RIl 3 2 IMEG
RI2 2 0 IMEG
XI 2 4 6 3 0 OPAMPS
Rll 4 5 lOK
Cll 5 0 0.68U
R21 6 4 36K
X2 6 7 9 3 0 OPAMPS
R12 7 8 lOK
C12 8 0 0.68U
R22 9 7 36K
X3 9 10 12 3 0 OPAMPS
R13 10 11 lOK
C13 11 0 0.68U
R23 12 10 36K
CL 12 13 47U
RL 13 0 IK
.AC DEC 20 1 lOMEG
.TRAN .OIU 3U 0 .OIU
.PROBE

j- OPAMPS subcircuit of Fig. 5.60

.END
Figure 5.61: SPICE file for the three-stage amplifier of Figure 5.59.

Three-Stage Amplifier
Temperature: 27.0

Figure 5.62: Frequency response of

three-stage amplifier.

= VDB(13) .VDB(6)
Frequency

354 NEGATIVE FEEDBACK AND OPERATIONAL AMPLIFIERS

 Three-Stage Amplifier
Temperature: 27.0

Figure 5.63: Transient response for a

US input pulse. The rise time is 165 ns.

Time

Three-Stage Amplifier
Temperature: 27.0

Figure 5.64: Transient response for a

voltage with a 250-Hz square waveform.

Time

low level, the magnitude of the output voltage decreases with time. For a lower-
frequency square-wave voltage (a voltage with a longer period), the sag is even
more pronounced.
The coverage of op amp applications in this chapter has necessarily been lim¬
ited, and only a few applications have been discussed. To gain a fuller perspective
on the numerous applications of op amps, other texts are recommended (Franco
1988; Stout and Kaufman 1976; Van Valkenburg 1982; Wait et al. 1992).

REFERENCES

Black, H. S. (1934). Stablized feedback amplifiers. The Bell System Technical Journal, 13, 1,

1-18.
Bode, H. W. (1975). Network Analysis and Feedback Amplifier Design. Huntington, NY:
Robert E. Krieger Publishing Company.
Fagen, M. D. (1975). A History of Engineering and Science in the Bell System - The Early
Years (1875-1925). Murray Hill, NJ: Bell Telephone System Laboratories, Inc.

REFERENCES 355
 Franco, S. (1988). Design With Operational Amplifiers and Analog Integrated Circuits. New
York: McGraw-Hill Book Company.
Gray, Paul R. and Meyer, Robert G. (1992). Analysis and Design of Analog Integrated Circuits
(3d ed.). New York: John Wiley & Sons.
Mabon, P. C. (1975). Mission Communications: The Story of Bell Laboratories. Murray Hill,
NJ: Bell Telephone Laboratories, Inc.
Millman, J. and Grabel, A. (1987). Microelectronics (2nd ed.). New York: McGraw-Hill Book
Company.
Nyquist, H. (1932). Regeneration theory. The Bell System Technical Journal, 11, 1, 126-47.
O’Neill, E. F. (1985). A History of Engineering and Science in the Bell System - Transmission
Technology (1925-1975). Murray Hill, NJ: AT&T Bell Laboratories.
Sedra, A. S. and Smith, K. C. (1991). Microelectronic Circuits (3rd ed.). Philadelphia: Saunders
College Publishing.
Solomon, J. E. (1991). A tribute to Bob Widlar. IEEE Journal of Solid State Circuits, 26, 8,
1087-9.
Stout, D. F. and Kaufman, M. (1976). Handbook of Operational Amplifier Circuit Design.
New York: McGraw-Hill Book Company.
Tucker, D. G. (1972). The history of positive feedback: The oscillating audion, the regenerative
receiver, and other applications up to around 1923. The Radio and Electronic Engineer, 42,
2, 69-80.
Van Valkenburg, M. E. (1982). Analog Filter Design. New York: Holt, Rinehart, and Winston.
Wait, J. V., Huelsman, L. R, and Korn, G. A. (1992). Introduction to Operational Amplifier
Theory and Applications (2d ed.). New York: McGraw-Hill, Inc.

PROBLEMS

5.1 Consider the feedback amplifier of Figure 5.4 with Ri = 10 Rj =

100 k^2, and Ad = 100. What are P and Afb of this circuit?
5.2 Repeat Problem 5.1 for Ad = 10^ and for Ad = 10"*.
5.3 What is the ideal value of Afb for the circuit of Problem 5.1 ? What is the
value of Ad required for Afb to be within 10 percent of its ideal value?
What is the value required for Aff, to be within 1 percent of its ideal value?
5.4 In the feedback amplifier of Figure 5.4, Ri = 5.6 k^2, R2 = 150 k^2, and
Ad = 100. What is Afb of this circuit?
5.5 What is the ideal value of Afb for the circuit of Problem 5.4? What is the
value of Ad required for Afb to be within 5 percent of its ideal value?
What is the value required for A fb to be within 1 percent of its ideal value ?

5.6 With Eq. (5.4) as a starting point, obtain an expression for What
is the sensitivity of Afb, that is, (;^)(^^)?
5.7 For the feedback amplifier circuit of Figure 5.4, R\ = 4.7 k^2, R2 =
100 k^2, and Ad — 500. What is Afb of the amplifier circuit? What is
the percentage change of Afb ior a 10 percent change of Aj? (Flint: The
result of Problem 5.6 is applicable.)

5.8 What is the value of Ad required for a 10 percent change in Ad to result

in only a 1 percent change in Afb of Problem 5.7?

356 NEGATIVE FEEDBACK AND OPERATIONAL AMPLIFIERS

5.9 A particular amplifier has a voltage gain of A What is its decibel gain
for A — 5, 15, 25, and 50?
5.10 An amplifier has a decibel gain Ajb of 21 dB. What is the magnitude of
the voltage gain? What is the magnitude of the voltage gain for Ajb = 12.,
18, and 36 dB?
5.11 An amplifier has a decibel gain of 19 dB. What is the magnitude of the
voltage gain? Suppose that the voltage gain increases by 5 percent. What
is the corresponding change in the decibel gain? What is the change in
decibel gain for increases in voltage gain of 10,20, and 50 percent? What
is the change in decibel gain for decreases in voltage gain of 10, 20, and
50 percent?
5.12 It is desired that the feedback amplifier of Figure 5.4 have an ideal voltage
gain of 33 dB. Determine the required resistance ratio R2/R1. Suppose
that the maximum magnitude of the output voltage is 10 V and the
magnitude of the current of the feedback circuit is not to exceed 1 mA.
Determine values of Ri and Rz that satisfy this condition.
5.13 Determine the minimum value of Aj, expressed in decibels, required for
the amplifier of Problem 5.12 if the actual voltage gain is not to deviate
by more than 1 dB from the ideal value. What is the minimum value of
Ad, expressed in decibels, for the gain to be within 0.2 dB of its ideal
value?
5.14 Consider the feeback amplifier of Figure 5.4 in which the phasor gain of
the difference amplifier is —/lOO. Determine the complex value of Afb
for Ri = 10 k^^ and Rz = 100 k^2. What is Afb expressed in decibels?
5.15 Repeat Problem 5.14 for Ri = 4.7 k^2 and Rz — 240 k^2.
5.16 The difference amplifier of Figure 5.4 has an input resistance Ri of
1 and a gain Ad of 1000. The feedback network has resistances
of Ri = 100 k^2 and Rz = 200 k^2. What are the values of Rin and Afb
of the circuit?
5.17 Repeat Problem 5.16 for Ri = 10 k^^.
5.18 Repeat Problem 5.16 for R, = 10 k^2.
5.19 Consider the equivalent circuit for a difference amplifier with a nonzero
output resistance Figure 5.13. Obtain an expression for Rout for the
case in which Ri + Rz is not large compared with Rout-
5.20 A difference amplifier with an equivalent circuit of Figure 5.13 has the
following parameters: R| = 1 k^^, Rz = 22 k^^, and Rq = 500 What
is Rout for Ad - 100, 1000, and 10"^? What are the corresponding
values of Afb'^
5.21 Repeat Problem 5.20 for Rq = 10 k^2.
5.22 Consider the result of Eq. (5.25), the dependence of uout on uin for the
nonlinear amplifier with feedback. Show that uouT is very nearly equal
to 10 uiN for a small magnitude of kin-

PROBLEMS 357
 5.23 The nonlinear feedback amplifier of Figure 5.9 has the following param¬
eters: Ri = 1 kQ, R2 = 10 kQ, Ad = 10, Ai = 10, and Ai = 2.5 V"!.

a) Determine Vimax-
b) What is vout/^^in for IuinI small?
c) What is UError for UlN = 0.9 V?

5.24 Repeat Problem 5.23 for Ad = 100.

^OUT

r —5 -|- 5 i>i for v\ < —1.0 V

l^OUT = S 10 Ui for Idi I < 1.0 V
I 5 -|- 5 for vi > 1.0 V

Figure P5.25

5.25 The nonlinear response of a particular amplifier may be approximated by

the piecewise linear response of Figure P5.25 (|i>i| < 2 V). The amplifier
is used in the circuit of Figure 5.9 with = 10 and with Ri and Ri
chosen so that vout = IOuin for |i;i| small. Determine expressions for
the piecewise linear dependence of four on uin.
5.26 Repeat Problem 5.25 for a difference amplifier with a voltage gain of 100
(A^ = 100).
5.27 A difference amplifier with Ado = 10^ and = 10 Hz is used in a feed¬
back circuit with = 0.02.
a) What is the low-frequency gain of the feedback amplifier circuit?
b) What is the frequency for which the response Afb is 1.0 dB less than
its low-frequency value?
c) What is the frequency for which Afb is lOdB less than its low-
frequency value?

5.28 Repeat Problem 5.27 for Ado = 10"^ and fb = 100 Hz.
5.29 Repeat Problem 5.27 for a feedback circuit with ^ = 0.01.
5.30 Repeat Problem 5.27 for a feedback circuit with ^ = 0.1.
5.31 A difference amplifier with Ado = 10"* and /"^ = 100 Hz is used in a
feedback amplifier circuit with ^ = 0.1.
a) What is the low-frequency gain of the feedback circuit?
b) What is the frequency for which the gain is 3 dB less than its low-
frequency value?
c) What is Ad for this frequency?
d) What is the magnitude and phase of Afb for /" = 100 kHz?

358 NEGATIVE FEEDBACK AND OPERATIONAL AMPLIFIERS

5.32 Consider the case for which the difference amplifier of Problem 5.31 has
a second break frequency of fbi = 100 kHz.
a) What is the low-frequency gain of the feedback circuit?
b) What is for f = 100 kHz?
c) What is Afb for = 100 kHz?
5.33 What is the phase margin ofthe op amp circuit of Problem 5.32 (jS = 0.1)?
5.34 What is the phase margin of the op amp circuit of Problem 5.32 for a
feedback circuit with ^ = 0.2?
5.35 What is the phase margin of the op amp circuit of Problem 5.32 for a
feedback circuit with ^ = 0.05?
R,
Figure P5.36

5.36 Consider the inverting amplifier circuit of Figure P5.36.

a) Determine the voltage gain foux/^^iN with ideal behavior of the op
amp assumed.
b) What is the input resistance of the amplifier KiN/hN?
c) A variable-gain amplifier can be realized by using a variable resistor
for Ri. Determine the range of Rz necessary to vary the magnitude of
the gain from 1 to 10.

5.37 Suppose R3 = 0 in the circuit of Figure P5.36. Determine vout/pin and

din/^in for this condition. Assume ideal behavior of the op amp.
R 1 MD

Figure P5.38

^OUT

5.38 The input signal of the op amp circuit of Figure P5.38 is an ideal current
source.
a) Assume ideal behavior of the op amp and determine an equivalent
transfer resistance of the circuit, that is, pout/Hn-
b) What is wiN/hN for a finite difference amplifier gain Ad of 10^?
c) What is uin/fiN for Ad = 10^?
5.39 Repeat Problem 5.38 for a current source with an equivalent resistance
of 1 k^2.

PROBLEMS 359
 Figure P5.40

5.40 A linear potentiometer is used for an input level control (volume con¬
trol if an audio amplifier) of an inverting op amp circuit (Figure P5.40).
The parameter ol corresponds to the setting of the variable resistance tap
(0 < O' < 1). This results in a resistance of aRi for the lower portion of
the potentiometer and a resistance of (1 — a)Ri for the upper portion.
Assume ideal behavior of the op amp. Determine uout/i^in as a func¬
tion of the potentiometer setting a. What is the dependence of the input
resistance of the circuit uiN/fiN? on a?
5.41 Modify the circuit of Figure P5.40 so that the minimum value of Iuout/
uinI is 0.1. Assume ideal behavior of the op amp. (Hint: Use a resistance
in series with the lower end of Ri.)
5.42 A noninverting op amp circuit is used in conjunction with an input level
control (Figure P5.42). Assume ideal behavior of the op amp. Determine
the voltage gain uout/i^in and the input resistance uin/zin as a function
of a.
^IN

Figure P5.42

5.43 Design a circuit similar to that of Figure P5.42 that has a minimum volt¬
age gain of 0.1, a maximum gain of 20, and an input resistance of 1 Mf2.
5.44 The op amp circuit of Figure P5.44 has two inputs. Determine t^our as

/?4 100 kfl

Figure P5.44

360 NEGATIVE FEEDBACK AND OPERATIONAL AMPLIFIERS

 a function of ui and i>2. Suppose 5 percent tolerance resistors are used
for the circuit. Determine the maximum value of |2 uoui/lvi + V2)\, the
common-mode voltage gain, that could occur as a result of resistance
variations.

5.45 For the op amp circuit of Figure P5.44, determine i\ and /2 as a function
of vi and V2. Why is V2/i2 not a simple resistance?

/?2 10 kQ 100 kn

Figure P5.46

^OUT

5.46 Ideal behavior may be assumed for the op amp of Figure P5.46. Deter¬
mine uout/pin as a function of a. What is uout/i^in for R2 =

Vcc = 15V

Figure P5.47

5.47 Determine pout as a function of pin for the op amp circuit of Figure
P5.47. Assume ideal behavior of the op amp. What is pin/iiN?
5.48 Repeat Problem 5.47 with R2 connected to a supply of —10 V.
5.49 Consider the circuit of Figure 5.33 with Ri = 10 kf2 and R2 = 1 Mf2.

a) With ideal behavior of the op amp assumed, determine a value for C

that results in an upper half-power break frequency of 20 kHz.
b) Suppose the op amp has a gain-bandwidth product of 1 MHz. For the
capacitor determined in part(a), determine Vout/V^in for a frequency
of 20 kHz.
c) What is Vout/Vin for f = 20 kHz, C = 0, and a gain-bandwidth
product of 1 MHz?
5.50 Repeat Problem 5.49 for R2 = 100 k^2.
5.51 Repeat Problem 5.49 for R2 = 100 k^^ and an op amp with GBP =
5 MHz.

PROBLEMS 361
 ^in(0
_ y/H = 0.100 V
IH
V/L = -0.100 V Figure P5.52

T/2 ^ T = 1 ms
Vr

5.52 For the op amp circuit of Figure 5.33, Ri = 10 Ri = 1 and

C = 1.0 nF. Assume ideal behavior of the op amp and that the current
of Ri can be ignored. Determine and sketch youT(f) for the input volt¬
age of Figure P5.52. As a result of Ri, the steady-state value of uout(^)
will have a zero average value for an input voltage with a zero average
value.
5.53 Repeat Problem P5.52 with the current of Rz taken into account.

5.54 Suppose that the input square-wave voltage of Problem P5.52 does not
have symmetry, that is, Vjh = 0.110 V, and V/l = —0.090 V. Assume an
ideal op amp and that steady-state conditions prevail. Determine uout(0'
(Flint: Use superposition.)

10 kQ
100 k^2 Figure P5.55

100 pF

5.55 Consider the noninverting op amp circuit of Figure P5.55. Ideal behavior
of the op amp may be assumed.
a) Determine Vout/Vin as a function of frequency.
b) Determine the approximate frequency for which Vout/Vin is 3 dB
down from its zero frequency value.
c) Suppose the op amp has a gain-bandwith product of 1 MHz. What
is the actual response for the frequency determined in part(b)?
5.56 Repeat Problem 5.55 for C = 20 pF.
5.57 Repeat Problem 5.55 for C = 20 pF and GBP = 5 MHz.
R2 lOOkD

the op amp may be assumed. What is Vout/Vm for very high-frequency

362 NEGATIVE FEEDBACK AND OPERATIONAL AMPLIFIERS

 signals? What is it for very low-frequency signals? Obtain a frequency-
dependent expression for Vout/Vin- What is the value of Q that results
in a response that is 3-dB down from its high-frequency value for a fre¬
quency of 50 Hz?

5.59 For the circuit of Figure P5.58, assume C\ — \ jxV and ideal behavior of
the op amp. Determine an expression for Vout/Vin and the frequency for
which Vout/Vin is down by 3 dB from its high-frequency value. What is
the frequency at which the gain is down by 5 dB from its high-frequency
value?
5.60 For the circuit of Figure P5.58 assume Q = 5 /xF and ideal behavior
of the op amp. Determine a capacitance Ci connected in parallel with
R2 that results in an upper half-power frequency of 20 kHz. What is the
lower half-power frequency of the amplifier?
5.61 Consider the op amp circuit of Figure 5.55 in which Ri =4.7 and
1^2 = 100 k^2. What is the upper half-power frequency of the overall
response of the circuit for op amps with gain-bandwidth products of
3 MHz. What is the frequency at which the overall response is 1 dB less
than its low-frequency value?
5.62 The individual stages of a two-stage op amp circuit (Figure 5.55) have
different gains. The gain of the first stage is 10, whereas the gain of the sec¬
ond stage is 5. What is the overall half-power frequency of the two-stage
amplifier? Assume identical op amps with gain-bandwidth products of
5 MHz.

COMPUTER SIMULATIONS

C5.1 An ideal difference amplifier was used for the feedback amplifier cir¬
cuit of Example 5.3. Consider the case for which the difference ampli¬
fier has the same transfer characteristic as the power amplifier, namely,
v\ — A\VD\i — AiUpif for DDif > 0- Repeat Example 5.3 for this difference
amplifier. Compare the results obtained (i»in = 0.8 V, 0.9 V, and for a si¬
nusoidal input, = 0.9 V) with those for the linear difference amplifier.
C5.2 Consider the case for which an amplifier has a saturation that depends on
the cube of its input voltage, that is, four— A^v-i — A^v^. This function
is valid for both positive and negative values of v\. Repeat Example 5.3
for this amplifier in which Ai = 10 and A3 is chosen such as to result in
= 0 for uouT = 10 V.
C5.3 A source-follower amplifier using MOSEET devices with complemen¬
tary symmetry is used to drive an 8 ^2 loudspeaker (Figure C5.3). With
negative feedback and an input difference amplifier, the inherent distor¬
tion of the source followers can be significantly reduced,
a) Obtain a plot of the static transfer characteristic of the MOSFET
source-follower amplifier, that is, uout versus v\ for a ±15 V range
of V\.

COMPUTER SIMULATIONS 363

 ^DD - 15 V

+ kis[ = kp = 0.5 AfV^

+ Vtn = —Vpp =1.0 V
^IN 1=0
^OUT
Ad = 100

Figure PCS.3

b) Consider the case for which R2 of the difference amplifier feedback

network is connected to vi (no feedback for the MOSFET devices).
Obtain a plot of fouT versus pin for a ±2 V range of pin- Except
for the gain of the circuit, this characteristic should have the same
distortion as the MOSFET devices of the previous part.
c) Repeat part (b) with R2 connected to pout, thus including the MOS¬
FET devices in the feedback loop. A considerable reduction in distor¬
tion should occur.
d) Repeat part (c) using a difference amplifier with a larger gain, Aj =
1000.

Ecc = 15V

Figiu'e PC5.4

C5.4 Repeat Simulation C5.3 for a BJT emitter-follower amplifier with com¬
plementary symmetry (Figure C5.4). The cascaded emitter followers are
used to obtain sufficient output current. Assume /Sp = 100 for all tran¬
sistors and that their current scale factors T are such as to result in
base-emitter voltages with a magnitude of 0.75 V when the devices are
conducting. For conduction, assume the magnitude of pqut is 12 V.
C5.5 A simulation of the feedback amplifier of Problem 5.25 is desired. The
circuit of Figure C5.5 with ideal diodes is suggested for modeling the re¬
sponse of the nonlinear amplifier. Determine the component values for the
model and then obtain its static transfer characteristic to verify the design.
Use the difference amplifier and the feedback circuit of the problem to

364 NEGATIVE FEEDBACK AND OPERATIONAL AMPLIFIERS

 Figure PCS.5

determine the static transfer characteristic of the circuit. Also determine,

through a . TRAN simulation, the harmonic distortion for an input signal
that results in a peak output voltage of 15 V.
C5.6 An operational amplifier has a gain-bandwidth product GBP of 5 MHz
and a low-frequency gain A^o of 2 x 10^. The op amp is used in a non¬
inverting feedback amplifier circuit with Ri = 10 k^2 and Ri = 90 k^2 -
a circuit that results in an ideal gain of 10 for low-frequency signals.
a) With a SPICE simulation, show that the frequency-dependent re¬
sponse of this circuit is well behaved for signals with frequencies up
to 10 MHz. Verify that the upper half-power frequency fh is equal to
^GBP.
b) Suppose that as a result of a manufacturing defect the op amp has
a second break frequency of 200 kHz. Determine the frequency re¬
sponse of a feedback circuit using this op amp.
c) Consider the case in which the op amp of part (b) is used in a feedback
circuit with Ri = lkQ and Ri = 99 k^^, which results in an ideal low-
frequency gain of 100. Show that the response of this circuit is well
behaved.
d) Determine the phase margins of the circuits of parts (b) and (c). Be¬
cause the phase of Ad does not cross -180°, it is not possible to
determine a gain margin.
C5.7 Consider the case for a conventional amplifier (no feedback) with a dou¬
ble break frequency of 100 kHz and a low-frequency gain of 100. Use
an . AC SPICE simulation to determine the upper half-power frequency
of the amplifier. Use a .TRAN simulation to determine the rise time (10-
to-90 percent) of an input step function. What is the time required for
the output to reach 99 percent of its final value?
C5.8 The behavior of a particular amplifier can be characterized by three break
frequencies as follows:
_A^o_
(1 + ;Y//i)(i + /7//2)'

Ado = 1000, h = 1 kHz, fi = 100 kHz

Suppose that the amplifier is used in a feedback circuit with ^ = 0.1.
a) Use an .AC spice simulation to determine the frequency response
of the overall feedback circuit. What is the amount (expressed in

COMPUTER SIMULATIONS 365

 decibels) by which the peak in response exceeds the low-frequency
gain? What are the gain and phase margins of the feedback amplifier?
b) From the plots used to determine the gain and phase margins, deter¬
mine a reduced value of ^ that results in acceptable values of gain
and phase margins (Eq. (5.40)). Determine the frequency response of
a feedback circuit using this value of yd. What is the low-frequency
gain of the amplifier? What is the amount by which the peak in the
response exceeds the low-frequency gain?
C5.9 A SPICE simulation to determine the small- and large-signal behavior of
the difference amplifier circuit of Example 5.7 is desired. Assume iden¬
np = 1.0, and Is = 5 x 10“^^ A. With a
tical transistors with ySf = 100,
.DC SPICE simulation, determine the dependence of vqi and vo2 on v^.
From these plots, determine the small-signal voltage gains of the amplifier,
uoi/ui and uoi/wi. What is the range of vi over which the output voltages
are within 10 percent of the values predicted by a linear dependence on
ui?
C5.10 Consider the high-pass inverting op amp circuit of Figure P5.58 of the
problem set. For a particular audio application, the capacitor Ci has a
value of 0.2 /rF. The op amp has a gain-bandwidth product GBP of
1 MHz.

a) On the basis of analytic considerations, what is the lower half-power

frequency of the circuit? Use a SPICE .AC solution to verify this
result.
b) A . TRAN solution is desired for a periodic square-wave input voltage.
The input voltage varies between -0.5 and +0.5 V and has a fre¬
quency equal to the lower half-power frequency of the circuit fg. Ob¬
tain a solution for i^out(0 for at least four periods of the input voltage.
c) Repeat part (b) for square-wave input voltages with frequencies of
3fi and 10
d) Comment on the preceding results. On the basis of these results, es¬
timate the lower half-power frequency required for an amplifier that
is to provide a reasonable 100-Hz square-wave output voltage.

DESIGN EXERCISES

D5.1 The frequency response of a noninverting operational amplifier circuit is

to be within 1 dB of its low-frequency value at a frequency of 100 kHz.
A low-frequency gain of 20 (26 dB) is required. Determine the minimum
value of GBP required for the op amp and design a circuit to achieve the
desired response. Verify, using a SPICE simulation, that the response spec¬
ification is indeed satisfied for an op amp with the minimum GBP. Use
SPICE to determine the lO-to-90 percent rise time of the amplifier circuit.
D5.2 Design a deemphasis circuit similar to that of the one shown in
Eigure 5.49(b) in which the magnitude of the high-frequency gain is 0.1

366 NEGATIVE FEEDBACK AND OPERATIONAL AMPLIFIERS

 that of the low-frequency response. An input resistance of 100 k^2, is
desired and the magnitude of the low-frequency gain is 5. The lower
break-frequency f\ is 500 Hz. Use SPICE to verify that the response
does indeed fulfill the requested design parameters. Assume an op amp
with a gain-bandwidth product of 1 MHz. What is the upper half-power
frequency of the circuit?
D5.3 An amplifier with an upper half-power frequency fh\ of 10 kHz has been
used to amplify a pulse. This results in a response with a time constant
oiX/lit fh\. Design an amplifier circuit similar to the preemphasis circuit
of Figure 5.46 to “restore” partially the initial waveform of the pulse.
A resultant time constant that is only 10 percent of that of the first am¬
plifier is desired. The gain of the circuit used to restore the pulse should
be unity for low-frequency signals. Use a SPICE simulation to verify that
your circuit does indeed improve the waveform of the pulse.

Figure PD5.4

D5.4 A preemphasis circuit has the configuration of Figure D5.4. It will be

noted that the low-frequency gain —(2 Ri)!! ^i,/occurs while the high-
frequency gain is — R3/-R1. Design a circuit that has an input resistance of
50 kf2 and break frequencies (Figure 5.47) of /i = 1 kHz and fi = 3 kHz.
A low-frequency gain with a magnitude of 1 is desired. Suppose an op
amp with GBP = 5 MHz is used. What is the upper half-power fre¬
quency of the circuit? Determine the value for a capacitance Ch placed in
parallel with R3 that reduces the upper half-power frequency to 50 kHz.
D5.5 A deemphasis circuit is to be designed that can be used in conjunction
with the preemphasis circuit of Design Exercise D5.4. Design a circuit
using the same configuration of elements. The magnitude of the input
impedance is to be no less than 10 at any frequency, and a high-
frequency gain with a magnitude of 1 is desired.
D5.6 Design a deemphasis circuit to be used in conjunction with the preem¬
phasis circuit of Design Exercise D5.4 that has the configuration of Fig¬
ure 5.63(b). An input resistance of 50 and a high-frequency gain with
a magnitude of 1 are desired.
D5.7 If Design Exercises D5.4 and D5.5 (or D5.6) were done, use SPICE to
verify that the designs are valid. Also determine the response of the pre-
emphais circuit and the overall circuit for a 200 -/zs pulse.

DESIGN EXERCISES 367

 D5.8 A low-level ac-coupled amplifier with overall lower and upper half-power
frequencies of 40 Hz and 100 kHz, respectively, is desired. To operate the
amplifer from a single supply of only 5 V, an LM 358 with GBP = 1 MHz
has been chosen for the design. The input resistance of the amplifier
(1 kHz) is to be 100 kr2. Design a two-stage amplifier that meets the
design requirements and results in the maximum overall possible decibel
gain. Design a three-stage amplifier that provides the maximum possible
decibel gain. Use SPICE to verify the designs.
D5.9 A two-stage broad-band amplifer using noninverting op amps is to be
designed. Its lower and upper half-power frequencies are to be 20 Hz and
2 MHz, respectively. The midfrequency gain (1 kHz) is to be within 1 dB
of 20 dB. It is to have an input resistance of 10 k^2 (1 kHz), and it is to op¬
erate from a single supply voltage. Determine a circuit that achieves this
and specify the minimum GBP required for the op amps. Determine the
tolerance required for the feedback resistors (Ri and Ri of Figure 5.55)
so that the gain is maintained within ±1 dB of 20 dB for the worst-case
situations. Use SPICE to verify the design for the nominal component
values (minimum GBP) as well as for the worst-case resistance values
that result in gains of 19 and 21 dB.

368 NEGATIVE FEEDBACK AND OPERATIONAL AMPLIFIERS

 CHAPTER SIX

ELECTRONIC POWER SUPPLIES

Essentially all electronic systems require a nonvarying supply voltage (or cur¬
rent), that is, a dc voltage (or dc current). On the other hand, the electric power
supplied by utilities is characterized by an alternating voltage and current having
a sinusoidal time dependence. In North America, a frequency of 60 Hz is com¬
mon, whereas 50 Hz is used in most other areas of the world. Utility potentials
depend on the usage: residential service is 120 V (rms) in North America, whereas
220-240 V is common for residential service elsewhere.
A semiconductor junction diode allows a current in only one direction; its
reverse-biased current is negligibly small and can be ignored for nearly all appli¬
cations. Hence, a diode may be used to convert an alternating source of current
to a current with a single direction - a process generally referred to as rectifica¬
tion. For many electronic applications it is also necessary to transform the utility
voltage to a desired voltage using an iron-core transformer.
The resistor Rl of the power supply of Figure 6.1 represents the load to which
electrical power is to be supplied. The secondary voltage of the transformer
UTrans(^) is rectified by the diode, resulting in a load voltage VLoad(^) that has a
single polarity. The load current ULoadi^)/^! also has a single polarity.
The usefulness of the supply shown in Figure 6.1 is very limited because the
load voltage is zero for a significant portion of each period of the input voltage.
Although the supply could be used for charging a battery, a supply voltage with
extended off intervals is unsuitable for most electronic applications (imagine a
microprocessor trying to process data that are “lost” during each off interval).
A storage of electrical energy is required to sustain a load voltage (or current)
during these off periods. Both capacitors and inductors store electrical energy as
follows:

Fcapacitor = Finductor = (b-1)

Energy can be supplied to a capacitor, for example, when the transformer volt¬
age is positive, and when the transformer voltage is negative, the energy of the
capacitor may be used to supply power to the load resistor.
 ^ . , ^Load(0

+
utility
voltage ^Trans(0 ^
^Load(^)

transformer

Figure 6.1: An elementary power supply.

i[) D

utility
voltage ^Trans(0
c
r Rt
+
^Load(0

transformer

Figure 6.2: An elementary power supply with a capacitor filter.

Consider the circuit of Figure 6.2 in which a large capacitor has been con¬
nected in parallel with the load resistor of the previous circuit. Whenever the
transformer voltage is greater than the load voltage, the diode conducts, result¬
ing in a diode current /d- This current (a flow of charge) will charge the capacitor.
However, when wiransl^) falls below ULoadi^)? tbe diode will be reverse biased and
its current will be zero. During this interval, the capacitor, if sufficiently large,
will be slowly discharged by the load resistor. Although the load voltage shown
in Figure 6.2 has a small variation with time, it is suitable for many electronic
applications. Large electrolytic capacitors (capacitances of hundreds if not thou¬
sands of microfarads are common) are generally used to minimize the amplitude
of the voltage fluctuations. This function performed by the capacitor is known
as filtering, that is, reducing the unacceptable fluctuations of a supply without
an energy storage element.
A modern power supply will generally utilize an electronic regulator, a circuit
using transistors (often fabricated as a single integrated circuit), that will not
only further reduce the load voltage fluctuations of the filter but will tend to
compensate for changes in load current. The basic elements of an electronic power
supply are indicated in Figure 6.3. Often the rectifier will be more complex than
a single diode - a bridge rectifier consisting of four diodes (usually on a single
integrated circuit) is common. In addition to filters using a single capacitor, a
resistor- or inductor-capacitor combination may be used.

Figure 6.3: Basic elements of an electronic power supply.

transformer rectifier filter regulator load

370 ELECTRONIC POWER SUPPLIES

 Chemical batteries will be discussed in the last section of the chapter. With the
development of extremely low-power integrated circuits, numerous electronic
systems, including remote control units, tape and CD players, cellular phones,
and note-book computers are now powered by self-contained batteries. As power
requirements are further reduced for electronic circuits, more battery-powered
electronic systems can be expected.

6.1 RECTIFIERS: FROM ALTERNATING TO DIRECT CURRENT

The importance of being able to convert alternating current supplied by electric
utilities to direct current required by electronic circuits was stressed in the intro¬
duction to the chapter. Although in the past vacuum tube diodes were used for
rectification, now it is the silicon semiconductor junction diode that is used for
essentially all electronic applications. Power levels of rectifier circuits vary from
a few milliwatts to thousands of watts. Semiconductor junction diodes range
from a microscopic size for microampere currents of integrated circuits to large
waste-basket size discrete diodes for currents of thousands of amperes.

THE HALF-WAVE RECTIFIER

The circuit of Figure 6.4, with a transformer that has a sinusoidal secondary
voltage of UTransi^)? will be used to develop a quantitative perspective of the
rectification process.

fTrans(^) — Sm Ct)? (6.2)

It will initially be assumed that the diode of the circuit can be replaced with
an ideal diode model, that is, the forward-biased voltage of the diode will be
assumed to be zero. Hence, the load voltage will be equal to the transformer
voltage whenever the transformer voltage is positive and zero otherwise.

Vtn sin (Dt for sin a)t>Q

*^Load(^) — (6.3)
0 otherwise

Because only the positive “half” of the transformer voltage is, in effect, used, this
circuit is known as a half-wave rectifier circuit, and the corresponding output
voltage of Figure 6.4 is described as a half-wave rectified voltage.
The average value of the load voltage V^v and load current l^y, which are the
voltage and current that a conventional digital multimeter would indicate (dc
range), are of interest. The average current, if multiplied by the time for which
the circuit operates, yields the quantity of charge that flows through the load.

Figure 6.4: A half-wave rectifier circuit and load voltage for an ideal diode.

^ . , Aoad(0

utility
-f IT- -t-

voltage ^Trans(0 S ^Load(0

transformer

6.1 RECTIFIERS: FROM ALTERNATING TO DIRECT CURRENT 371

 This quantity is of interest when designing a rectifer to charge a battery. The
average value of a periodic quantity such as r’Load(^)5 is defined in terms of the
area under the time-dependent curve as follows:

V
''av T —
^ — ^Load(^) (6.4)

The left-hand side of Eq. (6.4), VavT, is the area of a rectangle of height Vav and
width of one period. The right-hand side is the area under the load voltage curve
(both have the dimension of volt-seconds). Although the limits of 0 and T have
been used for the integral, any interval of T seconds (from to to to + T) may be
used because the function is periodic. For the half-wave rectified voltage obtained
using an ideal diode model, Vav naay readily be determined as follows:

1 Vn
Vav = Y Jq ^i^oad(t)dt= Y sm cot dt

= -^/ sm(otd(ot=^ sinede

(oT Jo (oT Jo
= IVtnIcoT — (6.5)

In the preceding expression, it was recognized that the period T is defined such
that when t = T, the argument of the trigonometric function specifying the
transformer voltage is Itt. Hence coT is equal to Itt. The average value of
the load voltage is slightly less than one-third the peak amplitude of the load
voltage.
For the ideal diode model to yield a reasonably accurate result, it is necessary
that the peak transformer voltage V« be large compared with the diode’s forward-
biased voltage. If this is not the case, the constant forward-biased voltage diode
model should be used for a more accurate result. This reduces the load voltage
(Figure 6.5).
r V„ sin cot - VD{on) for sin cot -
Vm VD(on) >0 ,^
»^Load(^) = S . (6.6)
fO otherwise
The average load voltage is also reduced.

Vav = Y Vi^oad{t)dt

1
Figure 6.5: The effects of a forward- = J (v« sincof - UD(on)) dt
biased diode voltage of VD(on) on the
load voltage of a half-wave rectifier
circuit. = Y J {Vm sin cot - VD{on)) dt (6.7)

The quantities ti and ti are the times at which the argu¬

ment of the integrals is zero.

Vm Sinwti - VD{on) = 0,
di = coti = sin“^ {vD(on)/Vr„) (6.8)

A substitution of 6 = cot and 6>i = cot-[ results in the

372 ELECTRONIC POWER SUPPLIES

following:

1 r^/2 1
Vav = - / {Vm sine - VD{on)) de ^ [-Vm COS0 - VB(on)e]l['^
^ J 9\ 7t
1
= - [y^ cos - VD(on){7T/2 - 0i)] (6.9)

It should be noted that for i;D(on) = 0, 0i = 0, and I4v = the same result as
for an ideal diode. For small values of transformer voltage, the forward-biased
diode voltage is significant. For = 7 W and i;D(on) = 0.7 V, VD(on)/Vm = 0.1
and 01 = 0.1 (5.74°). This results in a value of 1.94 V for Vgv as compared with
the 2.22 V (I^/tt) obtained if the ideal diode model is used.

FULL-WAVE RECTIFIER - A CENTER-TAPPED TRANSFORMER

A significant improvement in the load voltage may be achieved by utilizing
the negative half of the transformer voltage. Consider the circuit of Figure 6.6 in
which a transformer with a center-tapped secondary winding is used in conjunc¬
tion with two diodes. If this circuit did not include D2 (an open circuit), the same
behavior as that of the half-wave rectifier of Figure 6.4 would be expected. The
transformer voltage vsit) is positive during the interval when VA{t) is negative,
and ULoadi^) would be zero for D2 removed from the circuit. However, with the
diode Dz in the circuit, Dz will be forward biased when vsit) is positive, resulting
in a load voltage i>Load(^) = ^sit) during this interval (ideal diode assumption).
The net result, as shown in Figure 6.7, is a load voltage that is described as a
full-wave rectified voltage. The half period during which fLoadi^) = 0 for the
half-wave rectifier circuit is eliminated.

Figure 6.6: A full-wave rectifier using a transformer with a center-tapped secondary

winding.

Aoad(0
M
+
„ ^ ^Load(0
utility V^(t) = Vfn sin cot
voltage
VB{t) = — Ym sin cot
\ + M

Dz

Figure 6.7: The transformer voltages and load voltage of a full-wave

rectifier circuit.

^Load(0

6.1 RECTIFIERS: FROM ALTERNATING TO DIRECT CURRENT 373

 The average load voltage, if ideal behavior of the diodes is assumed, may
readily be determined.
.T rTH rT
VL02.d(t) dt ^ sincotdt-Vm smcotdt
Jo Jo Jt/1
2y fT/2
Vav =-7^ / sin^t)^d^ = 2A4*/7r
T Jo
The average load voltage for a full-wave rectified sinusoidal voltage is, not surpris¬
ingly, twice that of a half-wave rectified voltage (the area under the load voltage
curve for one period of the transformer voltage is twice as great). It should also
be noted that the period of the load voltage is T/2; hence, its periodic frequency
is twice that of the transformer voltage. For a 60-Hz utility voltage, the frequency
of the load voltage of a full-wave rectifier circuit is 120 Hz.
Although the forward-biased voltage of the diodes reduces the average load
voltage, the average full-wave rectified voltage for a diode voltage of VD{on), is
twice that of the half-wave rectified voltage of Eq. (6.9).

Vav = -[Vm COS 61 - VD(on){^/2 - )]

71 (6.11)
0\ = sin”^ {vb{ on )/ ^m)

As for the case of a half-wave rectifier circuit with small values of the forward-
biased voltage of the diodes has a significant effect.

FULL-WAVE RECTIFICATION - A BRIDGE RECTIFIER

Another rectifier circuit that is used to obtain full-wave rectification is the
bridge rectifier. The term bridge is derived from the similar configuration of a
19th-century measuring circuit invented by Samuel Christie and improved upon
by Charles Wheatstone. Consider the circuit of Figure 6.8, which uses a bridge
rectifier consisting of four diodes. (It is common for the diodes of a bridge rectifier
to be drawn at a 45° angle as opposed to being vertical or horizontal as is the
generally accepted custom for circuit diagrams.) The operation of the circuit may
best be understood by determining the current paths that correspond to UTrans(^)
being positive or negative. For a positive value of UTrans(^) and hence, /Trans(^)5
the current path is through Di (D4 will not allow a current in this direction),
through the load resistor (a downward direction on the circuit diagram), and
through diode D3, thus completing the current’s path back to the transformer.

Figure 6.8: A full-wave bridge rectifier circuit.

^Trans(0

374 ELECTRONIC POWER SUPPLIES

 (a) t^Xrans(0 ^ ® (b) ^TransCO <0

Figure 6.9: The current paths of a bridge rectifier.

This path, shown in Figure 6.9(a), results in a positive load voltage. It may readily
be demonstrated that diodes D2 and D4 are reverse biased for this condition,
which justifies the assumption that their currents are zero.
Consider now the case for a negative transformer voltage (Figure 6.9(b)). For
a transformer current in the opposite direction, that is for /Trans(0 negative, the
current path from the transformer is through Di to the load resistor, through
the load resistor (again, in a downward direction on the circuit diagram), and
through D4 back to the transformer. For this case, diodes Di and D3 are reverse
biased. The load voltage, owing to the altered circuit path, is again positive.
Hence, the load voltage is the same as that of Figure 6.7 (ideal diode behavior).
The bridge rectifier diode circuit, in effect, switches the current path according
to the polarity of the transformer voltage. As a result, the direction of the load
current is always the same (/Load(^) ^ 0)-
Figure 6.10 is an alternative representation of a bridge rectifier circuit. Through
a comparison of the circuits of Figures 6.8 and 6.10, one should be able to verify
that they are indeed electrically identical. From Figure 6.10, it may be seen that
when UTrans(^) is positive, the current path is through the outer two diodes,
Di and D3, and the other diodes are reverse biased. However, when fTransl^)
is negative, the path is through the diagonally drawn diodes Dj and D4, thus
altering the current path to the load. Diodes Di and Di are reverse biased for this
condition.
The advantage of a bridge rectifier circuit is that a center-tapped transformer
secondary winding, a winding that requires twice the number of turns of a
noncenter-tapped winding, is not required. On the other hand, regardless of

Figure 6.10: An alternative rep¬

resentation of a bridge rectifier
circuit.

6.1 RECTIFIERS: FROM ALTERNATING TO DIRECT CURRENT 375

 the current path, a bridge rectifier has two forward-biased diodes in series with
the load resistor. Using the constant voltage model results in a load voltage re¬
duction of 2i;D(on) as opposed to only i>D(on) for the center-tapped transformer
circuit. This
(f \ _ sinw^| - 2uD(on) for |U„ sina;?| - 2i;D(on) > 0 (6.12)
^Loadl ) — Otherwise

The magnitude operation yields the correct load voltage for both polarities of
transformer voltage.
The average load voltage of a bridge rectifier may be obtained by replacing
VD(on) of Eq. (6.21) with 2i;D(on).

14v — [Un COS 01 2Uj[)(on)(^/2 13)

0\ — sin (2u£)(on)/

For Vm = 7.0 V and i'D(on) = 0.7 V (the same values as used with the half-wave
rectifier circuit), 0\ = 0.201 rad (11.54°) and \4v = 3.15 V. From the ideal diode
model, an average load voltage of 4.46 V is obtained.

EXAMPLE 6.1
For diode circuits, a knowledge of the diode voltage when it is reverse biased
is important because diodes are limited by the voltage that they can withstand
without being permanently damaged. It is important that a diode with a suffi¬
ciently large inverse voltage capability be utilized for rectifier circuits. Assume
ideal diode behavior for the following circuits:
a. Determine and sketch the diode voltage voit) of the half-wave rectifier
circuit of Figure 6.4. What is the peak inverse voltage of the diode?
b. Repeat part (a) for the diodes of the full-wave rectifier circuit of Figure 6.6.
c. Repeat part (a) for the diodes of the bridge rectifier circuit of Figure 6.8.

SOLUTION
a. The following is obtained for the instantaneous diode voltage voit):

UTrans(^) = Vm sincot, Voit) = UTrans(^) “ l^Load(^)

for 0 < ? < T/2 : l>Load(0 ~ ^Trans(^)> 1^d(0 ~ 0

for T/2 <t <T: ULoad(^) = 0, voit) = Vm sin^u^

The peak value of the diode inverse voltage is Vm (Figure 6.11).

^Trans(0

Figure 6.11: t)iode voltage of

half-wave rectifier of Example
6.1(a).

376 ELECTRONIC POWER SUPPLIES

Figure 6.12: Diode voltage of full-
wave rectifier of Example 6.1(b).

^Dl(0/ ^D3(0 ^D2(0/ ^D4(0

T/2 T/2
f
/ T
Figure 6.13: Diode voltage of full-wave bridge rectifier of Example
6.1(c).

b. The following is obtained for VDi{t), the instantaneous voltage across Di

of Figure 6.6:
VA(t) = Vnt sinw?, VB(t) = -Vm sina;^, Voiit) = VaU) - VLoad(0

for 0 < t < Tjl: ULoadif) = VDlit) =0

for T/2 <t < T:PLoad(^) = VDi{t) = 2VmSmcot

The voltage Vd2(^) is obtained in a similar fashion.

VDlit) = VB{t) - ULoad(^)

for 0 <t < T/2:vioadit} = VA{t), VDlit) = -2y^sinw^

for T/2 <t <T: ULoadiO = VBit), VDlit) = 0
The peak value of the diode inverse voltage for both diodes is 2y„ (Figure
6.12).
c. For the interval 0 < t < Tf 2, diodes Di and D3 of the bridge rectifier
are conducting. Hence, VDiit) = VDiit) = 0. As a result, D2 and D4 are
connected in parallel with the transformer and load resistor
VDlit) — VD4it) — t)Xrans(^) “ sin Ct)^
For the interval Tf2 < t < T, diodes Dj and D4 are conducting. Hence,
VDlit) = VD4it) = 0, and diodes Di and D3 are now in parallel with the
transformer and load resistor.
VDlit) — VDsit) — t’Trans(^) — VffiSmcot
The peak value of the diode inverse voltage of all diodes is Vm (Figure 6.13).

EXAMPLE 6.2
Consider the half-wave rectifier of Figure 6.4 with Vm — 10 V, Rl = 100
and VD{on) = 0.7 V. Because the peak transformer voltage is not very large, use
the constant forward-biased voltage diode model.
a. Determine the average load voltage and load current 7av
b. Determine the average power dissipated by the load resistor.
c. Determine the average power dissipated by the diode.

6.1 RECTIFIERS: FROM ALTERNATING TO DIRECT CURRENT 377

 SOLUTION
a. Equations 6.8 and 6.9 will be used to determine the average load voltage
and current.
6i = sin-^ (uD(on)/ Vm) = 4.01° (0.070 rad)

Vav = — [Mn COs6i - UD(on)(7r/2 - 6>i)] = 2.84 V

7t

lav = Vay/Rt = 28.4 mA

b. The average power Pav dissipated by the load resistor is the average of the
instantaneous load power /Load(^)^^Load(0:

1 1 2
Pav ~ ^J Toad(^)^Load(0 Rj^T Jq ^Load^^^^^

It should be noted that the average power is not equal to the product of the
average voltage and current. From the expression for ULoad(^) of Eq. (6.6),
the following is obtained:
1 2
Pav = / (Vm sin cot - VD(on)) dt
Rii Jh
1 2
= y;- / {ym sin6 - Vo(on)) dO
Rl^ Je^
/ 1
+ -sm26i 2.VffjVD(on) COsOi
Rltc

= 0.208 W

c. The average power dissipated by the diode Poav depends upon its instan¬
taneous current and voltage as follows:
1 /-T I rh
PDav=jj^ iD{t)VD{t)dt = Y j iD{t)VDit)dt

— ^D(on) Y I w(t)dt = VD(on)hy = 19.9 mW

To obtain the final result, it was noted that /d(^) = fLoad(^)-

EXAMPLE 6.3
A SPICE simulation of the full-wave bridge-rectifier circuit of Figure 6.8 is
desired.

i^Trans(0 = sin27r/■^, V,„=16V, /■ = 60 Hz

Rl = 50^, T =5x10-“ a, w = 1.4

Identical diodes with the preceding parameters are used in the circuit. Deter¬
mine the average load voltage Vav and the average power dissipated by the
load resistor and by each of the diodes.

378 ELECTRONIC POWER SUPPLIES

 Bridge Rectifier
VT 1 2 SIN(0 16 60)
D1 1 3 DIODE
D2 2 3 DIODE
D3 0 2 DIODE
D4 0 1 DIODE
RL 3 0 50
.MODEL DIODE D IS=5E-11 N=1.4
.TRAN .IM 25M 0 .IM
.PROBE
.END
Figure 6.14: Circuit and SPICE file of Example 6.3.

SOLUTION The circuit and corresponding SPICE file of Figure 6.14 will be used. A
sinusoidal voltage specification is required for the transient analysis (0 offset,
16-V peak value, and 60-Hz frequency). The .TRAN statement yields data
points every 0.1 ms for a duration of 25 ms (3T/2 = 25 ms for f — 60 Hz). A
zero no-point value has been specified, and the step ceiling was set to 0.1 ms.
It has been the author’s experience that for a reasonably accurate simulation
of a sinusoidal signal, a step ceiling of one-hundredth of a period or less is
required. Figure 6.15 is obtained for the load voltage and its average. The
peak load voltage of 14.4 V implies a peak forward-biased diode voltage of
0.8 V. The “running” average, AVG, of a function x(t) is given by the following
intergal:

1
AVG(x) = - / x(t') dt'
t Jo
Although the period of the transformer voltage is 1/f (16.67 ms), that of the
load voltage is one-half this value, namely, 8.33 ms. An evaluation of the AVG
term at 8.33 ms or any integer multiple of 8.33 ms results in the actual

Bridge Rectifier
Temperature: 27.0

Time

6.1 RECTIFIERS: FROM ALTERNATING TO DIRECT CURRENT 379

 average value of the term, that is, a value of 8.66 V for \4v The average
load power is obtained from the running average of i’Load(^)^Load(^)? that is,
V(3)*I(RL). Its value is 1.96 W. The average power dissipated by Di is
obtained from the running average of V(1,3)*I(D1). A time interval of T,
16.67 ms, is required for this condition because this is the period of the diode
voltage and current. A value of 69.4 mW is obtained for the average power
dissipated by Di as well as for each of the other diodes.

6.2 FILTERS: REDUCING LOAD-VOLTAGE FLUCTUATIONS

In the introduction to the chapter it was pointed out that an energy storage
element is required for an electronic power supply. A capacitor, for example, can
supply energy to a load during intervals when the voltage of a rectifier circuit
would otherwise be inadequate. This process of alternately storing and then
supplying energy to minimize load-voltage fluctuations is known as filtering.

CAPACITOR FILTERS - HALF-WAVE RECTIFIERS

The half-wave rectifier circuit of Figure 6.2 with a capacitor filter will initially
be considered to obtain a quantitative perspective of its behavior. In the previous
section, the transformer secondary voltage of a power supply was assumed to
have a sinusoidal time dependence. This tends to be a reasonable approximation
for rectifier circuits without a filter.
Capacitor filter circuits, however, tend to result in large peak values of diode
currents that distort the secondary transformer voltage (an ideal transformer
model is not a reasonable approximation for most power supply circuits). The
distortion is the result of an equivalent inductance and resistance of the secondary
winding of the transformer. Furthermore, as a consequence of the nonlinear mag¬
netization characteristic of an iron core, these equivalent elements have a non¬
linear characteristic. Even though a knowledge of these effects is important for
analyzing and designing power supply circuits, adequate data are generally not
available. As is not infrequently the case for electronic circuits, an experimental
procedure must ultimately be used.
Although it is recognized that the input voltage provided by a transformer of
a rectifier-filter circuit is not sinusoidal, a sinusoidal input voltage will be used
for an initial analysis. The result of this analysis will provide a perspective from
which a more refined treatment will be possible. Furthermore, a sinusoidal input
voltage approximation yields a reasonable quantitative measure of the fluctu¬
ation in the output voltage. Consider
Figure 6.16: A half-wave rectifier circuit with a capacitor the circuit of Figure 6.16. A constant
filter. forward-biased voltage diode model
(a voltage of I’d (on)) will be used, and it
will be, for convenience, assumed that
+
the capacitor voltage ULoadlO, is zero
V„i sin ^Load(0
at ^ = 0. As a result of the step func¬
tion u{t), the ideal voltage source is

380 ELECTRONIC POWER SUPPLIES

zero for t < 0 and “turns on” at t = 0. When the
voltage reaches UD(on)) the diode will conduct,
and fLoadi^) will initially be equal to Vm sin cot—
VD(on)- During this interval the capacitor will be
charged (its current, which is proportional to
the derivative of its voltage, will be positive).
Its stored energy, will increase. This
occurs for the time interval up to T/4 (Figure
Figure 6.17: Input and load voltage of a half¬
6.17).
wave rectifier and filter.
If the diode continues to conduct after t =
T/4, the load voltage will tend to follow the input voltage back downward.
Except for extremely small values of capacitance, a negative diode current would
be required for this to occur. At a time just slightly greater than T/4 (indicated
at ti), the diode current becomes zero, and the diode ceases to conduct - its
voltage becomes less than i’D(on)' When this occurs, the diode and input voltage
source are, in effect, removed from the circuit, resulting in the equivalent circuit
of Figure 6.18.
The capacitor is discharged by the load resistor during the interval over which
its voltage i»Load(^) remains greater than Vm sinwf — VD(on), that is, up to the
time t2.

vlo^M = «, < t < (6-14)

The time h and peak value Vp can be obtained by determining the time at which
the diode current becomes zero. For the large capacitance values generally re¬
quired for a power supply, the voltage Vp will be extremely close to - I'd (on),
and h will be extremely close to T/4. Although the maximum value of ULoadiO,
Vp, occurs SLtt = h, its minimum value Vmin occurs at ? = ti-

V . _ V
* min —
=Vp- V„i„ = Vp(l - <.-''>-'■1/'''-=) (6.15)

The quantity vl p~p is the peak-to-peak variation in the load voltage - a quantity
generally known as the peak-to-peak ripple voltage. After the first period of the
input voltage, the load voltage will also be periodic.
The peak-to-peak value of the ripple voltage depends on the filter capacitor of
the circuit (the larger its capacitance, the smaller the ripple). Concurrently, as the
capacitance is increased, the discharge interval t2 t\ also increases, approaching,
but not quite reaching, a full period of the input voltage T (ti ~ 5T/4). A gener¬
ally accepted approximation used for analyzing and designing power supplies is

Figure 6.18: The exponential discharge of a filter capacitor.

^0(0 ~ 0 ^'Load(^)

exponential
discharge
-j. t
h

6.2 FILTERS: REDUCING LOAD-VOLTAGE FLUCTUATIONS 381

 to let t2 — h equal T as follows:

(6-16)
Because T is slightly greater than t2 — h, this approximation predicts a peak-
to-peak voltage slightly larger than its actual value. This is appropriate when
designing a power supply because one usually needs to ascertain the value of
capacitance that results in a peak-to-peak ripple voltage that is not greater than
a prescribed value.

.T'/RlC _ _-
^VLp-p/Vp,
1 - VLp-p/Vp
(6.17)
C

Although the value of capacitance given by Eq. (6.17) will be slightly in error,
the error will always be on the high side. Hence, if a capacitor of this value is
used, the resultant value of ULp-p will fulfill the design requirement.
A simplified expression, requiring another approximation, is normally used
for relating the peak-to-peak ripple voltage to the filter capacitance. For most
electronic applications a value of vl p_p that is small compared with Vp is desired.
This requires that the exponential term of Eq. (6.16), be close to unity,
which, in turn, requires the exponent T/RiC to be small compared with unity.
Hence, the following approximations may be used:
c-t/RlC ^ I _ T/RpC for T/RlC « 1
VpT V, \ T (6.18)
VLp-p C
RlC' ’^Lp-p) Rl

The same result is obtained from Eq. (6.17) if vip-p/Vp is assumed small
compared with unity:

In ln(l -f- vip-p/ Vp) ~ vip-p/ Vp

^Lp-p! vp
(6.19)
c Vp ] T
^Lp—pJ

Because relatively large capacitances are usually required, electrolytic-type capac¬

itors are generally used for power supplies. Commercially available electrolytic
capacitors have relatively large capacitance values even though they are physi¬
cally fairly small (electrolytic capacitors with values of 1 ^tF up to 10,000 /zF
and greater are common). These capacitors, however, are characterized by very
wide tolerance specifications. Although a tolerance of —10 percent, -1-50 percent
is not uncommon, many catalogues do not even give a tolerance specification.
Furthermore, only a very limited set of capacitance values are generally available
(1, 2.2, 4.7, 10 /xF, etc., may characterize a particular manufacturer’s offering).
Therefore, it may be necessary to use a capacitance with a nominal value that is
as much as 100 percent greater than actually needed. Hence, the use of approx¬
imations is justified.

382 ELECTRONIC POWER SUPPLIES

 Figure 6.19: A full-wave rectifier with a capacitor filter.

CAPACITOR FILTERS - FULL-WAVE RECTIFIERS

The peak-to-peak ripple voltage of a power supply can be reduced by increas¬
ing the size of the filter capacitor. Concurrently, a decrease in the period T will
also reduce the peak-to-peak value of the ripple voltage. Although the frequency
( /■ = 1/T) of a supply voltage may be a given (for example, a particular utility
system), a full-wave rectifier has a similar effect in that the time interval over
which the capacitor needs to supply energy is reduced.
Consider the full-wave rectifier and filter circuit of Figure 6.19 that results
in the load voltage of Figure 6.20. Up to diodes Di and D3 conduct,
resulting in a load voltage that reaches a peak value of Vm — 2i;D{on)' During the
conduction interval, the capacitor is charged (its current is positive). From t\ to
?2, the load voltage is greater than \ Yn,sm(ot\ — 2i;D(on) and, as a result, none
of the diodes will be conducting. The same type capacitor discharge as for the
ti is now less than
half-wave rectifier occurs except that the time and the
interval ti — h is less than T/2. From an approximation of h - h ^ T/1, the
following is obtained for the peak-to-peak ripple voltage:

VLp-p = Vp- V„i„ = Vp{l - « Vp{l -

^ fo"- «i-C » T/2 (6.20)

On the basis of these approximations, the peak-to-peak ripple voltage for a given
capacitance and other circuit components, is only one-half that of the half-wave
rectifier. As a result, full-wave rectifiers are nearly always used for electronic
power supplies.
The next step in developing an understanding of the operation of a rectifier-
filter circuit is a determination of the currents of the circuit. Consider the full-wave
rectifier circuit of Figure 6.19. The current of
C and Rl is equal to the currents of diodes D\ Figure 6.20: Load voltage of a full-wave rectifier
and D2 as follows: and filter.

dl^Load(f) , ^^OUT
tDlit) + iDlit) = C -f
dt Rl
(6.21)

When diode Di is conducting, i’Load(f) =

y„,sina;^ - 2vD(on), and the current of Di is

6.2 FILTERS: REDUCING LOAD-VOLTAGE FLUCTUATIONS 383

 m

(a) diode current

Figure 6.21: Diode and input current of bridge rectifier and filter circuit.

zero:

ioiit) = coCVn, cos cot + cot-2vD(on))/RL for Di Conducting (6.22)

This occurs for the initial increase of the input voltage {to < t < ^i) as well
as for succeeding brief intervals when Di is conducting (Figure 6.21(a)). When
Dz is conducting, i'Load(0 = —VmSincot — 2uD(on)? and the current of Di is
zero:

ioiit) = -coCVmCoscot + (-Vasina;? - 2vD{on))/Rl for Dz conducting

(6.23)

This current is also indicated in Figure 6.21(a).

After the initial transient charging current {t <ti), the diode currents are peri¬
odic. The currents alternate: /di(^) > 0 when the input voltage Vm sin cot is near
its maximum value and /d2(^) > 0 when the input voltage is near its minimum
value. The current of the voltage source i{t) depends on the diode currents as
follows:

i{t) = iD\{t) - imit) (6.24)

Because Dz and D4 conduct simultaneously,

ioiit) — imit), i{t) = iDiit) — iDiit) {6.15)

This results in the input current of Figure 6.21(b). After the initial transient, the
current is periodic and consists of narrow “spikes” as opposed to the sinusoidal
current that would result if were connected directly to the voltage source.

A NONIDEAL TRANSFORMER

An elementary equivalent circuit model of an iron-core transformer includes an

equivalent secondary resistance and inductance (Figure 6.22). The series elements
Rj and Lj affect the transformer’s terminal voltage UTrans(^)-
diX it)
^Trans(0 — \4jSin(Z)^ f^T^TranslO — Rj-- (6.26)

The transformer current, however, is not that of Figure 6.21(b) because the

384 ELECTRONIC POWER SUPPLIES

 Rj Lj ilransCO

AVv—'7505''-^

utility secondary sin cof ^Trans(0

voltage

transformer secondary equivalent circuit

Figure 6.22: Elementary model of a power transformer.

input voltage of the rectifierns uiransl^)? not ^4^sin&)^. A solution for the cur¬
rents and voltages of the circuit requires that the equivalent-circuit elements of
the transformer be taken into account when solving the circuit. This is most
readily achieved with a numerical simulation.
Consider the circuit of Figure 6.23 in which an equivalent circuit is utilized
for the transformer. A transient voltage specification and analysis statement
is required with the .TRAN statement providing a solution for a time interval
of 100 ms, that is, five periods of the 50-Hz supply voltage. Along with the

Figure 6.23: A rectifier-filter circuit with an equivalent transformer circuit.

Rj 2 I'T ^TranslO

= 12 V Rt = AQ. Lj = 10 mHy
= 50 Hz Ri = 100 Q Cl = 1000 /uF
J5 = 0.1 /uA n—2

Rectifier and Filter

VI 1 5 SIN(0 12 50)
RT 1 2 4
LT 2 3 .01
D1 3 4 RECTIFIER
D2 5 4 RECTIFIER
D3 0 5 RECTIFIER
D4 0 3 RECTIFIER
CL 4 0 IM
RL 4 0 100
.MODEL RECTIFIER D IS^
.TRAN . 2M lOOM 0 .2M
.PROBE
.END

6.2 FILTERS: REDUCING LOAD-VOLTAGE FLUCTUATIONS 385

 Rectifier and Filter transformer voltage V(3,5), the
Temperature; 27.0 sinusoidal input voltage V(l,5) is
15V + included on the Probe graph of
Figure 6.24 for a comparison. The
distortion, the result of the series
elements Rj and Lj is readily ap¬
parent. The load voltage is also in¬
dicated - it is about 1.5 V less than
the peak transformer voltage. It is
not until after approximately 40 ms,
that is, two periods, that a steady-
state periodic solution is obtained.
Figure 6.25 provides a detailed
view of the periodic response (t >
Time
50 ms), which yields the following
Figure 6.24; SPICE solution for load and input voltage of rec¬ data:
tifier-filter circuit.

PLmax = 8.83 V, PLmin = 8.34 V, Ul p-p = 0.49 V

^Transmax — 0.294 A, fTransmin — 0.294 A (6.27)

^pulse width ~ ^
Although the “width” of the spikes is greater than that for a sinusoidal voltage
source (Figure 6.21(b)), the peak current remains considerably greater than that
which would occur for a simple resistive load (0.294 A compared with a current
of about 12 V/104 ~ 0.12 A for Ri connected directly to the transformer).
The SPICE simulation results of Figures 6.24 and 6.25 are typical of those
that are experimentally obtained for a transformer-powered rectifier-filter cir¬
cuit. As a result of the distortion of the transformer voltage, the peak load
voltage is generally much less than that which would be expected based on
the open-circuit voltage of the trans-
Figure 6.25: SPICE solution for the input current of the rec¬
tifier-filter circuit. former {Vm - 2uD(on))-
For an actual transformer circuit,
Rectifier and Filter
Temperature: 27.0
another problem arises that further
complicates an analysis. The mag¬
netic flux of the transformer for large
currents is not linearly dependent on
the current. Although this effect can
be approximated with a nonlinear
series resistance and inductance, this
is seldom done when designing a
power supply because the required
transformer parameters are gene¬
rally not available. Instead a set of
laboratory tests is required. Past ex¬
perience, however, does provide a
Time reasonable starting point for the

386 ELECTRONIC POWER SUPPLIES

design of a power supply. For a power transformer with a power rating that is ap¬
proximately equal to the power dissipated by Ri (the equivalent load resistance),
the peak load voltage is found to be approximately equal to the specified rms
value of the secondary voltage (VmlVl). This cannot be “proven” from circuit
considerations; it is simply an engineering rule of thumb that is reasonably valid.

EXAMPLE 6.4
The half-wave rectifier circuit of Figure 6.26 is essentially that of the diode
radio detector of Figure 1.3 in which the input voltage vc{t) is an amplitude
modulated signal. Assume vc{t) — Ycsmlit ft, where is the amplitude of
the carrier that, as a result of the modulation, changes slowly with time.
a. Determine the value of Q for which the load voltage vuit) has a peak-to-
peak ripple voltage that is approximately 10 percent of its peak value (14
constant).
b. What are the values of Q required to reduce the ripple voltage to 5 percent
and 1 percent of the peak value of the load voltage?
c. To estimate the effect of Q on a modulating signal, consider the case for
which Vc is suddenly reduced to zero (for convenience, this may be assumed
to occur at t = 0). Determine the time required for VM{t) to fall to 10 percent
of its peak value for each capacitance value of parts (a) and (b).

SOLUTION The period T of the radio-frequency carrier with a frequency of 1 MHz

is 1 /zs.
a. Equation (6.18) will be used to determine the capacitance Q (C ^ Q,
Ri, and vi vm)- For VMp-p/Vp = 0.1, the following is obtained:

Cl =( ^ = 10“^ F or 1 nF
\VMp-pJ Rl
b. For VMp-p/Vp= 0.05, Ci = 2 nF and for VMp-p/Vp = 0.01, Ci = 10 nF.
c. It will be assumed that VM{t) Vp at t = 0 when the carrier vanishes. As
—

a result of the diode’s being reverse biased, a simple RC discharge occurs:

VM{t) = Vpe for t > 0

Let t = ti for VMih) — 0.1 Vp. The following is obtained for t\:
0.1 Vp =
h = 1^1 Cl In 10 = 2.30 Rl Cl
= 2.3 X 10“^ s or 23 /zs for Ci = 1 nF

Figure 6.26: Rectifier circuit of Example 6.4. gj^ 2nft

/=! MHz

6.2 FILTERS: REDUCING LOAD-VOLTAGE FLUCTUATIONS 387

 t

Figure 6.27: Load voltage for a periodic on-

o/jf carrier.

For C\ — 2 nF, = 46 /zs, and for Q = 10 nF, ti =230 /xs. The relevance
of ti may be seen by assuming that i’c(^) consists of a series of periodic
carrier bursts such as would occur if Vc were an on-off periodic square
wave voltage (Figure 6.27). For a reasonable replica of the periodic square-
wave modulating voltage, it is necessary that Tm/2 be greater than ti. For a
“good” replica, a value of 7^/2 = 2ti is a reasonable criteria. This implies
the following for the frequency of the modulating signal f^-

Tm = 4ti, f^ = llTm = 1/41\

For Q = 1 nF, f^ = 10.9 kHz. This implies that the upper acceptable
square-wave modulating frequency is about 10.9 kHz for a filter with a 1-nF
capacitor. Larger capacitors reduce the acceptable modulating frequency.
For Cl = 2 nF, f^ = 5 A kHz, and for Ci = 10 nF, = 1.09 kHz.

EXAMPLE 6.5
Consider the full-wave rectifier and filter of Figure 6.19.

Vm = 20 V f — (o/2Tt = 60 Hz
Rl = lOOQ C = 2000 ^F VD(on) = 0.8 V

a. Determine the peak load voltage Vp and the peak-to-peak ripple voltage
'^L p-p-
b. What is the peak inverse voltage that the diodes must sustain?
c. Estimate the peak current of the diodes.

SOLUTION For a frequency of 60 Hz, T = 16.7 ms.

a. Vp=yrn-2vD[on) = nAV, vl p-p = 0.77 V

2KiL
b. Consider the case when D[ is conducting for a peak input voltage of V^.
The reverse bias voltage of D2 for this condition is - VD(on) = 19.2 V.
The peak inverse voltage of the diodes is thus 19.2 V.
c. The current of Di has a peak value at t = ^2 (Figure 6.21). From Eq. (6.23),
the following is obtained for the current:

ioiiti) = -CoCVmCOSCOti + [-VmSinootl - 2vD{on)) / Rl

388 ELECTRONIC POWER SUPPLIES

 The time ^2 is the time at which D2 turns on. It corresponds to the intersection
of the RiC discharge (Eq. (6,24)) and the magnitude of the input voltage less
2t>D(on):

The linear approximation for the exponential is justified because the ripple
voltage is small. Furthermore, t\ ^ T/4.
Vp[l - {t2 - T/4)/RlC] = - Vmsina)t2 - 2vD(on)
To solve this equation, let x = (t2 — Tf4)IT, the fraction of a period over
which the discharge occurs. This results in the following:

sin ct)^2 = sin(2:7rx + tt/I) = cos Inx

f(x) = Vp(l - xT/RiC) + Vm cos ItTX + 2vD(on)
A solution is desired for which f(x) = 0. It will be noted from Figure 6.25
that t2 — T/4 is less than one-half period, T/2. Hence, x < 0.5. Through a trial-
and-error numerical evaluation of f(x), a solution of x = 0.458 is obtained.
= xT+T/4 = 0.708T
cot2 = O.VOScoT = 0.708(2:7r) radians or 254.9°
ioiiti) = 4.1 A
The peak current of each diode for a sinusoidal input voltage is thus 4.1 A.

EXAMPLE 6.6
Design a power supply that produces an average load voltage of 12 V and an
average load current of 0.5 A. The peak-to-peak ripple load voltage is to be
no greater than 1.0 V. The power line frequency is 60 Hz.

SOLUTION An average load voltage of 12 V and a current of 0.5 A imply an

equivalent load resistance Rl of 24 As a result of the 1 V peak-to-peak
ripple voltage, it will be assumed that the load voltage varies from 11.5 to
12.5 Y (Vp = 12.5 V). From Eq. (6.18), the value of the filter capacitance may
be determined as follows:

C = (— = 8.7 X 10-^ F
\VLp-pJ Rl
A capacitor with a nominal value of 10,000 /zF is required. To account for
the transformer effects, that is, an equivalent nonlinear secondary circuit, a
transformer with an rms secondary voltage of 12 V will be needed. For a
primary voltage of 120 V, the turns ratio is 10:1. A secondary rms current
rating of at least 0,5 A is required.
If the load should happen to be removed from the supply, the peak load
voltageVp will increase to nearly V^, For a no-load condition, the transformer
peak voltage will be 12^2 17 V. Because this no-load condition can not be
excluded, a filter capacitor with a voltage rating in excess of 17 V is required -
25 V is a standard value.

6.2 FILTERS: REDUCING LOAD-VOLTAGE FLUCTUATIONS 389

 Diodes with a peak current rating of at least five times the average current,
that is 2.5 A, will be required. This is a reasonable estimate based on the
SPICE simulation for the circuit of Figure 6.28. For a no-load condition, the
peak inverse voltage of the diodes is approximately 17 V. Hence, diodes with
a rating of at least this value are required. An integrated circuit bridge rectifier
having an average current rating of 0.5 A and a peak inverse voltage rating of
25 V is recommended.
It will be noted that to achieve a smaller ripple voltage, an exceedingly
large filter capacitor would be required. For example, for Vhp-p = 0.1 V, a
capacitance of nearly 100,000 /xF (0.1 F) would be required. Because this is
not an acceptable design value (try to find one in an electronics catalog), an
electronic regulator is needed.

6.3 ZENER DIODE REGULATOR: AN IMPROVED OUTPUT VOLTAGE

A zener diode circuit can be used to reduce the ripple voltage of a power sup¬
ply and to maintain a load voltage that remains nearly constant despite changes
that may occur in the load current. In the discussion of diodes of Chapter 2, it
was assumed that the current of a reverse-biased semiconductor junction diode
is essentially zero {—Is for vd 0). However, for a sufficiently large reverse-bias
voltage, an abrupt breakdown process occurs that results in a negative current
that changes very rapidly with diode voltage (Figure 6.28). When Shockley first
observed this breakdown current, he associated it with a quantum mechanical
tunneling effect previously observed in dielectrics and first described by Clarence
Zener in 1934 (McAfee et al. 1951; Smits 1985; and Zener 1934). Tunneling,
however, was not the primary breakdown effect for Shockley’s diodes. As a re¬
sult of the high electric fields produced by a large reverse-bias voltage, free elec¬
trons gain sufficient energy to generate electron-hole pairs, which is a mechanism
known as impact ionization. Furthermore, an avalanche process occurs as newly
produced free electrons result in additional ionizing impacts. For most semi¬
conductor junction diodes, it is an avalanche breakdown process that tends to
occur. It is only for extremely highly doped semiconductor junction diodes that
tunneling is the dominant mechanism.
Especially fabricated semiconductor junction diodes that rely on an avalanche
breakdown effect are frequently used for regulator circuits and other electronic
applications. As a result of Shockley’s original misnaming of the breakdown
effect, these diodes are now universally known as zener diodes. They are available

Figure 6.28: Reverse-bias breakdown

behavior of a semiconductor junction
diode.

break¬
down

390 ELECTRONIC POWER SUPPLIES

 *Z
break¬
reverse down
-I- bias
J-^ ^2
forward V^Z
bias
symbol

Figure 6.29: A zener diode characteristic.

in a wide range of breakdown voltages (from a few volts to tens of volts) and in
a wide range of power ratings (up to several hundred watts).
Because it is the reverse-biased region of a zener diode that is generally utilized,
the alternative voltage and current labeling of Figure 6.29 will be used {vz = —vq,
iz — —io)- The zener breakdown voltage is Vz, a positive quantity. For a zener
voltage Vz between 0 and Vz, the current is essentially zero. However, when the
diode voltage vz exceeds the breakdown voltage Vz, the current of the diode
rapidly increases. To model the breakdown behavior of a zener diode, an equiv¬
alent circuit model with an equivalent zener resistance is frequently used (Figure
6.30).
For the ideal diode of the reverse-biased model to conduct, the terminal voltage
must exceed the zener voltage Vz- This results in a linear dependence of the
current on voltage as defined by

iz = {vz - Vz)/rz for vz > Vz (6.28)

A forward-biased model is also shown in Figure 6.30. It will be noted that the
current of this equivalent circuit is zero for positive values of vz (its ideal diode
is reverse biased). Hence, the forward-biased model may be connected in parallel
with the reverse-biased model if negative values of vz are anticipated. The equiv¬
alent circuits of Figure 6.30 are generally utilized for analytic circuit solutions.
Computer simulations such as SPICE, however, tend to use an exponential cur¬
rent dependence on the diode voltage for breakdown (a more rapid increase in
current than predicted by a linear model).
The equivalent zener resistance of a zener diode is generaly quite small and
is comparable with the forward-biased equivalent resistance for the same mag¬
nitude of current (~Vt//z)- Hence, for most applications, the voltage across
the zener diode tends to remain nearly con¬
Figure 6.30: A zener diode equivalent circuit.
stant for iz > 0 and approximately equal to
the zener breakdown voltage Vz. Consider the *Z
zener diode regulator circuit of Figure 6.31,
which has an input voltage of ^Supply ^he
zener diode voltage vz is less than the zener
Ideal Ideal
voltage Vz the diode current will be zero.

^Load = 4Rl^^
+ Ri
for^Lo.d<Vz (6.29)
reverse bias

6.3 ZENER DIODE REGULATOR: AN IMPROVED OUTPUT VOLTAGE 391

 Rl
+ AA^
+
Figure 6.31: A zener diode regulator circuit.
^Supply

actual circuit Thevenin equivalent circuit

Figure 6.32: Zener diode circuit and Thevenin equivalent circuit.

However, if the value of ^Load predicted by Eq. (6.29) exceeds Vz? the zener
diode will tend to keep ULoad ^ Vz regardless of Usupply This may readily be
shown by using the equivalent circuit model of Figure 6.30 for the zener diode
(Figure 6.32).
To simplify the analysis, ^supply? arid Rl have been replaced by a Thevenin
equivalent circuit as follows:

n Supply^ Rjy^ = R-^\\Ri (6.30)

+ Rl

If Vph > Vzj then the ideal diode of the equivalent circuit will conduct, and the
following is obtained for ULoad^

^Z = ( Vph - Vz)/( Rjh + rz), ULoad = Vz + tTXz

, _ T. , r^lVph-Vz) r T7
t^Load — Vz H-^,- for Vph > Vz (6.31)
Rjh + rz

From the expression for Vxh of Eq. (6.30), the following is obtained for ULoad:

f^ThVz f Lz \ / Rl \

^ (mz)
The load voltage, based on the results of Eqs. (6.29) and (6.32), is indicated
in Figure 6.33. It will be noted that the slope of the characteristic has a linear
dependence on for ^Supply > (1 + RiJI^i)Tz. Because for many applications

slope = [rz/iRjh + rz)][RL/{R\ + Rl)]

Figure 6.33: Dependence of load volt¬

slope = Ri/{Ri + Rl) age on supply voltage for a zener diode
regulator.
^Supply

i^+R,/R^)Vz

392 ELECTRONIC POWER SUPPLIES

 Figure 6.34: Power supply with a zener diode regulator.

is quite small compared with Rj^, the variation in upoad with usuppiy is very small
for this condition.
A power supply that utilizes a zener diode regulator circuit is indicated in
Figure 6.34. For the zener diode to function as a regulator, its current iz must
remain greater than zero (the diode must remain in its breakdown mode of op¬
eration). When this occurs, the load voltage remains approximately Vz. The
capacitor’s voltage fsupply depends on the circuit to which it is connected, the
zener diode, Ri, and Rl. To determine usupply^ a simplifying assumption that the
load voltage remains equal to Vz is generally justified. After ^supply is determined,
in particular its peak-to-peak variation, the variation in load voltage will be de¬
termined. If the variation in load voltage is indeed small, then the simplifying
assumption is justified.
The instantaneous current of Ri, that is, depends on the difference of the
supply voltage and the load voltage, the latter being approximated as Vz:

^i(^) = (^Supply - Vz)/Ri (6.33)

During the discharge interval (rectifier diodes not conducting), i\{t) is provided
by the capacitor C as follows:

C = -hit) = -(^Supply - Vz)/R,

<^^^Supply (^Supply ~ ^z) _ ^

dt RiC

A solution is readily obtained by assuming the dependent variable to be

^Supply - Vz as given by

t^suppiy - Vz = (6.35)

A peak supply voltage of Vp will be assumed for t — ti (Figure 6.35):

■'Supply - Vz = (Vp - (6.36)

Figure 6.35: Dependence of supply voltage and current on time.

6.3 ZENER DIODE REGULATOR: AN IMPROVED OUTPUT VOLTAGE 393

 The maximum supply voltage occurs for t — t\, whereas the minimum supply
voltage occurs for t — tx — t\ TjT)'.

^Supply max

t-Supplymin = Vz + ( Vp - ^ (6-37)

The peak-to-peak ripple voltage is the difference of these two quantities.

l’Supplyp-p = (Vp- VzHl (6-38)

As a result of the zener diode regulator circuit, a fairly large value of usupply p-p
can generally be tolerated.
Equation (6.32) developed for the zener diode circuit may now be used to
determine the peak-to-peak variation in the load voltage ULoad p-p follows:

Rl
^Load p—p — *^Supply p—p
Rjh + rz Rl + Rl
Rl
(Vp- Vz)(l (6.39)
R-Th +f‘zJ\Rl + RL
The load voltage ripple is much smaller than that of usupply Therefore, it is
frequently possible to use a much smaller filter capacitor than would otherwise
be needed. As is often the case, a “price” must be paid for the small load voltage
ripple. Both Ri and the zener diode dissipate electrical power, producing heat
(thermal power) that must be removed from the circuit. Furthermore, if the load
is removed from the circuit {Rl replaced by an open circuit), the zener diode
current increases {iz{t) — ii{t) for this condition). The zener diode must be
capable of dissipating the power corresponding to this current, a power with a
time average of approximately ii{t)Vz.

EXAMPLE 6.7
Consider the power supply and zener diode regulator circuit of Figure 6.34.

Vp = 20 V Vz = 12 V f = 60Hz
C = 470 fi¥ Ri^47Q

Assume ULoad remains approximately equal to Vz, that is, iz remains greater
than zero.
a. Determine the maximum and minimum values of usuppiy and A.
b. What is the maximum load current for which the approximation that
i^Load = kz is valid?
c. What is the ripple load voltage for an average load current of 100 mA?
d. What is the ripple load voltage for zero load current?

SOLUTION
a. The maximum supply voltage is Vp, and the peak-to-peak ripple voltage is

394 ELECTRONIC POWER SUPPLIES

 given by Eq. (6.38).

^Supply max ~ — 20 V
i^Suppiyp-p = (Vp - Vz)(l - ^ 2.51 V
^Supplymin ^Supplymax ^^Supplyp-p = 17.49 V

This results in the following for the maximum and minimum values
of ii:

h max = (Vp - Vz)/R\ = 170 mA

fl min — (^Supply min ^z)l R-l = 117 mA
b. The zener current and load current depend on i-i:

^1 ~ T ^Load

Because the zener current must remain greater than zero, the load current
must remain less than ii min = 117 mA.
c. A load current of 100 mA implies an equivalent load resistance Ri of
120 ^2 (12 V/.l A). This results in the following for the zener diode
current:

fZ max — f 1 max fLoad = 70 mA

^Zmin “ ^1 min ^Load = 17 mA

Hence, the zener diode current varies between 17 and 70 mA. By using
the smallest current to estimate the equivalent zener resistance, a value of
1.47 (Vr/Zzmin) is obtained. If this resistance value is used to calculate
^Loadp-p? the following is obtained from Eq. (6.42):

RTh = -Ril|f^L = 33.8^2

"L“dp-p = (Ri+\J"5"ppiyp-p =

A peak-to-peak ripple load voltage of 75 mV is obtained. It should be noted

that this is an upper estimate for ULoadp-p because the effective value of
is probably smaller than that corresponding to the minimum zener diode
current.
d. A zero load current imples Rl —>■ oo. For this condition, iz = fi:

fZmax ~ ^Imax — 170 mA, izmin f 1 min 117 mA

The minimum diode current will again be used for an estimate of the equiv¬
alent zener resistance (r^ = 0.214 ^2).

Rrh — Rl^ t^Loadp-p = -b r ) ’^Supplyp-p = 0.016 V

The ripple load voltage is thus only 16 mV. Although this and the previous
values of ripple voltage are only estimates based on an approximation for
fz that is open to question, the small value of ripple voltage is, nonetheless,
typical of that obtained with zener diode regulator circuits.

6.3 ZENER DIODE REGULATOR: AN IMPROVED OUTPUT VOLTAGE 395

 6.4 AN ELECTRONIC REGULATOR: NEARLY IDEAL POWER SUPPLY
An electronic regulator, which relies on an internal voltage reference along with an
amplifier and a feedback circuit, will result in a power supply with a nearly ideal
output characteristic. The load voltage of a properly designed electronic regulator
will be essentially independent of the voltage of the rectifier-filter circuit as well
as the load current. Because of their low cost, electronic regulators fabricated
on a single integrated circuit are extensively used for power supplies. The most
common integrated circuit regulator is the three-terminal regulator designed for
a fixed voltage. It has an input, an output, and a ground terminal and produces
its design load voltage for currents up to its maximum rated current. Electronic
regulators have an internal protection circuit that will shut down the regulator if
an excessive load current or excessive power dissipation of the integrated circuit
occurs. Because integrated-circuit regulators with a wide range of voltage and
current specifications are available, the design of an electronic power supply is
greatly simplified.

A BASIC OPERATIONAL AMPLIFIER REGULATOR

A basic electronic regulator using an operational amplifier is shown schemat¬
ically in Figure 6.36. On the basis of assumed ideal behavior for the operational
amplifier, the output voltage is equal to the reference voltage source VRgf. Be¬
cause of the op amp, the current of the reference voltage source is essentially
zero. Therefore, variations in load current will not affect the reference voltage;
hence, the load voltage for a current range over which ideal behavior of the op
amp occurs is a reasonable assumption.
In the circuit of Figure 6.36, the output voltage is necessarily less than usupplyj
the voltage of the rectifier-filter circuit. Because the supply voltage for this circuit
will not be the constant voltage assumed in the discussion of operational amplifier
circuits (Chapter 5), it is reasonable to ask whether the fluctuations in the supply
voltage will not result in comparable fluctuations in the load voltage. But, as a
result of the feedback circuit {^ = 1 for the circuit of Figure 6.36) and the large
voltage gain of the op amp, the fluctuations in the load voltage will tend to be
much smaller than those of ^supply

Figure 6.36: A basic electronic regulator using an op amp.

396 ELECTRONIC POWER SUPPLIES

 In the analysis of op amps with symmetrical
power supplies, it was assumed that the output
voltage ^Load for the circuit being considered
was equal to the difference voltage gain of the
op amp Ad times the difference input voltage.
For the situation of Figure 6.36 with a sin¬
gle supply, it would be reasonable to assume
that the output of the op amp has a depen¬
dent source of usuppiy/2, which results in the
equivalent circuit of Figure 6.37:
Figure 6.37: Approximate equivalent circuit for
^Load ~ “h ^Supply/2 the basic electronic regulator of Figure 6.36 that
(6.40,
accounts for its single supply voltage.
^Dif ~ ^Ref ^Load

The difference voltage may be eliminated from the preceding equations to

yield the following expression for VLoad^

^Load — ^Load) T ^Supply/2

_ ^d^Ref . ^Supply (6.41)

FLoad - + 2(1 +A^)

The output voltage of Eq. (6.41) may be written in a slightly different form as
follows:
Ad Supply N
^Load VRef + (6.42)
1 +Ad 2Ad;
Although ^Supply affects the output, because of the large difference voltage gain
term of its denominator, its effect will be very small compared with Vgef. For
large values of Ad, the output voltage is essentially Vgef, and the effect of the
supply voltage is negligible (see Figure 6.38).
Supply voltage fluctuations, in addition to those that may be associated with
the equivalent circuit of Figure 6.37, also affect the output voltage of the op amp.
A power supply rejection ratio PSRR is generally specified for an op amp to relate
the magnitude of a change in its equivalent input offset voltage to the magnitude
of a change in its supply voltage. Although separate quantities for the change in
each supply voltage (Vcc or Vee) as well as for a symmetrical change in these
voltages may be specified, usually only a single quantity, with no specific desig¬
nation, is given. A typical value for the reciprocal of PSRR, expressed in decibels,
is 80 dB. This implies that a peak-to-peak variation of 1.0 V in ^supply results
in a 0.1-mV variation in the equivalent input
Figure 6.38: Supply and load voltages of the basic
offset voltage of the op amp. For the circuit of
electronic regulator of Figure 6.36.
Figure 6.36, this equivalent voltage variation
is in series with VRgf. Hence, for most elec¬ voltage
tronic regulator applications, a supply voltage ^Supply
with relatively large ripple voltage will have ^Load ~ Epef
a negligible effect on the output voltage of an
op amp regulator. ^ t

6.4 AN ELECTRONIC REGULATOR: NEARLY IDEAL POWER SUPPLY 397

 *ci Qi

filter circuit boosting limiting

Figure 6.39: An electronic regulator using a zener diode voltage reference. An

output emitter-follower transistor amplifier Qi is used to boost the output current
of the op amp, and a second transistor Q2 limits the output current of the regulator.

AN ELECTRONIC REGULATOR WITH A ZENER DIODE VOLTAGE REFERENCE

At electronic regulator having a zener diode voltage reference as well as a

circuit to boost and, if necessary, limit its output current, is shown in Figure 6.39.
Because the input current of the op amp is essentially zero, the reference voltage
VRef depends only on the supply voltage as follows:

T7 \T ^z(^Supply “ ^z) r -rx

^Ref — H 5 I ^Supply ^ (6.43)
Ki +r^

Supply voltage variations, including ripple voltage, are therefore reduced by a

factor of rz/{R\ + r^). Because the output current capability of a conventional
low-power op amp is limited (10 to 20 mA being typical), a current-boosting
circuit is included for the electronic regulator.
The first transistor of the output circuit Qi functions as an emitter-follower
amplifier supplying the load current through the small current-sensing resistor
Rz. The other transistor, Qz, is active only when its base-emitter voltage, the
voltage across the current-sensing resistor, is adequate to forward bias its base-
emitter junction. Hence, if the voltage across Rz is less than approximately 0.5 V,
the base and collector currents of Qz will tend to be negligible (silicon transistor).
This corresponds to iLoadRi being less than 0.5 V:

id ^ 0 for /Load < 0-5 y/Ri (6.44)

The current out of the emitter of Qj is equal to the load current /Load for this
condition as follows:

^Load = (1 +^f)^bi = (1 + ^F)iom (6.45)

The output current of the op amp, /’out, is the base current of Qi when the
collector current of Q2 is negligible. Because of the current gain of Qi, the
maximum output current could be as large as (1 + ^p) times the maximum
output current of the op amp. An op amp with an output current capability of
10 mA can therefore result in a load current of 1 A for a transistor with a current
transfer ratio o( 100.

398 ELECTRONIC POWER SUPPLIES

 As a result of the load current, the power dissipated by Qi can become rather
large - a power transistor is generally required for Qi. The following is obtained
for the voltage and current of Qi if Q2 is not conducting:

*^C£l —^Supply ^Loadf^Z ^Load

^Load (6.46)
ici = ^ Load
1+
The instantaneous power dissipated by the collector of Qi, poit), is the product
of the terms of Eq. (6.46):

poit) fci^CEl ~ ^Load(^Supply(^) ^Load-f^Z ^Load) (6*47)

Because the load current for a well-designed regulator will depend only on Ri
and will have no time dependence, the average dissipated power Poav depends
on the average value of usuppiy? that is, Vsuppiyav as follows:

Pd av — fLoad( ^Supplyav ^Load^^Z ^Load) (6.48)

A maximum dissipated power Fdmax occurs for a zero value of load voltage, that
is, an output short circuit as follows:

Pd max — ^ Load max ( Supply av ^LoadmaxFz) ~ ^Loadmax ^Supply av (h<49)

Because this condition could accidentally occur, it is necessary to limit the short-
circuit current of the electronic regulator to a value for which the power dissipa¬
tion rating of Qi is not exceeded.
For an excessively large load current, the voltage developed across R2, vbei,
is such as to cause Q2 to become active. When this occurs, the collector current
of Q2 will subtract from the base current of Qi as follows:

= four — fez (6.50)

Hence, if R2 is chosen so that /Loadmaxf^z is approximately 0.6 to 0.7 V, Q2

will conduct when the load current reaches its maximum value. This will limit
the base current of Qi and therefore limit any further increase in the load
current.
The base-emitter junction of a typical integrated-circuit transistor will func¬
tion as a zener diode. This junction, when reverse biased, has a breakdown voltage
of 6 to 8 V. Because the precise zener voltage Vz depends on the doping of the
base and emitter regions, it is difficult to control. Furthermore, the zener voltage
depends on the temperature of the integrated circuit. An electronic regulator, as
a result of the power it is dissipating, may operate at an elevated temperature.
Hence, a large temperature sensitivity of the regulator’s voltage reference, a ref¬
erence fabricated on the same integrated circuit as the output power transistor,
is not acceptable.

AN ELECTRONIC REGULATOR WITH A BAND-GAP VOLTAGE REFERENCE

Most integrated-circuit electronic voltage regulators rely on an internal “band-

gap” voltage reference. This voltage reference designation is associated with the

6.4 AN ELECTRONIC REGULATOR: NEARLY IDEAL POWER SUPPLY 399

 increasing
temperature

^BE

Figure 6.40: Temperature dependence of the base-emitter voltage of a

bipolar junction transistor.

band-gap energy of a semiconductor, that is, the energy difference between the
conduction and valence bands, which is generally expressed in electron volts.
It is the effect of this energy difference on a semiconductor’s intrinsic carrier
concentration and hence on the diodes’ voltage-versus-current characteristic that
is utilized. These voltage references, if well designed, not only have a reasonably
precise voltage but also a very small temperature dependence (Grebene 1984;
Soclof 1991). Furthermore, these references have smaller voltages than those
obtained with zener diodes.
The voltage of a band-gap reference depends on the forward-bias voltage of
the base-emitter junction of a transistor as well as a second compensating voltage
source. As indicated in Figure 6.40, the voltage of a diode-connected transistor
has a very large temperature sensitivity. For a given current, the voltage sensitivity
of the base-emitter voltage of a typical integrated-circuit transistor is —1.5 to
—2 mV/C°. Therefore, a temperature increase of 50 C° will result in a voltage
decrease of 75 to 100 mV, that is, a voltage decrease that is approximately 11 to
15 percent of the nominal diode voltage. If, for example, the diode voltage were
to be used as a reference voltage of a 5-V supply, a temperature increase of 50 C°
would result in an output voltage decrease of approximately 0.5 to 0.7 V. For
most applications, this voltage change would be unacceptable.
A band-gap voltage reference uses a second voltage source with a positive tem¬
perature coefficient connected in series with a base-emitter junction. This second
voltage source compensates for the negative
Figure 6.41: A basic band-gap voltage reference.
temperature coefficient of the junction. Con¬
^CC sider the three-transistor circuit of Figure 6.41,
the basic circuit of a band-gap voltage refer¬
ence. Identical transistors will be assumed for
Qi and Q2, and base currents will be ignored
compared with the collector currents of the
transistors. The following is obtained for the
collector currents of Qi and Q2:

ici =

^C2 = (6.51)
icilici = e<'’'*El-l^BE2)/«FVT

400 ELECTRONIC POWER SUPPLIES

The difference of the base-emitter voltages, vbei — vbe2, depends on the voltage
across R3 as follows:

Vbei — vbei + ic2R3

(6.52)
= ln(fCl Z^'ci)

The reference voltage of the circuit VRef is equal to the base-emitter voltage of
Qsj vbe3 plus the voltage across Rz:
nE VtRz
^Ref = Vm3 + ln(ici/fci) (6.53)
R3
negative
positive temperature coefficient

Because V7 is equal to kTfe, the second term of Eq. (6.53) increases with
temperature, whereas the first term, the base-emitter voltage of Q3, decreases
with temperature. Component values may be chosen such that the temperature
sensitivity of VRef of Eq. (6.53) is zero at a particular (nominal) temperature.
Eurthermore, by using an appropriate amplifier and feedback regulator circuit,
an output voltage equal to or greater than the reference voltage may be obtained.
The circuit of a typical low-current (100 mA) electronic voltage regulator, a
78LXX, is indicated in Eigure 6.42 (the part number has a prefix that depends on
its manufacturer, and the “XX” designation is the voltage of the regulator). This
regulator, as indicated in Table 6.1, can be obtained for nominal output voltages
of 2.6 to 15 V, the different voltages being achieved by adjusting Ri of the volt¬
age divider at its output when it is manufactured. Transistors Q3, Q4, and Q5
form the band-gap reference voltage source (VRef ^ 1.5 V). The NPN transistors
Q9 and Qii, along with the current mirror formed by the PNP transistors Qj
and Qs, form a differential amplifier. The voltage of the noninverting input, the
base of Q9, is the reference voltage
VRef, whereas the voltage of the
inverting input, the base of Qn, is TABLE 6.1 THE 78LXX SERIES ELECTRONIC VOLTAGE
proportional to the output voltage. REGULATORS
The output of the differential *^Supply
amplifier provides the base cur¬ ^Load mm max
rent of Qi2, an emitter-follower V V V

amplifier, which in turn provides 78L02 2.6 4.75 20

78L05 5.0 7.0 20
the base current of Q3, the output
78L06 6.2 8.5 20
emitter-follower amplifier of the
78L08 8.0 10.5 23
regulator. Transistor Q14 limits 78L09 9.0 11.5 24
the output current by limiting the 78L10 10.0 12.5 25
base current of Q12 when the load 78L12 12.0 14.5 27

current becomes excessive. 78L15 15.0 17.5 30

The current required by the volt¬ The maximum load current is 100 mA.

age reference, it will be noted, is

6.4 AN ELECTRONIC REGULATOR: NEARLY IDEAL POWER SUPPLY 401

 o
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Ui
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402 ELECTRONIC POWER SUPPLIES

 “ Toad ^Load
Input Output
-1-
Common
^Supply Rj ^Load
Cr

^ = 0.1
Figure 6.43: A power supply using a three-terminal electronic voltage regulator. A small
output capacitor Ci is used to minimize the effect of transient output currents on the output
voltage.

derived from the output terminal of the regulator. This is common for voltage
regulators because the use of the output voltage minimizes the effect of variations
(including ripple) of the supply voltage on the reference voltage. But, a problem
arises with this scheme: a zero reference and output voltage is one possible state
of the regulator. Because of this problem, a start-up circuit is required. Transistors
Qi and Qio provide an initial reference voltage for the difference amplifier, thus
producing an initial output voltage when the supply is turned on. The regulator
also has a thermal shutdown circuit (Q2).
In addition to the 100-mA series regulators of Table 6.1, there is the 78MXX
series with a maximum output current of 500 mA and the 78XX series with
a 1.5-A current rating. A suitable heat sink is required for the high-current se¬
ries. Similar negative voltage regulators, the 79LXX, 79MXX, and 79XX se¬
ries, are also available. Furthermore, other electronic regulators with a wide
range of specifications, including regulators with adjustable output voltages, are
available.
A complete power supply using a three-terminal electronic regulator is shown
in Figure 6.43. In essence, the regulator converts a fluctuating input voltage (rip¬
ple) that varies with variations in load current, usuppiy? to a nearly constant load
voltage ULoad- For a typical electronic regulator, a supply voltage that is 2 V more
than ULoad (or greater) is required (see Table 6.1 for the 78LXX series). Except
for very small load currents, the input current of the regulator is approximately
equal to the load current because the current of the regulator circuit tends to be
small.
As a result of the regulator, the rectifier-filter circuit supplies a nearly constant
current. Hence, a constant current discharges the filter capacitance C when the
diodes are not conducting:

C%S^«-<L„ad
at
For a discharge time of T/2, approximately that of a full-wave rectifier, the
following is obtained for the ripple of the supply voltage ^supply p-p-

_ 4oadT (6.55)
•^Supply p-p 2C

Because of the electronic regulator, a fairly large ripple voltage can be tolerated.

6.4 AN ELECTRONIC REGULATOR: NEARLY IDEAL POWER SUPPLY 403

 The main limitation is that the instantaneous minimum value of usupply ^ot fall
below the minimum input voltage required by the regulator. Because this occurs
for the maximum load current, Eq. (6.55) may be used to determine the minimum
value of filter capacitor that assures a minimum input voltage for the regulator.
The regulators that have been considered function as an electronically con¬
trolled series resistance inserted between the rectifier-filter circuit and the load.
As a result, the dissipated power is approximately the product of the load current
and the voltage difference of the regulator Vsupplyav ~ ^^Load- If this voltage differ¬
ence is large, the dissipated power will be large for a large load current. Hence,
the regulator will not only be inefficient, but a large heat sink will be required
to maintain an acceptable temperature for the integrated circuit. An alternative,
more efficient electronic regulator circuit is the switching regulator.

THE ELECTRONIC SWITCHING REGULATOR

Although more complex than series electronic regulators, switching-type regu¬

lators are, for many applications, considerably more power efficient. Hence, these
regulators tend to be used for supplies with moderate-to-large load currents (cur¬
rents greater than 1 or 2 A). A switching regulator, as its name implies, uses a
transistor (or transistors) operated in a switching mode, that is, the transistor is
rapidly switched between being either cut off or saturated. When the transistor is
cut off, its power dissipation is zero, and when it is saturated, its collector-emitter
voltage is very small; therefore, even for a large collector current, the transistor’s
dissipated power is small. In addition to the transistor switch (or switches), an
inductor and capacitor are used for energy storage.
A detailed analysis of switching regulators is beyond the present treatment,
but several texts are available for additional information (Chetty 1986; Gottlieb
1984; Lenk 1995; Pressman 1977). Consider the basic circuit of Figure 6.44 in
which the switch 5 is a bipolar junction transistor that alternates between being
switched on (short circuit) and off (open circuit). When the switch is on, the
voltage difference of the inductor, if the voltage across the switch can be ignored,
^Supply ^Load"

di
^Supply (6.56)

With a positive voltage difference assumed, the current of the inductor i is an

increasing function of time. When the switch is opened, the current of the induc¬
tor will not change abruptly. The current for this condition is through the diode;
the voltage across the inductor.
Figure 6.44: A basic step-down switching-type regulator. if the voltage across the diode is
ignored, is -ULoad:
Toad
FLoad — E (6.57)
L
^Supply
The inductor’s current will de¬
^Load
D ^ C ^
crease for this condition. Be¬
cause a switching rate of 10 to
50 kHz is typical, a relatively

404 ELECTRONIC POWER SUPPLIES

small load capacitance Cl will maintain a nearly constant load voltage over a
switching period. The average load voltage fLoad will depend on the length of
the on and off intervals of the switch. Therefore, a feedback circuit is used that
senses the load voltage, compares it with a reference voltage, and then adjusts
the on-off timing of the switching transistor.
Neither the load capacitance Cl nor the inductor of a switching regulator
can be fabricated on an integrated circuit, and, except for low-current supplies,
an external power transistor (or transistors) is required. Switching-type power
supply modules complete With power transformer, rectifier, filter capacitance,
and the electronic regulator are available for a wide range of voltage and current
specifications. In addition to the basic circuit of Figure 6.44, alternative circuits
are also used, including circuits that result in a load voltage greater than the
voltage of the rectifier-filter circuit.

EXAMPLE 6.8
Design a power supply that uses an electronic voltage regulator to obtain a
load voltage of 12 V and a maximum load current of 1.0 A. The input of the
supply is a 120 V (rms), 60-Hz utility voltage.

SOLUTION The regulator circuit of Figure 6.43 will be utilized with a 7812 three-
terminal integrated-circuit regulator to provide a 12-V load voltage and a
maximum load current of 1.5 A. For proper operation of the regulator, a
minimum input voltage of 14.5 V is required. On the basis of the nonideal
transformer considerations of Section 6.2, a rectified voltage of approximately
18 V for a dc load current of 1 A is a reasonable expectation for a power
transformer with a secondary rating of 18 V and 1 A.
Because the electronic regulator is capable of supplying a load current in
excess of 1.5 A (the result of a load fault), a bridge rectifier with a current rating
of 2 A or more is required. For an average input voltage of 18 V to the electronic
filter, a peak-to-peak ripple voltage of 2 V is acceptable (a voltage that varies
between 17 and 19 V). The regulator will also function for a smaller input
voltage that may occur as a result of a lower-than-normal utility voltage. A 10-
percent decrease in the utility voltage translates to an average supply voltage
of 16.2 V. For this situation, a ripple voltage greater than 2 V might result in a
minimum voltage uncomfortably close to the minimum input voltage needed
by the regulator. Equation (6.55) is used to determine the filter capacitance C
for a load current of 1 A (T = 1/60 s):
C =-^LoadT _ ^
2 ^Supply p—p

A standard electrolytic capacitance with a value of 4700 ^F is used.

The voltage rating of the capacitor and the diodes must be adequate to
withstand the voltages of the circuit for a zero load current. An 18-V (rms)
secondary transformer voltage implies a peak voltage of 25.5 V. However,
a transformer designed for a load current of 1 A is very likely to have a

6.4 AN ELECTRONIC R7GULATOR: NEARLY IDEAL POWER SUPPLY 405

 somewhat larger secondary voltage for a very small load current. Therefore,
diodes with a peak inverse diode voltage of 50 V need to be used (this tends
to be the smallest voltage rating of readily available bridge rectifiers). For a
very small load current, the maximum voltage of the filter capacitor will be
approximately 25 V. However, if the power line voltage should happen to be
excessive (for example, 10-percent high), a somewhat larger voltage rating is
needed. Hence, to be on the safe side, a 50-V rating is desired.
On the basis of a /U-A7812C regulator’s specifications (Texas Instruments
1992), the load voltage of the regulator will be between 11.4 and 12.6 V (±5
percent of the 12-V nominal value). Furthermore, the output voltage ULoad
will vary by no more than 12 mV for a variations in load current based on
its typical specification (240 mV for the worst case). A typical ripple rejection
ratio of 71 dB is given. This implies that the ripple of the regulated load voltage
will be 0.0028 times that of the input voltage ^supply For r’supply p-p of 2 V,
the ripple of ULoad will be 5.6 mV. The minimum ripple rejection ratio given is
51 dB. For this worst case, the load ripple voltage will be 56 mV. On the basis
of these specifications, the output of the electronic regulator will be acceptable
for most applications.

6.5 BATTERIES: AN INCREASINGLY IMPORTANT ELECTRICAL

ENERGY SOURCE
Throughout the 19th century, chemical batteries were used to power telegraph
and telephone systems. In the first decades of the 20th century, before the
widescale distribution of utility-produced electric power, batteries were used to
power early radio receivers. Before the advent of the transistor, battery pow¬
ered portable electronic systems, such as radios, were relatively heavy and bulky
and were characterized by limited battery lives. Because transistor circuits tend to
require much smaller currents and voltages than the vacuum tube circuits they re¬
placed, small, lightweight, truly portable battery-powered systems became practi¬
cable. This spawned the widescale introduction of many new portable products,
the transistor radio (originally referred to as simply a “transistor”) being one
of the first. We now have battery-powered Walkmans, wireless telephone hand¬
sets, and cellular phones, pagers, remote controls, hearing aids, pacemakers, and
notebook computers. As a result of these applications, battery usage has been
increasing.
The earliest battery appears to be that described by Alessandro Volta in
1800 - “a source of perpetual power” (Heise and Calhoon 1971). Its potential
was the result of dissimilar metals that were placed in contact with an electrolyte
(Volta’s work led to the formulation of the electromotive series for metals). Many
types of cells using a wide variety of electrodes and electrolytes were developed
during the 19th century. A significant development was the wet cell invented by
Georges Leclanche in 1860 that used carbon and zinc electrodes. In the 1880s, a
Leclanche-type dry cell, the predecessor of the presently used carbon-zinc battery,
was introduced. This cell utilizes a cathode (the positive terminal of the battery)

406 ELECTRONIC POWER SUPPLIES

 + terminal

carbon electrode
zinc anode case

cathode mix of electrolyte paste

manganese dioxide of ammonium and
and carbon zinc chloride

- terminal (case)
Figure 6.45; Cross-sectional view of a carbon-zinc dry cell.

consisting of a carbon rod surrounded by a mixture of powdered manganese

dioxide and carbon (Figure 6.45). The cathode is surrounded by an electrolyte
consisting of a paste of ammounium and zinc chloride that is in intimate con¬
tact with the zinc case that forms the anode (negative terminal) of the battery
(Gaboon and Heise 1976; Crompton 1982; Mantell 1983).
The current-producing capability of a carbon-zinc dry cell depends on chem¬
ical reactions involving electronic charges at the anode and cathode of the cell:
Zn -b 2C1“ —^ ZnCli + 2e“ (anode)
2Mn02 -b 2NH^ -b 2e- —> 2MnOOH + 2NH3 (cathode)
2Mn02 + 2NH4CI + Zn ^ ZnCh • 2NH3 -b H2O -b Mn203 (overall)
(6.58)
The negative electronic charges flow from the anode to the cathode through the
external circuit. However, by convention, hypothetical positive charges are envi¬
sioned as flowing in the opposite direction, resulting in an external positive cur¬
rent from the cathode to the anode of a battery. As the cell is discharged, the active
chemical reactants (left side of the bottom reaction of Eq. (6.58)) are depleted.
Carbon-zinc dry cells are produced in a variety of sizes from that of the 1-cm-
diameter AAA cell to the standard 3.4-cm diameter flashlight D cell and larger
lantern-type multicell batteries. A fresh, unused cell has an open-circuit voltage
that is slightly greater than 1.5 V. As the cell is discharged, its terminal voltage
decreases, eventually falling to a voltage at which the circuit it is powering will
no longer function properly. The internal resistance of a cell, an equivalent series
resistance of a circuit model of a battery, depends on the physical size of the cell
as well as its previous usage. Fresh small-size cells have an internal resistance,
determined by a momentary short-circuit current measurement, of only a few to
several tenths of an ohm.
Other primary (nonrechargeable) cells, in particular the zinc-chloride cell (fre¬
quently designated as “heavy duty”), and the alkaline-manganese dioxide (“al¬
kaline”) cell have also been developed; these provide larger energy outputs, albeit
at a higher cost. On the basis of the application, an alkaline cell may provide sev¬
eral times the electrical energy of the same-size carbon-zinc cell. Specialized cells,
including mercuric and silver oxide “button” cells, lithium manganese dioxide
cells, and zinc air cells are used for miniaturized electronic systems.

6.5 BATTERIES; AN INCREASINGLY IMPORTANT ELECTRICAL ENERGY SOURCE 407

 Another type cell, the secondary cell, can be electrically recharged as a result
of a reversible chemical reaction (Crompton 1982; Grant 1975). The lead-acid
vented storage battery is nearly universally used for automobiles, whereas more
convenient sealed versions are available for electronic applications. Rechargeable
nickel-cadmium cells, however, tend to be the most commonly used rechargeable
cells for electronic applications. The chemical reactions of this cell involve cad¬
mium and cadmium hydroxide at the anode and nickelic hydroxide and nickelous
hydroxide at the cathode:

Cd + 20H- —> Cd(OH)2 + 2e- (anode)

2NiOOH -f 2H2O -y 2e- —> 2Ni(OH)2-f20H- (cathode) (6.59)
2Ni(OH)2-bCd(OH)2 ^ 2NiO(OH) -h Cd + 2H2O (overall)

The 2e~ term of the anode and cathode reactions results in an external electron
flow from the anode to the cathode of the cell. During charging, the reactions
of Eq. (6.59) are reversed. Even though a nickel-cadmium cell has an initial
open-circuit terminal voltage of only about 1.2 V, compared with the 1.5 V of a
conventional carbon-zinc dry cell, the voltage of the nickel-cadmium cell remains
nearly constant during its discharge. It is therefore possible, for most applications,
to replace individual carbon-zinc cells directly with nickel-cadmium cells that
have the advantage of being able to be recharged many hundreds of times before
being replaced.
The external current of a chemical cell is the result of ionic reactions at the
cathode and anode of the cell (e.g., Eq. (6.58) or (6.59)). As a result of these
reactions, the active compounds of the cell are depleted. One would therefore
expect, at least for a first-order approximation, that the external charge transfer
that occurs before a cell is depleted, QBat? would be independent of the time
dependence of the current - only its integral over time is involved.
r%
QBat ^ (6.60)
Jo
A cell capable of producing a charge transfer of 1 C, could therefore supply, for
example, a constant current of 1 mA for 1000 s, or a constant current of 1 ixA for
10^ s. Although this tends to be approximately the case, cells generally produce
a greater charge transfer if they are used intermittently.
During the discharge of a cell, its voltage tends to decline (Eigure 6.46). Al¬
though a cutoff voltage is used to define the lifetime of a battery, there is not
a set of standardized cutoff potentials for the various types of cells. The cutoff
potential is the minimum voltage for which a particular electronic circuit appli¬
cation functions properly. Lowering the minimum voltage of the circuit through
an appropriate design change will increase the usefull life of a cell or battery of
cells.
The time integral of current (coulombs per second) is charge (coulombs). For a
battery specification, a time dimension of hours rather than seconds is generally
used, thus resulting in a hybrid unit for charge that has a dimension of ampere-
hours (1 Ah = 3600 C). Generally, large cell currents tend to reduce the charge
that a cell can supply. Cells usually function better when operated intermittently.

408 ELECTRONIC POWER SUPPLIES

 Figure 6.46; The discharge of a carbon-zinc dry cell.

for there is a tendency for the chemicals to rejuvenate somevyhat between dis¬
charge periods. However, a cell has a limited shelf life because it will tend to
discharge on its own.
In addition to providing power for portable electronic equipment, batteries are
frequently used in conjunction with a utility-powered rectifier and filter circuit to
provide uninterrupted electrical power during utility outages. This is frequently
for the backup of only a critical portion of an electronic circuit such as the
clock circuit of a clock-timer or the memory circuit of a telephone dialer. If a
primary (nonrechargeable) battery is used, the electronic load may be connected
to the utility-powered source and the battery with a set of diodes (Figure 6.47).
When the utility supply is functioning, the supply voltage Vsuppiy is such as to
be larger than the battery backup voltage Veaf A current through Di provides
the load current of RLoadi, the critical electronic circuit. However, for a utility
outage, Vsuppiy will be reduced to zero, resulting in a current provided by the
battery through Di- Because VBat is less than Vsuppjy, the load voltage will be
somewhat smaller for this condition. If it is necessary that a constant load voltage
be maintained, an electronic regulator (for example, a zener diode circuit) could
be incorporated as part of the load.
An alternative battery backup scheme (Figure 6.48) utilizes a rechargeable bat¬
tery (for example, nickel-cadmium cells). For this application, the battery can
serve as part of the filter-regulator circuit. The load resistor Ri represents the elec¬
tronic circuit for which operation during a utility outage is required (for example,
a fire alarm). An equivalent circuit of the battery is indicated. The battery will gen¬
erally consist of several series-connected cells to achieve a desired voltage. Hence,
the series resistance rBat will be the
sum of the resistances of the individ¬ Figure 6.47: A battery backup for a critical electronic cir¬
ual cells. The equivalent circuit of Fig¬ cuit.
ure 6.48 may be recognized as be¬ Di Do

ing essentially the same as that of the

zener diode regulator of Figure 6.34
fT-r-14 -I-

'Supply ^ ^Bat
with a zener voltage of Vz and a re¬ R Load 1 R Load 2
utility
sistance of Yz. Thus, the same solution
source
applies. The circuit of Figure 6.48 is noncritical critical
generally designed to maintain a small electronic electronic
circuits circuits
continuous battery current that serves

6.5 BATTERIES: AN INCREASINGLY IMPORTANT ELECTRICAL ENERGY SOURCE 409

 +
^Load

utility
source

Figure 6.48: A utility supply and a rechargeable battery.

to keep the battery fully charged. Unlike the zener diode regulator, the battery
circuit will supply a load current for a utility outage, for the diodes of the rectifier
serve to disconnect the transformer from the circuit.

EXAMPLE 6.9
A particular Walkman AM-FM cassette tape player is powered by two series-
connected AA cells. The following battery currents result for battery voltages
of 2 to 3 V (independent of voltage):

AM radio FM radio Tape

No or low-level output 25 mA 35 mA 120 mA

Medium-level output 35 mA 45 mA 130 mA
High-level (loud) output 50 mA 60 mA 145 mA

The variation in battery current results from power being supplied to the
earphone by the audio amplifier. Normal operation of the Walkman occurs for
a battery voltage of 2 V or greater. For intermittent operation, a carbon-zinc
cell has a charge capacity of approximately 0.9 Ah; an alkaline cell, 2.1 Ah;
and a rechargeable nickel-cadmium cell, 0.7 Ah. Estimate the number of hours
that each type cell will last for each mode of operation. Estimate the energy,
expressed in joules and watt-hours, supplied by each cell.

SOLUTION It will be assumed that the battery current for the medium-level output
corresponds to the average battery current.

Qah = hatTh

The following is obtained for carbon-zinc cells:

AM radio % = 0.9 Ah/35 mA = 25.7 h

FM radio T/, = 0.9 Ah/45 mA = 20 h
Tape Th = 0.9 Ah/130 mA = 6.9 h

Eor alkaline cells (2.1 Ah), the times are increased to 60, 46.7, and 16.2 h.
Rechargeable nickel-cadmium cells (0.7 Ah) reduce the times to 20, 15.6 and
15.4 h. The energy supplied by the battery E is equal to the integral over time

410 ELECTRONIC POWER SUPPLIES

 of the instantaneous power as follows:
rTh rTh
E= pdt= V^athatdt
Jo Jo

Because the battery current was found to be independent of voltage, /Bat niay
be removed from the integral.

•E = /fiat J = (I’QutTl,) j ^Bat = QyUi^Batav

Hence, the energy is the charge supplied multiplied by the average battery
voltage. If 2.5 V is assumed for the average battery voltage of the carbon-
zinc cells (1.25 V per cell), an energy of 2.25 Wh (0.9 Ah x 2.5 V), that is
8100 J (IWs is 1 J), is obtained. An energy value of 5.25 Wh (1.89 x 10^ J) is
obtained for the alkaline cells (same average voltage). The voltage of a nickel-
cadmium cell during discharge remains essentially constant at 1.2 V, resulting
in a battery voltage of 2.4 V. The energy supplied is 1.68 Wh (6048 J).

REFERENCES

Cahoon, N. C. and Heise, G. W. (Eds.) (1976). The Primary Battery - Volume 2. New York:
John Wiley & Sons.
Chetty, P. R. K. (1986). Switch-Mode Power Supply Design. Blue Ridge Summit, PA: Tab
Professional and Reference Books.
Crompton, T. R. (1982). Small Batteries - Volume 1: Secondary Cells. New York: John
Wiley Sc Sons.
Crompton, T. R. (1982). Small Batteries - Volume 2: Primary Cells. New York: John Wiley
Sc Sons.
Gottlieb, Irving M. (1984). Power Supplies, Switching Regulators, Inverters, and Converters.
Blue Ridge Summit, PA: Tab Books.
Grant, J. C. (1975). Nickel-Cadmium Battery (2d ed.). Gainesville, FL: General Electric Co.
Grebene, Alan B. (1984). Bipolar and MOS Analog Integrated Circuit Design. New York:
John Wiley Sc Sons.
Heise, G. W. and Cahoon N.C. (Eds.) (1971). The Primary Battery - Volume 1. New York:
John Wiley Sc Sons.
Lenk, John D. (1995). Simplified Design of Switching Power Supplies. Boston: Butterworth-
Heinemann.
Mantell, C. L. (1983). Batteries and Energy Systems (2d ed.). New York: McGraw-Hill.
McAfee, K. B., Ryder, E. J., Shockley, W, and Sparks, M. (1951). Observations of Zener
current in germanium p-n junctions. Physical Review, 83, 650-1.
Pressman, Abraham I. (1977). Switching and Linear Power Supply, Power Converter Design.
Rochelle Park, NJ: Hayden Book Co.
Smits, F. M. (Ed.) (1985). A History of Engineering and Science in the Bell System - Electronics
Technology (1925-1975). Indianapolis, IN: AT&T Laboratories.
Soclof, Sidney (1991). Design and Applications of Analog Integrated Circuits. Englewood
Cliffs, NJ: Prentice-Hall.
Texas Instruments (1992). Linear Circuits Data Book 1992 (Vol. 3). Dallas, TX: Texas Instru¬
ments, Inc.

REFERENCES 411
 Zener, C. (1934). A theory of the electrical brakdown of solid detectors. Proceedings of the
Royal Society of London, 145, 523-9.

PROBLEMS

6.1 The input voltage of the diode half-wave rectifier circuit of Figure P6.1 is
fSource(f)- Assume that the input voltage has a symmetrical square wave¬
form with maximum and minimum values of Vp and — Vp, respectively.
Assume ideal behavior of the diode.
a) Determine the average value of the load voltage \4v
b) Determine the rms value of the load voltage VJ-ms-
c) Determine the average power dissipated by the load resistor.

^Source(0 ( ) ^ ^Load(0 Figure P6.1

6.2 Obtain numerical values for the answers of Problem 6.1 for a peak voltage
Vp of 10 V and a load resistance Rl of 1 k^2.
6.3 Repeat Problem 6.1 for a diode with a constant forward voltage UD(on)
of 0.75 V.
6.4 Repeat Problem 6.2 for a diode with a constant forward voltage nD(on)»
of 0.75 V.
6.5 Repeat Problem 6.1 for the polarity of the diode reversed.
6.6 Consider the case for which the input voltage of Problem 6.1 has a sym¬
metrical triangular waveform with maximum and minimum values of Vp
and — Vp, respectively. Repeat Problem 6.1 for this condition.
6.7 Obtain numerical values for the answers of Problem 6.6 for a peak voltage
Vp of 10 V and a load resistance Rp of 1 kf2.

^Source(0

Vp = 10 V
T = 1 ms P6.8
-Vp-I
T/3 T

6.8 The rectifier circuit of Figure P6.1 has the input voltage r>Source(^) of
Figure 6.8.

a) Determine the average load voltage with ideal behavior of the diode
assumed.
b) Determine the rms value of the load voltage assuming ideal behavior
of the diode.
c) Repeat parts (a) and (b) with uoion) = 0.75 V assumed.

412 ELECTRONIC POWER SUPPLIES

6.9 Repeat Problem 6.8 for a positive pulse that has a time duration of T/4.
6.10 Consider the transformer-rectifier circuit of Figure 6.6. Assume that
\4? = 12 V, the power-line frequency is 60 Hz, and UD(on) = 0.75 V.

a) Determine the average value of the load voltage \4v

b) Suppose it is assumed that the output voltage could be approximated
as a full-wave rectified sinusoid (ideal rectifier diodes) with a peak
value of UD(on)- The average value of this voltage would be2(\^—
VD(on))/^- Compare this approximation for Vav with that determined
in part (a).
c) Repeat parts (a) and (b) for = 6 V.
6.11 Repeat Example 6.2 for the full-wave rectifier circuit of Figure 6.6.

^Source(0

Figure P6.12

6.12 The input voltage of the bridge-rectifier circuit of Figure P6.12 is

Fsource(^)- Assume vsource(^) = lOsmln ft V along with ideal behavior
of the diodes.

a) What is the average value of the load voltage Vav?

b) Sketch /source(^) and /Load(0- What are their average values?
c) Repeat parts (a) and (b) for diodes with a forward-biased voltage of
VD(on) = 0.75 V.
6.13 Consider the circuit of Figure P6.12 and assume ideal behavior of the
rectifier diodes and an arbitrary periodic input voltage fsourcei^)- Show
that the rms value of fLoadi^) is equal to the rms value of usource(^)-
6.14 A full-wave rectifier such as that of Figure P6.12 is generally used for an ac
voltmeter. Assume ideal behavior of the diodes (an electronic rectifier can
accomplish this type of behavior) and a periodic input voltage usourcel^)-
Determine the ratio of the average of ULoad(0 to the rms value of the
input voltage Fsource(t), for the following waveforms:

a) The input vsource(f) is a sinusoidal voltage with a peak value of V^.

b) The input is a symmetrical triangular-wave voltage with a peak value
of Vp (minimum of — Vp).
c) The input is a symmetrical square-wave voltage with a peak value
ofVp.
Note: This type of ac meter is generally calibrated to read correctly for
a sinusoidal voltage.

6.15 A bridge rectifier circuit is used in the circuit of Figure P6.15 to charge a

PROBLEMS 413
 ^Bat

12 V

battery.

^Trans(0 ~ Sltl = 20 V

The resistor R is used to limit the current of the circuit /Load(^)- A

constant forward-biased voltage model for the diodes with UD(on) = 0.8 V
is appropriate for this circuit. What is the average charging current /av
and the power supplied to the battery?

sin

6.16 The half-wave rectifier circuit of Figure P6.16 is used for a radio detector.
The frequency of the input signal f is 455 kHz (the intermediate fre¬
quency of the superheterodyne receiver of Figure 1.10) and y„ = 1.0 V.
Assume ideal behavior of the diode.
a) Determine the peak value of VM(t)-
b) What is the peak-to-peak ripple voltage?
c) What is the peak value of the diode current?
d) What is the value of Q required to result in a peak-to-peak ripple
voltage of 10 mV?

6.17 Repeat Problem 6.16 for a diode with a forward-biased voltage VD(on),
of 0.55 V.
D

sin 2%ft ^ < ^Load(0 Figure P6.18

100 pF 1 kQ I

utility source

6.18 A half-wave rectifier-filter circuit is connected directly to an electric utility

source with a voltage of 120 V (rms) and a frequency f of 60 Hz (Figure
P6.18). For the large voltages of the circuit, an assumption of ideal be¬
havior for the diode is readily justified.

a) Determine the peak value of ULoadiO-

b) What is the peak-to-peak ripple of the load voltage?

414 ELECTRONIC POWER SUPPLIES

 Figure P6.19

c) Suppose that the load is not a resistor but instead results in a constant
current of 100 mA. Determine the peak-to-peak ripple of the load
voltage for this condition.

6.19 Consider the rectifier circuit of Figure P6.19, a half-wave voltage doubler.
Assume ideal behavior of the diodes and that at t = 0 the capacitor
C is uncharged.
a) Determine and sketch VA{t) and vsit) with the assumption that the
current of Di may be ignored (a very large Ri). A time interval of
two periods is required to achieve a periodic response for vsit).
b) Determine vc{t) based on the result of part (a). What is the peak value
of vc{t)}
Note: An actual power supply would use a second capacitor connected
in parallel with Ri to obtain a steady voltage of approximately IVp.
6.20 Consider the full-wave bridge rectifier and filter circuit of Figure 6.19.
The output ripple voltage, fLoadp-p? depends on the time constant of the
circuit, that is, RlC. Assume that ^2 — = T/2.
a) On the basis of the linear approximation of Eq. (6.20), what is the time
constant that results in a 10-percent ripple voltage (vip-p/Vp = 0.1)?
b) What is the value of vip-pfVp predicted by the exponential expres¬
sion for the time constant of part (a)?
6.21 Consider the full-wave bridge rectifier and filter circuit of Figure 6.19.
Show that after steady-state conditions are achieved, the average value
of the current of Di is one-half the average load current.
6.22 Consider the full-wave bridge rectifier and filter circuit of Figure 6.19
= 30 V, f = 60 Hz, Rl = 500 Q, C = 100 /xF
Ideal behavior of the diodes may be assumed.
a) What is the peak value of fLoadi^)?
b) What is the peak-to-peak value of the load ripple voltage?
c) What is the approximate time interval for which the diodes conduct,
that is, approximately 3T/4 — ^2 of Figure 6.21?

6.23 Repeat Problem 6.22 for C = 1000 /xF.

6.24 Repeat Problem 6.22 for C = 1000 /xF and Rl = 100 Q.
6.25 Repeat Problem 6.22 for a constant load current of 100 mA. What is the
value of C required to reduce the peak-to-peak ripple voltage to 1 V?
6.26 A zener diode with a breakdown voltage of 12 V is used in the circuit
of Figure P6.26. Assume that a minimum zener current iz of 5 mA is
required to ensure proper operation of the zener diode.

PROBLEMS 415
 Figure P6.26

a) What is the minimum value of Rl for which proper operation of the

zener diode is ensured?
b) Estimate the variation of ULoad that occurs for a variation in Rl
between that obtained in part (a) and infinity (an open circuit).
Use a value of that corresponds to the minimum zener diode
current.
c) What is the power dissipated by Ri and Z for the load resistance of
part (a)? What is the power dissipated by Ri and Z for Rl = oo (an
open circuit)?
6.27 Assume that the nominal load current of the circuit of Figure P6.26 is
30 mA. Determine the variation in load voltage for a ±10 mA variation
in load current.
6.28 Assume that the nominal load current of the circuit of Figure P6.26 is
30 mA. Determine the variation in load voltage for a ±1 V variation in
V5.
100Q
-Wv-
+
from
bridge ^Supply — r 2 2k ^Load
rectifier 470 uF 300 Q ^

Vz = 15 V

6.29 A zener diode with a breakdown voltage of 15 V is used in the circuit of

Figure P6.29. The frequency of the utility supply is 60 Hz. Assume that
the peak value of Usupply is 25 V.
a) Determine the minimum value of ^Supply
b) Determine the peak-to-peak value of the load ripple voltage.
c) Estimate the average electrical power dissipated by Ri and Z. Estimate
the power efficiency of the filter and regulator, that is, the ratio of the
power dissipated by Rl to that supplied by the rectifier circuit.

6.30 Determine the minimum value of capacitance C in Problem 6.29 that

assures a zener diode current of 5 mA. What is the peak-to-peak value
of the load ripple voltage for this condition?
6.31 An electronic filter using a power transistor is shown schematically in
Figure P6.31. As a result of the resistor and capacitor of the base cir¬
cuit of the transistor, the ripple voltage at the base of the transistor will
be much less than that of usuppiy The supply voltage, derived from a

416 ELECTRONIC POWER SUPPLIES

 ^Load

Pf = 100
^Load
VBE(on) = 0.8 V

full-wave rectifier with a power-line frequency of 60 Hz, has an average

value of 18,0 V.

a) Determine the average values of the load voltage and current.

b) Determine the supply ripple voltage, that is, ^supply p-p- The discharge
current of Q may be assumed to be constant and equal to the average
load current.
c) Estimate the peak-to-peak ripple of ULoad hy determining the ripple
value of the base voltage of the transistor. The ripple component of
usuppiy may be assumed to be a sinusoidal voltage with a peak-to-peak
value equal to that determined in part (b).
6.32 Repeat Problem 6.31 for Rl = 250 ^2.
6.33 Repeat Problem 6.31 for usupplyav = 24.0 V.
6.34 Determine the dependence of the average value of the load voltage on
the average value of the load current for the circuit of Problem 6.31.
Assume the average supply voltage remains a constant 18 V. What is the
Thevenin voltage and resistance of the equivalent output circuit of the
electronic filter?

Aoad

Pf = 100
^Load
VBE(on) — 0.8 V

Figure P6.35

6.35 The elementary regulator of Figure P6.35 uses a power transistor and a
zener diode. As a result of the zener diode, the base voltage of the tran¬
sistor remains nearly constant and equal to the zener voltage. The supply
voltage, derived from a full-wave rectifier with a power-line frequency of
60 Hz, has an average value of 30.0 V.
a) Determine the average values of the load voltage and current.
b) Determine the supply voltage ripple, that is, ^supply p-p- The discharge

PROBLEMS 417
 current of C may be assumed to be constant and equal to the average
load current.
c) Estimate the peak-to-peak ripple of VLoad by determining the ripple
value of the base voltage of the transistor.
6.36 Repeat Problem 6.35 for a value of Rl that results in an average load
current of 200 mA.
6.37 Consider the op amp electronic regulator of Figure 6.36. Suppose the
op amp has an equivalent output resistance Rq of 50 and a gain-
bandwidth product of 1 MHz. The reference voltage VRgf is 5 V. Show
that for frequencies above the break frequency of the op amp response,
the equivalent output impedance of the regulator is inductive. Determine
the value of the inductance.
6.38 The three-terminal regulator of Figure 6.43 is used to provide a load
voltage of 5 V at a current of 2 A. The bridge rectifier results in a peak
supply voltage of 12 V. A minimum difference of 2.5 V is required be¬
tween the input and output terminals of the regulator for it to function
properly. Determine the minimum-size filter capacitance that can be used
(power-line frequency of 60 Hz). What is the average power dissipated
by the regulator for this capacitance?
6.39 Repeat Problem 6.38 for the condition that the supply voltage ripple
vsuppiyp-p not be greater than 2 V.
6.40 Repeat Problem 6.38 for a power-line frequency of 800 Hz. Not only will
a much smaller filter capacitor be required, but the size of the iron-core
transformer will also be reduced.
6.41 Standard D-type cells (flashlight batteries) have the following approxi¬
mate charge capacity for intermittent service: carbon-zinc, 6 Ah; zinc-
chloride, 9 Ah; alkaline, 15 Ah. Repeat Example 6.9 for these batteries.
6.42 Determine the life of the cells of Problem 6.41 when used to power a
0.3-A flashlight bulb. What is the life for a 0.5-A bulb?
6.43 Consider the battery backup circuit of Figure 6.47.

^Supply = 12 V, VBat = 9 V, Rhozdl = 1 k^^

Assume foion) = 0.7 V for the diodes.

a) What is the voltage of R Load2 for the utility-supplied power and when
there is a utility outage?
b) Suppose that a constant load voltage of 6 V is required. Design a
zener diode regulator circuit to achieve this. Assume that a zener
diode current of at least 1 mA is required for its operation.

6.44 For short-duration power outages, a large electrolytic capacitor can be

used as a backup energy source (Figure P6.44). During normal operation,
'^Supply = 5 V. Assume that the electronic load (for example, a clock)
operates satisfactorily for a voltage of 2 V or greater. What is the time
interval for which the electronic load will operate during a utility outage?

418 ELECTRONIC POWER SUPPLIES

 D IkQ

-VvV
^Supply
+
T ^Load
Figure P6.44

X
10,000 [dF
Rt

1.5 kQ

6.45 Repeat Problem 6.44 for a load that is characterized by a constant current
of 2.5 mA.

Figure P6.46

6.46 Consider the power supply of Figure P6.46 that uses a 6-V rechargeable
battery. Assume the peak supply voltage is 12 V and that the battery has
an equivalent resistance of 0.1 ^2. Determine the average battery current
as well as the peak-to-peak ripple load voltage.

Figure P6.47
6.47 A 12-V lead-acid automobile storage battery with an equivalent resis¬
tance of 25 m^2 is used to power a load requiring a current of 3 A. The
battery charger of Figure P6.47 is connected to the battery. Determine
the average battery current with diode voltages voon of 0.8 V assumed.
Determine and sketch the ripple load voltage. What is its peak-to-peak
value?

COMPUTER SIMULATIONS

C6.1 A solution of Problem 6.15 is desired using a SPICE simulation. Assume

a value of h for the diodes of the bridge rectifier that results in a diode
voltage of approximately 0.8 V for the peak diode current (np = 1.4).
a) Determine ULoad(^), ^Load(^), and /av of the circuit for an ideal trans¬
former. What is the peak current of the diodes?

COMPUTER SIMULATIONS 419

 b) Consider the case for a transformer with a series resistance of 0.2 Q
and a series inductance of 0.5 mH. Determine t>Load(^)5 ^Load(^)?

/av for this condition. What is the peak current of the diodes?
C6.2 Obtain a solution for the half-wave voltage doubler circuit of Prob¬
lem 6.19 using a SPICE simulation. The input is a 120-V (rms) util¬
ity voltage source with a frequency of 60 Hz. Component values are
C = 10 /xF and Ri = 20 k^2. Assume a value of 4 for the diodes that
results in a voltage of 0.8 V for a peak current of 100 mA (np = 1.2).
a) Determine the three voltages of the circuit, VAit), vsit), and vdt)
for steady-state conditions. What is the average load voltage and
current?
b) Consider the case for a second capacitor (10 /xF) connected in parallel
with Rp. Determine the three voltages of the circuit for this condition.
What is the average load voltage and current? What is the peak-to-
peak ripple of the load voltage? What are the voltage ratings required
for the capacitors?
c) Determine the capacitances required to reduce the peak-to-peak ripple
load voltage to 5 V.
C6.3 In Example 6.6, a rectifier and filter circuit were designed to produce an
average load voltage of 12 V at a current of 0.5 A. The transformer used
for the circuit has a series resistance of 1 ^2 and a series inductance of
2 mH. The diodes may be assumed to have a value of Is that results in a
voltage of 0.75 V for a current of 0.5 A (the average current).
a) Determine the average and peak-to-peak values of the load voltage for
a filter capacitance C of 10,000 fx¥. What is the peak diode current?
b) Repeat part (a) for C = 20,000 /xF.
C6.4 The SPICE diode simulation model includes a reverse breakdown effect
that produces a diode current component fobreakdown given by
f r\ L 1 j — — Ji. 1 j P {^D H" M>reakdown)/
^Dbreakdown — •‘breakdown^

^breakdown! — M)reakdown
a) Using the default value for IBV, determine vp, for reverse currents
of 10 and 200 mA for a diode with a breakdown voltage of 12 V.
Determine the effect of specifying a breakdown current of 10 mA.
b) Simulate the behavior of the zener diode regulator of Example 6.7
for a zero load current and a load current of 100 mA. Determine the
maximum and minimum values of load voltage for the maximum and
minimum supply voltages of Example 6.7.
C6.5 The band-gap voltage reference of Figure 6.41 has the following transis¬
tor and circuit parameters:

= 100, Is = lx 10-15 A, nF = l
Ri = 500 R2 = 3 k^^, R3 = 140^, R4 = 1
a) Determine the dependence of VRef on Vcc (0 to 10 V) for temperatures
of 27, 54, 81, and 128 °C.

420 ELECTRONIC POWER SUPPLIES

 b) Consider the case for Vcc — 5 W. Through a trial and error process,
determine the value of Rz that minimizes the temperature dependence
of VRef.
C6.6 The transformer and rectifier circuit of Figure 6.23 are used with the
electronic regulator of Problem 6.31 (Figure P6.31). Use a value of 24 V
for Vtn and determine the steady-state, peak-to-peak ripple of ^supply?
ULoad? ^nd the base-ground voltage of the transistor. Use a value of Is for
the transistor that results in a base-emitter voltage of 0.8 V for a collector
current of 120 mA (n'p — 1.2).
C6.7 Determine the dependence of the average value of i^Load on the load cur¬
rent of Simulation C6.6 using load resistances of 50,100,500,1000, and
2000 On the basis of these data, what are the approximate Thevenin
voltage and resistance of the circuit?

DESIGN EXERCISES

D6.1 Design a transformer power supply (full-wave rectification, 60-Hz power

line frequency) with a capacitor filter to provide an average load voltage
of 15 V and a current of 200 mA. Although the peak-to-peak load ripple
voltage is to be no greater than 0.5 V, the smallest standard-size capacitor
is to be used (nominal values with multiples of 1, 2.2, 4.7). What is the
approximate turns ratio of the transformer required for a primary voltage
of 120 V (rms)? What is the approximate load voltage of the supply for
a zero load current?
D6.2 Design a power supply regulated by a zener diode to replace a 9-V battery
used to power a small radio. Assume that a maximum current of 50 mA
is required and that the peak-to-peak ripple load voltage is not to exceed
10 mV. A transformer-powered (60 Hz) bridge rectifier is desired, and
the power dissipated by the filter-regulator circuit should not exceed 50-
percent of that supplied to the load.
D6.3 Design a rectifier, filter, and electronic regulator circuit that will produce
an output voltage of 9 V for a current of 0 to 250 mA.
D6.4 Design a rectifier, filter, and electronic regulator circuit that will produce
an output voltage of 15 V for a current of 0 to 100 mA.
D6.5 Modify the design of D6.4 so that a variable output voltage of 0 to
15 V is obtained. Use a standard adjustable electronic regulator and a
standard-value potentiometer for the voltage adjustment.
D6.6 Design an op amp power supply that has outputs of 4-12 V and —12 V
for currents of at least 50 mA. The rectifier circuit using a center-tapped
transformer (Figure 6.6) will provide positive and negative rectified volt¬
ages if a second set of diodes is used. (The diodes have interconnections
identical to those of a bridge rectifier.) Use two electronic regulators for
the design.
D6.7 A rechargeable battery of 10 nickel-cadmium cells is used in the

DESIGN EXERCISES 421

 emergency power supply of Figure 6.48 (60-Hz utility supply). The load
current is 50 mA. High capacity D cells with a 4.0 Ah charge capacity and
an equivalent internal resistance of 20 are available. To maintain the
battery charge, an average charging current of 80 mA is required, and the
minimum instantaneous charging current is not to be less than 20 mA.
The peak value of ^Supply? is 18 V.
a) Determine the values of Ri and C required (maximum Ri and mini¬
mum C).
b) What is the length of time for which a utility outage can be tolerated
with the cells not being discharged by more than 50 percent of their
fully charged capacity?

422 ELECTRONIC POWER SUPPLIES

 APPENDIX A

FABRICATION OF INTEGRATED CIRCUITS

Modern electronic systems depend on the technology developed for fabricat¬

ing integrated circuits. Integrated circuit technologies have achieved complexi¬
ties unimaginable using discrete components and have made economical mass
production possible. Electronic circuit design and integrated circuit fabrication
require highly specialized, distinct areas of technological expertise. However, to
produce optimal integrated circuits, it is necessary that the practitioners of these
two technologies interact. The result of this joint effort has been a cornucopia of
general purpose and specialized integrated circuits.
An understanding of physical and chemical processes utilizing high-vacuum
techniques and high-temperature reactions is required for designing and fabri¬
cating integrated circuits. Moreover, the physical dimensions and tolerances of
integrated circuit elements are much smaller than those utilized by more con¬
ventional engineering disciplines. Thus, the design and fabrication of integrated
circuits is an extremely challenging endeavor.
Figure A.l provides a perspective on commonly used physical dimensions.
For measurements associated with everyday activities, we tend to think in terms
of either inches and feet or centimeters and meters, depending on our cultural
background. For the elements of an integrated circuit, these are very large dimen¬
sions. On a logarithmic scale, integrated circuit dimensions, which are generally
expressed in microns {jxm, 10“^ m), tend to fall midway between the size of atoms
and everyday measurements. Through conventional machining techniques, toler¬
ances of 0.001 in., ^15 /xm, are not uncommon, whereas the smallest dimension
of a typical machined item might be only 0.01 in., ^0.25 mm. As a comparison,
the wavelengths of visible light are centered around an approximate value of
0.5 /xm, which is a dimension comparable to the smallest dimensions of modern
integrated circuit devices. To place this in perspective, the smallest integrated
circuit dimensions are about a thousand times larger than the “size” of atoms
and one thousand times smaller than those of extremely small, conventionally
machined parts.

423
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A.1 INTEGRATED CIRCUIT TRANSISTORS

Although gallium arsenide is used for specialized integrated circuits, most com¬
mercial circuits are fabricated from silicon. As indicated in Figure A.l, individual
integrated circuits (generally hundreds) are fabricated on a single silicon wafer.
Because the depth of the electronic components fabricated on the wafer is gen¬
erally considerably less than the wafer’s thickness, most of the wafer’s thickness
serves as the physical support of the components. Individual integrated circuits,
simultaneously fabricated, are separated by either a sawing or laser cutting oper¬
ation. A BJT-type integrated circuit, depending on its application, may have 10
to 1000 or more individual transistors. Typical dimensions of BJT devices are 10
to several 10s of microns. Analog and digital BJT integrated circuits will have
numerous resistors and possibly a few very small-capacity capacitors.

Figure A.l: Integrated circuits fabricated on a single wafer.

junction
BJT
transistor

77-channel
^ BiCMOS
MOSFET
^ CMOS
p-channel
MOSFET J
silicon wafer individual 10 to 10^
10 cm diameter integrated circuits devices per
or larger 0.1 to 1 cm^ integrated circuit
0.5 mm or thicker or larger

424 FABRICATION OF INTEGRATED CIRCUITS

 A very common logic integrated circuit design uses only w-channel MOSFET
devices. Conventional circuits of this design may have thousands to millions of
devices with device dimensions that are only a couple microns. The upper limit for
the number of MOSFET devices that can be fabricated on a single integrated cir¬
cuit appears to be considerably in excess of a billion. To produce these ultralarge-
scale integrated circuits, device dimensions of less than a micron are required.
Logic systems using n-channel and p-channel MOSFET devices, CMOS circuits,
are also common. Although CMOS logic circuits are more energy efficient than
those using only w-channel MOSFET devices, the increased complexity of fab¬
ricating both types of devices tends to result in integrated circuits with fewer
devices. Another advanced integrated circuit, the BiCMOS integrated circuit,
utilizes all the devices indicated in Figure A.2.
The integrated circuits are fabricated using a set of mask and optical lithogra¬
phy steps to define the different regions of devices. Following their fabrication,
the integrated circuits are separated and tested. Leads are then attached to the
good circuits, which are subsequently appropriately packaged.
A typical bipolar junction transistor is indicated in Figure A.3. This device,
a planar transistor, is fabricated on a p-type substrate onto which an w-type
epitaxial layer has been grown. The active transistor area is the region defined
by the thin p-type base region below the emitter terminal; the other areas serve
to connect the device terminals to the active area. For normal transistor opera¬
tion, the heavily doped emitter region supplies the free electrons that cross

Figure A.3: A small-geometry NPN integrated-circuit transistor.

The width of the device is typically less than 100 /tm, and the depth
of the n-type epitaxial layer that forms its collector is only about
15 iJ,m.

p-type isolation wall

p-type base region

-.
n* buried layer below collector

collector base emitter SiOo

^y^^/yy/.^rD//yyy/^~''^l
ri^
rP buried layer
«-type epitaxial layer

A.l INTEGRATED CIRCUIT TRANSISTORS 425

 gate "stripe"

diffusion s .n^ diffusion

p--| ,---

W
/ -i
source/drain
1 „
drain/source

source/ drain/
drain gate source Si02

IZZZZZZ&I^ZZ^

Figure A.4: Structure of a typical w-channel MOSFET integrated circuit de¬

vice. For small devices, the depth of the source-drain regions is 2-3 /tm or
less, and the channel dimensions L and W are a few microns or less.

the forward-biased emitter-base junction in a downward direction (Figure A.3).

Immediately below this junction is the collector-base junction which, for normal
operation, is reverse-biased. The buried region, which extends from below
the collector terminal to the active area of the transistor, ensures a low-resistance
connection to the collector. The heavily doped region below the collector
terminal results in an “ohmic” connection to the lightly doped n-type collector
region. The transistor is surrounded by a p-type isolation wall that joins the
underlying substrate. The substrate is connected to the most negative potential
of the circuit. Hence, the junctions formed between the buried layer and the
epitaxial layer of the collector with the substrate are reverse biased, and thus
the only current between the collector and the substrate is the capacitive current
of the reverse-biased junction. As can be seen from Figure A.3, relatively large
isolation walls are needed to isolate the collector regions of adjacent transistors.
An integrated-circuit n-channel MOSFET device is depicted in Figure A.4. Be¬
cause it is not necessary to surround this device with an isolation wall, the device
area is much smaller than that of a BJT device. The MOSFET device consists of
two heavily doped (n+) wells that function as the drain and source of the device.
The external voltages of the circuit determine which well is the drain or source,
the more positive well being the drain. The gate is above the very thin portion
of the oxide layer. When the device is operating, the channel of mobile charges
is below the gate and between the two wells. An enhancement device, a device
with a positive threshold voltage, is shown. Alternatively, the channel region can
be lightly doped to reduce the threshold voltage of the device. Although this re¬
quires an additional processing step, depletion devices formed in this fashion are

426 FABRICATION OF INTEGRATED CIRCUITS

desirable for many applications. The transconductance parameter of a MOSFET
device depends on processing parameters - in particular the oxide thickness and
the channel dimensions W and L. Generally, different channel widths W are used
to fabricate devices with different transconductance values. Thus, except for W,
the MOSFET devices of an integrated circuit will be identical. Very small physical
dimensions, less than a micron, are realized in modern ultralarge-scale integrated
circuits.
The earliest integrated circuits, introduced in the mid-1960s, utilized bipolar
junction transistors. Integrated circuits with MOSFET devices did not appear
until the end of the decade. Numerous integrated circuit device configurations
are now common. Bipolar analog integrated circuits may not only use low-power
transistors similar to the transistor of Figure A.3 but also PNP transistors, junc¬
tion field-effect transistors, and power devices. Numerous processing techniques
have also been introduced to improve the basic MOSFET device of Figure A.4.
Furthermore, charge storage and transfer MOSFET-type circuits are now exten¬
sively used for memory, other logic functions, and video applications.

A.2 FABRICATION PROCESSES

Although transistors have regions with different densities and types of dopants,
an active semiconductor, that is, the region below the oxide layer of Figures A.3
and A.4, is a single crystal. Donor or acceptor atoms are introduced into the initial
semiconductor crystal lattice to form the n-type or p-type regions. Throughout
the fabrication process, many steps of which are at elevated temperatures, it is
necessary to preserve the single-crystal structure of the semiconductor - a struc¬
ture compromised by rapid temperature changes or by contamination. Although
the discussion that follows will focus on silicon transistors, many of the same
fabrication techniques are used to produce gallium-arsenide transistors. To pro¬
duce an integrated circuit, a number of different sequential fabrication steps -
steps that may need to be repeated multiple times - are needed.

CRYSTAL GROWTH AND WAFER FABRICATION

Quartzite, a pure form of sand (SiOi), is the primary feedstock for integrated
circuits. An initial carbon-reducing reaction in a high-temperature furnace is
used to produce metallurgical-grade silicon, which is then treated with hydrogen
chloride to form trichlorosilane (SiHCb). A fractional distillation process is then
used to reduce the concentration of impurities, and a hydrogen reduction reaction
of the purified trichlorosilane yields what is known as electronic-grade silicon, a
polycrystalline material.
The Czochralski process is used to grow a single crystal from the polycrys¬
talline silicon. A seed crystal of silicon, with the desired crystal lattice orientation,
is brought into contact with a silicon melt (silicon has a melting point of 1415 °C).
The seed is then slowly withdrawn from the melt so the silicon that adheres to
the seed crystal (which serves as a template) forms a single crystal as it solidi¬
fies. With the slow withdrawl of the crystal, the growth progresses, forming a

A.2 FABRICATION PROCESSES 427

 cylindrical crystal called a boule. A boule length of 1 to 2 m with a diameter
of up to 30 cm can presently be achieved. To form p-type silicon that may be
desired for the substrate of an integrated circuit, an acceptor impurity, such as
boron, is added to the silicon melt before the crystal is withdrawn.
One or more flats are ground the length of the boule to indicate the crystal
orientation and doping type. After etching, the boule is sliced into wafers with a
steel saw blade impregnated with diamond particles. To complete the preparation
of the wafers, they are mechanically lapped, etched, and then polished through
an electochemical polishing process.

EPITAXIAL DEPOSITION
This process consists of growing a silicon crystal onto the surface of a silicon
substrate. Because the surface atoms of the substrate serve as the template for
the epitaxial growth, the growth and the substrate form a single crystal. The
epitaxial layer will generally have a different doping than the substrate, thereby
forming a junction at the boundary of the epitaxial layer and the substrate. This
process was used to grow the w-type epitaxial layer that forms the collector of
the transistor of Figure A.3, while the base and emitter of the transistor, formed
by subsequent doping steps, are embedded in the epitaxial layer.
A thorough cleaning of the substrate surface onto which the growth is to occur,
including the removal of the surface oxide, is important. An epitaxial deposition
occurs when a vapor containing silicon atoms reacts with the substrate within
a high-temperature reactor (1000 to 1200 °C). Generally, hydrogen is used as
a carrier for the vapor, and either silicon tetrachloride (SiCU) or silane (SiH4),
gases that are reduced by the hydrogen at the high reactor temperature, is the
source of silicon atoms. A controlled quantity of acceptor or donor atoms is used
to form a p- or n-type epitaxial layer. Because this is a high-temperature process,
the doping atoms of the substrate tend to migrate into the epitaxial layer, forming
a graded junction.

DOPING: THERMAL DIFFUSION

A high-temperature diffusion reaction is frequently used to introduce acceptor
or donor atoms into a crystal lattice. This is the process by which the base and
emitter regions of the transistor of Figure A.3 were doped and the drain and
source wells of the MOSFET device of Figure A.4 were formed. At elevated
temperatures (above 1000 °C), a sufficient number of atoms of the crystal will
have enough energy to break their lattice bonds, thereby providing vacancies
for the dopant atoms. As a result, the diffusion coefficient of donor or acceptor
atoms, such as phosphorus or boron, is adequate for doping the silicon crystal.
Nitrogen is used to carry the dopants to the surface of the silicon wafer.
The diffusion profile of the dopant’s atoms in the silicon wafer depends on the
wafer temperature during the diffusion and the time interval over which it was
exposed to the dopant atoms. Since diffusion occurs at elevated temperatures,
careful control of the subsequent high-temperature reactions that may be required
is necessary as the dopant atoms have a tendency to migrate.

428 FABRICATION OF INTEGRATED CIRCUITS

 DOPING: ION IMPLANTATION

Although thermal diffusion is useful for forming moderate- and large-size

transistor regions, it does not provide the control necessary for producing well-
defined regions required for modern small-size devices. Furthermore, it is difficult
to produce lightly doped regions. Ion implantation, a process considerably more
complex and expensive than diffusion, provides a means of producing accurately
controlled, well-defined, doped regions. Implantation, a vacuum process, is car¬
ried out by bombarding the silicon wafer surface with high-energy dopant ions
(10 to 200 keV).
The source of ions is generally a feed gas such as BF3, AsHs, or PH3 that
contains a gaseous compound of the desired dopant. A hot filament produces
electrons which, after being accelerated, ionize the feed gas. A mass spectrome¬
ter is then used to separate the desired implant ions from impurities. The high-
energy ions, at the same time as being embedded in the crystal lattice, may also
result in significant damage to the crystal structure. Hence, annealing at a mod¬
erate temperature (500 to 600 °C) is necessary to mitigate the lattice defects
and dislocations caused by the ion implantation. Because only a moderate an¬
nealing temperature is required, undesirable reactions that may occur at higher
temperatures, such as the migration of dopant atoms, are avoided.

THERMAL OXIDATION
A thin oxide layer is used to protect the surface of an integrated circuit as
well as for the gate region of MOSFET devices. In addition, an oxide layer is
frequently grown following a high-temperature processing step such as thermal
diffusion to protect the surface before the next step. Because the oxide is formed
from the surface layer of the silicon wafer, the transition region that forms the
surface of the transistor, is not exposed to atmospheric contaminants as a result
of this process. Hence, surface defects that tend to degrade the performance of
transistors are minimized.
Either pure oxygen (dry oxidation) or a mixture of oxygen and water vapor
(wet oxidation) is passed over the silicon surface at an elevated temperature (900
to 1200 °C). Oxygen atoms move inward into the silicon, initially forming a
thin-surface oxide layer. To continue the oxidation process, that is, to obtain a
thicker oxide layer, oxygen atoms must diffuse through the existing oxide layer.
An hour or longer may be necessary to obtain a l-jim thick oxide layer.

OPTICAL LITHOGRAPHY
For a processing step such as introducing dopant atoms by diffusion or ion
implantation, it is necessary to define the precise boundaries for the process. For
the very small dimensions utilized, this is achieved through an optical lithography
process. The integrated circuit’s surface with the transistor and wiring details
(for example, the top view of Figure A.3 or A.4) may be laid out at a convenient
size, several hundred times the actual size, and then photographically reduced.
Individual masks are required for the different processing steps; for example.

A.2 FABRICATION PROCESSES 429

 photoresist layer
silicon dioxide

(a) - silicon wafer

ultraviolet radiation

(b) -1 ■4— glass slide - photomask

■4— opaque layer of chromium

silicon wafer

•4— developed photoresist

(c)

y//////A ■ oxide window

(d) ■ silicon wafer

Figure A.5: The photomasking process.

one to form the emitter, another the base, and still another the buried collector
layer of the transistor of Figure A.3. The image of an integrated circuit, after
being photographically reduced, is replicated and transferred to a single mask
that has the image of the entire wafer (generally hundreds of integrated circuits).
The photomasks will be either the size of the integrated circuit’s image (1 x) or a
few times that of the image (possibly 5x or 10x).
The masking process by which boundaries are defined relies on a photoresist, a
thin photosensitive film that is applied uniformly to the entire surface of the silicon
wafer and hardened by baking at a low temperature. When the photoresist is ex¬
posed to ultraviolet light, a chemical reaction occurs, thus differentiating regions
that have been exposed from those that have not. In Figure A.5(a), a photoresist
has been applied to an oxide layer that has previously been grown on a silicon
wafer. As shown in Figure A.5(b), the photomask is placed directly above the
silicon wafer below a source of ultraviolet light. On the basis of the process used,
the mask may either be in contact with the wafer or there may be a slight gap be¬
tween the mask and the wafer. Alternatively, an optical system may be used if the
mask image is to be reduced. The opaque layer of chromium, photographically
formed when the mask was fabricated, allows the ultraviolet radiation to strike
selected areas of the photoresist. For the photoresist illustrated, the developing re¬
action removes the photoresist from the exposed region (Figure A.5(c)). This pho¬
toresist is designated as being positive, whereas an alternative-type photoresist
in which developing removes the unexposed region is designated as negative.

430 FABRICATION OF INTEGRATED CIRCUITS

The exposed oxide is then removed by etching, resulting in the oxide “window”
of Figure A.5(d) through which, for example, doping atoms can be introduced.
The unexposed photoresist is removed by what is known as a “stripper.”
To illustrate a set of photolithographic processing steps, the bipolar junction
transistor of Figure A.3 will be considered. Before the growth of the epitaxial
layer, an oxide is grown on the wafer, a p-type substrate. A photomask, which
defines the buried layer, is used to produce an oxide window corresponding
to this layer. A thermal diffusion process is then used to form the heavily doped
n-type region in the substrate, the oxide layer is removed by etching, and an
w-type epitaxial layer is grown over the entire wafer. During this process, the
donor atoms of the previously formed, heavily doped, «-type region will tend to
migrate into the epitaxial layer. Again, the surface of the wafer, now the upper
surface of the epitaxial layer, is oxidized. This is followed by a photomasking
process that defines the p-type isolation walls. After another thermal diffusion
process that forms the walls, the oxidation and photomasking steps are repeated
to form the the shallower p-type base region of the transistor. Still another oxida¬
tion and photomask will be used to form the n+ emitter region and the collector
contact. Although several repetitions using different photomasks are necessary
to form the various regions of an individual transistor, thousands, if not millions
of transistors are formed simultaneously on the silicon wafer.

ETCHING
Etching is the process by which an entire surface layer or selected regions of
a layer that have been determined by a photmasking process may be removed.
A wet etching process, using a dilute hydrofluoric acid solution can be used to
remove silicon dioxide. The dilute acid solution is highly selective, that is, it
dissolves the silicon dioxide but has little effect on the underlying silicon wafer.
The silicon wafer of Figure A.5(c) could be etched using this process to produce
the oxide window of Figure A.5(d). Silicon nitride, aluminum, and polycrystalline
layers can also be removed by wet etching with appropriate etchant solutions.
An alternative to wet etching is a dry process known as plasma etching. Plasma
etching not only provides a much greater degree of control but is less sensitive
to different ambient conditions. Because much smaller features can be obtained,
plasma etching tends to be preferred for modern integrated circuits.

THIN FILMS
For early integrated circuits, metallic films that formed contacts and intercon¬
nections were obtained by evaporation. This technique has been replaced by a
sputtering process that results not only in a much better coverage of the film,
but can also be used to deposit metal alloys. An evacuated chamber is required
for the sputtering process. The silicon wafer is located near a target that con¬
tains the desired film material, for example, aluminum. A low-pressure inert gas
is introduced, and, as a result of a potential difference between the wafer and
the target, a plasma discharge is initiated. Energetic ions of the inert gas strike
the target, causing atoms of the target to be ejected and deposited on the sili¬
con wafer. Another widely used process, particularly for forming thicker films.

A.2 FABRICATION PROCESSES 431

 is chemical vapor deposition. In addition to metals, aluminum oxide, dielectrics,
and resistive films may be deposited by this process. If the process is carried a step
further, it is possible using appropriate processing steps to deposit overlapping
conducting layers insulated from each other.

A.3 SUMMARY
Although only two very basic transistor structures were considered in the pre¬
vious discussion, integrated circuit fabrication techniques have been developed
for producing more sophisticated types of transistors, and there are additional,
more advanced processing techniques that are utilized in fabricating modern inte¬
grated circuits. Several general-coverage electronic and semiconductor texts have
brief discussions of fabrication techniques (e.g., Elmasry 1983; Gray and Meyer
1992; Grebene 1984; Soclof 1991; Taur and Ning 1998; Sze 1985, 1998; Tsividis
1987). Furthermore, texts that deal explicitly with fabrication technologies are
also available (e.g., Campbell 1996; Chang and Sze 1996; and Jaeger 1988).
Campbell (1996) starts his preface with the word “magic” to characterize
the fabrication process. Not only might modern integrated circuits appear to be
magic to those not familar with their fabrication, but they may also appear to
be so to those intimately involved with their fabrication. Given the number of
unique processing steps that rely on different scientific disciplines, an expert in
one area may feel totally inadequate in another. To provide an historical perspec¬
tive, consider the situation of those who struggled to fabricate the first somewhat
erratically working transistor at the Bell Telephone Laboratories. A suggestion
at that time, or even over the next decade, of simultaneously fabricating a billion
interconnected transistors on a single integrated circuit, would have been viewed
as pure fantasy. But, the fantasy has been realized.

REFERENCES

Campbell, Stephen A. (1996). The Science and Engineering of Microelectronic Fabrication.

New York: Oxford University Press.
Chang, C. Y. and Sze, S. M. (Eds.) (1996). ULSI Technology. New York: McGraw-Hill.
Elmasry, M. I. (1983). Digital Bipolar Integrated Circuits. New York: John Wiley Sc Sons.
Gray, P. R. and Meyer, R. G. (1992). Analysis and Design of Analog Integrated Circuits
(3d ed.). New York: John Wiley &c Sons.
Grebene, A. B. (1984). Bipolar and MOS Analog Integrated Circuit Design. New York: John
Wiley & Sons.
Jaeger, R. C. (1988). Introduction to Microelectronic Fabrication. Reading, MA: Addison-
Wesley.
Soclof, S. (1991). Design and Applications of Analog Integrated Circuits. Englewood Cliffs,
NJ: Prentice-Hall.
Sze, S. M. (1985). Semiconductor Devices: Physics and Technology. New York: John Wiley
&c Sons.
Sze, S. M. (Ed.) (1998). Modern Semiconductor Device Physics. New York: John Wiley &
Sons.

432 FABRICATION OF INTEGRATED CIRCUITS

Taut, Y. and Ning, T. H. (1998). Fundamentals of Modern VLSI Devices. Cambridge, U.K.:
Cambridge University Press. y , ..
Tsividis, Y. P. (1987). Operation and Modeling of the MOS Transistor. New York: McGraw-
. Hill.
01 If ;• -.Miriii uTktO . i
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fc. I lij.’lCrtON r»Af<'>» 1 * -“"*“11 REFERENCES 433

 APPENDIX B

THE DESIGN PROCESS

The design process cannot be readily characterized. That is, there is not a set of
step-by-step rules by which a successful design can be realized. Furthermore, even
after a design that satisfies all requirements is completed, it may be difficult to
judge whether it is indeed optimal. It is not uncommon at a project’s completion
for those involved to express the thought that if only they had done it another
way, it would have been so much easier - the benefit of hindsight.
When discussing design, we often think in terms of large, complex systems.
But the design of such a system might be the result of an individual’s intense
effort spanning several years such as the development of wide-band frequency-
modulated broadcasting by Armstrong in the 1930s (Armstrong 1940). Alterna¬
tively, a design might be the result of the intense effort of a team of scientists
and engineers as was, for example, the design of the compact audio disc, which
was the joint effort of two normally competing corporations, Sony and Philips,
on opposite sides of the world (Miyaoka 1984). A large design project, however,
involves solving many small design problems - problems that at first glance may
seem to be trivial but on carrying out the design prove to be otherwise. At times,
an overall design may need to be modified because one or more of its components
cannot be realized. The designs discussed in this appendix will be relatively basic
- basic to the point that at first glance they may seem trivial. But these designs,
although seemingly trivial, will illustrate principles that may be applicable to the
design of other, considerably more complex systems.
It is obvious that the way one approaches the design of a system depends on the
particular system. But it also depends on one’s previous design experience as well
as one’s knowledge of published literature. Furthermore, individual temperament
is important. Does one have a bent toward an analytic approach or toward a
simulation approach? Very likely, both will be necessary, but the amount of effort
spent on each will depend on the individual or individuals involved. Although
simulations are attractive, the validity and insight that can be gained through an
analytic solution can be important. Even though seldom mentioned, a knowledge
of designs that did not work can be particularly valuable. Unfortunately, it is

434
necessary to build up this body of knowledge on one’s own because it is not
generally deemed appropriate to publish negative results. Finally, it is worthwhile
to spend some time thinking about a problem (as is commonly said, “sleep on it”)
before beginning. All too frequently one is either tempted to jump in immediately
or may be pressured to do so to obtain a piece of hardware - but often a piece
that may likely need to be redesigned.
A few simple design problems related to individual chapters of the text follow.
These designs rely on the discussion of the particular chapter - not on techniques
that one might use based on'a more extensive knowledge of electronics gained
through additional course work and experience. The design specifications may
appear very limited; however, in proceeding through the design one should find
that the methods employed will apply to a much wider set of design problems.

B.1 BIPOLAR JUNCTION TRANSISTOR CIRCUITS (CHAPTER 3)

A SINGLE-TRANSISTOR LOGIC INVERTER

For the transistor circuit of Figure 3.36, Vcc = 5 V, Vbb — —3 V, = 100,
and i’B£(on) = 0-7 V. Furthermore, there is an output load capacitance Cp of
10 pF. For a no-load condition, the midpoint of the output voltage transition is
to occur for din = 2.5 V and is to have a slope of —5. For an abrupt change of
the input voltage, the time for the output voltage to change to its midvalue of
approximately Vcc/2 is to be no greater than 20 ns. Design a circuit that has a
minimum power dissipation.

DESIGN
Two equations of Section 3.3, Eq. (3.21) for the dependence of dout on din
and Eq. (3.22) for the slope of the response, are needed. The expression for the
slope yields a numerical value for Rq/Rbi as follows:

slope = -fipRc/RBi, = -05 (B.l)

Kbi -pF

Equation (3.21) for dout is used to obtain an expression involving the other
base resistor, namely Rc/Rb2- h should be noted that, on the basis of the design
requirement, dqut = 2.5 V for din = 2.5 V.

/ Rb2F!in + Rbi Vbb \ fipRc

l^OUT = Vcc — - VBE(on)
V Rbi + Rb2 ) Rih
(B.2)
Rbi Rb2
where Rxh =
Rbi + Rb2
Equation (B.2) can be manipulated to yield a value for Rc/Rb2 as follows:

Rc ^Rc Rc Rc
WOUT = Vcc — viN^-H Vbb VBE(on)
Rbi Rb2 Rbi Rb2
(B.3)
X Rc Vcc - l^OUT / \ Rc
{Vbb - -("IN -

B.l BIPOLAR JUNCTION TRANSISTOR CIRCUITS (CHAPTER 3) 435

 ^out(0

Figure B.l: Transient behavior for an input downward transition.

Upon introducing the voltage values and 0.05 for Rc/Rbi, a value is obtained
for Rc/Rb2 as follows:

Rc/Rb2 = 0.0176 (B.4)

If, for example, Rq — 1 then Rgi — 20 and Rb2 = 56.9 k^2. On the basis
of static considerations alone, the resistance values can be scaled (for example,
all doubled or halved) without affecting the static transfer characteristic of the
gate.
As a result of the load capacitance, the dynamic response of the gate depends
on the actual resistance values of the circuit. For an abrupt downward transition
of Pin, the transistor will be cut off, and its collector resistor will determine
the time constant of the concurrent upward transition of pout (Figure (B.l)), If
vcEisat) is ignored (Pc£(sat) ^ 0), the following is obtained for pout if it is assumed
that the input voltage has a downward transition at ^ = 0:

^^ouT = Ucc(l — ^ > 0 (B.5)

The time delay required for pout to reach 2,5 V, that is Vcc/2, can now be
obtained as follows:

Fcc/2 = Vcc(l —

td=RcCL\n2 (B.6)

The preceding value for Rq is obtained by introducing a delay time td of 20 ns.

This results in the following resistance values for the base resistors:

RBi=57.7kQ, RB2 = 164kQ (B.7)

If smaller resistance values are used, the power dissipated by the gate will be
greater. An upward transition of pin that results in a downward transition of
Pout may be shown to result in a transition time of less than 20 ns.

A SINGLE-TRANSISTOR SMALL-SIGNAL AMPLIFIER

A small-signal transistor amplifier is to be designed to supply an output signal

voltage to a load with an equivalent resistance Rl oi 10 kQ. The input voltage
source has an equivalent resistance of 25 kQ, and the supply voltage Vcc is 10 V.

436 THE DESIGN PROCESS

 Vcc^lOV

Figure B.2: Basic transistor circuit.

The voltage gain is to have a magnitude of at least 10 and is to be reasonably

uniform for sinusoidal signals with a frequency range of 50 to 20 kHz. Assume
that the transistor used for the amplifier could have a current transfer ratio ySp
in the range of 75 to 150 and that np — 1.0. The discussion of Section 3.5 may
be considered sufficient for the design.

DESIGN

A transistor with a midvalue for ySp, that is, = 112, is considered for the
initial design. If necessary, the circuit will be modified to accommodate the range
of transistor values for which it is to function.
The design will be based on the circuit of Figure B.2. The corresponding small-
signal equivalent circuit is presented in Figure B.3. A value for the collector
resistor Rq that is equal to Rl (10 k^2) is a reasonable design choice. A quiescent
collector-emitter voltage Vce of Vcc/2 will tend to allow for the largest output
signal variation and will tend to be least sensitive to variations in ySf. These
considerations establish a design value for the quiescent value of the collector
current Iq’
Vcc — Vc£
VcE — Vcc — IcRc, Ic = = 0.5 mA (B.8)
Tc
For a transistor with — 112, a. quiescent base current Ip of 4.46 /jlA is required.
The base resistor Rp determines this current as follows:
Vcc — '^BE{ on)
Rp = = 2.09 MQ (B.9)
h
The quiescent base current also determines the transistor equivalent resistance

Figure B.3: Small-signal equivalent circuit of the basic transistor amplifier of

Figure B.2. The equivalent device capacitance of Figure 3.77 is assumed to be
small enough that its effect can be ignored.

B.1 BIPOLAR JUNCTION TRANSISTOR CIRCUITS (CHAPTER 3) 437

 r-n of the small-signal equivalent circuit (Eq. (3.63) because for the ap¬
proximations of this section):

5,61 kn (B.IO)
h
A nominal value of 25 mV is used for Vr. Equation (3.69) is used to obtain a
value for the mutual conductance as follows:

gm =20 mS (B.ll)
ftp Vt
The voltage gain of the amplifier is determined using the small-signal equivalent
circuit of Figure B.3. It is assumed that the capacitances Cs, and Cp are sufficiently
large that they may be treated as short circuits. Because Rg ^ (2.08
compared with 5.61 k^2), its effect will be ignored.
rnVsit)
^be — p
rjt + Rs
O MD gmrnVs{t)Rc\\RL
Vlit) = -gmVbeRcWRl =-—5- (B.12)
rjt + Rs
^lit) = -16.3 Vs(t)
Flence, the magnitude of the small-signal gain of 16.3 exceeds the minimum
design requirement of 10.
Capacitance values must now be determined. Although a detailed considera¬
tion of the effect of finite capacitances is beyond the introductory treatment of
the chapter, reasonable “estimates” for the capacitance can be obtained. For a si¬
nusoidal signal, it is the reactance of the capacitance that determines the response
of a circuit:
1 1
X5 Xl (B.13)
InfCs’ Inf Cl
The magnitude of these quantities will be the largest for the lowest frequency
of interest (50 Hz for the design specification). Hence, the magnitudes of
the reactances should be small compared with the resistances to which they are
connected. This implies the following:
1 1
« Rs, « Rl (B.14)
InfiCs InfiCp
Consider the case for which the preceding relations are equal.

(B.15)

Because the response of two circuits is involved, a doubling of capacitance values

should result in an acceptable response. Doubling and using the next largest
standard capacitance values yields C5 = 0.2 /zF and Cp — 0.5 yuF. Furthermore,
a standard resistance value of 2.0 MS2 is used for Rg.

438 THE DESIGN PROCESS

 To complete the design considerations, the effect of transistors with different
values of must be determined. A 2.0-Mr2 resistance for Rp results in a quies¬
cent base current of 4.65 ixA and a corresponding value of 5.38 for These
values do not depend on the transistor. The following is obtained for transistors
with extreme values of fip:

Pf =75 ^P = 150
Ic = 0.349 mA Ic = 0.698 mA
(B.16)
Tce = 6.51 V Vc£ = 3.02 V
viit) = -12.3 Vs{t) viit) = -24.7 Vs(t)

Because transistors with extreme values of ^p result in an acceptable response,

the design conditions are fulfilled.

B.2 METAL-OXIDE FIELD-EFFECT TRANSISTOR (CHAPTER 4)

BIASING A MOSFET CIRCUIT

For a small-signal amplifier, the quiescent drain current of the device should
have a minimal dependence on the device’s parameters. A source resistor, as
shown in Figure (B.4), may be used to minimize the dependence. Determine
values of the gate biasing resistors Rgi and Rgi and of the source resistor Rs
that result in a drain current that does not vary by more than ±10 percent from
a nominal value of 0.25 mA. A minimum value of Rs is desired, and the parallel
combination of the gate resistors is to be approximately 1.0 Because the
substrate of the device is connected to ground, its threshold voltage will depend
on the quiescent source-substrate voltage.

DESIGN
Because the nominal quiescent drain current Id is 0.25 mA, the drain-ground
voltage Vdg is 5.0 V. For a ±10-percent variation of Id, the variation in Vdg
is q=0.5 V. A trial and error method of solution is necessary. Although a strictly
analytic solution could be utilized, SPICE simulations used in conjunction with
analytic calculations will minimize the overall effort.

Figure B.4: A MOSFET circuit with a source resistor.

Fdd = 10 V

0.5 mA/V^ < k < 2 mA/V^

Vtq = 1.0 V
y = 0.4
2(pp = 0.6 V

B.2 METAL-OXIDE FIELD-EFFECT TRANSISTOR (CHAPTER 4) 439

 Vdd^iov

^Glll^G2

-wv
+
'^GG —
Rca ypD
Vgg =
Rgi + Rg2

Figure B.5; Thevenin equivalent circuit for the gate resistors of

Figure B.4.

The gate resistors of Figure B.4 may be replaced by a Thevenin equivalent

circuit (Figure B.5). Because the quiescent gate current is zero, the design process
is reduced to finding values of Vgg and Rs. Convenient voltage values are assumed
for IdRs corresponding to a nominal quiescent drain current of 0.25 mA. If this
voltage is known, the threshold voltage of the device can be determined. The
next step is to calculate the quiescent gate-source voltage Vgs that yields the
nominal drain current of 0.25 mA. A “midvalue” of 1.0 mA/V^ is assumed for
k. The equivalent voltage Vgg is Vgs +1dRs- To determine the drain currents for
devices with k = 0.5 mAA^^ and 2.0 mAA^^, a SPICE simulation can be used.
To begin, a value of 1.0 V is tried for IdRs^ This corresponds to a value of 4
for Rs because Id = 0.25 mA. To determine the threshold voltage Vj, Eq. (4.53)
is used (vsB — IdRs = 1-0 V).

Vt = Vjo + y {\/VsB + '2(j)p — y/lcpp)

= 1.196 V (B.17)
If the device is assumed to be in its saturated region of operation, Eq. (4.7) is
used to determine the quiescent gate-source voltage as follows:

Id — ^(Tgs — Vjf

Vgs — Vt = 0.707 V (B.18)

Vg5 = 1.903 V
This requires a value of 2.903 V for Vgg- The MOSFET circuit and the corre¬
sponding SPICE file for a simulation are given in Figure B.6. The circuits with
devices MA and MC yield the quiescent currents for k = 0.5 mA/V^ and 2.0 mA/V^,
respectively. The circuit with device MB provides a check for ^ = 1.0 mA/V^. The
following is obtained from the output file of the SPICE simulation:

^ = 0.5mA/V^ ^=1.0mA/V^ = 2.0 mA/V^

Id = 0.207 mA Id = 0.250 mA Id = 0.287 mA
Vdg = 5.87 V Vdg = 5.00 V Vdg = 4.26 V

This solution is not acceptable because the variation in Id is too large.

440 THE DESIGN PROCESS

MOSFET Bias
VGG 2 0 2.903
VDD 20 0 10
.OP

MA 1 2 3 0 MOSA
RDA 20 1 20K
RSA 3 0 4K

MB 4 2 5 0 MOSB
RDB 20 4 20K
RSB 5 0 4K

MC 6 2 7 0 MOSC
RDC 20 6 20K
RSC 7 0 4K

.MODEL MOSA NMOS KP=.5E-3 VT0=1 PHI=.6 GAMMA=.4

.MODEL MOSB NMOS KP=lE-3 VT0=1 PHI=.6 GAMMA=.4

.MODEL MOSC NMOS KP=2E-3 VT0=1 PHI=.6 GAMMA=.4

.END
Figure B.6: SPICE circuit and simulation file for the MOSFET circuit with a
source resistor.

Because a larger value of Rs is needed, a circuit will be examined that has a

value of 1.5 V for IdRs {Rs — because Id — 0.25 mA). A value of 1.270 V
is obtained for Vr and 3.477 V for Vgg- A SPICE simulation for these values
yields the following:

)^ = 0.5mA/V^ )^=1.0mA/V^ ^ = 2.0 mA/V^

Id = 0.217 mA h = 0.250 mA Id = 0.277 mA
Vdg — 5.66 V Vdg = 5.00 V Vdg = 4.47 V

A still larger value is needed for Rs.

B.2 METAL-OXIDE FIELD-EFFECT TRANSISTOR (CHAPTER 4) 441

 For IdRs = 2.0 V (Rs = 8 because h = 0.25 mA), a value of 1.335 V is
obtained for Vt and 4.042 V for Vgg- This yields the following:

k = 0.5 mA/V^ k=1.0 mA/V^ k = 2.0 mA/V^

Id == 0.224 mA Id = 0.250 mA Id = 0.271 mA

Vdg = 5.53 V Vdg = 5.00 V Vdg = 4.58 V

These results are extremely close to those required, for the overall variation in
Id is 0.047 mA (a ±10% variation is 0.050 mA). A slight increase in Vgg would
make the variation in Id symmetrical about 0.25 mA.
Values for Rgi and Rgi can now be obtained by using expressions for Vgg
and RgiI|Rg2 as follows:

Rgi Vdd
Vgg
Rgi ± Rg2
RgiRg2 (B.19)
RgiII^G2
Rgi ± Rg2

Vgg Vdd
Rgi1|Rg2 Rg2

Rg2 ^(Rc)IIRG2) = 2.47Mn

A design value of 1.0 is used for RgiI|Rg2- An expression and value can be
obtained for Rgi by considering the voltage across Rg2, namely Vdd — Vgg as
follows:

Rg2 VpD
Vdd — Vgg =
Rgi ± Rg2
VpD — Vgg _ VpD
(B.20)
RgiI|Rg2 Rgi

Rgi = „ (RgiI|Rg2) = 1.68 Mn

vpD - VGG

If the nearest standard 5-percent resistance values are used for Rgi and Rg2?
2.4 and 1.6 respectively, the nominal value of Vgg is only slightly
changed (Vgg = 4.0 V). Although the quiescent drain currents also shift slightly,
their variation remains within a range of 0.05 mA.

B.3 NEGATIVE FEEDBACK AND OPERATIONAL AMPLIFIERS (CHAPTER 5)

A SMALL-SIGNAL AMPLIFIER
An amplifier is to be designed using an operational amplifier to supply an
output signal voltage to a load with an equivalent resistance R^ of 10 k^2. The
input voltage source has an equivalent resistance of 25 k^2, and the supply voltage

442 THE DESIGN PROCESS

 Rg 25 kQ Cg

Figure B.7: Operational amplifier circuit. Both positive and negative sup¬
ply voltages are necessary for the operational amplifier.

Vcc is 10 V. The voltage gain is to have a magnitude of at least 10 and is to be

reasonably uniform for sinusoidal signals -with a frequency range of 50 Hz to
20 kHz. These design requirements for an op amp circuit are the same as those
for the single-transistor small-signal amplifier previously considered.

DESIGN
Although the supply voltage is only 10 V (equivalent to ±5 V supplies), it
is adequate for an LF356 op amp. Alternatively, an op amp especially designed
for a low supply voltage could be used. To initiate the design process, the basic
noninverting amplifier circuit of Figure B.7 is considered. A capacitor Cs is in
series with the input voltage source. This circuit will ensure proper operation of
the amplifier if the input signal source should happen to have an offset voltage.
The input resistor Ri provides a dc connection to the noninverting input of the
op amp. If an op amp with field-effect input devices is used, the input resistor
can be very large (1 M^2 is acceptable). Therefore, the input signal for the op
amp, if the capacitance is treated as a short circuit, will be essentially Vs{t). If
ideal behavior is assumed for the op amp, the following is obtained for the gain
of the circuit (Eq. (5.41)):

vdt) = (l + f) '’M (B-21)

Hence, if the ratio Ri/Ri is equal to 9, a gain of 10 will be realized. A ratio of

10 for Ri/Ri yields a gain of 11, which is a value that should ensure an overall
gain of 10 if components deviate from their nominal design values. The following
resistance values are reasonable:

= 10 Ri = 100 kQ (B.22)

These values of resistance minimize the current that needs to be supplied by

the output of the amplifier and are sufficiently small to minimize the effect of
capacitive currents due to stray capacitances for the frequency range over which
the amplifier needs to function.
For a single supply voltage, a circuit similar to that of Figure 5.57 is needed
(Figure B.8). For a zero input signal voltage, the noninverting input voltage is
Vcc/2. For the dc condition being considered, the op amp circuit is a unity gain

B.3 NEGATIVE FEEDBACK AND OPERATIONAL AMPLIFIERS (CHAPTER 5)

 ^CC^

Figure B.8: An operational amplifier using a single supply.

buffer (Cl behaves as an open circuit). Hence, the output voltage of the op amp
as well as its inverting input voltage will be Vcc/2.
The amplifier circuit of Figure B.8 has three capacitances. On the basis of
the discussion of Section 5.5, they result in the following break frequencies that
determine the low-frequency response of the circuit:

1 1
fs ft = (B.23)
l7t{Ri/l)Cs' ItiRxCi In RlCl

The quantity Rf /2 for the input break frequency arises because, for small-signal
behavior, the two input resistors are effectively in parallel. If these resistors have
values of 1 M^2, their parallel combination of 0.5 is large compared with
Rs (25 k^2). Because R,/2 is much larger than the resistances of the expressions
for the other break frequencies, an input capacitance Cs is chosen so as to have
a negligible effect at the lower design frequency of 50 Hz. A value of 5 Hz will
be used for fs:

1
Cs 0.0637 /xF (B.24)
InfsiRi/l)

Because R\ and Rl are equal (10 k^2), equal values for C\ and Ci are used. If f\
and fi are equal to one-half the overall lower design frequency, an acceptable
overall response for 50 Hz is obtained {f\ = /l = 25 Hz):

1
Cl = Cz. = = 0.637 AtF (B.25)

Standard values are used for all capacitors.

Cs = 0.1/xF, Ci = Cl = 1.0/xF (B.26)

To achieve an adequate response for the upper design frequency of 20 kHz, an op

amp with a gain-bandwidth product of at least 220 kHz is needed (Eq. (5.84)).
The gain-bandwidth product of most op amps exceeds this value.

444 THE DESIGN PROCESS

 It should be noted that the design of Figure B.8 is as complex as that of the
single-transistor amplifier of Figure B.2. However, the manufacturer’s variations
in op amp parameters will have a much smaller effect on the performance of the
circuit than will manufacturer’s variations in transistor parameters. Furthermore,
the op amp circuit will work equally well with much smaller values of load
resistance.

B.4 ELECTRONIC POWER SUPPLIES (CHAPTER 6)

/•

POWER SUPPLY WITH A SELECTABLE OUTPUT VOLTAGE

A power supply is to be designed that can be used instead of a battery to power
a small electronic system such as a radio or CD player. Output voltages of 3, 4.5,
6, and 9 V, selected by a switch, are desired. The supply is to operate off a 120 V,
60 Hz power line and is to supply a load current of 0-500 mA.

DESIGN
A power supply with an electronic voltage regulator is likely to result in the
simplest circuit. Furthermore, electronic regulation will probably be necessary
to produce an output voltage with a sufficiently small voltage ripple required by
systems designed to be powered by batteries. Power supply “hum,” the result of
the alternating current source, is often a problem for battery-powered systems.
An electronic regulator of the type discussed in Section 6.5 is shown schemat¬
ically in Figure B.9. For most electronic regulators, the current of the common
terminal Iq is relatively small. This may be seen from the basic regulator cir¬
cuit of Figure 6.39 in which the current of the common terminal is that of the
zener diode and that of the negative supply connection of the op amp. Although
more complex circuits, such as that of Figure 6.42, are used for integrated circuit
regulators, the current of the common terminal remains small.
A resistor divider network Ri and Ri is used to produce an output load voltage
that is greater than the nominal output voltage of the regulator VReg, the voltage
across Ri. The following is obtained for the load voltage, ULoad:

VLoad = VReg + (VReg/J^l +

= (1 -l- R2/RijvReg -l- IqRi (B.27)

Figure B.9: Electronic voltage regulator with a voltage divider.

B.4 ELECTRONIC POWER SUPPLIES (CHAPTER 6)

 For the condition that k is small compared with the current of Ri, namely
UReg/jRi, the last term of Eq, (B.27) can be ignored.

l^Load ^ (1 + Rl/Rl)VReg (B.28)

Hence, an arbitrary output load voltage can readily be obtained by means of a

simple resistor voltage divider (uLoad ^ ^^Reg)<
Although one of the standard fixed voltage regulators discussed in Section 6.5
could be used, an “adjustable” voltage regulator designed for the circuit of Fig¬
ure B.9 is selected. If mounted on a suitable heat sink, an LM317, a three-terminal
adjustable regulator, is capable of supplying a load current of 1.5 A. Because this
regulator has a regulated voltage WReg, of only 1.25 V, it can produce the design-
specified voltages. Furthermore, its common-terminal current Iq has a nominal
value of only 50 yuA. Hence, if the current of Ri is sufficiently large, for example
IOOIq (5 mA), Eq. (B.28) applies.
A transformer, rectifier, electronic voltage regulator, and switched set of resis¬
tors composing a voltage divider, are indicated in Eigure B.IO. Consider, initially,
the regulator and voltage divider circuit. With the switch in its uppermost po¬
sition (marked 3 V), the load voltage will be the smallest. Values of Ri and Rz
that result in t^Load == 3 V are therefore desired. Equation (B.28) is used, and an
equality is assumed:

^Load
1 -|- Rz/Rl
^Reg
(B.29)
f^Load / 3.0 V
Rl = 1.4 Rl
R2 =
V ^Reg Vl-25 V

For the next position of the switch (at the junction of Rj, and R4), the effective

Figure B.IO: A power supply with an adjustable regulator.

446 THE DESIGN PROCESS

value of R2 in Eq. (B.28) is Ri + R3 {Ri R2 + R3). A value of 4.5 V is desired
for ULoad as follows:

^ -^2 “H R3 ^Load
Rl ^Reg

= (riv - 0
R3 = 2.6 Rl - 1^2 = 1.2 Rl

In a similar fashion, for the next position of the switch, VLoad = 6 V, and Ri
R2 + R3 + Rd-
^ ^ Rz + R3 + R4 _ ^Load

Rl ^Reg

-') ''' = - 0 '"■ =

R4 = 3.8 Rl - R2 - R3 = 1.2 Rl
For VLoad = 9 V, Rz —> Rz + R3 + R4 + 1^5.

^ R2 + R3 + R4 + R5 _ t^Load
Rl l^Reg

R.+ R3 + R4 + R5=(^-i)r. = (^-i)r.=^.2K.

R5 = 6.2 Rl - Rz - R3 - R4 = 2.4 Rl (B.32)

All resistance values have been specified in terms of Ri. If the current of Ri is
chosen to be 100 Iq, that is 5 mA, the following obtained:

„aes/Ri=5mA

Rl = = 250 a
5 mA
Resistance values of the other resistors may now be determined as follows:

Rz = 350 Q
R3 = R4 = 300 (B.34)

R5 = 600 ^2

If standard ±5-percent tolerance resistors are used, the series combinations of

two resistors can be utilized for those that are not standard values. Alternatively,
if Rl = 150 ^2, then R2 = 210 ^2 (a series connection of a 100 ^2 and a 110 ^2
resistor), R3 = R4 = 180 ^2, and R5 = 360 Q. Only for Rz are two series-connected
resistors required. The current of Ri is 8.3 mA, an acceptable value. Although
0.25-W resistors would be adequate for the circuit, 0.5-W resistors provide a
greater margin of safety (a more conservative design).
The analysis of Section 6.2 covering full-wave rectifiers and nonideal trans¬
formers is used to complete the design. Because the maximum load voltage is 9 V,

B.4 ELECTRONIC POWER SUPPLIES (CHAPTER 6)

 a minimum supply voltage (the voltage across the filter capacitor C) of about 11 V
is needed for the electronic regulator to function properly. Therefore, a design
value of 12 V is appropriate. A transformer with a secondary rms rating of 12 V
is a reasonable choice (see concluding remarks of Section 6.2). Although a trans¬
former with an rms current rating of 0.5 A for its secondary winding might be
acceptable, a standard transformer with a 1-A rating should be used. The higher
current rating, in effect a higher power rating for the transformer, is to ensure that
the tranformer’s power capacity will not be exceeded. In addition to the output
load power, electrical power is dissipated by the diodes of the bridge rectifier as
well as by the regulator.
For a bridge rectifier, the peak inverse voltage of the diodes is approximately
the peak transformer voltage Yrn- For a 12-V rms secondary voltage, the peak
voltage is 17 V. However, the peak inverse voltage for a no-load condition is
larger. Although diodes with a 25-V peak inverse rating might be adequate,
a bridge rectifier with a 50-V rating is preferable. Concurrently, a 1-A bridge
rectifier should be used.
A 0.1-/U.F load capacitor Cl is recommended by the integrated circuit’s man¬
ufacturer to minimize output transient effects. Finally, a value needs to be deter¬
mined for the filter capacitor C. When the diodes are not conducting, the supply
voltage depends on the charge q of the filter capacitor:

^Supply —
1
c
(B.35)
Aq ^Supply A ?
Ar’supply = ^
c
The current /‘supply is the input current of the regulator and, except for very
small load currents, is essentially equal to the load current. Its maximum value
is 500 mA. For a full-wave rectifier, the time interval over which the capacitor
supplies current. At, is approximately T/2, where T is the period of the power
line voltage (T = 1/60 s for a 60-Hz power line frequency). This yields the
following design relationship:

^Supply F'
Al/Supply — (B.36)
2C

Suppose a standard capacitance of 4700 /xF is used. For a load current of 500 mA,
the following is obtained:

(500 mA)(l/60 s)
*^Supply - (2)(4700 /xF) ^ ^

If the supply voltage does not fall below 12 V, this peak-to-peak value of ripple
voltage will be acceptable. However, on the basis of the transformer used, this
may not be the case. A 9-V load voltage setting and a current of 500 mA could
result in a minimum supply voltage that falls below 12 V, causing the regulator
not to function properly. To ensure proper operation, a transformer with a larger
secondary voltage, for example a tranformer with a secondary rms rating of 16 V,

448 THE DESIGN PROCESS

could be used. Also, a larger filter capacitor could be used that would reduce the
ripple of the supply voltage - for example, a capacitance that is the parallel
combination of two 4700-/r,F capacitors. A laboratory testing of the circuit is
necessary to ensure that the supply meets the design requirements.
One final consideration is the tolerance specification of the resistors of the
voltage divider that establish the output voltage. Because resistance values may
vary, so too may the output load voltage. Hence, if a precise output voltage
is required (a tolerance was not included as part of the design specification), a
tighter resistance tolerance,'for example ±1 percent, is necessary. The acceptable
tolerance of the output voltage will depend on the electronic ciruits with which
the supply is used.

REFERENCES

Armstrong, E. H. (1940). Evolution of frequency modulation. Electrical Engineering, 59, 12,

485-93.
Miyaoka, Senri (1984). Digital audio is compact and rugged. IEEE Spectrum, 21, 3, 35-9.

REFERENCES 449
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INDEX

acceptor atom, 69 central processing unit, 40-2

Aiken, Howard, 35 channel-length modulation parameter, 227
Ampere, Andre Marie, 13 charge storage, 278
ampere-hour, 408 Christie, Samuel, 374
Armstrong, Edwin Howard, 10-12, 133, 434 Clarke, Arthur C., 32
Atanasoff, John V., 220 Clarke orbit, 32-3
CMOS logic gate, 262-9
Babbage, Charles, 35 dynamic response, 267-8
band-gap energy, 101 inverter gate, 264-8
band-gap voltage reference, 399-401 p-channel device, 262—4
Bardeen, J., 59 supply current, 266-7
batteries, 406-10 transfer characteristic, 266
alkaline-manganese dioxide, 407 CMOS NAND gate, 268-9
carbon-zinc, 406-7 CMOS NOR gate, 268-9
discharge, 408-9 coherer, 8
reversible, 408 common-base transistor, 137-40
zinc-chloride, 407 characteristic, 139
battery backup, 409-10 current gain, 138
Bell, Alexander Graham, 13, 300 physical description, 137-8
bipolar junction transistor, 133-53 small-signal equivalent circuit, 139
characteristic, 134 common-emitter transistor, 143-9
NPN, 134-6 current gain, 143
PNP, 190-6 hybrid-TT model, 183-4
bistable circuit, 272^ logic inverter, 164-70, 435-6
Black, Harold, 299 mutual conductance, 184
Boole, George, 36 saturation, 146
Boot, Henry, 32 small-signal amplifier, 436-9
Branly, Edouard, 8 small-signal equivalent circuit, 181-3
Brattain, W. H., 59 SPICE simulation, 146-9
Braun, Ferdinand, 8, 21, 28 transfer characteristic, 144-5
Buie, J. L., 173 common-source transistor, 231-5
Bush, Vannevar, 35 amplifier, 233
biasing, 439-42
Campbell, Stephen A., 432 mutual conductance, 234
capacitive coupling, 179-81 small-signal equivalent circuit, 234
capacitive load, 166-70 SPICE simulation, 241-4
capacitor-resistor logic circuit transfer characteristic, 231-3
charge storage, 244-5 complementary symmetry, 193-6
power dissipation, 246 conductivity, 61
carrier multiplexing, 300 cutoff, MOSFET, 223
cathode-ray tube, 21-3 Czochralski process, 427
 data register, 39-42 Hertz, Heinrich Rudolf, 8, 28
De Forest, Lee, 5, 8, 11, 133 hole, 67
decibel notation, 304-5
ideal operational amplifier, 327-31
deemphasis circuit, 339, 341-2
capacitive feedback circuit, 329-30
design, 342^
inverting amplifier, 328
SPICE, 344-6
inverting and noninverting input, 328-9
Dennard, Robert H., 220
noninverting amplifier, 328, 442-5
detector, 4, 12
diffusion, 74, 428 summing amplifier, 329
digital logic circuits, 164-5 virtual short, 327
diode induced carriers, 221-2
constant voltage model, 94-5 Institute of Electrical and Electronic Engineers, 8

logic gates, 36-7 Institute of Electrical Engineers, 8

semiconductor, 4, 72-7 Institute of Radio Engineers, 8, 11
series resistor model, 95-6 integrated circuits, 7, 423-33
SPICE, 81-2 BiCMOS, 425
switch model, 92-4 fabrication, 427-32
terminal characteristic, 77-82 crystal growth, 427-8
vacuum, 3-4 doping
donor atom, 68 ion implantation, 429
doping, 68 thermal diffusion, 428
ion implantation, 429 epitaxial deposition, 428
thermal diffusion, 428 etching, 431
drift velocity, 62 optical lithography, 429-31
Dunwoody, Henry H. C., 4 thermal oxidation, 429
thin films, 431-2
Early effect, 146-7 wafer fabrication, 427-8
Early, J., 146 MOSFET, 426-7
Eccles-Jordan flip-flop, 274 NPN transistor, 425-6
Edison effect, 3 physical dimensions, 423-4
electron, 60 intermediate frequency, 12-13
electron volt, 101 iteration, 85-7
electronic regulator, 370
electronics, 1 junction diode, 72-83
energy storage, 369 built-in potential, 75-6
epitaxial deposition, 428 current, 78-81
etching, 431 depletion region, 74-5
ideality factor, 78
feedback modeling, 92-6
negative, 299-301, 303-10 SPICE, 81-2
positive, 10-1, 272^, 316 terminal characteristics, 77-83
fiber-optic system, 113
filter, 370, 380-4 Kilby, Jack, 7
full-wave, 383-4 klystron, 31-2
half-wave, 380-2
Fleming, Sir John Ambrose, 3 Leclanche, Georges, 406
light-emitting diode, 107-8
flip-flop memory element, 37-8, 274-5
free electron, 67 display, 109-11
frequency multiplexing, 300 infrared control, 110-11
frequency spectrum, 29-30 Lilienfeld, Julis Edgar, 217
load line
Gabry-Perot cavity, 112 common-emitter transistor, 134-5
gain margin, 321 common-source transistor, 253—4
gallium arsenide diode, 84-7
laser, 112-13 local oscillator, 12-13
light-emitting diode, 108 Lodge, Oliver Joseph, 8
germanium, 65 logic families
CMOS, 262-9
Haynes-Shockley experiment, 137 diode-transistor, 171-2
Heaviside, Oliver, 8 direct coupled, 170-1

452 INDEX
 resistor-transistor, 170-1 ideal, 327-31
transistor-transistor, 164, 173^ integrated circuit, 301-2
logic memory, 220-1, 272-80 limitations
frequency response, 331-2
magnetron, 32
gain-bandwidth product, 332
majority carriers, 76
slew rate, 334
Marconi, Guglielmo, 8, 21, 28
single supply voltage, 350
Maxwell, James Clerk, 8
wide-bandwidth amplifier, 346-55
memory
operational amplifier regulator, 396-8
disk, 44
equivalent circuit, 397
ferrite core, 42-3 ,
power supply rejection ratio, 397
flip-flop, 38
optical lithography, 429-31
tape, 43
memory array, 275-80 Pascal, Blaise, 35
charge storage, 278 Pearson, G. L., 59
dynamic, 278-80 phase margin, 321
flip-flop cell, 275-8 photodiode, 24—5
one-transistor cell, 220-1, 279 photon, 23, 100
random access, 278 photoresist, 430
static, 278 photovoltaic cell, 100-4
three-transistor cell, 279 current, 102
metal-oxide field-effect transistor, 6, 24, 217-80 equivalent circuit, 102-3
drain characteristic, 6, 219 power output, 103
logic gate, 37-8, 247-50 structure, 101
physics, 221-3 Pickard, Greenleaf W., 4
SPICE, 226-8 Pierce, John R., 33, 59
structure, 218 pinch-off, MOSFET, 225
switch, 220 PNP transistor, 190-6
transfer characteristic, 219-20 common-base model, 191
Millikan, Robert A., 60 common-emitter model, 192
minority carriers, 76 current carriers, 191-2
mobility, 62 preemphasis circuit, 339-41
Moore, Gordon, 45-6 design, 342^
Morse, Samuel F. B., 13 SPICE, 344-6
MOSFET inverter gate, 247-50
depletion-type load, 257-8 quantum dot, 47
enhancement-type load, 253-5
fall time, 249-50 radar, 30-2
high-output voltage, 248 Randall, John, 32
low-output voltage, 248 random-access memory, 220-1, 275-80
rise time, 248 rectification, 369
MOSFET NAND gate, 258-9 rectifiers, 371-6
MOSFET NOR gate, 258-9 full-wave
MOSFET p-channel device, 262^ bridge, 374-6
center-tapped transformer, 373—4
multiplexing
half-wave, 371-3
analog, 16-17, 300
regeneration, 10-11
digital 17-19
regulator
mutual conductance
electronic, 396^05, 445-9
common-emitter transistor, 184
zener diode, 390—4
common-source transistor, 234
relay, 36-7
Napier, John, 35 resistivity, 61
negative feedback, 299-327 ripple voltage, 381
benefits, 309-10 RS flip-flop, 275
distortion reduction, 305-9
sampling, 17-18
feedback fraction, 303
satellite, 32-5
Oersted, Hans Christian, 13 saturation, MOSFET, 225
operational amplifier Schawlow, Arthur L., Ill
analog computer, 301 Schottky gate, 217

INDEX 453
 Schottky transistor, 174 thermal oxidation, 429
semiconductor, 61-9 thermal potential, 79
intrinsic, 66-8 thermionic valve, 3-6
«-type, 68-9 thin film, 431-2
p-type, 69 threshold voltage, 223
Shannon, Claude E., 36 totem-pole output, 174
Shockley, William, 59, 217, 390 Townes, Charles H., Ill
silicon, 65 transconductance parameter, 224
small-signal behavior, 177-85 transfer resistor, 59
ac component, 178 transformer, nonideal, 384-7
analog signals, 178 triode, 5-6
quiescent component, 178-9 tuning, 9-10
Smith, Willoughby, 100
source-follower amplifier, 235-8 vacuum tube, 3-6
output resistance, 237-8 Varian, Russell, 31
small-signal equivalent circuit, 237 Varian, Sigurd, 31
transfer characteristic, 236 video iconoscope, 24
stability, 316-22 virtual short, 327
gain margin, 321 Volta, Alessandro, 13, 406
phase margin, 321
phase shift, 317-21 wavelength, 28
well-behaved response, 322 Wheatstone, Charles, 374
substrate bias, 255-7 wide-bandwidth amplifier, 346-55
body-bias coefficient, 256 single stage, 346-7
SPICE, 256-7 single supply voltage, 350
threshold voltage, 256 three stage, 348-9
sun, spectral intensity, 100 two stage, 348
superheterodyne receiver, 11-13 Widlar, Robert, 301
switching regulator, 404-5 Wilson, A. H., 59
wireless, 8-13
telegraph, 13-14
telephone Zener, Clarence, 390
analog, 11-17, 299-300 zener diode, 390-1
digital, 17-19 equivalent circuit, 391-2
television, 19-26 regulator, 392-4
analog, 20-1 voltage reference, 398-9
digital, 26-8, 35 Zworykin, Vladimir K., 19, 21, 23

454 INDEX
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 ALBERTSON COLLEGE OF IDAHO

3 5556 0017 7392

DATE DUE ** ^ ' '"■*

NOV 0-^ 2m

Demco, Inc. 38-293

 V,

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 Electronic Concepts is a clear, self-contained introduction to modem
microelectronics. Analog and digital circuits are stressed equally
from the outset, and the applications of particular devices and cir¬ Eg
cuits are described within the context of actual electronic systems. A
combination of bottom-up and top-down approaches is used to
integrate this treatment of devices, circuits, and systems.
The author begins with an overview of several important elec¬
tronic systems, discussing in detail the types of signals that circuits
are used to process. In the following chapters he deals with individ¬
ual devices such as the bipolar junction transistor and the metal-
oxide semiconductor field-effect transistor. For each device he pre¬
sents a brief physical description and demonstrates the use of dif¬
ferent models in describing the device's behavior in a particular cir¬
cuit application. Throughout the book, he uses SPICE computer
simulations extensively to supplement analytic descriptions.
The book contains over 500 circuit diagrams and figures, over 400
homework problems, and over 100 simulation and design exercises.
It includes many worked examples and is an ideal textbook for
introductory courses in electronics. It can also be used for self-study.
Laboratory experiments related closely to the material covered in
the book are available via the World Wide Web.

Jerrold H. Krenz received his Ph.D. from Stanford University and is

Associate Professor of Electrical and Computer Engineering at the
University of Colorado, Boulder. He is the author of several books,
including Microelectronic Circuits: A Laboratory Approach, and An
Introduction to Electrical Circuits and Electronic Devices: A Laboratory
Approach.

Cambridge
UNIVERSITY PRESS
ISBN 0-521-66282-6

COVER DESIGN BY JAMES E. BKISSON

I9 780521 662826 I